JP7331672B2 - Semiconductor device, wireless receiver using the same, and semiconductor device manufacturing method - Google Patents

Description

The present invention relates to a semiconductor device, a radio receiver using the same, and a method of manufacturing the semiconductor device.

A backward diode, which is a type of tunnel diode, has been studied as a device for receiving radio waves in environmental radio wave generation, wireless communication, and the like (see, for example, Patent Document 1). In order to detect high frequencies such as microwaves, millimeter waves, and terahertz waves with high sensitivity or to convert them into electrical energy efficiently, it is desirable that the voltage-to-current (IV) characteristics have large nonlinearity near 0V. That is, it is required that the current rises steeply in the direction of current flow and that the breakdown voltage in the direction opposite to the direction of current flow is high.

In the backward diode, current rises steeply due to band-to-band tunneling current on the current flow side (negative bias side), and steep on/off rectification is obtained near zero bias. Due to this characteristic, the light receiving sensitivity of the diode is high, and weak high frequency (RF: Radio Frequency) can be converted into direct current (DC: Direct Current).

Schottky barrier rectifiers with MOS trenches are known (see, for example, Patent Document 2).

JP 2012-43965 A Japanese Patent Publication No. 8-512430

Conventional backward diodes do not have sufficient withstand voltage on the positive bias side where the current is to be suppressed, and when the input power is large, current flows in the forward direction due to the voltage swing. It cannot convert high-power RF signals to DC current, and has a limited dynamic range for rectifying performance.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device capable of highly sensitive detection and having a wide dynamic range of rectification.

In one aspect, the semiconductor device comprises:
a first conductivity type first semiconductor layer having a plurality of protrusions on its surface;
a second conductivity type second semiconductor layer in contact with the bottom surface of the first semiconductor layer;
an insulating film formed on side surfaces of the plurality of protrusions;
a first metal electrode ohmically connected to the top of each of the plurality of protrusions;
and a second metal electrode connected to the second semiconductor layer.

A semiconductor device capable of highly sensitive detection and having a wide dynamic range of rectification is realized.

It is a figure explaining the problem of the withstand voltage|voltage in a forward direction. It is a cross-sectional schematic diagram of the semiconductor device of embodiment. 4 is an enlarged view of a connecting portion between a semiconductor layer of a first conductivity type and an electrode; FIG. It is a figure explaining operation|movement of the semiconductor device of embodiment. It is a structural example of the protrusion structure of the tip of a semiconductor layer. FIG. 6 is a resist pattern for forming the projection structure of FIG. 5. FIG. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a manufacturing-process figure of the semiconductor device of embodiment. It is a figure of the modification of the semiconductor device of embodiment. It is a configuration example of a radio receiver to which a semiconductor device is applied. It is another configuration example of a wireless receiver to which a semiconductor device is applied.

Before describing the embodiments in detail, the problem of the forward withstand voltage of the backward diode will be described. FIG. 1 shows the current-voltage characteristics of a backward diode with a mesa size of 20 μm. A backward diode that utilizes a tunnel current flowing through a pn junction barrier causes a sharp negative current to rise with a slight negative bias. On the other hand, when the voltage exceeds 0.2 V on the positive bias side where the current should be suppressed, the current starts to flow. In order to exhibit rectification performance even when the power of the received RF signal is large, the sharp rise on the negative bias side is maintained, and the positive bias side withstand voltage is increased to reduce the nonlinearity near zero bias. Need to improve.

In the embodiment, by proposing a shape in which the current path is likely to be narrowed when a bias is applied in the direction opposite to the direction in which the current flows, the sensitivity in the direction in which the current flows is maintained, and the current is to be suppressed in the direction in which it should be suppressed. Strengthen the pressure resistance of When the semiconductor device operates backward, the rise of the current in the reverse direction is made steeper and the withstand voltage in the forward direction is increased.

<Device configuration>
FIG. 2 is a schematic cross-sectional view of the semiconductor device 10 of the embodiment. A semiconductor layer 13 of a second conductivity type and a semiconductor layer 15 of a first conductivity type are laminated in this order on a substrate 11 . The semiconductor layer 15 of the first conductivity type is electrically connected to the first metal electrode 18 and the semiconductor layer 13 of the second conductivity type is electrically connected to the second metal electrode 19 .

As an example, the semiconductor layer 15 of the first conductivity type is made of a p-type semiconductor, and the semiconductor layer 13 of the second conductivity type is made of an n-type semiconductor. In this example, the p-type semiconductor layer 15 is processed into a mesa shape, and a pn junction is formed at the interface between the p-type semiconductor layer 15 and the n-type semiconductor layer 13 . The periphery of the mesa of the p-type semiconductor layer 15 is filled with an insulating film 16 and an insulating film 17 .

The p-type semiconductor layer 15 has a plurality of protrusions 150 at the interface with the first metal electrode 18 . Each protrusion 150 has a shape in which the cross-sectional area in the plane horizontal to the substrate decreases from the bottom to the top. Although the side surface of the projection 150 is covered with a thin insulating film 161 , the p-type semiconductor layer 15 is exposed at the tip and is in ohmic contact with the first metal electrode 18 .

The mesa width of the p-type semiconductor layer 15 may be, for example, several μm to 10 μm or more. On the other hand, the protrusions 150 formed on the upper end portion of the semiconductor layer 15 are as fine as 100 nm or less in width in the arrangement direction.

The shape of the fine protrusions 150, which are narrower at the top than at the bottom, effectively narrows the current path and improves the withstand voltage against forward bias.

FIG. 3 is an enlarged view of the connecting portion between the p-type semiconductor layer 15 and the first metal electrode 18 in FIG. The side surface of the mesa-shaped p-type semiconductor layer 15 and the side surface of each protrusion 150 are covered with a thin insulating film 161 . Insulating film 161 is, for example, a film of aluminum oxide (Al ₂ O ₃ ). The thickness of the insulating film 161 is a thickness that does not impair the shape of the protrusion 150 that tapers toward the tip, and is, for example, about 5 to 15 nm.

The first metal electrode 18 fills the unevenness of the upper end of the p-type semiconductor layer 15 . A portion of the insulating film 161 covering the protrusions 150 is removed to expose the top portion 151 of each protrusion 150 . The p-type semiconductor layer 15 is in contact with the first metal electrode 18 at the exposed surface 152 . As described above, the contact between the p-type semiconductor layer 15 and the first metal electrode 18 is ohmic contact.

The protrusion 150 has a width of "d" and a height of "h" in the arrangement direction. The height h of the protrusion 150 is equal to or greater than the width d (h≧d). By setting the height h to be equal to or greater than the width d in the array direction, the projection 150 becomes vertically elongated, making it easier to obtain the effect of current constriction when a forward bias is applied. Under the condition of h≧d, the apex angle θ of the cross section of the projection 150 is 53° or less.

The width d of the protrusion 150 can be designed to an appropriate value as long as the effect of current constriction is obtained. 2 and 3, fine projections 150 having a width d of 100 nm or less are provided on the upper surface of the p-type semiconductor layer 15 in the stacking direction. In other words, the in-plane pitch of the protrusions 150 is 100 nm or less.

A side surface of each protrusion 150 is a MIS (Metal-Insulator-Semiconductor) junction formed by the first metal electrode 18 , the insulating film 161 and the p-type semiconductor layer 15 . This MIS junction can control the spread of the depletion layer in the direction crossing the direction in which carriers flow.

4A and 4B are diagrams for explaining the operation of the semiconductor device 10. FIG. FIG. 4A shows the state of the depletion layer 155 when a reverse bias (negative bias in this example) is applied. FIG. 4B shows the state of the depletion layer 155 when a forward bias (in this example, a positive bias) is applied. When a (negative bias) is applied, the depletion layer 155 of each protrusion 150 exists near the interface with the insulating film 161 , and holes in the p-type semiconductor layer 15 flow into the first metal electrode 18 .

When a forward bias (positive bias) is applied to the first metal electrode 18 as shown in FIG. Spreading out, holes cannot tunnel to the valence band level of the ohmic junction.

This operation also holds when the first conductivity type and the second conductivity type are reversed. When the first conductivity type is the n-type, when a reverse bias (negative bias) is applied to the first metal electrode, the depletion layer 155 of each protrusion 150 exists near the interface with the insulating film 161 . Then, electrons in the n-type semiconductor layer flow out toward the pn junction with the p-type semiconductor (semiconductor layer 13 of the second conductivity type).

When a forward bias (positive bias) is applied to the first metal electrode, the depletion layer 155 spreads from the interface of the n-type semiconductor layer toward the center of the projection 150, and electrons are transferred to the conduction band level of the ohmic junction. cannot pass through.

Since each protrusion 150 has a shape in which the cross-sectional area in the plane horizontal to the substrate decreases toward the top, the spread of the depletion layer inside the protrusion 150 can be controlled in the direction intersecting the direction in which carriers flow. can be done. Current confinement by the depletion layer 155 occurs when the width or diameter of the protrusion 150 is sufficiently small relative to the spread of the depletion layer 155 .

When the width d of the protrusion 150 is 100 nm or less, the depletion layer 155 extending from the side surface of the protrusion 150 can be brought into contact, enabling highly efficient current control. Since the width of the depletion layer 155 also depends on the doping concentration, material, etc. in the semiconductor, these parameters are controlled so that the depletion layer 155 is half the width or diameter of the protrusion 150 when forward biased. You may control so that it may exceed.

As a result, the withstand voltage in the forward direction is improved, and in the reverse direction, current flows steeply with a small on-voltage, expanding the dynamic range of rectification performance.

FIG. 5 is a configuration example of protrusions provided on the semiconductor layer 15 of the first conductivity type. All of them are views of the semiconductor device 10 viewed from above in the stacking direction. In FIG. 5A, a plurality of pyramidal projections 150A are arranged in two dimensions. Each protrusion 150A has an apex 151a. The slope of the projection 150A is covered with the insulating film 161 except for the top portion 151a and its periphery.

In FIG. 5B, a plurality of conical projections 150B are arranged in two dimensions. Each protrusion 150B has an apex 151b. The slope of the protrusion 150B is covered with the insulating film 161 except for the top portion 151b and its periphery.

In FIG. 5C, a plurality of triangular prism-shaped protrusions 150C are arranged in a direction orthogonal to the long axis of the protrusions 150C. Each projection 150C has a top 151c. The slope of the projection 150C is covered with the insulating film 161 except for the top portion 151c and its periphery.

FIG. 6 is a resist pattern for forming the protrusion structure of FIG. All of them are views of the semiconductor device 10 viewed from above in the stacking direction. The resist pattern 26A of FIG. 6A is used when forming the protrusion 150A of FIG. 5A. By performing oblique etching from different directions, the protrusion 150A in FIG. 5A is obtained.

The resist pattern 26B of FIG. 6B is used when forming the protrusion 150B of FIG. 5B. By performing isotropic etching while controlling the supply rate and reaction rate of the etching gas by reactive etching, the protrusion 150B in FIG. 5B can be obtained.

The resist pattern 26C of FIG. 6(C) is used when forming the protrusion 150C of FIG. 5(C). By forming a striped resist pattern 26C and performing oblique etching from both directions of the resist pattern 26C, the protrusion 150C of FIG. 5(C) is obtained.

5A to 5C, by sufficiently reducing the width or diameter of each protrusion 150, the depletion layer 155 expanded inside the protrusion 150 can be brought into contact.

<Device manufacturing process>
7A to 7L are manufacturing process diagrams of the semiconductor device 10 of the embodiment. The processes and materials used below are examples and are not intended to limit the invention.

In FIG. 7A, semiconductor layers are laminated on a semi-insulating InP substrate 11 by epitaxial growth by MOCVD (Metal Organic Chemical Vapor Deposition). Specifically, an i-InAlAs buffer layer 12 is grown to a thickness of 200 to 300 nm on an InP substrate 11 . Next, the semiconductor layer 13 of the second conductivity type is formed of InGaAs heavily doped with n-type impurities. The second conductivity type semiconductor layer 13 does not necessarily have to be a single layer, and may be formed of two or more InGaAs layers with different n-type impurity concentrations. In this case, the impurity concentration of at least one layer is set to approximately 1×10 ¹⁹ cm ⁻³ .

Next, the semiconductor layer 15 of the first conductivity type is formed of GaAsSb doped with p-type impurities. As a p-type impurity, for example, Zn is doped at a concentration of 2×10 ¹⁹ cm ⁻³ . This results in the stack of FIG. 7A.

In FIG. 7B, for example, by wet etching, the semiconductor layer 15 of the first conductivity type is processed into a predetermined mesa shape. The plane size of the mesa may be several μm to 10 μm or more. This mesa processing partially exposes the surface of the semiconductor layer 13 of the second conductivity type.

In FIG. 7C, an insulating film 16 such as aluminum oxide is formed on the entire surface by the CVD method or the like. Thereafter, an insulating resin such as BCB (benzocyclobutene) is spin-coated on the entire surface and baked to form an insulating film 17 .

In FIG. 7D, the insulating film 17 is thinned by cutting, and the upper end portion of the semiconductor layer 15 of the first conductivity type protrudes from the insulating film 17 by a predetermined amount. The cutting also removes the insulating film 16 covering the semiconductor layer 15 of the first conductivity type. The amount of protrusion of the semiconductor layer 15 of the first conductivity type from the surface of the insulating film 17 is such that the height h of the protrusion 150 can be secured.

In FIG. 7E, a resist film 260 is applied to the entire surface and patterned into a pattern corresponding to the desired shape of the protrusion 150 . The patterned portion becomes the resist pattern 26 . When the width d of the bottom of the protrusion is set to 100 nm or less, the resist film 260 is patterned by electron beam (EB) lithography. Using the resist film 260 including the resist pattern 26 as a mask, a protrusion 150 is formed in the semiconductor layer 15 of the first conductivity type by dry etching. After the dry etching, wet etching may be performed to shape the projections 150 .

In FIG. 7F, the resist film 260 including the resist pattern 26 is removed, and a thin insulating film 161 is formed on the entire surface. The thickness of the insulating film 161 is a thickness that enables control of the depletion layer inside the protrusion 150, eg, 5 to 15 nm. The thin insulating film 161 is, for example, a thin film of aluminum oxide and is formed by an ALD (Atomic Layer Deposition) method.

In FIG. 7G, after resist is spin-coated on the entire surface and baked, the resist is thinned by cutting until the tops 151 of the projections 150 of the semiconductor layer 15 of the first conductivity type are exposed. In this cutting process, the resist film formed on the insulating film 17 and the insulating film 161 covering the top portion 151 of the protrusion 150 are also removed. As a result, the top portion 151 of the protrusion 150 becomes the exposed surface 152 .

In FIG. 7H, a resist mask 31 having a predetermined opening pattern 311 is formed, and contact holes 171 are formed in the insulating film 17 .

In FIG. 7I, for example Au is deposited and lifted off to form a second metal electrode 14 connected to the semiconductor layer 13 of the second conductivity type. Thereafter, the resist mask 31 is removed, and a resist mask 32 having opening patterns 321 at positions corresponding to the mesas of the semiconductor layer 15 of the first conductivity type is formed.

In FIG. 7J, Au is deposited and lifted off to form the first metal electrode 18 covering the protrusion 150 of the semiconductor layer 15 of the first conductivity type. After that, the resist mask 32 is removed. Since the tip of each projection 150 is an exposed surface 152 , the first metal electrode 18 contacts the semiconductor layer 15 of the first conductivity type at the tip of the projection 150 . This contact is an ohmic contact. A first metal electrode 18 fills the valleys between adjacent protrusions.

In FIG. 7K, an interlayer insulating film 35 is formed by, for example, spin-coating and baking BCB, and a contact hole 351 reaching the first metal electrode 18 and a second metal electrode 19 are formed in the interlayer insulating film 35 . A contact hole 352 is formed.

In FIG. 7L, the contact hole is filled with a conductive material, the conductive film covering the surface of the interlayer insulating film 35 is patterned into a predetermined shape, and the extraction electrode 36 connected to the first metal electrode 18 and the second metal electrode 36 are formed. An extraction electrode 37 connected to the electrode 19 is formed. Thereby, the backward semiconductor device 10 having the protrusion 150 is obtained.

When the semiconductor device 10 is reverse biased, the depletion layer at the interface of the protrusion 150 becomes thin and carriers flow. The semiconductor layer 15 of the first conductivity type and the semiconductor layer 13 of the second conductivity type are doped with impurities at a concentration of 1×10 ¹⁸ cm ⁻³ or more, and the carriers are the semiconductor layer 15 of the first conductivity type and the semiconductor layer 13 of the second conductivity type. The potential barrier at the interface of the two-conductivity-type semiconductor layer 13 is directly tunneled. This causes the current to rise sharply with a small reverse bias.

On the other hand, when the semiconductor device 10 is forward biased, the depletion layer expands from the interface of the projection 150 toward the center, blocking the flow of carriers and improving the forward withstand voltage.

<Modification>
FIG. 8 is a schematic cross-sectional view of a semiconductor device 20 that is a modification of the semiconductor device of the embodiment. The same components as those of the semiconductor device 10 of FIG. 2 are denoted by the same reference numerals, and overlapping descriptions are omitted.

In the semiconductor device 10 shown in FIG. 2, fine elongated projections having a width d of 100 nm or less and a height h of 100 nm or more in the arrangement direction are formed on the surface of the semiconductor layer 15 of the first conductivity type. The first metal electrode 18 fills the valleys between the adjacent projections 150 up to the roots of the projections 150 and controls the thickness of the depletion layer on the side surfaces of the projections 150 excluding the tops 151, that is, the entire slope.

In the modified example of FIG. 8, the size of each projection 250 is increased, and only the vicinity of the top portion 251 of each projection 250 is covered with the first metal electrode 28 . This facilitates the formation of the projections 250, maintains the thickness control of the depletion layer inside the fine structure, and secures rectification performance with high sensitivity and high withstand voltage.

The semiconductor device 20 has a stack of a semiconductor layer 13 of a second conductivity type and a semiconductor layer 25 of a first conductivity type on a substrate 11 . As an example, the semiconductor layer 25 of the first conductivity type is made of a p-type semiconductor, and the semiconductor layer 13 of the second conductivity type is made of an n-type semiconductor. The interface between the mesa-shaped p-type semiconductor layer 25 and the n-type semiconductor layer 13 forms a pn junction. The width of the mesa may be, for example, several μm to 10 μm or even more. The p-type semiconductor layer 25 is electrically connected to the first metal electrode 28 and the n-type semiconductor layer 13 is electrically connected to the second metal electrode 19 .

The p-type semiconductor layer 25 has a plurality of protrusions 250 on the side opposite to the pn junction. Each protrusion 250 has a shape in which the cross-sectional area in the plane horizontal to the substrate decreases from the bottom to the top 251 . The width D of the bottom portion along the arrangement direction of the protrusions 250 is about 200 nm, which is larger than the protrusions 150 in FIG. The height of the protrusion 250 is set to 200 nm or more, and has an oblong shape with a vertical cross-sectional angle of 53° or less, as in FIG.

The side surface of the protrusion 250 is covered with a thin insulating film 261 , but the p-type semiconductor layer 25 is exposed at the tip and is in contact with the first metal electrode 28 . The contact between the p-type semiconductor layer 25 and the first metal electrode 28 is ohmic contact.

Although the overall size of the protrusion 250 is large, the first metal electrode 28 covers only the vicinity of the top 251 of the protrusion 250 . The width d in the arrangement direction of the projection 250 at the lowermost end in the stacking direction of the first metal electrode 28 is 100 nm or less as in FIG. It is inside the fine structure near the top 251 that the thickness or spread of the depletion layer at the interface of the protrusion 250 is controlled by applying a bias through the insulating film 261 .

The first metal electrode 28 covers only the vicinity of the top 251 of the protrusion 250, and the gap between the protrusion 250 and the protrusion 250 is filled with an insulating film 280 provided under the first metal electrode 28. . The insulating film 280 may be an insulating resin such as BCB, like the insulating film 27 .

When manufacturing the semiconductor device 20, after forming the protrusion 250, a thin insulating film 261 is formed on the entire surface, a resin film is applied, and then the thickness of the resin film is reduced to a predetermined thickness by cutting. A membrane 280 is formed. At this time, the cutting process removes a portion of the insulating film 261 at the top portion 251 of the protrusion 250 to expose the semiconductor layer 25 of the first conductivity type.

The configuration of FIG. 8 is advantageous from the viewpoint of the manufacturing process because the protrusion 250 can be enlarged and can be formed by normal photolithography and etching without using EB lithography. On the other hand, by applying a forward bias through the insulating film 261, the thickness of the depletion layer is controlled inside the fine structure near the top 251, so that the flow of carriers to be suppressed can be effectively blocked. can be done.

<Application example>
FIG. 9 is a schematic diagram of a radio receiver 300 to which the semiconductor device 10 or 20 (hereinafter simply referred to as "semiconductor device") of the embodiment is applied. Radio receiver 300 is used for detection on the receiving side of a radio communication system.

A radio receiver 300 has a receiving antenna 301 , a low noise amplifier 302 connected to the receiving antenna 301 , a diode 303 connected to the low noise amplifier 302 , an inductor 304 connected to the low noise amplifier 302 , and an output terminal 305 . The semiconductor device of the embodiment can be used for the diode 303 .

A high-frequency radio signal received by the receiving antenna 301 is amplified by the low-noise amplifier 302 and then input to the diode 303 . Diode 303 operates, for example, in a backward manner to detect and rectify an input high frequency signal with high sensitivity. Inductor 219 removes the AC component remaining in the rectified current and outputs a voltage.

FIG. 10 is a schematic diagram of a radio receiver 400 to which the semiconductor device of the embodiment is applied. The wireless receiver 400 is used for energy harvesting that converts environmental radio waves into electric power, or microwave generators.

Radio receiver 400 has receiving antenna 401 , diodes 402 and 403 connected to receiving antenna 401 , smoothing capacitor 404 and voltage stabilization circuit 405 connected to diode 403 , and output terminal 406 .

Receiving antenna 401 receives, for example, microwaves as energy. Diodes 402 and 403 full-wave rectify microwaves incident from the receiving antenna 401 . A smoothing capacitor 404 provides a stable DC output. A voltage stabilization circuit 405 makes the DC output a constant value. The output terminal 406 is connected to the power supply of the electronic device, and a constant DC output is supplied to the power supply.

This configuration improves energy conversion efficiency over a wide range of radio wave intensity. A wide range of highly efficient power conversion can be realized, from the harvesting of minute power such as environmental radio waves to the power conversion of powerful microwaves used in microwave power transmission.

The present invention is not limited to the embodiments described above, and various modifications are possible. The first conductivity type semiconductor layer on which the protrusion 150 or 250 is formed may be an n-type semiconductor. For example, in the embodiment, the p-GaAsSb layer is stacked on the n-InGaAs layer and the p-GaAsSb layer is provided with a protrusion. may be provided with protrusions. In this case, the projection of n-InGaAs is in ohmic contact with the metal electrode serving as the cathode.

When a forward bias is applied to the cathode, current constriction occurs due to depletion inside protrusions 150 or 250, resulting in rectification. Since depletion is a phenomenon in which the current does not flow as the voltage increases, a rectifying operation with a high withstand voltage is realized. When a reverse bias is applied to the cathode, the depletion layer becomes thinner, allowing electrons to flow in and allow the same current to flow as in a conventional diode.

As a combination of the n-type semiconductor and the p-type semiconductor, n-InGaAs and p-AlGaSb, n-InAlAs and p-InGaSb, or the like may be used.

The material of the first metal electrode and the second metal electrode is not limited to Au. In order to improve the performance as an ohmic electrode, TiW is inserted between the p-type semiconductor and Au, and TiW is inserted between the n-type semiconductor and Au. may be inserted with AuGe.

In order to form an ohmic contact between the semiconductor layer of the first conductivity type and the first metal electrode, an electrode material suitable for the semiconductor material of the first conductivity type is selected based on the work function, electron affinity, interface level, etc. may be selected.

When the semiconductor layer of the first conductivity type is formed of p-GaAsSb, Ni, Pd, Pt, or the like may be used instead of Au as the metal for ohmic contact. When the semiconductor layer of the first conductivity type is formed of n-GaAsSb, Ti or the like may be used instead of Au as the metal for ohmic contact.

The number of stacked semiconductor layers is not limited to one p-type semiconductor layer and one n-type semiconductor layer. good. For example, n-InAs may be inserted between p-GaAsSb and n-InGaAs to form a mesa with p-GaAsSb and InAs. In this case, the interface between p-GaAsSb and n-InAs becomes a pn junction. The n-InAs is electrically connected to the second metal electrode 19 via n-InGaAs.

In any of the modifications, by controlling the thickness of the depletion layer inside the fine projection structure, the breakdown voltage can be improved in the forward bias, and a steep current rise can be obtained in the reverse bias.

10, 20 semiconductor device 11 substrate 13 second conductive type semiconductor layers 15, 25 first conductive type semiconductor layers 18, 28 first metal electrode 19 second metal electrode 16 insulating films 17, 280 insulating films 150, 250 Protrusions 151, 251 Top 152 Exposed surfaces 161, 261 Insulating films 300, 400 Wireless receiver

Claims (10)

a first conductivity type first semiconductor layer having a plurality of protrusions on its surface;
a second conductivity type second semiconductor layer in contact with the bottom surface of the first semiconductor layer;
an insulating film formed on side surfaces of the plurality of protrusions;
a first metal electrode ohmically connected to the top of each of the plurality of protrusions;
a second metal electrode connected to the second semiconductor layer ;
A semiconductor device according to claim 1, wherein each of said plurality of projections has a shape in which a cross-sectional area decreases from a bottom portion toward said top portion, and a vertical angle of said plurality of projections is 53° or less. a first conductivity type first semiconductor layer having a plurality of protrusions on its surface;
a second conductivity type second semiconductor layer in contact with the bottom surface of the first semiconductor layer;
an insulating film formed on side surfaces of the plurality of protrusions;
a first metal electrode ohmically connected to the top of each of the plurality of protrusions;
a second metal electrode connected to the second semiconductor layer;
with
A semiconductor device according to claim 1, wherein the plurality of protrusions have a width of 100 nm or less in the arrangement direction at the lowest position in the stacking direction of the first metal electrode. a first conductivity type first semiconductor layer having a plurality of protrusions on its surface;
a second conductivity type second semiconductor layer in contact with the bottom surface of the first semiconductor layer;
an insulating film formed on side surfaces of the plurality of protrusions;
a first metal electrode ohmically connected to the top of each of the plurality of protrusions;
a second metal electrode connected to the second semiconductor layer;
with
The first metal electrode is formed from the top of the plurality of protrusions to the middle of the side surface,
A semiconductor device according to claim 1, further comprising an insulating resin formed from the middle of the side surface to the bottoms of the plurality of projections. a first conductivity type first semiconductor layer having a plurality of protrusions on its surface;
a second conductivity type second semiconductor layer in contact with the bottom surface of the first semiconductor layer;
an insulating film formed on side surfaces of the plurality of protrusions;
a first metal electrode ohmically connected to the top of each of the plurality of protrusions;
a second metal electrode connected to the second semiconductor layer;
with
A semiconductor device according to claim 1, wherein a thickness of a depletion layer extending from an interface between the plurality of protrusions and the insulating film toward the inside of the plurality of protrusions is controlled by applying a bias to the first semiconductor layer. conductor device. The first metal electrode is provided up to the bottoms of the plurality of protrusions, and the insulating film is provided between the first metal electrode and the first semiconductor layer at the bottoms of the plurality of protrusions. 5. A semiconductor device according to any one of claims 1 to 4, characterized in that: 5. The semiconductor device of claim 4 , wherein the depletion layer thickness increases when a forward bias is applied to the first semiconductor layer. A semiconductor device according to any one of claims 1 to 6 ;
a receiving antenna connected to the semiconductor device;
a radio receiver with forming a first semiconductor layer of a first conductivity type having a plurality of protrusions on a surface thereof on a second semiconductor layer of a second conductivity type;
forming an insulating film on the side surface of the protrusion;
forming a first metal electrode in ohmic contact with the top of each of the protrusions;
forming a second metal electrode in contact with the second semiconductor layer;
A method of manufacturing a semiconductor device, wherein each of the plurality of projections is formed to have a cross-sectional area that decreases from the bottom toward the top, and the apex angle of the plurality of projections is 53° or less. forming a first semiconductor layer of a first conductivity type having a plurality of protrusions on a surface thereof on a second semiconductor layer of a second conductivity type;
forming an insulating film on the side surface of the protrusion;
forming a first metal electrode in ohmic contact with the top of each of the protrusions;
forming a second metal electrode in contact with the second semiconductor layer;
The width in the array direction of the plurality of protrusions is set to 100 nm or less at the lowest position in the stacking direction of the first metal electrode.
A method of manufacturing a semiconductor device. forming a first semiconductor layer of a first conductivity type having a plurality of protrusions on a surface thereof on a second semiconductor layer of a second conductivity type;
forming an insulating film on the side surface of the protrusion;
forming a first metal electrode in ohmic contact with the top of each of the protrusions;
forming a second metal electrode in contact with the second semiconductor layer;
The first metal electrode is formed from the top of the plurality of projections to the middle of the side surface, and an insulating resin is arranged from the middle of the side surface to the bottom of the plurality of projections.
A method of manufacturing a semiconductor device.

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