JP7326804B2 - monitoring module - Google Patents

Description

The present invention relates to monitoring modules.

2. Description of the Related Art Conventionally, a technology for detecting external noise entering a power supply line has been disclosed (see Patent Document 1, for example).

JP 2012-104598 A

However, in the prior art as described above, when the duration of the occurrence of external noise is extremely short (for example, about 100 ns), a low-performance sampling device may miss the occurrence of the event. According to such a prior art, in order not to miss the occurrence of an event, the sampling period must be made extremely fast, which sometimes complicates the circuit configuration.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a monitoring module capable of detecting the occurrence of external noise with a simple circuit configuration.

In one embodiment of the present invention, a relay terminal connected to an input power source and an input terminal of a power supply device;
a surge suppression unit including an FG terminal connected to a reference potential of the power supply device, a suppressing element that suppresses a peak value of a surge voltage generated at the relay terminal, and a light emitting element that emits light due to the surge voltage; and the light emitting element. a light-receiving element for outputting a first signal based on the state of light reception of light; an amplifier circuit for outputting a second signal obtained by amplifying the first signal; a switching element which is selected to be in a non-conducting state when the second signal indicates that the surge voltage has occurred and is selected to be in a conducting state when the second signal indicates that the surge voltage has occurred; a capacitive element ; and a second resistor connected at one end to the switch element and having the other end connected to the capacitive element and having a resistance value lower than that of the first resistor. and charging the capacitive element through the first resistance when the switch element is in the non-conducting state, and discharging the capacitive element through the second resistance when the switch element is in the conducting state. a time constant circuit for outputting a potential having a charging time constant larger than the discharging time constant ; a second terminal to which the electric potential is supplied; and a comparison unit for outputting a third signal based on the electric potential difference between the first terminal and the second terminal; and recording the third signal. and a control unit for outputting recorded information to an external device; and an output terminal for outputting the information output by the control unit.

According to the present invention, it is possible to detect the occurrence of external noise with a simple circuit configuration.

It is a figure which shows an example of the system of this embodiment. It is a figure which shows an example of the circuit structure of the amplifier part of this embodiment, and a pulse time conversion part. It is a figure which shows an example of the signal waveform of this embodiment. FIG. 4 is a diagram showing an example of a circuit state when the switch element of the embodiment is in an off state; FIG. 4 is a diagram showing an example of a state of a circuit when the switch element of the embodiment is in an ON state;

[First embodiment]
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a diagram showing an example of a system 1 of this embodiment. The system 1 includes a monitor device 10 , an input power supply 20 , a power supply device 30 and a load device 40 .
The input power supply 20 is, for example, a commercial power supply (single-phase 100 V to 240 V, 50 Hz or 60 Hz). The input power supply 20 includes, for example, a power terminal 21 as a plug (or outlet) for commercial power. In this example, the power supply terminal 21 has two polarity terminals, a first power supply terminal 21A (for example, an L-pole terminal) and a second power supply terminal 21B (for example, an N-pole terminal).
The power supply device 30 is, for example, a switching power supply device that converts supplied AC power into DC power and outputs the DC power. The power supply device 30 includes an input terminal 31 and an output terminal 32 . The input-side terminals 31 include a first input-side terminal 31A (for example, an L-pole terminal), a second input-side terminal 31B (for example, an N-pole terminal), and an input-side FG terminal 31F (for example, the power supply device 30 frame ground (FG) terminal). The output terminal 32 includes a first output terminal 321 (for example, an output terminal for positive potential) and a second output terminal 322 (for example, an output terminal for negative potential).
The load device 40 is, for example, various devices that operate with supplied DC power. The load device 40 includes load device terminals 41 . The load device terminals 41 include a first load device terminal 411 (eg, a positive power supply terminal) and a second load device terminal 412 (eg, a negative power supply terminal).

In the following description, each terminal described above is described as being detachable with wiring, but may be non-detachable, such as a terminal in which wiring is molded.
Also, in the present embodiment, a case where the monitoring target of the monitor device 10 is a single-phase AC power supply will be described, but the present invention is not limited to this. For example, the monitoring target of the monitor device 10 may be a multiphase (for example, three-phase) power source. In this case, the monitor device 10 may be configured to monitor between each phase and between each phase and FG.

[Configuration of monitor device 10]
The monitor device 10 , also called a monitoring module, monitors the state of power supplied from the input power source 20 to the power source device 30 . The monitor device 10 includes a relay terminal 11, an FG terminal 12, a light shielding portion 13, a surge suppression portion 130, an amplification portion 170, a pulse time conversion portion 180, a control portion 190, a timer portion 191, and a display portion. 192 , a communication unit 193 , and an output terminal 14 .

The relay terminal 11 is a terminal that connects the power supply terminal 21 of the input power supply 20 and the input side terminal 31 of the power supply device 30 to relay power supply. The relay terminals 11 include a first relay terminal 11A1, a second relay terminal 11A2, a third relay terminal 11B1, and a fourth relay terminal 11B2.
The first relay terminal 11A1 and the second relay terminal 11A2 are electrically connected to each other. A wiring (for example, an L pole wiring) connected to the first power supply terminal 21A of the input power supply 20 is connected to the first relay terminal 11A1. A wiring (for example, an L pole wiring) connected to the first input terminal 31A of the power supply device 30 is connected to the second relay terminal 11A2. Thereby, the first power supply terminal 21A of the input power supply 20 and the first input terminal 31A of the power supply device 30 are electrically connected.
Similarly, the third relay terminal 11B1 and the fourth relay terminal 11B2 are electrically connected to each other. A wiring (for example, an N-pole wiring) connected to the second power terminal 21B of the input power source 20 is connected to the third relay terminal 11B1. A wire (for example, an N-pole wire) connected to the second input terminal 31B of the power supply device 30 is connected to the fourth relay terminal 11B2. Thereby, the second power supply terminal 21B of the input power supply 20 and the second input terminal 31B of the power supply device 30 are electrically connected.

That is, the relay terminal 11 is connected to the input power supply 20 and the input terminal 31 of the power supply device 30 .

The FG terminal 12 is connected to a wiring (eg, FG wiring) connected to the input-side FG terminal 31F of the power supply device 30 . Here, the frame ground of the power supply device 30 is one of the reference potentials of the power supply device 30 . That is, the FG terminal 12 is connected to the reference potential of the power supply device 30 .

Surge suppressor 130 includes suppression element 140 and light emitting element 150 . The suppression element 140 includes, for example, a non-linear resistance element such as a varistor, and suppresses the crest value of external noise (for example, surge voltage) occurring at the relay terminal 11 . The light emitting element 150 is, for example, a surge arrester filled with an insulating gas, and emits light when an arc discharge is generated by a surge voltage applied to the suppressing element 140 .
The surge suppressor 130 is arranged between the input terminals 31 . In one example of the present embodiment, the surge suppressor 130 is provided between the first input terminal 31A and the second input terminal 31B (between the L pole and the N pole), the first input terminal 31A and the input FG terminal 31F. (between the L pole and FG), and between the second input side terminal 31B and the input side FG terminal 31F (between the N pole and FG), respectively. In the following description, the surge suppressing portion 130 arranged between the L pole and the N pole will be referred to as the first surge suppressing portion 13AB, and the surge suppressing portion 130 placed between the L pole and FG will be referred to as the second surge suppressing portion 13AF. , and the surge suppressor 130 arranged between the N pole and FG is also referred to as a third surge suppressor 13BF. When these poles are not distinguished, they are collectively referred to as surge suppressor 130 .

The first surge suppressor 13AB includes a first suppressing element 141 as the suppressing element 140 and a first light emitting element 151 as the light emitting element 150 . The second surge suppressor 13AF includes a second suppressing element 142 as the suppressing element 140 and a second light emitting element 152 as the light emitting element 150 . The third surge suppressor 13BF includes a third suppressing element 143 as the suppressing element 140 and a third light emitting element 153 as the light emitting element 150 .

As described above, the surge suppressor 130 is arranged between the L pole and the N pole, between the L pole and FG, and between the N pole and FG. That is, the surge suppression unit 130 is provided between the power terminals of the input terminals 31 provided in the power supply device 30 (for example, the first input terminal 31A and the second input terminal 31B) and between the power terminals of the input terminals 31. and the FG terminal 12, respectively. However, the surge suppressor 130 does not necessarily need to be provided between all the phases, and may be provided only between the phases to be suppressed or between the phases to be measured.

A fuse for overcurrent protection (for example, a first fuse F1 and a second fuse F2) may be arranged in the wiring between the relay terminal 11 and the surge suppressor 130 .

The amplification section 170 includes a light receiving element 160 . The light receiving element 160 includes, for example, a photodiode, and outputs a first signal S1 (eg, photocurrent) based on the light receiving state of the light emitted by the light emitting element 150 .
The light receiving element 160 is arranged in a pair with the light emitting element 150 described above. In the case of the example of the present embodiment, the light receiving element 160 includes a first light receiving element 161 that serves as the first light emitting element 151, a second light receiving element 162 that forms a pair with the second light emitting element 152, and a third light emitting element 153. There is a third light receiving element 163 that forms a pair.

The light shielding part 13 is, for example, a dark box made of an insulating material, and shields external light from entering a set of the light emitting element 150 and the light receiving element 160 arranged in a pair with the light emitting element 150 . In the case of the example of the present embodiment, the light shielding part 13 includes a first light shielding part 131 that shields the set of the first light emitting element 151 and the first light receiving element 161, and a set of the second light emitting element 152 and the second light receiving element 162. and a third light shielding portion 133 for shielding the set of the third light emitting element 153 and the third light receiving element 163 from light. By providing the light shielding portion 13 , the light receiving element 160 can reduce the influence of disturbance light when receiving the light emitted by the light emitting element 150 . The disturbance light includes light incident from the outside of the monitor device 10 (eg, external light) and light emitted inside the monitor device 10 (eg, internal light). In addition, the internal light of the monitor device 10 includes light emitted by the light emitting element 150 . The light shielding portion 13 can reduce the influence of not only the external light but also the internal light emitted by the light emitting elements 150 of the other sets. For example, the first light shielding part 131 also blocks the light emitted by the second light emitting element 152 and the light emitted by the third light emitting element 153 .

[Circuit configuration of amplifier and pulse time converter]
FIG. 2 is a diagram showing an example of the circuit configuration of the amplification section 170 and the pulse time conversion section 180 of this embodiment. In the figure, the circuit configuration between the L pole and the N pole will be described as an example. Since the circuit configuration between the L pole and the FG and the circuit configuration between the N pole and the FG are the same as the circuit configuration between the L pole and the N pole, description thereof will be omitted.

The third relay terminal 11B1 and the fourth relay terminal 11B2 are connected to one end of the first suppression element 141 . The other end of the first suppression element 141 and one end of the first light emitting element 151 are connected. The other end of the first light emitting element 151 is connected to the first relay terminal 11A1 and the second relay terminal 11A2.

The amplification section 170 includes a first light receiving element 161 as the light receiving element 160 described above and an amplifier circuit 171 .
The first light-receiving element 161 is arranged in a pair with the first light-emitting element 151, receives the light emitted by the first light-emitting element 151, and receives a photocurrent PC1 (first signal S1) is output.

FIG. 3 is a diagram showing an example of signal waveforms in this embodiment. When the first light receiving element 161 receives the light emitted by the first light emitting element 151, it outputs a photocurrent PC1 (first signal S1). The duration of light emitted by the first light emitting element 151 depends on the duration of the surge voltage, and is generally very short (for example, about 50 ns to 100 ns).

Returning to FIG. 2, the amplifier circuit 171 includes, for example, an operational amplifier, and the first input terminal PN1 (for example, non-inverting input terminal) is connected to the output terminal of the first light receiving element 161, and the second input terminal PI1 (for example, , inverting input terminals) are connected to the reference potential. The amplifier circuit 171 outputs a photodetection signal PD1 (second signal S2) obtained by voltage-amplifying the first signal S1 supplied to the first input terminal PN1 from the output terminal PO1.

The pulse time conversion section 180 includes a switch element 181 , a time constant circuit 182 and a comparison section 183 .
The switch element 181 includes, for example, an emitter-grounded NPN transistor, and switches between the collector terminal and the emitter terminal in a conducting state (on state) or a non-conducting state based on the second signal S2 connected to the base terminal. (off state) is selected.
The time constant circuit 182 includes, for example, a resistive element R1 and a capacitive element C1, is connected to the switch element 181, and is charged/discharged according to the state of the switch element 181. FIG. More specifically, the resistive element R1 has one end connected to the power supply potential and the other end connected to one end of the capacitive element C1. The capacitive element C1 has the other end connected to the ground potential. A collector terminal of the switch element 181 is connected to a connection point PT between the resistance element R1 and the capacitance element C1 of the time constant circuit 182 through the resistance element R2.

FIG. 4 is a diagram showing an example of the state of the circuit when the switch element 181 of this embodiment is in the OFF state. When switch element 181 is in the off state, charging current Ic flows from the power supply line through resistance element R1, and capacitive element C1 is charged to the power supply potential by a predetermined time constant.

FIG. 5 is a diagram showing an example of the state of the circuit when the switch element 181 of this embodiment is in the ON state. When the switch element 181 is in the ON state, the electric charge charged in the capacitive element C1 is extracted toward the ground wiring via the resistance element R2 and the switch element 181 (that is, discharge current Id flows).

Here, the resistance value of the resistance element R2 is selected to be sufficiently smaller than the resistance value of the resistance element R1. Therefore, the time constant for charging capacitive element C1 with charging current Ic is sufficiently larger than the time constant for discharging from capacitive element C1 with discharging current Id. That is, the discharge time of capacitive element C1 is sufficiently shorter than the charging time of capacitive element C1.

Returning to FIG. 2, the comparison unit 183 includes, for example, an operational amplifier, and functions as a comparator using the threshold potential Vt as a determination reference potential. Specifically, the comparison unit 183 includes a first input terminal PI2 to which a predetermined threshold potential Vt is supplied, and a second input terminal PN2 connected to the time constant circuit 182. A third signal S3 based on the potential difference with the second input terminal PN2 is output from the output terminal PO2. The threshold potential Vt of the comparator 183 is set to a value between the ground potential V0 and the power supply potential Vd.

The amplification section 170 and the pulse time conversion section 180 are arranged in the number of circuits corresponding to the number of the light emitting elements 150 to be measured.
For example, when the measurement target is between the L pole and the N pole, the light emitting element 150 to be measured is one of the first light emitting elements 151 . In this case, at least one circuit corresponding to the number of the first light emitting elements 151 (that is, one) is arranged in the amplifying section 170 and the pulse time converting section 180 . In addition, when the distance between the L pole and the N pole, between the L pole and FG, and between the N pole and FG are each to be measured, the light emitting elements 150 to be measured are the first light emitting element 151 to the third light emitting element 153. is one. In this case, at least three circuits corresponding to the number of light emitting elements 150 (ie, three) are arranged for the amplifying section 170 and the pulse time converting section 180 .
In the above description, the amplification section 170 and the pulse time conversion section 180 that are arranged when the measurement target is between the L pole and the N pole have been described. When measuring between the L pole and FG and between the N pole and FG, they are arranged in the same way, but the configuration is such that the amplifier section 170 and the pulse time conversion section are arranged for measuring between the L pole and N pole. Since it is the same as 180, its description is omitted.
Note that even if the number of phases of the input power supply 20 and the power supply device 30 is either single-phase or three-phase, the amplification section 170 and the pulse-time conversion section 180 select one of the phases of the power supply as the measurement object. , and it is not necessary to arrange all interphases as objects to be measured.

The operation of the pulse time conversion unit 180 will be described with reference to FIG. 3 again.
(Timing t1) In a state where no surge voltage is generated, the first signal S1 output from the amplifier circuit 171 is L (low; no light emission). When the first signal S1 is L, the switch element 181 is turned off and the capacitive element C1 is charged with the charging current Ic. As a result, the potential of the connection point PT becomes the power supply potential Vd. In this case, the comparison unit 183 outputs the third signal S3 of H (high; no light emission).

(Timing t2) When a surge voltage occurs, the first light emitting element 151 emits light. When the light emitted by the first light emitting element 151 is received by the first light receiving element 161, the first signal S1 output by the amplifier circuit 171 changes from L to H (high; light is emitted). When the first signal S1 changes from L to H, the switch element 181 changes to the ON state and discharge current Id flows. As a result, the potential at the connection point PT drops to the ground potential V0. In this case, the comparison unit 183 outputs the L (low; light emission) third signal S3.

(Timing t3) When the surge voltage converges and the first light emitting element 151 stops emitting light, the first signal S1 output by the amplifier circuit 171 changes from H to L. When the first signal S1 changes from H to L, the switching element 181 changes to OFF state, and the charging current Ic flows.

(Timings t3 to t5) As a result, the potential at the connection point PT gradually rises to the power supply potential Vd due to the time constant based on the resistance element R1 and the capacitance element C1. In this case, the comparison unit 183 outputs the L third signal S3 until the potential at the connection point PT exceeds the threshold potential Vt, and when the potential at the connection point PT exceeds the threshold potential Vt, the H third signal S3. A signal S3 is output.

That is, when the second signal S2 indicates that a surge voltage has not occurred, the pulse time conversion section 180 charges the capacitive element C1 of the time constant circuit 182, and the second signal indicates that a surge voltage has occurred. When S2 indicates, the capacitive element C1 of the time constant circuit 182 is discharged.

Here, the charging time constant based on the resistive element R1 and the capacitive element C1 is the time (timing t3 shown in the figure) during which the potential at the connection point PT due to the charging of the capacitive element C1 rises from the ground potential V0 to the threshold potential Vt. to t4) is set to a predetermined time (for example, 10 ms). This predetermined time (for example, 10 ms) is about 100,000 to 200,000 times longer than the light emission time (timing t2 to t3, for example, 50 ns to 100 ns) due to the surge voltage. That is, the pulse time conversion unit 180 expands and converts the light emission pulse time width due to the surge voltage by a factor of about 100,000.
The 50 ns here is also the minimum standard value of the noise simulation test of the power supply evaluation standard.

The pulse time conversion section 180 outputs the third signal S3 generated as described above to the control section 190 .

Returning to FIG. 1 , the control unit 190 includes, for example, a microcomputer, records the third signal S3 at a predetermined sampling cycle (eg, 8 ms cycle), and outputs the recorded information to the external device 50 . Specifically, the control unit 190 acquires the date and time information output by the clock unit 191 for each sampling period, and associates the acquired date and time information with the acquisition result of the third signal S3 (a so-called time stamp). ), and stored in a storage unit (not shown) as a surge voltage generation history.
Note that the control unit 190 does not store the third signal S3 when the third signal S3 indicates H, and stores the third signal S3 when the third signal S3 indicates L. good.

The control unit 190 outputs the stored information to the output terminal 14 via the communication unit 193 in response to a request from the external device 50 (or periodically).

The output terminal 14 outputs the information output by the control section 190 to the external device 50 .
In addition, when the monitor device 10 includes the display unit 192, the control unit 190 may output the stored information to the display unit 192 for display.

The external device 50 is, for example, a device such as a personal computer, and presents acquired information.

[Summary of embodiment]
As described above, in the monitor device 10 of the present embodiment, the amplifier 170 functions as a high-speed photodetector circuit, and the pulse-time converter 180 functions as a pulse-time converter circuit that expands and converts the pulse width of photocurrent. . According to the monitoring device 10 configured in this way, even if the sampling interval of the third signal S3 by the control section 190 is relatively long (for example, 8 ms period), the generation of the surge voltage is not missed. can be recorded.

In general, when sampling an event, by sufficiently shortening the sampling period according to the duration of occurrence of the event, it is possible to sample without missing anything. However, when the occurrence duration is extremely short (for example, about 50 ns to 100 ns) like the event (that is, surge voltage) monitored by the monitor device 10 of the present embodiment, the event is sampled without missing. For this purpose, an extremely high-performance sampling device is required.

On the other hand, according to the monitor device 10 of the present embodiment, it is possible to expand the pulse width of the photocurrent with a relatively simple circuit configuration. Therefore, according to the monitor device 10 of the present embodiment, it is not necessary to improve the sampling performance of the control section 190, and the circuit can be configured simply and inexpensively.

Although the embodiment of the present invention has been described in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and modifications can be made as appropriate without departing from the scope of the present invention. . You may combine the structure as described in each embodiment mentioned above.

It should be noted that each unit included in each device in the above embodiments may be implemented by dedicated hardware, or may be implemented by a memory and a microprocessor.

In the monitor device 10, the control unit 190 is composed of a memory and a CPU (central processing unit), and a program for realizing the functions of the control unit 190 is loaded into the memory and executed to realize the functions. may be

DESCRIPTION OF SYMBOLS 1... System 10... Monitor apparatus 11... Relay terminal 12... FG terminal 13... Light shielding part 14... Output terminal 20... Input power supply 30... Power supply device 40... Load device 50... External device 130 Surge suppression unit 140 suppression element 150 light emitting element 160 light receiving element 170 amplification unit 180 pulse time conversion unit 190 control unit

Claims (3)

a relay terminal connected to the input power supply and the input terminal of the power supply;
an FG terminal connected to the reference potential of the power supply;
a surge suppression unit including a suppression element that suppresses a peak value of a surge voltage generated at the relay terminal; and a light emitting element that emits light due to the surge voltage;
a light-receiving element that outputs a first signal based on the light-receiving state of said light-emitting element;
A switch in which a non-conducting state is selected when the second signal indicates that the surge voltage has not occurred, and a conducting state is selected when the second signal indicates that the surge voltage has occurred. an element;
a capacitive element, a first resistor having one end connected to a power supply potential and the other end connected to the capacitive element, one end connected to the switch element and the other end connected to the capacitive element, the first resistor and a second resistor having a resistance value lower than that of the switch element, charging a capacitive element through the first resistor when the switch element is in the non-conducting state, and charging the second resistor when the switch element is in the conducting state. a time constant circuit for outputting a potential having a charging time constant larger than the discharging time constant by discharging from the capacitive element through a first terminal to which a predetermined threshold potential is supplied; and a first terminal connected to the time constant circuit. a second terminal to which the potential output by the time constant circuit is supplied; and a comparing section for outputting a third signal based on the potential difference between the first terminal and the second terminal. Department and
a control unit that records the third signal and outputs the recorded information to an external device;
an output terminal for outputting the information output by the control unit;
monitoring module with The monitoring module according to claim 1 , wherein the surge suppressor is arranged between power terminals of the power supply device and between each of the power terminals and the FG terminal. 3. The monitoring module according to claim 1, further comprising a light shielding part for shielding extraneous light incident on a set of the light emitting element and the light receiving element arranged in a pair with the light emitting element .

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