JP7326507B2 - WAVEFORM ACQUISITION DEVICE AND WAVEFORM ACQUISITION METHOD - Google Patents

Description

The present invention relates to a waveform acquisition apparatus and waveform acquisition method, and more particularly to a waveform acquisition apparatus and waveform acquisition method for observing the waveform of a data signal under measurement, such as a data signal or a clock signal, which has a repeating pattern.

2. Description of the Related Art Conventionally, real-time oscilloscopes and equivalent time sampling sampling oscilloscopes are known as waveform observation devices for observing waveforms of data signals under measurement (see, for example, Patent Documents 1 and 2).

In Patent Document 1, an input data signal is split into a plurality of split signals, these split signals are mixed with a periodic function of a predetermined frequency in a mixer as required, and then the split signals are converted from analog to digital. A real-time Digital Storage Oscilloscope (DSO) is disclosed that digitizes with a device and combines these outputs with a combining unit to obtain a single output data stream representing the original input signal.

However, the real-time DSO as disclosed in Patent Document 1 is more expensive than the sampling oscilloscope, and from the viewpoint of cost, it is not suitable for observing waveforms of signals consisting of repetitive patterns such as data signals and clock signals. Not suitable.

On the other hand, Patent Literature 2 discloses a sampling oscilloscope incorporating a plurality of sets of signal input terminals and sampling sections in order to meet the demand for simultaneously observing waveforms of a plurality of signals with the same measurement system.

Japanese Patent Publication No. 2006-504100 Japanese Patent No. 5303440

2. Description of the Related Art In recent years, the speed of a data signal under measurement has been increasing, and there is a demand for a higher sampling speed for sampling the data signal under measurement. However, the limit of the sampling speed depends on the performance of the hardware (sampler/trigger). had to develop new hardware, and had technical and cost issues.

SUMMARY OF THE INVENTION The present invention has been made to solve such conventional problems, and it is possible to increase the sampling speed and shorten the measurement time of a data signal to be measured consisting of a repetitive pattern at low cost. It is an object of the present invention to provide a waveform acquisition device and a waveform acquisition method that can

In order to solve the above problems, a waveform acquisition apparatus according to the present invention divides a trigger clock synchronized with a data signal under measurement consisting of a repeating pattern by a predetermined frequency division ratio to generate a frequency-divided trigger clock. a frequency divider, a phase adjuster for controlling the phase of the frequency-divided trigger clock generated by the variable frequency divider and generating N sampling pulse signals having different phases; and N samplers for sampling the data signal under measurement at timings corresponding to N sampling pulse signals, respectively, wherein the value obtained by dividing the predetermined frequency dividing ratio by N is obtained by the N samplers. It is coprime to the number of samples per repetitive pattern of the data signal under measurement to be sampled.

With this configuration, the waveform acquisition apparatus according to the present invention samples the data signal under measurement at different timings using the N samplers, so the data signal under measurement is sampled at a sampling rate that is N times the sampling rate of one channel. be able to. In addition, the waveform acquisition device according to the present invention can realize high-speed sampling even if the sampling speed of each sampler is not higher than that of the conventional one. can. In other words, the waveform acquisition apparatus according to the present invention can increase the sampling speed and shorten the measurement time of the data signal under measurement consisting of repeated patterns at low cost.

A waveform acquisition method according to the present invention includes a variable frequency division step of dividing a trigger clock synchronized with a data signal under measurement consisting of a repeating pattern by a predetermined frequency division ratio to generate a frequency-divided trigger clock; a phase adjustment step of controlling the phase of the frequency-divided trigger clock generated by the variable frequency division step to generate N sampling pulse signals having mutually different phases; and the N sampling pulse signals generated by the phase adjustment step. and a sampling step of sampling the data signal under measurement by N samplers at timings corresponding to each of It is coprime to the number of samples per repetitive pattern of the data signal under measurement.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a waveform acquisition apparatus and a waveform acquisition method capable of increasing the sampling rate and shortening the measurement time of a data signal to be measured consisting of repetitive patterns at low cost.

1 is a block diagram showing the configuration of a waveform acquisition device according to an embodiment of the present invention; FIG. (a) is a block diagram showing a configuration in which an optical signal output from an optical transceiver is converted into an electrical signal and input to a power dividing unit; 1 is a block diagram showing a configuration for inputting to . FIG. 4 is a diagram showing a display example of waveform data; FIG. 10 is a timing chart when one sampler samples an NRZ data signal under measurement; FIG. 4 is a timing chart when two samplers are used to sample an NRZ data signal under test; 4 is a flow chart showing processing of a waveform acquisition method using the waveform acquisition device according to the embodiment of the present invention;

Hereinafter, embodiments of a waveform acquisition device and a waveform acquisition method according to the present invention will be described with reference to the drawings.

A waveform acquisition apparatus 1 according to an embodiment of the present invention shown in FIG. 1 is a sampling oscilloscope of an equivalent time sampling method for observing the waveform of a data signal under measurement, and includes a power divider 10 and N samplers 21-1. 21-N, a sampling control unit 30 including a variable frequency dividing unit 31 and a phase adjusting unit 32, a waveform data memory 40, a display control unit 50, an operation unit 60, and a display unit 70 , provided.

The power dividing section 10 divides the data signal under measurement into N channels corresponding to the number of the plurality of samplers 21-1 to 21-N and outputs them. include. Here, N is an integer of 2 or more. However, since a power splitter or power divider usually has two outputs, it is desirable that the value of N be a power of two when connecting a plurality of these to increase the number of outputs.

The data signal to be measured is a periodic signal consisting of a repetitive pattern in which the same waveform is repeated for each fixed pattern length or period. Modulation 4) type PRBS patterns, SSPRQ (Short Stress Pattern Random Quaternary) patterns, fixed patterns, and programmable patterns such as arbitrary patterns. The symbol values of the data signal under measurement are {0, 1} for the NRZ system and {0, 1, 2, 3} for the PAM4 system. Such data signals to be measured are output from various devices such as an optical transceiver compatible with transmission standards such as IEEE802.3 and OIF-CEI, PPG (Pulse Pattern Generator), and DSP (Digital Signal Processor). Note that the PPG and DSP may be built into the optical transceiver.

Optical transceivers are modules that convert between electrical and optical signals. As shown in FIG. 2(a), when the optical transceiver 100 converts an electrical signal into an optical signal, an O/E converter 110 provided between the optical transceiver 100 and the power splitter 10 converts the optical transceiver 100 into an optical signal. The optical signal output from is converted into an electrical signal (measured data signal) and input to the power dividing section 10 . On the other hand, as shown in FIG. 2B, when the optical transceiver 100 converts an optical signal into an electrical signal, the electrical signal output from the optical transceiver 100 is received without passing through the O/E converter 110. It is directly input to the power dividing section 10 as a measurement data signal.

The sampling section 20 has N samplers 21-1 to 21-N. The N samplers 21-1 to 21-N are divided by the power divider 10 at timings corresponding to N sampling pulse signals C ₁ to C _N generated by a phase adjuster 32, which will be described later. Sample the data signal under test. Each of the samplers 21-1 to 21-N can be composed of an A/D converter.

The sampling control section 30 has a variable frequency dividing section 31 and a phase adjusting section 32 . The sampling control unit 30 performs sampling according to the frequency dividing ratio Dr of the variable frequency dividing unit 31, the period of the trigger clock, the pattern length/period of the data signal under measurement, and the number of samples acquired per symbol of the data signal under measurement. It is adapted to control the sampling of the section 20 . These parameters are set in the sampling control section 30 by, for example, the user's operation input to the operation section 60 .

The variable frequency divider 31 divides a trigger clock synchronized with a data signal under measurement consisting of a repeating pattern by a predetermined frequency division ratio Dr to generate a frequency-divided trigger clock. Here, the frequency division ratio Dr is an integral multiple of the number N of channels. A trigger clock consists of a sine wave or a square wave and is supplied from the outside. Alternatively, the trigger clock may be derived from the data signal under test. In this case, the waveform acquisition device 1 further includes a clock recovery circuit that recovers the clock component from the input data signal under measurement. will be entered.

In this embodiment, the predetermined frequency division ratio Dr is divided by the number of channels N and the number of samples Ns per repetitive pattern of the data signal under measurement sampled by the N samplers 21-1 to 21-N must be relatively prime. If the frequency division ratio Dr set in the sampling control unit 30 by the operation unit 60 and the sample number Ns are not relatively prime, the sampling control unit 30 selects either the set frequency division ratio Dr or the sample number Ns. so that these adjusted values are relatively prime.

The phase adjuster 32 controls the phase of the frequency-divided trigger clock generated by the variable frequency divider 31 to generate N sampling pulse signals C ₁ to C _N having different phases. For example, the phases of the N sampling pulse signals C ₁ to C _N may be shifted from each other by the number of symbols corresponding to the value obtained by dividing the predetermined frequency division ratio Dr of the variable frequency divider 31 by the number of channels N. .

That is, the sampling section 20 measures the data signal under measurement over a plurality of periods while the sampling control section 30 slightly shifts the generation timings of the N sampling pulse signals C ₁ to C _N . . In this manner, the waveform acquisition apparatus 1 of the present embodiment can acquire Ns samples per one pattern length of the data signal under measurement.

The waveform data memory 40 stores waveform data including information such as the amplitude (power) of the sample of the data signal under measurement sampled by the sampling section 20 and the position on the time axis.

The display control section 50 refers to the amplitude and position of the waveform data stored in the waveform data memory 40, and draws at the corresponding pixel position in the display image of the display section 70. FIG. For example, when the number of channels N is 2, the display control unit 50 performs display control so that the samples sampled by the two samplers 21-1 and 21-2 are arranged alternately. The display form of the waveform data displayed on the display unit 70 under the control of the display control unit 50 may be a time-series waveform (pulse pattern), or a time-series waveform as shown in FIG. ) may be used.

The operation unit 60 is for receiving an operation input by the user, and is configured by a touch panel including a touch sensor for detecting a contact position by a touch operation on an input surface corresponding to the display screen of the display unit 70, for example. . Alternatively, the operation unit 60 may be configured including an input device such as a keyboard or mouse. An operation input to the operation unit 60 is detected by the display control unit 50 . For example, the operating unit 60 sets the frequency dividing ratio Dr of the variable frequency dividing unit 31, the period of the trigger clock, the pattern length and period of the data signal under measurement, the number of samples to be acquired per symbol of the data signal under measurement, and the like. In addition, the user can arbitrarily instruct the timing of measurement start and measurement end.

The display unit 70 is composed of display devices such as a liquid crystal display and a CRT (Cathode Ray Tube) monitor, and displays various display contents such as waveform data of the data signal to be measured on the display screen based on the display control by the display control unit 50. It is designed to Furthermore, the display unit 70 displays operation targets such as buttons, soft keys, pull-down menus, and text boxes for setting various conditions.

The predetermined frequency division ratio Dr of the variable frequency divider 31 will be described below with reference to FIGS. 4 and 5. FIG. Note that the examples shown in FIGS. 4 and 5 are merely examples for making the explanation easier to understand. The phase difference is not limited to the values shown there.

FIG. 4 shows an example in which one sample per 1 bit of the data signal under measurement of the NRZ system with a pattern length of 10 bits is obtained by one sampler 21-1, and the frequency division ratio Dr of the variable frequency divider 31 is set to 11. 2 shows the timing of the frequency-divided trigger clock (sampling pulse signal) in the case. That is, in this example, the value 10 of the number of samples Ns acquired per one pattern length of the data signal under measurement and the value 11 of the frequency dividing ratio Dr are relatively prime. The variable frequency divider 31 divides the input trigger clock by a frequency division ratio Dr of 11 to generate a frequency-divided trigger clock in which one pulse rises for every 11 bits. In this case, the data signal under measurement is sampled every 11 bits, and the data signal under measurement restored with a time resolution ΔT of 1 bit is displayed on the display section 70 . The bottom of FIG. 4 shows an example in which the data signal under measurement restored with the time resolution ΔT is displayed as a time-series waveform (pulse pattern). , an eye pattern as shown in FIG. 3 is obtained.

Further, for example, when one sampler 21-1 acquires 10 samples per 1 bit of the data signal under measurement whose 1 pattern length is 10 bits, that is, the value of the number of samples Ns acquired per 1 pattern length of the data signal under measurement is In the case of 100, a value relatively prime to the value 100 of the number of samples Ns, such as 101, can be selected as the frequency division ratio Dr. In the example shown in FIG. 4, high-speed sampling is possible if the frequency division ratio Dr is small (that is, if the period of the frequency division trigger clock is short). However, in practice, the sampling rate is restricted by the upper limit of the sampling frequency of the sampler.

Therefore, for example, it is desired to sample the data signal under measurement by setting the frequency division ratio Dr of the variable frequency divider 31 to 11 with one sampler 21-1. Consider a case that cannot otherwise be dealt with. In this case, the data signal under measurement is sampled by N samplers 21-1 to 21-N, the frequency division ratio Dr of the variable frequency divider 31 is set to 11×N, and the phase adjuster 32 By generating N sampling pulse signals C ₁ to C _N having mutually different phases, the same sampling rate as when the frequency division ratio Dr of the variable frequency divider 31 is 11 can be achieved with one sampler 21-1. realizable.

FIG. 5 shows an example in which two samplers 21-1 and 21-2 acquire 1 sample per 1 bit of the NRZ data signal under measurement with a pattern length of 10 bits. is 22, the timings of the sampling pulse signals C ₁ and C ₂ are shown. With such a configuration, the two samplers 21-1 and 21-2 can achieve a sampling rate equivalent to 11 frequency division. In this example, the phase adjustment unit 32 adjusts the timing of the sampling pulse signal _C2 for the sampler 21-2 to half the division ratio Dr with respect to the timing of the sampling pulse signal _C1 for the sampler 21-1. It is shifted by 11 bits. Note that the number of bits to be shifted is not limited to half the frequency division ratio Dr, and may be any value other than an integral multiple of the frequency division ratio Dr.

As shown in FIG. 5, two samplers 21-1 and 21-2 alternately sample the same data signal under measurement. If the sampling unit 20 aims to acquire 8 samples per symbol of the data signal under measurement, the odd-numbered samples should be acquired by the sampler 21-1, and the even-numbered samples should be acquired by the sampler 21-2. Just do it. In other words, the variable frequency divider 31 shifts the timing of the N sampling pulse signals C ₁ to C _N , and the N samplers 21-1 to 21-N alternately obtain samples of the same data signal under measurement. , the sampling speed can be improved by N times.

A waveform acquisition method using the waveform acquisition device 1 will be described below with reference to the flowchart of FIG.

First, according to the user's operation input to the operation unit 60, the frequency dividing ratio Dr of the variable frequency dividing unit 31, the period of the trigger clock, the pattern length and period of the data signal under measurement, and the per symbol of the data signal under measurement are Various information such as the number of samples to be acquired is set in the sampling control unit 30 (step S1).

Next, the variable frequency divider 31 divides the frequency of the trigger clock synchronized with the data signal under measurement consisting of the repeating pattern by a predetermined frequency division ratio Dr to generate a frequency-divided trigger clock (variable frequency division step S2). As already described, the value obtained by dividing the frequency division ratio Dr by the number of channels N is relatively prime to the number Ns of samples per repetitive pattern of the data signal under measurement sampled by the N samplers 21-1 to 21-N. is.

Next, the phase adjustment unit 32 controls the phase of the frequency-divided trigger clock generated in the variable frequency division step S2, and generates N sampling pulse signals having different phases (phase adjustment step S3).

Next, the sampling section 20 divides the data signal under measurement divided into N channels by the power dividing section 10 into N channels at timings corresponding to the N sampling pulse signals generated in the phase adjustment step S3. samplers 21-1 to 21-N (sampling step S4). The sampling unit 20 also stores the sampled waveform data in the waveform data memory 40 .

Next, the display control section 50 refers to the amplitude and position of the waveform data stored in the waveform data memory 40, and draws at the corresponding pixel position in the display image of the display section 70 (step S5).

As described above, the waveform acquisition apparatus 1 according to the present embodiment samples the data signal under measurement at different timings using the N samplers 21-1 to 21-N. The data signal under test can be sampled at the sampling rate. In addition, the waveform acquisition apparatus 1 according to the present embodiment can realize high-speed sampling even if the sampling speed of each of the samplers 21-1 to 21-N is not higher than that of the conventional one. The data signal under test can be measured at the sampling rate. In other words, the waveform acquisition device 1 according to the present embodiment can increase the sampling speed and shorten the measurement time of the data signal under measurement consisting of repetitive patterns at low cost.

1 waveform acquisition device 10 power division unit 20 sampling unit 21-1 to 21-N sampler 30 sampling control unit 31 variable frequency division unit 32 phase adjustment unit 40 waveform data memory 50 display control unit 60 operation unit 70 display unit 100 optical transceiver 110 O/E converter

Claims (2)

a variable frequency divider (31) for generating a frequency-divided trigger clock by dividing a trigger clock synchronized with a data signal under measurement consisting of a repeating pattern by a predetermined frequency division ratio;
a phase adjuster (32) that controls the phase of the frequency-divided trigger clock generated by the variable frequency divider and generates N sampling pulse signals having mutually different phases;
N samplers (21-1 to 21-N) that sample the data signal under measurement at timing corresponding to each of the N sampling pulse signals generated by the phase adjustment unit;
A waveform acquisition apparatus according to claim 1, wherein a value obtained by dividing the predetermined frequency dividing ratio by N is coprime to the number of samples per repetition pattern of the data signal under measurement sampled by the N samplers. a variable frequency dividing step (S2) for generating a frequency-divided trigger clock by dividing a trigger clock synchronized with a data signal under measurement consisting of a repeating pattern by a predetermined frequency division ratio;
a phase adjustment step (S3) of controlling the phase of the frequency-divided trigger clock generated by the variable frequency-dividing step to generate N sampling pulse signals having mutually different phases;
a sampling step (S4) of sampling the data signal under measurement by N samplers (21-1 to 21-N) at timings corresponding to each of the N sampling pulse signals generated in the phase adjustment step; including
A waveform acquisition method, wherein a value obtained by dividing the predetermined frequency division ratio by N is coprime to the number of samples per repetition pattern of the data signal under measurement sampled by the N samplers.

Images