JP7324282B2 - 入出力ストア命令をハンドリングする方法、システム、およびプログラム - Google Patents

入出力ストア命令をハンドリングする方法、システム、およびプログラム Download PDF

Info

Publication number
JP7324282B2
JP7324282B2 JP2021535244A JP2021535244A JP7324282B2 JP 7324282 B2 JP7324282 B2 JP 7324282B2 JP 2021535244 A JP2021535244 A JP 2021535244A JP 2021535244 A JP2021535244 A JP 2021535244A JP 7324282 B2 JP7324282 B2 JP 7324282B2
Authority
JP
Japan
Prior art keywords
asynchronous
data
data processing
input
retry
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2021535244A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022519985A (ja
JP2022519985A5 (https=
JPWO2020157594A5 (https=
Inventor
レイッシュ、クリストフ
クレマー、マルコ
レーナルト、フランク
クライン、マティアス
ブラッドベリー、ジョナサン
ジャコビ、クリスチャン
ベルマー、ブレントン
ドリーバー、ピーター
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JP2022519985A publication Critical patent/JP2022519985A/ja
Publication of JP2022519985A5 publication Critical patent/JP2022519985A5/ja
Publication of JPWO2020157594A5 publication Critical patent/JPWO2020157594A5/ja
Application granted granted Critical
Publication of JP7324282B2 publication Critical patent/JP7324282B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0727—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a storage system, e.g. in a DASD or network based storage system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operations
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3041—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is an input/output interface
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/542—Event management; Broadcasting; Multicasting; Notifications
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/546—Message passing systems or structures, e.g. queues
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Multimedia (AREA)
  • Debugging And Monitoring (AREA)
  • Retry When Errors Occur (AREA)
  • Memory System (AREA)
  • Information Transfer Systems (AREA)
JP2021535244A 2019-01-31 2020-01-16 入出力ストア命令をハンドリングする方法、システム、およびプログラム Active JP7324282B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP19154740.5 2019-01-31
EP19154740 2019-01-31
PCT/IB2020/050339 WO2020157594A1 (en) 2019-01-31 2020-01-16 Handling an input/output store instruction

Publications (4)

Publication Number Publication Date
JP2022519985A JP2022519985A (ja) 2022-03-28
JP2022519985A5 JP2022519985A5 (https=) 2022-06-22
JPWO2020157594A5 JPWO2020157594A5 (https=) 2022-06-22
JP7324282B2 true JP7324282B2 (ja) 2023-08-09

Family

ID=65275987

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021535244A Active JP7324282B2 (ja) 2019-01-31 2020-01-16 入出力ストア命令をハンドリングする方法、システム、およびプログラム

Country Status (6)

Country Link
US (2) US11068266B2 (https=)
JP (1) JP7324282B2 (https=)
CN (1) CN113366457B (https=)
DE (1) DE112020000146B4 (https=)
GB (1) GB2593852B (https=)
WO (1) WO2020157594A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES3015283T3 (en) 2019-01-31 2025-04-30 Ibm Handling an input/output store instruction
TWI767175B (zh) 2019-01-31 2022-06-11 美商萬國商業機器公司 用於處理輸入輸出儲存指令之資料處理系統、方法及電腦程式產品
TWI773959B (zh) 2019-01-31 2022-08-11 美商萬國商業機器公司 用於處理輸入輸出儲存指令之資料處理系統、方法及電腦程式產品
DE112020000146B4 (de) 2019-01-31 2025-01-16 International Business Machines Corporation Verfahren, datenverarbeitungssystem und computerprogrammprodukt zur handhabung einer eingabe-/ausgabe-speicheranweisung
CN113939811B (zh) * 2020-05-08 2025-09-19 华为技术有限公司 带偏移值的远程直接内存访问
CN113741311B (zh) * 2021-09-16 2023-03-10 深圳市软赢科技有限公司 具有子周期高频处理功能的总线控制系统及方法
CN114201285B (zh) * 2021-12-20 2025-09-26 平安壹钱包电子商务有限公司 事件异步化处理方法、装置、计算机设备及存储介质
CN114706820B (zh) * 2022-05-18 2022-09-06 北京卡普拉科技有限公司 异步i/o请求的调度方法、系统、电子设备及介质

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013538378A (ja) 2010-06-23 2013-10-10 インターナショナル・ビジネス・マシーンズ・コーポレーション コンピューティング環境におけるリソース使用を測定するコンピュータ・システム、方法、およびコンピュータ・プログラム
US20180341410A1 (en) 2017-03-24 2018-11-29 Western Digital Technologies, Inc. System and method for adaptive early completion posting using controller memory buffer

Family Cites Families (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2273317B1 (https=) 1974-05-28 1976-10-15 Philips Electrologica
US4947316A (en) 1983-12-29 1990-08-07 International Business Machines Corporation Internal bus architecture employing a simplified rapidly executable instruction set
US5131081A (en) 1989-03-23 1992-07-14 North American Philips Corp., Signetics Div. System having a host independent input/output processor for controlling data transfer between a memory and a plurality of i/o controllers
US5317739A (en) 1992-03-30 1994-05-31 International Business Machines Corp. Method and apparatus for coupling data processing systems
US5548735A (en) 1993-09-15 1996-08-20 International Business Machines Corporation System and method for asynchronously processing store instructions to I/O space
US5553302A (en) 1993-12-30 1996-09-03 Unisys Corporation Serial I/O channel having independent and asynchronous facilities with sequence recognition, frame recognition, and frame receiving mechanism for receiving control and user defined data
JPH07302200A (ja) 1994-04-28 1995-11-14 Hewlett Packard Co <Hp> 順次付けロード動作および順序付け記憶動作を強制する命令を有するコンピュータのロード命令方法。
US5548788A (en) 1994-10-27 1996-08-20 Emc Corporation Disk controller having host processor controls the time for transferring data to disk drive by modifying contents of the memory to indicate data is stored in the memory
DE19631289A1 (de) 1996-08-02 1998-02-05 Ibm Verfahren zum Testen eines Protokollumsetzers und Protokollumsetzer
US6072781A (en) 1996-10-22 2000-06-06 International Business Machines Corporation Multi-tasking adapter for parallel network applications
US6085277A (en) 1997-10-15 2000-07-04 International Business Machines Corporation Interrupt and message batching apparatus and method
US6269360B1 (en) * 1998-04-24 2001-07-31 International Business Machines Corporation Optimization of ordered stores on a pipelined bus via self-initiated retry
US6247097B1 (en) 1999-01-22 2001-06-12 International Business Machines Corporation Aligned instruction cache handling of instruction fetches across multiple predicted branch instructions
US6189088B1 (en) 1999-02-03 2001-02-13 International Business Machines Corporation Forwarding stored dara fetched for out-of-order load/read operation to over-taken operation read-accessing same memory location
US6496277B1 (en) 1999-07-23 2002-12-17 Xerox Corporation Data flow control and storage facility for an image reproduction system
US6725348B1 (en) 1999-10-13 2004-04-20 International Business Machines Corporation Data storage device and method for reducing write misses by completing transfer to a dual-port cache before initiating a disk write of the data from the cache
US6490647B1 (en) 2000-04-04 2002-12-03 International Business Machines Corporation Flushing stale data from a PCI bus system read prefetch buffer
US6578102B1 (en) 2000-04-18 2003-06-10 International Business Machines Corporation Tracking and control of prefetch data in a PCI bus system
US7042881B1 (en) 2001-06-29 2006-05-09 Cisco Technology, Inc. Asynchronous transfer mode system and method to verify a connection
US7178019B2 (en) * 2003-11-13 2007-02-13 Hewlett-Packard Development Company, L.P. Networked basic input output system read only memory
US7234004B2 (en) 2003-12-19 2007-06-19 International Business Machines Corporation Method, apparatus and program product for low latency I/O adapter queuing in a computer system
US7200626B1 (en) 2004-01-22 2007-04-03 Unisys Corporation System and method for verification of a quiesced database copy
US7079978B2 (en) 2004-05-24 2006-07-18 International Business Machines Corporation Apparatus, system, and method for abbreviated library calibration
US7467325B2 (en) 2005-02-10 2008-12-16 International Business Machines Corporation Processor instruction retry recovery
US7631097B2 (en) * 2005-07-21 2009-12-08 National Instruments Corporation Method and apparatus for optimizing the responsiveness and throughput of a system performing packetized data transfers using a transfer count mark
US7594144B2 (en) * 2006-08-14 2009-09-22 International Business Machines Corporation Handling fatal computer hardware errors
US7827433B1 (en) 2007-05-16 2010-11-02 Altera Corporation Time-multiplexed routing for reducing pipelining registers
US7870351B2 (en) 2007-11-15 2011-01-11 Micron Technology, Inc. System, apparatus, and method for modifying the order of memory accesses
US7991981B2 (en) 2008-02-01 2011-08-02 International Business Machines Corporation Completion of asynchronous memory move in the presence of a barrier operation
US7941627B2 (en) 2008-02-01 2011-05-10 International Business Machines Corporation Specialized memory move barrier operations
US8867344B2 (en) 2008-07-21 2014-10-21 Mediatek Inc. Methods for bus data transmission and systems utilizing the same
US8566480B2 (en) 2010-06-23 2013-10-22 International Business Machines Corporation Load instruction for communicating with adapters
JP5680466B2 (ja) 2011-03-29 2015-03-04 三菱重工業株式会社 並列処理システム及び並列処理システムの動作方法
WO2015057828A1 (en) 2013-10-15 2015-04-23 Mill Computing, Inc. Computer processor employing cache memory storing backless cache lines
US9477550B2 (en) * 2013-10-24 2016-10-25 Globalfoundries Inc. ECC bypass using low latency CE correction with retry select signal
US20150261535A1 (en) 2014-03-11 2015-09-17 Cavium, Inc. Method and apparatus for low latency exchange of data between a processor and coprocessor
US10120681B2 (en) 2014-03-14 2018-11-06 International Business Machines Corporation Compare and delay instructions
US9588914B2 (en) * 2014-04-09 2017-03-07 International Business Machines Corporation Broadcast and unicast communication between non-coherent processors using coherent address operations
US9460019B2 (en) 2014-06-26 2016-10-04 Intel Corporation Sending packets using optimized PIO write sequences without SFENCEs
US9477481B2 (en) 2014-06-27 2016-10-25 International Business Machines Corporation Accurate tracking of transactional read and write sets with speculation
GB2531011A (en) 2014-10-07 2016-04-13 Ibm Initializing I/O Devices
US9542201B2 (en) * 2015-02-25 2017-01-10 Quanta Computer, Inc. Network bios management
CN105095022B (zh) * 2015-07-31 2018-06-08 北京金山安全软件有限公司 一种数据备份方法及装置
US9971545B1 (en) 2016-03-23 2018-05-15 Crossbar, Inc. Non-volatile write and read cache for storage media
US9983877B2 (en) * 2016-09-29 2018-05-29 Intel Corporation Automatic hardware ZLW insertion for IPU image streams
US10248509B2 (en) 2016-11-16 2019-04-02 International Business Machines Corporation Executing computer instruction including asynchronous operation
EP4089531B1 (en) 2016-12-31 2024-06-26 Intel Corporation Systems, methods, and apparatuses for heterogeneous computing
US10606591B2 (en) 2017-10-06 2020-03-31 International Business Machines Corporation Handling effective address synonyms in a load-store unit that operates without address translation
TWI767175B (zh) 2019-01-31 2022-06-11 美商萬國商業機器公司 用於處理輸入輸出儲存指令之資料處理系統、方法及電腦程式產品
DE112020000146B4 (de) 2019-01-31 2025-01-16 International Business Machines Corporation Verfahren, datenverarbeitungssystem und computerprogrammprodukt zur handhabung einer eingabe-/ausgabe-speicheranweisung
TWI773959B (zh) 2019-01-31 2022-08-11 美商萬國商業機器公司 用於處理輸入輸出儲存指令之資料處理系統、方法及電腦程式產品
ES3015283T3 (en) 2019-01-31 2025-04-30 Ibm Handling an input/output store instruction

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013538378A (ja) 2010-06-23 2013-10-10 インターナショナル・ビジネス・マシーンズ・コーポレーション コンピューティング環境におけるリソース使用を測定するコンピュータ・システム、方法、およびコンピュータ・プログラム
US20180341410A1 (en) 2017-03-24 2018-11-29 Western Digital Technologies, Inc. System and method for adaptive early completion posting using controller memory buffer

Also Published As

Publication number Publication date
JP2022519985A (ja) 2022-03-28
DE112020000146B4 (de) 2025-01-16
GB2593852B (en) 2022-03-09
CN113366457B (zh) 2024-06-14
US20210311738A1 (en) 2021-10-07
GB202111895D0 (en) 2021-10-06
US20200249944A1 (en) 2020-08-06
GB2593852A (en) 2021-10-06
CN113366457A (zh) 2021-09-07
US11593107B2 (en) 2023-02-28
WO2020157594A1 (en) 2020-08-06
US11068266B2 (en) 2021-07-20
DE112020000146T5 (de) 2021-09-09

Similar Documents

Publication Publication Date Title
JP7324282B2 (ja) 入出力ストア命令をハンドリングする方法、システム、およびプログラム
JP7479373B2 (ja) 入出力ストア命令をハンドリングする方法、システム、およびプログラム
US11762659B2 (en) Handling an input/output store instruction
US11579874B2 (en) Handling an input/output store instruction
HK40057632A (en) Handling an input/output store instruction
HK40057233A (en) Handling an input/output store instruction

Legal Events

Date Code Title Description
RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20220512

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20220613

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20220622

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20230428

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230516

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230622

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230711

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230728

R150 Certificate of patent or registration of utility model

Ref document number: 7324282

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150