JP7323225B1 - Time division transmission unit - Google Patents

Abstract

A transmission unit transmits and receives data via only one signal terminal. In a transmission unit, in a transmission mode, a first transistor element is turned on by a voltage component clipped by a Zener diode for a base clipper in a high level signal output from a first signal terminal of a CPU section. As a result, the first photocoupler element is turned on, and the emitter-collector voltage of the phototransistor constituting the first photocoupler element becomes low level. A low level output is output to the second signal terminal, and at the same time, the anode side of the second diode element becomes low level, and the second photocoupler element is kept off, thereby blocking the input from the second signal terminal. . In receive mode, it accepts a low level input from the second signal terminal. [Selection drawing] Fig. 8

Description

The present disclosure mainly relates to a time-division transmission unit that connects two stations through communication.

In order to transmit and receive information between two points (two stations), communication is normally performed using a multi-core cable as shown in FIG.

In FIG. 3, a multicore (wire) cable 8 is provided between a station A 104, which is one station, and a station B 104, which is the other station. line) cable. In this situation, when the amount of information to be transmitted and received increases, it is necessary to further increase the number of similar multi-core cables or increase the number of cable cores. FIG. 4 is a diagram showing a state in which a new multicore cable is added to an existing multicore cable. In the first place, a special communication line is required to realize time-division transmission between two stations, and a special construction technique corresponding to it is also required.

JP 2005-51724 A Japanese Patent Publication No. 2001-505026 JP 2013-102650 A Japanese Unexamined Patent Application Publication No. 2012-16139 JP 2013-102650 A JP 2009-163522 A JP-A-08-6190

In time-division communication between two stations, there is a demand for a multiplex transmission unit that does not require special performance in the wires used and that does not require special extension work even if the amount of information to be communicated increases. .

A transmission unit of the present disclosure includes an input/output section, a CPU section, and an interface section.
The CPU section is provided with one first signal terminal for exchanging signals with the interface section,
The interface section is provided with one second signal terminal for exchanging signals with the outside.
The interface is
A base clipper Zener diode, a first transistor element, a first photocoupler element, and a second photocoupler element are provided.
Furthermore, the interface section
a first diode element that connects the second signal terminal and the collector side of the phototransistor that constitutes the first photocoupler element;
A second diode element connecting the anode side of the light emitting element forming the second photocoupler element and the collector side of the phototransistor forming the first photocoupler element is provided.
The CPU section is configured such that the first signal terminal receives an active signal at a low level input during reception and outputs an active signal at a high level output during transmission.
In send mode,
The first transistor element is turned on by the voltage component clipped by the Zener diode for the base clipper in the high level signal output from the first signal terminal of the CPU section,
When the first transistor element is turned on, the first photocoupler element is turned on, and the emitter-collector voltage of the phototransistor constituting the first photocoupler element becomes low level,
When the emitter-collector of the phototransistor constituting the first photocoupler element becomes low level, a low level output is output to the second signal terminal through the first diode element. The anode side of the diode element of becomes low level, and the second photocoupler element is kept off, so that the input from the second signal terminal is cut off,
In receive mode,
It receives a low level input from the second signal terminal.

By using the transmission unit according to the present invention, special materials (communication lines) are not required for construction work for communication, and special skills are not required for adjustment work. Furthermore, setting or adjusting initial conditions may not be required. In addition, the configuration of the equipment relating to the transmission unit is simple, and no incidental work is required especially when expanding.

Wires used for communication between two stations do not require special performance. The wires used for communication between two stations may be a part of an existing multi-core cable, a spare line, or, for example, a commonly used 3-core or 4-core cabtyre cable, or a VCT cable. Therefore, the cost of installation materials and construction can be saved.

FIG. 3 is a schematic diagram showing how signals are transmitted and received by a multiplex transmission unit (time-division transmission unit) according to an embodiment; 2A and 2B are schematic diagrams showing how signals are transmitted and received by a multiplex transmission unit (time-division transmission unit) according to an embodiment, for example, one using a three-core cable (top) and one using a four-core cable (bottom). is. FIG. 2 is a schematic diagram showing how signals are transmitted and received by a conventional multiplex transmission unit, using a multi-core cable. FIG. 4 is a schematic diagram showing how signals are transmitted and received by a conventional multiplex transmission unit, using an additional multi-core cable. 4 is a block diagram showing communication between two stations of the time division transmission unit according to the embodiment; FIG. 4 is a block diagram of a time division transmission unit in each station according to the embodiment; FIG. 4 is a diagram showing the configuration of an input/output section (driver array element) in the time division transmission unit according to the embodiment; FIG. 4 is a diagram showing configurations of a CPU section and an interface section in the time division transmission unit according to the embodiment; FIG. 10 is a flowchart relating to transmission and reception of synchronization signals between (1-1) and (1-2) two stations in the time division transmission unit according to the embodiment; 10 is a flow chart of the relationship between sequential reading and reception of (2-1) and (2-2) data signals in the time division transmission unit according to the embodiment; FIG. 10 is a diagram showing a time-division transmission signal and RE2 pin mode in the mode of half-duplex transmission using two time-division transmission units according to the embodiment; FIG. 4 is a schematic block diagram of time division transmission units at stations A and B in the mode of half-duplex transmission using two time division transmission units according to an embodiment; FIG. 10 is a diagram showing 1616 signal frames at station A in the form of half-duplex transmission using two time-division transmission units according to an embodiment; Fig. 10 is a diagram showing 1616 signal frames at station B in the form of half-duplex transmission using two time-division transmission units according to an embodiment; 16 is a diagram showing a 1616 main routine in the form of half-duplex transmission using two time-division transmission units according to the embodiment; FIG. FIG. 10 is a diagram showing a time-division transmission signal and RE2-pin mode in the form of unidirectional transmission using two time-division transmission units according to the embodiment; FIG. 4 is a schematic block diagram of transmission units at stations A and B in the form of unidirectional transmission using two time-division transmission units according to the embodiment; Fig. 3 shows 3200 signal frames at station A in the form of unidirectional transmission using two time division transmission units according to an embodiment; Fig. 3 shows 3200 signal frames at station B in the form of unidirectional transmission using two time division transmission units according to an embodiment; FIG. 10 is a diagram showing a 3200 main routine in the form of unidirectional transmission using two time-division transmission units according to the embodiment;

Hereinafter, embodiments will be described in detail with reference to the drawings as appropriate. However, more detailed description than necessary may be omitted. For example, detailed descriptions of well-known matters and redundant descriptions of substantially the same configurations may be omitted. This is to avoid unnecessary verbosity in the following description and to facilitate understanding by those skilled in the art.

It is noted that the inventors provide the accompanying drawings and the following description for a full understanding of the present disclosure by those skilled in the art and are not intended to limit the claimed subject matter thereby. do not have.

1. [Background to this disclosure]
Conventionally, multi-core cables are used to transmit and receive information between two stations using a transmission unit. FIG. 3 is a schematic diagram showing how signals are transmitted and received by the conventional multiplex transmission unit 104. As shown in FIG. Here, a multicore cable 8 is used. Furthermore, when the amount of information transmitted and received between two stations by the transmission unit increases, the multi-core cable 8 is added. FIG. 4 is also a schematic diagram showing how signals are transmitted and received by the conventional multiplex transmission unit 104. In addition to the existing multicore cable 8, an additional multicore cable 8 is used.

Conventionally, a special communication line was required to realize time-division transmission between two stations using a transmission unit. Of course, appropriate construction technology was also required. In other words, the construction to realize time-division transmission required special materials and special skills for adjustment work. For this reason, special expansion work and accompanying special materials are required for the expansion of multi-core cables as well.

It is desired that a wire used for communication between two stations by a transmission unit does not require special performance. Furthermore, in order to realize time-division transmission between two stations by the transmission unit, the configuration of the device is required to be as simple as possible. In particular, it is desired to change the configuration of the device with as simple an adjustment as possible, even when the configuration of the device is adapted to an increase in the amount of communication. The present disclosure has been made under such awareness of the problem.

2. [Embodiment]
Preferred embodiments of the present disclosure will now be described with reference to the accompanying drawings.

2.1. [composition]
2.1.1. [overall structure]
FIG. 1 is a schematic diagram showing how signals are transmitted and received by a time-division transmission unit (multiplex transmission unit) 4 according to the embodiment. Although FIG. 1 shows that the transmission units 4 in the two stations use two lines or three lines, in this embodiment, the signal itself can be transmitted and received using only one line.

FIG. 2 is also a schematic diagram showing how signals are transmitted and received by the time-division transmission unit (multiplex transmission unit) 4 according to the embodiment. The upper part of FIG. 2 shows that a pair of two-station time-division transmission units 4 can be provided by using one of the existing multicore cables 8 . The middle part of FIG. 2 shows that a pair of two-station time-division transmission units 4 can be provided by using a three-core cable 6b.

The lower part of FIG. 2 shows that two pairs of two-station time-division transmission units 4 can be provided by using a four-core cable 6c. Each pair of time division transmission units is shown to transmit and receive signals using one wire. Two wires in the four-core cable 6c are used for power supply.

2.1.2. [Configuration of time-division transmission unit]
FIG. 5 is a block diagram showing communication between two stations in the time division transmission unit 4 according to the embodiment. The time-division transmission unit 4 is a device that transmits signals between two stations (between stations A and B in FIG. 5) using one line. As shown in FIG. 5, the time division transmission unit 4 is capable of half-duplex transmission (at the top) and unidirectional transmission (at the bottom).

FIG. 6 is a block diagram of a time division transmission unit 4 at each station (eg, A station or B station) according to an embodiment. As shown in FIG. 6 , the time division transmission unit 4 includes an input/output section 10 , a CPU section 12 , an interface section 14 and a power supply section 16 .

First, the input/output unit 10 is a drive circuit for transmitting and receiving signals between the external input/output terminals and the CPU unit 12, and is composed of a driver array element (transistor array).

External input/output devices usually include PNP-compatible ones and NPN-compatible ones. Conventional transmission units have required the entire device to be changed to accommodate input and output. However, in the input/output unit 10 in the time-division transmission unit according to the present embodiment, it is possible to easily change the polarity of the external input/output device by selecting the type of driver array element and changing the insertion position. I can handle it. In other words, it is possible to easily change (Lo active/Hi active) on the input side and change (sink output/source output) on the output side. Switching of the polarity of the input/output unit 10 will also be described later.

Next, the CPU section 12 is composed of, for example, an 8-bit microcomputer. The CPU unit 12 is a circuit that converts a synchronizing signal and a data signal into serial signals, converts them inversely, and controls them. The CPU units 12 in the time-division transmission units 4 of the two stations (A station and B station) each operate according to a program that implements data processing according to the flowcharts shown in FIGS. 9A and 9B (to be described later), for example. . The signal processed by the program running on the CPU unit 12 is, for example, a time division wave controlled at predetermined time intervals shown in FIGS. 11A and 11B (to be described later) and FIGS. is.

In the time-division transmission units 4 of the two stations (A station and B station), input/output transmission/reception is started by synchronization matching in the operation of the CPU section 12 . The time-division transmission units 4 of the two stations always repeat the synchronizing operation in order to prevent the occurrence of a shift in transmission/reception timing. Even if the state of the input at station A or station B changes, the respective outputs follow the change every cycle due to the operation of synchronization matching. The operation of synchronization alignment will be described (later) with reference to the flow chart of transmission and reception of synchronization signals between two stations shown in FIG. 9A.

Conventionally, a transmission unit is provided with a transmission-only terminal and a reception-only terminal for communicating with a counterpart transmission unit, and communication between two stations (for example, A station and B station) is performed using the transmission-only terminal and the reception terminal. It was done through a dedicated terminal. In the present disclosure and the present embodiment, the time division transmission unit 4 is configured to transmit and receive signals with the counterpart time division transmission unit 4 through the same (single) terminal (pin). .

In this way, by adopting a configuration in which signals are transmitted and received using the same pin, in time-division communication between two stations, the wires used do not require special performance, and the amount of information to be communicated increases. It is possible to realize a remarkable function and effect that special extension work or the like is not required. Accordingly, the CPU section 12 is provided with a single first signal terminal for exchanging signals with the interface section 14 . In the configuration diagram of the CPU section 12 and the interface section 14 in the time-division transmission unit 4 according to the present embodiment shown in FIG. It is shown. For the same reason, the interface unit 14 is provided with a single second signal terminal 21 for exchanging signals with the outside (see FIG. 8).

The function of the RE2 (20) pin is to set the CPU section 12 and the time-division transmission unit 4 to the output mode during signal transmission and to the input mode during signal reception. As a result, the time-division transmission unit 4 can transmit and receive signals with only one circuit (that is, one line), and the external circuit can be greatly simplified (see FIG. 8).

As shown in FIG. 8, the CPU unit 12 sequentially reads an external input signal (a) into it bit by bit, and at the same time, outputs an output signal (b) from the RE2 pin, which is the first signal terminal 20. . A signal (nu) transmitted from station B, which is the other party, is stored in a register in the CPU section 12 bit by bit, and is simultaneously output to the outside as an output signal (nu).

Next, the interface section 14 is a circuit for accurately communicating serial signals between the CPU section 12 and the outside. Since the interface unit 14 and the CPU unit 12 exchange signals through the same terminal (RE2 (20)), the circuit of the interface unit 14 is designed so that the signals at the time of transmission and reception do not clash (that is, do not interfere). (this circuit is called a hybrid circuit in this specification). That is, the interface section 14 is configured to cut off the input when outputting the signal.

Further, the interface unit 14 is configured to output "L" level during transmission and to input "L" level during reception. This reduces the influence of noise from the outside. The interface unit 14 will also be described later with reference to FIG.

Next, the power supply unit 16 supplies power to the input/output unit 10 , the CPU unit 12 and the interface unit 14 . The CPU section 12 and the interface section 14 use, for example, DC5V. Each time-division transmission unit 4 in two stations (A station, B station) may use separate power supplies. The input/output unit 10 can use DC 12V-24V, for example.

2.1.3. [Configuration of input/output unit]
There are PNP specifications and NPN specifications for external input/output devices. In general, the transmission unit has to match the polarity at the input and output parts each time. In the input/output unit 10 of the time-division transmission unit 4 according to the present embodiment, the driver array elements are replaced for easy handling.

は９番ピンを、

は１０番ピンを示す。 FIG. 7 is a diagram showing the configuration of the input/output section (driver array element) 10 in the time division transmission unit 4 according to the embodiment. As shown in the left parts of FIGS. 7(1) and 7(2), in the driver array element of the input section, by changing the format, it is possible to change (switch) between the input Hi active and the input Lo active. Since the Hi-active type driver array element and the Lo-active type driver array element have the same pin arrangement and the same number of pins, conversion is possible by exchanging them as they are. In addition, in FIG.

is pin 9,

indicates the 10th pin.

As for the output part, as shown in the right part of FIGS. 7(1) and 7(2), by arranging the IC insertion sockets in pin shape in two rows, the form of the driver array element is changed, and By moving the insertion position, the output can be switched between source driver and sink driver. In other words, although the external dimensions and the number of pins of the socket are the same, since the polarities (+, -) of the 9th pin and the 10th pin are different, selection can be made by moving the insertion position.

Thus, the input and output sections of the input/output section 10 are configured to permit the replacement (type) of the driver array element and the change of the plug-in position. In the input IC, the 9th pin is always set to (-) and the 10th pin is set to (+). In the output IC, the polarities of the 9th and 10th pins differ depending on the source drive type and the sink drive type.

The left part of FIG. 7(2) shows that it is possible to switch between input Hi active and input Lo active by exchanging the type of the IC which is the driver array element. In the right part of FIG. 7(2), when the format of the driver array element is the source driver type, if it is inserted on the right side (in the figure), (+) is applied to the 9th pin of the IC and (-) is applied to the 10th pin. ) are supplied, and if the type of the driver array element is a sink driver type, (-) is supplied to the 9th pin of the IC and (+) is supplied to the 10th pin if it is inserted to the left (in the figure). It is shown that.

2.1.4. [Configuration of interface part]
FIG. 8 is a diagram showing configurations of the CPU section 12 and the interface section 14 in the time division transmission unit 4 according to the embodiment. The left part of FIG. 8 shows the CPU part 12 and the interface part 14 of the time division transmission unit 4 in the A station, and the right part of FIG. 8 shows the CPU part 12 and the interface part 14 of the time division transmission unit 4 in the B station. there is In the diagram of the interface section 14, "R1" to "R7" are resistors, and each numerical value on the right side is the resistance value.

As previously mentioned, the RE2 pin (ie, first signal terminal) (20) changes function depending on transmission and reception. The RE2 pin (20), which is a terminal of the CPU section 12, is controlled by a software program loaded into the CPU section 12 so that it accepts "L" level input at the time of reception and outputs "H" level at the time of transmission. I switch functions all the time.

[In transmission mode]
In the transmission mode of station A, signals are transmitted as follows.
・The signals of the input terminals IN1 to INnx of the CPU section 12 of the A station are turned ON at the "L" level (a)->
・When outputting from the RE2 pin (20), it becomes a "H" level signal (b) ->
・The transistor element Tr1 and the photocoupler element HP1 are turned ON (c)->
・The photocoupler element HP2 of the interface unit 14 of station B is turned ON (2)-->
• An "L" level signal is input to the CPU section 12 of the B station, and an "H" level signal is extracted from the output terminals OUT1 to OUTnx (e) of the CPU section 12.

[In receive mode]
In the transmission mode of station A, the signal is received as follows.
・The signals of the input terminals IN1 to INnx of the CPU section 12 of the B station are input at the "L" level (F).
・When outputting from the RE2 pin (20), it becomes a "H" level signal (g) ->
・Transistor element Tr1 and photocoupler element HP1 are turned ON (h)->
・The photocoupler element HP2 of the interface section 14 of station A is turned ON (i)-->
• An "L" level signal is input to the CPU section 12 of station A, and an "H" level signal is extracted from the output terminals OUT1 to OUTnx (nu) of the CPU section 12.

In order to prevent interference between transmission and reception, the interface unit 14 according to the present embodiment blocks input as follows during transmission.
A pulse wave of (for example) 5V is output to the RE2 pin (20), and a current "ib" flows due to the voltage component base-clipped by the Zener diode ZD1. The photocoupler element HP1 is turned on, and the emitter-collector (EC) of the phototransistor constituting the photocoupler element HP1 becomes low level (“L”).
At the same time, the anode side (for example, point F) of the diode element D2 becomes low level (“L”), and the photocoupler HP2 is kept OFF, thereby the signal terminal (second signal terminal) 21 is cut off. By doing so, an erroneous input to the RE2 pin (20) of the CPU section 12 of the A station due to the current flowing through the diode element D1 of the B station is prevented.

As shown in FIG. 8, the base clipper Zener diode ZD1 operates the transistor element Tr1 at a voltage exceeding (for example) 3V. Further, as shown in FIG. 8, during the output (transmission) of the A station, the level between the emitter and the collector of the photocoupler element HP1 becomes "L" level (a). At this time, when the photocoupler element HP1 is turned ON, the anode side of the diode element D2 connects the anode side of the light emitting element that constitutes the photocoupler element HP2 and the collector side of the phototransistor that constitutes the photocoupler element HP1. becomes "L" at the point F, and the input is cut off so that the photocoupler element HP2 does not turn ON.

In this way, the interface unit 14 connects the signal terminal (second signal terminal) 21 and the collector side of the phototransistor forming the photocoupler element HP1, and the diode element D1 and the light emitting element forming the photocoupler element HP2. A diode element D2 is provided which connects the anode side of the element and the collector side of the phototransistor forming the photocoupler element HP1.
In the transmission mode, of the high-level signal output from the RE2 pin (20) of the CPU section 12, the voltage component clipped by the Zener diode ZD1 for the base clipper turns on the transistor element Tr1. When the transistor element Tr1 is turned on, the photocoupler element HP1 is turned on, and the voltage between the emitter and the collector of the phototransistor constituting the photocoupler element HP1 becomes low level. A low-level output is output to the signal terminal 21 via the diode element D1 by the low level between the emitter and the collector of the phototransistor forming the photocoupler HP1. At the same time, the anode side of the diode element D2 becomes low level, and the photocoupler element HP2 is kept off, so that the input from the signal terminal 21 is cut off.
In the receive mode, it accepts a low level input from signal terminal 21 .

2.2. [motion]
2.2.1. [Transmission/reception operation of synchronization signal]
9A (1-1) and (1-2) are flowcharts relating to transmission and reception of synchronization signals between two stations (for example, A station and B station) of the time division transmission unit 4 according to the embodiment.

As a situation, it is assumed that only the power supply on the A station side is turned on, the CPU unit 12 starts operating, and the station is waiting for a signal from the B station side. In this situation, when the power of the B station is turned on while the operation of the CPU unit 12 of the A station is stopped, the B station continues to issue the request signal intermittently. Here, when the CPU units 12 of both the A station and the B station are in an operating state, the A station receives the specified request signal from the B station side, and the A station returns a normal OK signal to the B station. If the reception is OK at the B station, both the A station and the B station start transmitting and receiving data. Once data transmission/reception is completed, synchronization is started again, and the two stations can communicate with each other so that the signals of the A and B stations do not deviate.

The flow charts of (1-1) and (1-2) in FIG. 9A show the transition of the above situation. The B station transmits a reception OK signal to the A station in the output mode (S22) (S24). Station A, waiting for an input, receives an input from station B (S04, S06). Station A enters the output mode (S08) and returns a normal OK signal to station B (S10). Station B, waiting for the normal signal OK, receives the normal OK signal from station A (S28). Station A transmits a data signal (S12), and station B receives the data signal (S30). The B station transmits a data signal (S32), and the A station receives the data signal (S14). These S02 to S14 and S22 to S32 processes are repeated while being synchronized.

2.2.2. [Sequential Reading and Receiving of Data Signals]
FIG. 9B (2-1) is a flow chart of sequential reading of data signals in the time-division transmission unit 4, which is each station.
T1 to Tn: 1st to nth input states are checked in order.
If there is an input, it will generate a μS pulse at the RE2 pin (20). After a predetermined time lag, the process moves to confirmation of the next input state.
If there is no input, it is cleared by the RE2 pin (20). After a predetermined time lag, the process moves to confirmation of the next input state.

Further, FIG. 9B(2-2) is a flow chart of data signal reception in the time-division transmission unit 4 as each station.
R1 to Rn: 1st to nth serial signals are checked in order.
If there is an input, it is stored in the designated register and simultaneously output to the designated terminal. After a predetermined time lag, the next serial signal is confirmed.
If there is no input, the designated register is cleared, and after a predetermined time lag in which the designated terminal is also cleared, the next serial signal is confirmed.

2.2.3. [Operation in the form of half-duplex transmission]
A transmission system using two time-division transmission units 4 according to this embodiment can realize a half-duplex transmission mode and a unidirectional transmission mode.

First, FIG. 10A is a diagram showing a time-division transmission signal and RE2 pin (20) mode in the form of half-duplex transmission in a transmission system using two time-division transmission units 4 according to this embodiment. FIG. 10B is a schematic block diagram of the time division transmission units 4 at stations A and B, also in the form of half-duplex transmission. Data signals are communicated between the A station side transmission unit (16 points of human power/16 points of output) and the B side transmission unit (16 points of human power/16 points of output). The A-station side transmission unit and the B-station side transmission unit are loaded with a software program based on a predetermined flow chart (for example, see FIG. 12) in their respective CPU sections 12 .

The start timings of communication between the A-station transmission unit and the B-station transmission unit are matched by a synchronizing signal. Next, data signals are transmitted and received.
In other words, [Synchronization signal -> coincidence of start time -> transmission and reception of data signal -> reception and transmission of data signal] constitute one cycle of operation, and by repeating this cycle, the transmission unit on the A station side and the transmission unit on the B station side , it is possible to perform stable signal communication without shifting the timing of transmission and reception.

On the A station side, the input ON-OFF states of 16 points (IN1 to IN16) are sequentially read bit by bit and transmitted to the B station side as a time division signal (TD).
After the transmission, the A station switches to the reception mode, the serial signal from the B station is stored and processed by the CPU unit 12, and outputs (OUT1 to OUT16) are distributed to predetermined output terminals bit by bit (RD).

On the B station side, the CPU unit 12 stores the received serial signal and distributes it as an output (OUT1 to OUT16) bit by bit (RD). After that, the input ON-OFF states of 16 points (IN1 to IN16) are sequentially read bit by bit and transmitted to the A station side as a time-division signal (TD).

In particular, as shown in FIG. 10B (and FIG. 8), both the A station and the B station use the same pin between the CPU unit 12 and the interface unit 14, that is, the RE2 pin (20 ). That is, the software program is set in each CPU section 12 so that the function of the RE2 pin (20) is set to the output mode during transmission and to the input mode during reception.

Further, as shown in FIG. 10B, between the RE2 pin (20) and the transmission output circuit of the interface section 14 in the A station and the B station, the Zener diode ZD1 for the base clipper described mainly with reference to FIG. 8 is provided. is provided. Between the transmission output circuit and the reception input circuit of the interface section 14, a diode element D2 is provided for blocking the input in the transmission mode.

Furthermore, as shown in FIG. 10B, the input section (input circuit) of the input/output section 10 can change [input Hi active, input Lo active] by replacing the driver array element. The output section (output circuit) of the input/output section 10 can be changed to [source driver, sink driver] by replacing the driver array element (however, as for the output section, as shown in FIG. 7, the driver It is necessary to move the insertion position of the array element).

Next, FIG. 11A is a diagram showing 1616 signal frames at station A in the form of half-duplex transmission in a transmission system using two time-division transmission units 4 according to this embodiment, and FIG. , 1616 signal frames at station B in the same half-duplex transmission configuration; The 1616 signal frames in FIGS. 11A and 11B correspond in chronological order via (P), (Q), and (R) in both figures.

Next, FIG. 12 is a diagram showing a 1616 main routine in the form of half-duplex transmission in a transmission system using two time-division transmission units 4 according to this embodiment. The left part shows the flow of the main routine operated by the CPU unit 12 of the A station, and the right part shows the flow of the main routine operated by the CPU unit 12 of the B station. The main routine is written, for example, in PIC assembly.

As shown in FIG. 12, the main routine of station A is composed of an "initialization relation" part, a "synchronization relation" part, a "data transmission" part, and a "data reception" part. The "initialization relationship" part, the "synchronization relationship" part, the "data transmission" part, and the "data reception" part are respectively the "initialization relationship" part, the "synchronization relationship" part, the " It corresponds to the "data reception" part and the "data transmission" part. The "synchronization relationship", "send data" and "receive data" portions of the A station main routine are repeated depending on the amount of data to be sent and received.

Further, as shown in FIG. 12, the main routine of station B is composed of an "initialization relation" part, a "synchronization relation" part, a "data reception" part, and a "data transmission" part. The "initial setting relation" part, the "synchronization relation" part, the "data reception" part, and the "data transmission" part correspond to the "initial setting relation" part, the "synchronization relation" part, the " It corresponds to the "data transmission" part and the "data reception" part. The "synchronization", "receive data", and "send data" portions of the main routine of station B are repeated, like station A, depending on the amount of data to be sent and received.

2.2.4. [Operation in the form of unidirectional transmission]

Next, FIG. 13A is a diagram showing a time-division transmission signal and an RE2 pin (20) mode in the form of unidirectional transmission in a transmission system using two time-division transmission units 4 according to this embodiment. FIG. 13B is a schematic block diagram of the time division transmission units 4 at stations A and B, also in the form of unidirectional transmission. Data signals are communicated between the A-side transmission unit (32 points of manual power) and the B-side transmission unit (32 points of output). Therefore, the transmission unit on the A station side is dedicated to input, and the transmission unit on the B station side is dedicated to output. The A-station side transmission unit and the B-station side transmission unit are loaded with a software program based on a predetermined flow chart (for example, see FIG. 15) in their respective CPU sections 12 .

The start timings of communication between the A-station transmission unit and the B-station transmission unit are matched by a synchronizing signal. The transmission unit on the A station side transmits a data signal, and the transmission unit on the B station side receives data.
In other words, [Synchronization signal -> coincidence of start time -> transmission of data signal by station A, reception of data signal by station B] is one cycle of operation, and by repeating this cycle, the transmission unit on the A side and the transmission on the B side It is possible to perform stable signal communication with the unit without any deviation in transmission/reception timing.

On the A station side, the input ON-OFF states of the 32 points (IN1 to IN32) are sequentially read bit by bit and transmitted to the B station side as a time division signal (TD).
On the B station side, the CPU unit 12 stores the received serial signal and distributes it as an output (OUT1 to OUT32) bit by bit (RD).

In particular, as shown in FIG. 13B (and FIG. 8), both the A station and the B station use the same pin between the CPU unit 12 and the interface unit 14, that is, the RE2 pin (20 ). That is, the software program is set in each CPU section 12 so that the function of the RE2 pin (20) is set to the output mode during transmission and to the input mode during reception.

Further, as shown in FIG. 13B, between the RE2 pin (20) and the transmission output circuit of the interface section 14 in the A station and the B station, the Zener diode ZD1 for the base clipper described mainly with reference to FIG. 8 is provided. is provided. Between the transmission output circuit and the reception input circuit of the interface section 14, a diode element D2 is provided for blocking the input in the transmission mode.

Furthermore, as shown in FIG. 13B, the input section (input circuit) of the input/output section 10 can change [input Hi active, input Lo active] by replacing the driver array element. The output section (output circuit) of the input/output section 10 can be changed to [source driver, sink driver] by replacing the driver array element (however, as for the output section, as shown in FIG. 7, the driver It is necessary to move the insertion position of the array element).

Next, FIG. 14A is a diagram showing 3200 signal frames at station A in the form of unidirectional transmission in a transmission system using two time division transmission units 4 according to this embodiment, and FIG. Fig. 3 shows 3200 signal frames at station B in the same unidirectional transmission configuration; The 3200 signal frames in FIGS. 14A and 14B correspond chronologically via (P), (Q), and (R) in both figures.

Next, FIG. 15 is a diagram showing a 3200 main routine in the form of unidirectional transmission in a transmission system using two time division transmission units 4 according to this embodiment. The left part shows the flow of the main routine operated by the CPU unit 12 of the A station, and the right part shows the flow of the main routine operated by the CPU unit 12 of the B station. The main routine is written, for example, in PIC assembly.

As shown in FIG. 15, the main routine of station A is composed of an "initialization relation" part, a "synchronization relation" part, and a "data transmission" part. The "initialization relationship" part, the "synchronization relationship" part, and the "data transmission" part correspond to the "initialization relationship" part, the "synchronization relationship" part, and the "data reception" part, respectively, in the main routine of station B. ,handle. The "synchronization relationship" and "data transmission" portions of the A station main routine are repeated depending on the amount of data to be transmitted.

Further, as shown in FIG. 15, the main routine of station B is composed of an "initialization relation" part, a "synchronization relation" part, and a "data reception" part. The "initialization relationship" part, the "synchronization relationship" part, and the "data reception" part correspond to the "initialization relationship" part, the "synchronization relationship" part, and the "data transmission" part, respectively, in the main routine of station A. ,handle. The "synchronization relationship" and "data reception" portions of the B station main routine are repeated depending on the amount of data to be received.

2.3. [Summary of Embodiment]
The time-division transmission unit 4 according to this embodiment includes an input/output section 10, a CPU section 12, and an interface section . The CPU section 12 is provided with one first signal terminal 20 for exchanging signals with the interface section 14 . The interface unit 14 is provided with one second signal terminal 21 for exchanging signals with the outside. The interface unit 14 includes a base clipper Zener diode ZD1, a first transistor element Tr1, a first photocoupler element HP1, and a second photocoupler element HP2. Further, the interface unit 14 connects the second signal terminal 21 and the collector side of the phototransistor forming the first photocoupler element HP1, and connects the first diode element D1 and the second photocoupler element HP2. A second diode element D2 is provided for connecting the anode side of the light emitting element and the collector side of the phototransistor forming the first photocoupler element HP1. The CPU unit 12 is configured such that the first signal terminal 20 receives an active signal at a low level input during reception and outputs an active signal at a high level output during transmission. In the transmission mode, of the high level signal output from the first signal terminal 20 of the CPU section 12, the voltage clipped by the base clipper Zener diode ZD1 turns on the first transistor element Tr1. When the first transistor element Tr1 is turned on, the first photocoupler element HP1 is turned on, and the emitter-collector voltage of the phototransistor constituting the first photocoupler element HP1 becomes low level. A low level output is output to the second signal terminal 21 through the first diode element D1 by the low level between the emitter and the collector of the phototransistor forming the first photocoupler element HP1. At the same time, the anode side of the second diode element D2 becomes low level, and the input from the second signal terminal 21 is cut off by keeping the second photocoupler element HP2 off. In receive mode, it accepts a low level input from the second signal terminal 21 .

The transmission unit according to this embodiment can transmit and receive signals using only the same pin. In particular, the transmission unit according to the present embodiment adopts a configuration in which signals are transmitted and received using only the same pin, so that in time-division communication between two stations, the wires used have special performance. It is possible to construct a transmission system and a transmission network that do not require special extension work or the like even if the amount of information to be communicated increases.

3. [Other embodiments]
As described above, the embodiment has been described as an example of the technology disclosed in the present application. However, the technology in the present disclosure is not limited to this, and can be applied to embodiments in which modifications, replacements, additions, omissions, etc. are made as appropriate.

Also, the accompanying drawings and detailed description have been provided to explain the embodiments. Therefore, among the components described in the attached drawings and detailed description, there are not only components essential for solving the problem, but also components not essential for solving the problem in order to illustrate the above technology. can also be included. Therefore, it should not be immediately recognized that those non-essential components are essential just because they are described in the attached drawings and detailed description.

In addition, the above-described embodiments are intended to illustrate the technology of the present disclosure, and various modifications, replacements, additions, omissions, etc. can be made within the scope of the claims or equivalents thereof.

4... time division transmission unit, 6b... 3-core cable, 6c... 4-core cable, 8... multi-core cable, 10... input/output unit, 12... CPU unit, 14. Interface section 16 Power supply section 20 RE2 pin (first signal terminal) 21 Second signal terminal D1 Diode element D2 Diode element HP1: Photocoupler element, HP2: Photocoupler element, ZD1: Zener diode for base clipper.

Claims (5)

comprising an input/output unit, a CPU unit, and an interface unit,
The CPU section is provided with one first signal terminal for exchanging signals with the interface section,
The interface unit is provided with one second signal terminal for exchanging signals with the outside,
The interface is
A base clipper Zener diode, a first transistor element, a first photocoupler element, and a second photocoupler element,
Furthermore, the interface section
a first diode element that connects the second signal terminal and the collector side of the phototransistor that constitutes the first photocoupler element;
a second diode element that connects the anode side of the light emitting element that constitutes the second photocoupler element and the collector side of the phototransistor that constitutes the first photocoupler element,
The CPU unit is configured such that the first signal terminal receives an active signal at a low level input during reception and outputs an active signal at a high level output during transmission,
In send mode,
The first transistor element is turned on by the voltage component clipped by the Zener diode for the base clipper in the high level signal output from the first signal terminal of the CPU section,
When the first transistor element is turned on, the first photocoupler element is turned on, and the emitter-collector voltage of the phototransistor constituting the first photocoupler element becomes low level,
When the emitter-collector of the phototransistor constituting the first photocoupler element becomes low level, a low level output is output to the second signal terminal through the first diode element. The anode side of the diode element of becomes low level, and the second photocoupler element is kept off, so that the input from the second signal terminal is cut off,
In receive mode,
which accepts a low level input from the second signal terminal,
transmission unit. The input/output unit includes an input unit and an output unit,
The input section and the output section are both configured by driver array elements,
In the driver array element of the input section, switching between input Hi active and input Lo active is performed by changing the format,
In the output section, the insertion sockets of the driver array elements, which are ICs, are pin-shaped and arranged in two rows. by switching the output from the output unit as a source driver or a sink driver,
A transmission unit according to claim 1. A transmission system comprising two stations of the transmission unit according to claim 1,
(Step 1) exchanging synchronization signals between one transmission unit and the other transmission unit;
(Step 2) one transmission unit performs data transmission, and the other transmission unit performs data reception for receiving the data transmitted by the data transmission;
(Step 3) the other transmission unit performs data transmission, and the one transmission unit performs data reception for receiving the data transmitted by the data transmission;
(Step 4) By repeating (Step 1) to (Step 3), half-duplex transmission is performed between the transmission units of two stations;
transmission system. A transmission system comprising two stations of the transmission unit according to claim 1,
(Step 1) exchanging synchronization signals between one transmission unit and the other transmission unit;
(Step 2) one transmission unit performs data transmission, and the other transmission unit performs data reception for receiving the data transmitted by the data transmission;
(Step 3) Perform unidirectional transmission between the transmission units of two stations by repeating (Step 1) to (Step 2);
transmission system. comprising an input/output unit, a CPU unit, and an interface unit,
The CPU section is provided with one first signal terminal for exchanging signals with the interface section,
The interface unit is provided with one second signal terminal for exchanging signals with the outside,
The interface is
A base clipper Zener diode, a first transistor element, a first photocoupler element, and a second photocoupler element,
Furthermore, the interface section
a first diode element that connects the second signal terminal and the collector side of the phototransistor that constitutes the first photocoupler element;
a second diode element that connects the anode side of the light emitting element that constitutes the second photocoupler element and the collector side of the phototransistor that constitutes the first photocoupler element,
The CPU unit is configured such that the first signal terminal accepts an active signal with a low level input during reception and outputs an active signal with a high level output during transmission.
the transmission unit,
A method for transmitting and receiving data via only one signal terminal, comprising:
In send mode,
turning on the first transistor element by a voltage component clipped by the Zener diode for the base clipper, out of the high level signal output from the first signal terminal of the CPU unit;
By turning on the first transistor element, the first photocoupler element is turned on, and the emitter-collector of the phototransistor constituting the first photocoupler element is set to a low level,
By setting the emitter-collector of the phototransistor constituting the first photocoupler element to a low level, a low level output is output to the second signal terminal through the first diode element, and at the same time, the second The anode side of the second diode element becomes low level, and the second photocoupler element is kept off, thereby blocking the input from the second signal terminal,
In receive mode,
which accepts a low level input from the second signal terminal,
A method of transmitting and receiving data via only one signal terminal in a transmission unit.

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