JP7302714B2 - Transmitting device, transmitting method, receiving device, and receiving method - Google Patents

Description

The present technology relates to a transmitting device, a transmitting method, a receiving device, and a receiving method, and in particular, for example, in data transmission using LDPC codes, a transmitting device and a transmitting method that can ensure good communication quality. , a receiving device, and a receiving method.

LDPC (Low Density Parity Check) code has a high error correction capability, and in recent years, for example, DVB (Digital Video Broadcasting)-S.2 in Europe, etc., DVB-T.2, DVB-C.2, It is widely used in transmission systems such as digital broadcasting such as ATSC (Advanced Television Systems Committee) 3.0 in the United States (for example, see Non-Patent Document 1).

Recent studies have shown that LDPC codes can achieve performance close to the Shannon limit as the code length increases, similar to turbo codes and the like. In addition, LDPC codes have the property that the minimum distance is proportional to the code length, so as their characteristics, block error probability characteristics are good, and furthermore, the so-called error floor phenomenon observed in decoding characteristics such as turbo codes is reduced. Another advantage is that it rarely occurs.

ATSC Standard: Physical Layer Protocol (A/322), 7 September 2016

In data transmission using LDPC codes, for example, the LDPC code is a symbol of quadrature modulation (digital modulation) such as QPSK (Quadrature Phase Shift Keying) (symbolized), and the symbol is a signal point of quadrature modulation. Mapped and sent.

Data transmission using LDPC codes as described above is spreading worldwide, and there is a demand to ensure good communication (transmission) quality.

The present technology has been made in view of such circumstances, and is intended to ensure good communication quality in data transmission using LDPC codes.

In the first transmission device/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 2/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding unit/step that punctures the beginning of the information bits by the puncture length L, generates a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 2/16, and the extension check The matrices are a predetermined value M1, an M1 row K column represented by the information length K = N × r, an upper left A matrix of the extended parity check matrix, and an M1 row M1 column to the right of the A matrix The adjacent staircase B matrix, the Z matrix that is the right-adjacent zero matrix of said B matrix with M1 rows and N+LK-M1 columns, and said A matrix with N+LK-M1 rows and K+M1 columns. and a C matrix adjacent to the bottom of the B matrix, and a D matrix that is a unit matrix of N+LK-M1 rows and N+LK-M1 columns adjacent to the right of the C matrix, and the puncture length L is , 0, the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is an element of 1 in the A matrix and the C matrix A table representing the position of every 360 columns of
1444 1737 1780 9182 9748 9954 11859 23510 36957 41211 41804 41857 42268 42854 45152 46217 46448 52760 57528 59998 60168
281 1279 1468 9650 11337 15973 21859 24346 25864 28317 33522 35344 40280 43576 43942 50851 53221 57076 57561 59922 59962
132 758 1470 2901 2957 3365 4567 7062 10939 12288 20818 35122 39299 41903 43394 44289 49129 51394 53222 53899 56037
9 756 1510 3127 4867 15380 16575 17906 19275 20944 25462 27021 31939 34367 36491 39391 45013 45505 47768 50626 51547
188 252 1181 2939 4132 7944 12352 15443 17831 18785 18904 22672 23400 30518 30652 45102 51500 52032 52868 60341
496 564 1527 2708 2751 3658 6451 8212 11654 17193 21558 23963 28394 30554 30628 35052 44835 45090 49804 52979
793 858 1710 3561 10566 11369 17707 20970 22329 22383 24607 31237 38613 42719 43867 45715 50453 51882 55535 60316
689 980 1657 2690 4633 11070 16939 18443 20748 21753 25742 30361 31544 31693 33019 40842 47042 48850 52130 56606
198 281 1664 3384 12801 17438 24093 29656 30578 31929 35921 38919 38984 40957 43262 48155 50743 56398 56427 59215
457 1065 1196 2861 12717 15390 16655 17899 18300 22233 31560 32716 34991 43324 46709 51328 52891 54292 56334 59229
1307 1481 1599 13551 21460 22804 23439 32551 32671 35941 36329 40096 41474 45156 50568 55578 55667 56581 59061 60009
99 485 708 4043 5527 5824 7489 8809 15871 17753 18297 18507 19070 22839 28023 41124 43165 50873 51968 57000
188 412 1641 1833 5707 7556 10610 12636 14533 26728 27604 31757 32972 34677 36279 38315 42252 43155 53121 57503
300 794 1153 6459 7063 13526 17788 18308 21233 21439 22250 28514 32042 32160 36140 44273 49289 50434 51163 56471
757 1336 1440 5560 6283 10080 10986 13051 17638 22870 31581 35463 41212 42195 43305 46746 49564 56412 58207 59477
106 1195 1474 6273 14321 14746 16496 17016 17214 19472 27450 33489 40638 42896 43150 47624 51106 51339 53730 55816
98 1002 1336 2076 9328 10989 13413 13916 14455 17863 19776 24981 31172 39450 40385 43348 44833 46967 52917 58029
262 1363 1605 4715 8438 8794 12188 18208 19803 28570 36281 38576 39120 40344 44994 45827 46559 49914 50771 56658
870 1743 1764 5521 8695 11745 15888 16359 16412 33151 37033 38281 38499 39026 41174 44818 53168 56178 58405 60285
861 1142 1169 2232 4370 9265 10442 15376 15947 19420 24577 29045 36440 38242 41035 47841 49589 50529 52662 59907
231 913 1440 2695 6369 7938 8296 12107 14329 19324 25096 26108 35369 38516 41289 43604 52617 57130 59909 60020
214 667 762 3988 6762 14360 15257 18298 18943 19364 29813 33804 35106 36373 39451 39478 45683 47618 48539 59814
1144 1150 1746 1800 7038 11454 18376 18819 21869 26781 33351 35591 46571 49235 49956 50749 51642 53390 56404 58103
308 317 1510 5176 12653 13311 15884 18075 22371 26021 27004 29283 30382 32114 32978 35790 47224 48249 51701 57840
2786 5188 6809 7110 7138 7167 8042 12569 15301 27503 27894 32875 35277 48267 49051 57363
6186 6554 12052 14220 15013 15388 22130 27207 30084 30620 31562 36834 38446 52593 56791 60017
8810 12703 21600 21640 22233 26157 27268 27384 33020 39679 49298 51854 52364 53298 55215 59802
2670 6309 10054 11421 11750 11901 12053 12752 17466 28571 29910 32369 34446 38373 49448 51729
11357 12810 13252 14755 22824 30867 32868 33512 34862 35560 38704 41861 42805 43103 48692 55234
is a transmitting apparatus/method.

In the first receiving apparatus/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 2/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, perform LDPC encoding of information bits of information length K = N × r to generate an extended LDPC code having parity bits of parity length M = N + LK, An encoding step of generating a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 2/16 is provided by puncturing the beginning of the information bits by the puncture length L, and the extended parity check matrix is , a predetermined value M1, and an M1-by-K-column A matrix represented by the information length K=N×r, the upper left A matrix of the extended parity check matrix, and an M1-by-M1-column A matrix adjacent to the right of the A matrix A B matrix with a staircase structure, a Z matrix that is a zero matrix adjacent to the right of the B matrix with M1 rows and N+LK-M1 columns, the A matrix with N+LK-M1 rows and K+M1 columns, and the above The C matrix adjacent below the B matrix and the D matrix that is the identity matrix adjacent to the right of the C matrix with N + LK-M1 rows and N + LK-M1 columns, and the puncture length L is 0 and the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is the position of the element of 1 in the A matrix and the C matrix A table representing every 360 columns of
1444 1737 1780 9182 9748 9954 11859 23510 36957 41211 41804 41857 42268 42854 45152 46217 46448 52760 57528 59998 60168
281 1279 1468 9650 11337 15973 21859 24346 25864 28317 33522 35344 40280 43576 43942 50851 53221 57076 57561 59922 59962
132 758 1470 2901 2957 3365 4567 7062 10939 12288 20818 35122 39299 41903 43394 44289 49129 51394 53222 53899 56037
9 756 1510 3127 4867 15380 16575 17906 19275 20944 25462 27021 31939 34367 36491 39391 45013 45505 47768 50626 51547
188 252 1181 2939 4132 7944 12352 15443 17831 18785 18904 22672 23400 30518 30652 45102 51500 52032 52868 60341
496 564 1527 2708 2751 3658 6451 8212 11654 17193 21558 23963 28394 30554 30628 35052 44835 45090 49804 52979
793 858 1710 3561 10566 11369 17707 20970 22329 22383 24607 31237 38613 42719 43867 45715 50453 51882 55535 60316
689 980 1657 2690 4633 11070 16939 18443 20748 21753 25742 30361 31544 31693 33019 40842 47042 48850 52130 56606
198 281 1664 3384 12801 17438 24093 29656 30578 31929 35921 38919 38984 40957 43262 48155 50743 56398 56427 59215
457 1065 1196 2861 12717 15390 16655 17899 18300 22233 31560 32716 34991 43324 46709 51328 52891 54292 56334 59229
1307 1481 1599 13551 21460 22804 23439 32551 32671 35941 36329 40096 41474 45156 50568 55578 55667 56581 59061 60009
99 485 708 4043 5527 5824 7489 8809 15871 17753 18297 18507 19070 22839 28023 41124 43165 50873 51968 57000
188 412 1641 1833 5707 7556 10610 12636 14533 26728 27604 31757 32972 34677 36279 38315 42252 43155 53121 57503
300 794 1153 6459 7063 13526 17788 18308 21233 21439 22250 28514 32042 32160 36140 44273 49289 50434 51163 56471
757 1336 1440 5560 6283 10080 10986 13051 17638 22870 31581 35463 41212 42195 43305 46746 49564 56412 58207 59477
106 1195 1474 6273 14321 14746 16496 17016 17214 19472 27450 33489 40638 42896 43150 47624 51106 51339 53730 55816
98 1002 1336 2076 9328 10989 13413 13916 14455 17863 19776 24981 31172 39450 40385 43348 44833 46967 52917 58029
262 1363 1605 4715 8438 8794 12188 18208 19803 28570 36281 38576 39120 40344 44994 45827 46559 49914 50771 56658
870 1743 1764 5521 8695 11745 15888 16359 16412 33151 37033 38281 38499 39026 41174 44818 53168 56178 58405 60285
861 1142 1169 2232 4370 9265 10442 15376 15947 19420 24577 29045 36440 38242 41035 47841 49589 50529 52662 59907
231 913 1440 2695 6369 7938 8296 12107 14329 19324 25096 26108 35369 38516 41289 43604 52617 57130 59909 60020
214 667 762 3988 6762 14360 15257 18298 18943 19364 29813 33804 35106 36373 39451 39478 45683 47618 48539 59814
1144 1150 1746 1800 7038 11454 18376 18819 21869 26781 33351 35591 46571 49235 49956 50749 51642 53390 56404 58103
308 317 1510 5176 12653 13311 15884 18075 22371 26021 27004 29283 30382 32114 32978 35790 47224 48249 51701 57840
2786 5188 6809 7110 7138 7167 8042 12569 15301 27503 27894 32875 35277 48267 49051 57363
6186 6554 12052 14220 15013 15388 22130 27207 30084 30620 31562 36834 38446 52593 56791 60017
8810 12703 21600 21640 22233 26157 27268 27384 33020 39679 49298 51854 52364 53298 55215 59802
2670 6309 10054 11421 11750 11901 12053 12752 17466 28571 29910 32369 34446 38373 49448 51729
11357 12810 13252 14755 22824 30867 32868 33512 34862 35560 38704 41861 42805 43103 48692 55234
A receiving apparatus/method comprising a decoding unit/step for decoding the punctured LDPC code obtained from data transmitted by the transmission method.

In the second transmission device/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 3/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding unit/step that punctures the head of the information bit by the puncture length L, generates a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 3/16, and the extension check The matrices are a predetermined value M1, an M1 row K column represented by the information length K = N × r, an upper left A matrix of the extended parity check matrix, and an M1 row M1 column to the right of the A matrix The adjacent staircase B matrix, the Z matrix that is the right-adjacent zero matrix of said B matrix with M1 rows and N+LK-M1 columns, and said A matrix with N+LK-M1 rows and K+M1 columns. and a C matrix adjacent to the bottom of the B matrix, and a D matrix that is a unit matrix of N+LK-M1 rows and N+LK-M1 columns adjacent to the right of the C matrix, and the puncture length L is , 0, the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is an element of 1 in the A matrix and the C matrix A table representing the position of every 360 columns of
853 875 1192 2465 3004 4879 9062 21593 24043 26616 30909 32017 35006 42135 44268 56020
161 519 1556 3317 6015 14909 15760 21148 30072 32655 33940 34834 43430 44798 51284 52169
177 999 1683 6976 17610 18152 19591 22312 25036 27303 28584 47608 47749 50216 52322 54007
981 1000 1625 1630 6933 13217 13956 15319 22642 29483 31921 35465 43602 44250 46505 55678
1204 1242 1653 3066 6095 16862 20154 21430 23418 26408 30979 34093 41103 48385 54547 55093
316 1355 1562 2665 5222 6575 18299 19639 24268 30959 37721 47966 48255 51808 53697 56010
183 219 615 2859 6967 8044 13949 22294 28922 29355 32175 32276 33861 49675 52583 53512
263 342 1684 7426 14417 20396 27461 30075 33740 36812 38204 38420 41612 43083 45914 56035
256 870 921 3023 4662 5225 5276 19284 26034 35397 38524 44936 45178 46351 50860 51813
289 898 1442 9135 10774 13951 14133 19070 21192 27854 32118 43657 43859 43934 52772 53659
256 690 1324 3582 7066 8507 26854 34507 40768 44943 47952 50512 52080 52872 53733 53773
238 1037 1388 1929 6395 10653 21299 23085 26467 26836 27834 44924 47310 49393 53742 55883
976 1217 1469 7718 16449 19465 19983 22386 24762 28308 32395 33589 35997 41034 42118 43799
265 368 1365 1375 1808 7556 14593 15079 19648 36077 40397 41971 44940 47570 52522 55839
802 1656 1689 5554 6787 11067 15764 19656 31740 31762 36046 42258 45165 49245 52732 53420
265 307 1299 2775 6738 22483 26322 27615 30628 34194 38024 38787 46089 48680 49115 51063
698 747 1241 2898 5218 7964 15358 17928 28069 29537 33641 36103 40207 40701 42823 42929
70 293 799 16494 16696 20008 21050 23735 34060 34555 35068 37664 45312 47748 50957 52382
1151 1163 1751 7025 10775 15100 22260 24718 28905 30853 33020 43261 46849 48258 54212 56122
279 457 775 8025 13383 16978 19254 23110 28197 31454 33060 38532 41429 41621 42149 54927
494 1130 1351 18525 22446 31344 31582 38324 42396 46010 48804 49241 49379 51987 52296 53133
177 508 1032 3547 8103 13357 14344 15876 20386 22050 23593 35305 47409 53297 55610 56093
988 1091 1785 3400 5144 7245 10179 12918 32871 33462 34484 38318 43410 44103 44267 52837
520 564 1757 12204 16894 17249 21480 21541 23760 28325 36266 40606 46094 48779 55501 56065
914 943 1111 3641 4232 10215 14134 16582 23445 28767 28862 32260 35952 39907 41846 47553
466 554 1697 4921 6953 7034 7052 10648 11628 19174 27830 29210 31722 32281 52559 55802
1135 1273 1408 2599 3618 4903 7210 17368 21014 21287 21926 24070 27741 29801 36137 44272
524 801 1767 4093 9721 12200 19463 29280 31587 33577 39747 43688 46627 49807 51345 55969
489 1390 1756 3050 12113 20477 21376 26797 27049 28907 31534 32746 33345 40582 41970 55911
432 1520 1598 9292 11552 16985 18417 21847 21960 24287 25489 34478 40990 44004 47573 53982
301 592 849 1944 4128 8341 16783 19249 24983 43892 44041 44474 44942 44959 50738 54935
118 558 1470 4368 10132 11791 16523 22408 23766 25111 25426 25779 35005 42742 46197 53118
310 1059 1322 3609 7107 10048 13161 32141 33369 35206 36131 38746 44545 47963 48414
256 346 845 7363 10375 12492 13091 27987 32113 34846 36223 39863 44450 46526 49216
607 683 954 5473 10617 18484 20018 26971 28190 37592 39069 39740 43575 45676 48149
244 635 1208 5450 8082 25030 25149 28411 29333 31324 36972 42071 43401 47088 52085
2841 5514 16122 18061 18199 20340 22525 25022 29914 31732 46415
7567 22860 23157 24194 24622 29643 31255 32355 36379 38228 51173
24002 24459 25897 26955 31168 31630 39183 46791 47323 51503 55241
4817 8291 10219 13991 14318 28549 28836 30491 36884 46310 54625
8275 9585 11678 37216 38932 45186 46287 48023 48862 53636 56067
is a transmitting apparatus/method.

In the second receiving apparatus/method of the present technology, the code length N is 69120 bits, and the row and column are extended by a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 3/16. Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding step of generating a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 3/16 is provided by puncturing the beginning of the information bits by the puncture length L, and the extended parity check matrix is , a predetermined value M1, and an M1-by-K-column A matrix represented by the information length K=N×r, the upper left A matrix of the extended parity check matrix, and an M1-by-M1-column A matrix adjacent to the right of the A matrix The B matrix of the staircase structure, the Z matrix that is the zero matrix adjacent to the right of the B matrix with M1 rows and N+LK-M1 columns, the A matrix with N+LK-M1 rows and K+M1 columns, and the above The C matrix adjacent below the B matrix and the D matrix that is the identity matrix of N + LK-M1 rows and N + LK-M1 columns adjacent to the right of the C matrix, and the puncture length L is 0 and the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is the position of the element of 1 in the A matrix and the C matrix A table representing every 360 columns of
853 875 1192 2465 3004 4879 9062 21593 24043 26616 30909 32017 35006 42135 44268 56020
161 519 1556 3317 6015 14909 15760 21148 30072 32655 33940 34834 43430 44798 51284 52169
177 999 1683 6976 17610 18152 19591 22312 25036 27303 28584 47608 47749 50216 52322 54007
981 1000 1625 1630 6933 13217 13956 15319 22642 29483 31921 35465 43602 44250 46505 55678
1204 1242 1653 3066 6095 16862 20154 21430 23418 26408 30979 34093 41103 48385 54547 55093
316 1355 1562 2665 5222 6575 18299 19639 24268 30959 37721 47966 48255 51808 53697 56010
183 219 615 2859 6967 8044 13949 22294 28922 29355 32175 32276 33861 49675 52583 53512
263 342 1684 7426 14417 20396 27461 30075 33740 36812 38204 38420 41612 43083 45914 56035
256 870 921 3023 4662 5225 5276 19284 26034 35397 38524 44936 45178 46351 50860 51813
289 898 1442 9135 10774 13951 14133 19070 21192 27854 32118 43657 43859 43934 52772 53659
256 690 1324 3582 7066 8507 26854 34507 40768 44943 47952 50512 52080 52872 53733 53773
238 1037 1388 1929 6395 10653 21299 23085 26467 26836 27834 44924 47310 49393 53742 55883
976 1217 1469 7718 16449 19465 19983 22386 24762 28308 32395 33589 35997 41034 42118 43799
265 368 1365 1375 1808 7556 14593 15079 19648 36077 40397 41971 44940 47570 52522 55839
802 1656 1689 5554 6787 11067 15764 19656 31740 31762 36046 42258 45165 49245 52732 53420
265 307 1299 2775 6738 22483 26322 27615 30628 34194 38024 38787 46089 48680 49115 51063
698 747 1241 2898 5218 7964 15358 17928 28069 29537 33641 36103 40207 40701 42823 42929
70 293 799 16494 16696 20008 21050 23735 34060 34555 35068 37664 45312 47748 50957 52382
1151 1163 1751 7025 10775 15100 22260 24718 28905 30853 33020 43261 46849 48258 54212 56122
279 457 775 8025 13383 16978 19254 23110 28197 31454 33060 38532 41429 41621 42149 54927
494 1130 1351 18525 22446 31344 31582 38324 42396 46010 48804 49241 49379 51987 52296 53133
177 508 1032 3547 8103 13357 14344 15876 20386 22050 23593 35305 47409 53297 55610 56093
988 1091 1785 3400 5144 7245 10179 12918 32871 33462 34484 38318 43410 44103 44267 52837
520 564 1757 12204 16894 17249 21480 21541 23760 28325 36266 40606 46094 48779 55501 56065
914 943 1111 3641 4232 10215 14134 16582 23445 28767 28862 32260 35952 39907 41846 47553
466 554 1697 4921 6953 7034 7052 10648 11628 19174 27830 29210 31722 32281 52559 55802
1135 1273 1408 2599 3618 4903 7210 17368 21014 21287 21926 24070 27741 29801 36137 44272
524 801 1767 4093 9721 12200 19463 29280 31587 33577 39747 43688 46627 49807 51345 55969
489 1390 1756 3050 12113 20477 21376 26797 27049 28907 31534 32746 33345 40582 41970 55911
432 1520 1598 9292 11552 16985 18417 21847 21960 24287 25489 34478 40990 44004 47573 53982
301 592 849 1944 4128 8341 16783 19249 24983 43892 44041 44474 44942 44959 50738 54935
118 558 1470 4368 10132 11791 16523 22408 23766 25111 25426 25779 35005 42742 46197 53118
310 1059 1322 3609 7107 10048 13161 32141 33369 35206 36131 38746 44545 47963 48414
256 346 845 7363 10375 12492 13091 27987 32113 34846 36223 39863 44450 46526 49216
607 683 954 5473 10617 18484 20018 26971 28190 37592 39069 39740 43575 45676 48149
244 635 1208 5450 8082 25030 25149 28411 29333 31324 36972 42071 43401 47088 52085
2841 5514 16122 18061 18199 20340 22525 25022 29914 31732 46415
7567 22860 23157 24194 24622 29643 31255 32355 36379 38228 51173
24002 24459 25897 26955 31168 31630 39183 46791 47323 51503 55241
4817 8291 10219 13991 14318 28549 28836 30491 36884 46310 54625
8275 9585 11678 37216 38932 45186 46287 48023 48862 53636 56067
A receiving apparatus/method comprising a decoding unit/step for decoding the punctured LDPC code obtained from data transmitted by the transmission method.

In the third transmission device/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 4/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding unit/step that punctures the beginning of the information bits by the puncture length L, generates a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 4/16, and the extension check The matrices are a predetermined value M1, an M1 row K column represented by the information length K = N × r, an upper left A matrix of the extended parity check matrix, and an M1 row M1 column to the right of the A matrix The adjacent staircase B matrix, the Z matrix that is the right-adjacent zero matrix of said B matrix with M1 rows and N+LK-M1 columns, and said A matrix with N+LK-M1 rows and K+M1 columns. and a C matrix adjacent to the bottom of the B matrix, and a D matrix that is a unit matrix of N+LK-M1 rows and N+LK-M1 columns adjacent to the right of the C matrix, and the puncture length L is , 0, the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is an element of 1 in the A matrix and the C matrix A table representing the position of every 360 columns of
797 853 885 2412 8763 16966 18074 21725 21923 22276 32414 49532 51711
39 1096 1305 6276 13449 16227 24628 29368 31384 32207 45115 47748 51161
44 427 1193 4543 10898 29586 34143 40123 44170 46228 47353 48962 49856
541 736 844 4479 7200 16262 18160 24649 29159 42952 43829 47067 48307
95 1342 1783 9131 12031 12989 13202 14244 27356 29527 32789 36795 38709
494 1203 1652 5475 16812 21005 24490 28736 31487 37840 39565 50301 50448
1532 1581 1705 10606 12678 17526 28502 35833 44124 47833 49541 51702 51831
96 185 1188 2754 2775 5499 6292 6895 9799 27158 28509 39985 48544
749 1007 1624 9110 12545 20317 27165 31146 36658 40218 45870 48593 49397
1163 1355 1556 4652 6091 6978 8979 14330 25366 27509 27927 33954 51511
1168 1311 1320 2096 3187 5119 20693 29188 35325 36538 41740 44821 47836
288 1399 1422 10030 12443 15396 19379 26774 30623 40397 40494 47324 48652
570 809 1622 8966 13182 24760 25846 37786 38499 41477 47218 49514 51673
44 208 811 3742 8390 20577 24033 26195 29483 39222 40429 45529 45643
97 1161 1310 2693 19471 21117 24844 29355 37875 38827 42599 46927 51585
620 1416 1679 12977 15285 17224 20748 22381 25697 28626 33138 37912 39470
368 1367 1465 11725 13919 13945 33353 37326 38778 40727 40875 48487 51103
1427 1519 1736 6497 10328 15345 17776 24008 29435 47926 48682 48686 49250
23 1169 1460 5251 10379 24722 25285 32822 35089 37814 44950 45474 47146
32 681 1568 6384 9728 21530 22557 24432 31527 33435 36375 37151 39510
918 1286 1362 2738 2808 5037 7483 16549 20933 31061 33375 39562 50975
844 925 1507 8014 14804 15472 22057 31449 32226 32974 34809 41852 50676
1104 1753 1780 6605 22820 24244 26745 28587 30929 33797 34123 42029 43723
296 351 1799 9595 9770 15297 17910 19571 20521 35468 38937 48238 50795
638 760 1027 15495 15806 27803 29165 32046 34804 38592 38949 39457 47996
676 1548 1687 15931 17206 27071 28999 29312 30437 39081 44646 46366 48245
164 1436 1470 3335 8452 10611 14735 17314 17457 21853 32068 49268 51360
673 987 1570 3322 4946 6830 12027 22997 28126 30952 31702 32262 40857
773 1139 1404 9840 16019 16640 18064 24251 25181 42571 46539 50656 51750
726 730 1282 9539 10718 15690 27181 28022 29831 32767 40892 45045 51229
178 355 896 3493 13148 14855 15297 17187 20332 26479 36876 38772 41342
174 909 992 4685 6611 6649 9973 10846 18348 21866 29851 48524 51503
256 1273 1407 4650 6765 16547 19484 19834 20323 22294 27570 33457 40893
27 60 100 1530 9640 11387 12526 16343 17977 24156 29307 43317 51005
908 1009 1256 15318 24411 27373 28956 29096 37447 40401 45949 47505 50608
871 1022 1050 2987 11235 11367 14631 18902 19810 40712 41044 44083 50666
322 663 669 8710 10150 15826 17085 22493 31938 37858 40689 44018 49689
589 846 1413 2627 4519 7841 15480 24061 40839 41475 41591 46883 50613
963 1135 1395 1610 5107 10991 17300 20822 21073 23236 30712 39982 42668
729 792 1696 3391 4018 6677 15323 31211 32245 38603 39662 44737 48810
274 376 1003 8907 11493 11611 25418 25885 33368 36485 41225 44260 45485
1174 1245 1412 3510 9590 17010 20708 25956 28271 29603 33362 37097 42952
813 1030 1452 5147 9859 19468 34863 35407 36002 36716 40288 42835 44337
211 230 1694 5157 23173 23285 26293 27140 29110 34165 38861 40227 43477
537 933 1476 2748 5211 5376 14853 16889 18857 20875 22806 29035 29444
697 709 765 6009 27426 29923 33631 35433 36206 43172 47174 50955
833 1096 1648 4459 13016 22371 22757 23977 26422 28211 29254 43701
214 521 895 2147 3200 3525 3561 6699 7730 7845 9000 9570 11204 11446 11570 12462 13469 14396 15475 17540 18804 18944 1932 1 19550 20001 25062 25567 26342 26709 27146 27392 27428 30782 32176 32956 33240 34420 35150 35263 35879 36407 37210 37393 3 7420 38892 40202 40583 40665 41816 42558 42720 43063 43442 44348 44378 45052 47033 49514 49845 50084 51647
7599 9277 13898 16320 19617 28012 30567 42423 43056
15934 20819 25195 28421 31073 31750 33551 35982 37823
5377 13795 16639 20686 22150 32586 33922 40431 42255
3368 14716 15016 20925 23397 25910 28917 36663 40946
3478 4545 5802 12334 27955 29363 42818 48135 48995
is a transmitting apparatus/method.

In the third receiving apparatus/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 4/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding step of generating a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 4/16 is provided by puncturing the beginning of the information bits by the puncture length L, and the extended parity check matrix is , a predetermined value M1, and an M1-by-K-column A matrix represented by the information length K=N×r, the upper left A matrix of the extended parity check matrix, and an M1-by-M1-column A matrix adjacent to the right of the A matrix The B matrix of the staircase structure, the Z matrix that is the zero matrix adjacent to the right of the B matrix with M1 rows and N+LK-M1 columns, the A matrix with N+LK-M1 rows and K+M1 columns, and the above The C matrix adjacent below the B matrix and the D matrix that is the identity matrix of N + LK-M1 rows and N + LK-M1 columns adjacent to the right of the C matrix, and the puncture length L is 0 and the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is the position of the element of 1 in the A matrix and the C matrix A table representing every 360 columns of
797 853 885 2412 8763 16966 18074 21725 21923 22276 32414 49532 51711
39 1096 1305 6276 13449 16227 24628 29368 31384 32207 45115 47748 51161
44 427 1193 4543 10898 29586 34143 40123 44170 46228 47353 48962 49856
541 736 844 4479 7200 16262 18160 24649 29159 42952 43829 47067 48307
95 1342 1783 9131 12031 12989 13202 14244 27356 29527 32789 36795 38709
494 1203 1652 5475 16812 21005 24490 28736 31487 37840 39565 50301 50448
1532 1581 1705 10606 12678 17526 28502 35833 44124 47833 49541 51702 51831
96 185 1188 2754 2775 5499 6292 6895 9799 27158 28509 39985 48544
749 1007 1624 9110 12545 20317 27165 31146 36658 40218 45870 48593 49397
1163 1355 1556 4652 6091 6978 8979 14330 25366 27509 27927 33954 51511
1168 1311 1320 2096 3187 5119 20693 29188 35325 36538 41740 44821 47836
288 1399 1422 10030 12443 15396 19379 26774 30623 40397 40494 47324 48652
570 809 1622 8966 13182 24760 25846 37786 38499 41477 47218 49514 51673
44 208 811 3742 8390 20577 24033 26195 29483 39222 40429 45529 45643
97 1161 1310 2693 19471 21117 24844 29355 37875 38827 42599 46927 51585
620 1416 1679 12977 15285 17224 20748 22381 25697 28626 33138 37912 39470
368 1367 1465 11725 13919 13945 33353 37326 38778 40727 40875 48487 51103
1427 1519 1736 6497 10328 15345 17776 24008 29435 47926 48682 48686 49250
23 1169 1460 5251 10379 24722 25285 32822 35089 37814 44950 45474 47146
32 681 1568 6384 9728 21530 22557 24432 31527 33435 36375 37151 39510
918 1286 1362 2738 2808 5037 7483 16549 20933 31061 33375 39562 50975
844 925 1507 8014 14804 15472 22057 31449 32226 32974 34809 41852 50676
1104 1753 1780 6605 22820 24244 26745 28587 30929 33797 34123 42029 43723
296 351 1799 9595 9770 15297 17910 19571 20521 35468 38937 48238 50795
638 760 1027 15495 15806 27803 29165 32046 34804 38592 38949 39457 47996
676 1548 1687 15931 17206 27071 28999 29312 30437 39081 44646 46366 48245
164 1436 1470 3335 8452 10611 14735 17314 17457 21853 32068 49268 51360
673 987 1570 3322 4946 6830 12027 22997 28126 30952 31702 32262 40857
773 1139 1404 9840 16019 16640 18064 24251 25181 42571 46539 50656 51750
726 730 1282 9539 10718 15690 27181 28022 29831 32767 40892 45045 51229
178 355 896 3493 13148 14855 15297 17187 20332 26479 36876 38772 41342
174 909 992 4685 6611 6649 9973 10846 18348 21866 29851 48524 51503
256 1273 1407 4650 6765 16547 19484 19834 20323 22294 27570 33457 40893
27 60 100 1530 9640 11387 12526 16343 17977 24156 29307 43317 51005
908 1009 1256 15318 24411 27373 28956 29096 37447 40401 45949 47505 50608
871 1022 1050 2987 11235 11367 14631 18902 19810 40712 41044 44083 50666
322 663 669 8710 10150 15826 17085 22493 31938 37858 40689 44018 49689
589 846 1413 2627 4519 7841 15480 24061 40839 41475 41591 46883 50613
963 1135 1395 1610 5107 10991 17300 20822 21073 23236 30712 39982 42668
729 792 1696 3391 4018 6677 15323 31211 32245 38603 39662 44737 48810
274 376 1003 8907 11493 11611 25418 25885 33368 36485 41225 44260 45485
1174 1245 1412 3510 9590 17010 20708 25956 28271 29603 33362 37097 42952
813 1030 1452 5147 9859 19468 34863 35407 36002 36716 40288 42835 44337
211 230 1694 5157 23173 23285 26293 27140 29110 34165 38861 40227 43477
537 933 1476 2748 5211 5376 14853 16889 18857 20875 22806 29035 29444
697 709 765 6009 27426 29923 33631 35433 36206 43172 47174 50955
833 1096 1648 4459 13016 22371 22757 23977 26422 28211 29254 43701
214 521 895 2147 3200 3525 3561 6699 7730 7845 9000 9570 11204 11446 11570 12462 13469 14396 15475 17540 18804 18944 1932 1 19550 20001 25062 25567 26342 26709 27146 27392 27428 30782 32176 32956 33240 34420 35150 35263 35879 36407 37210 37393 3 7420 38892 40202 40583 40665 41816 42558 42720 43063 43442 44348 44378 45052 47033 49514 49845 50084 51647
7599 9277 13898 16320 19617 28012 30567 42423 43056
15934 20819 25195 28421 31073 31750 33551 35982 37823
5377 13795 16639 20686 22150 32586 33922 40431 42255
3368 14716 15016 20925 23397 25910 28917 36663 40946
3478 4545 5802 12334 27955 29363 42818 48135 48995
A receiving apparatus/method comprising a decoding unit/step for decoding the punctured LDPC code obtained from data transmitted by the transmission method.

In the fourth transmission device/method of the present technology, the code length N is 69120 bits, and the row and column are extended by a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 5/16. Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding unit/step that punctures the head of the information bit by the puncture length L, generates a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 5/16, and the extension check The matrices are a predetermined value M1, an M1 row K column represented by the information length K = N × r, an upper left A matrix of the extended parity check matrix, and an M1 row M1 column to the right of the A matrix The adjacent staircase B matrix, the Z matrix that is the right-adjacent zero matrix of said B matrix with M1 rows and N+LK-M1 columns, and said A matrix with N+LK-M1 rows and K+M1 columns. and a C matrix adjacent to the bottom of the B matrix, and a D matrix that is a unit matrix of N+LK-M1 rows and N+LK-M1 columns adjacent to the right of the C matrix, and the puncture length L is , 1800, the predetermined value M1 is 3600, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is an element of 1 in the A matrix and the C matrix A table representing the position of every 360 columns of
3 1525 35873 36202 45585 47150 47845 49311
851 2755 5753 8521 10162 12036 16914 17857 18538 22342 24470 28199 33144 34233 35459 35506 38894 39300 41198 41995 42243 43310 44187 44969 46306 46719 47907 48844
803 828 7874 8667 12187 15086 16097 20436 21143 22142 27188 29052 30895 30927 30963 31563 34591 35419 36521 38142 38825 4 2538 43514 44432 45634 47807 47953
3442 3596 4211 4790 5276 5379 6950 8256 10939 13398 13563 13720 18074 22070 22760 26767 27057 28054 29148 33155 33760 385 00 42760 44861 45653 46507 48695
1337 3179 3936 4019 4207 4915 5953 6200 7596 10085 10241 15048 16788 25083 27412 27478 28623 33014 33168 33296 34087 3592 2 36818 38225 40169 41762 46370
230 2417 2466 10915 19279 39243 39762 42664 45750
595 1792 2788 16000 19698 28701 38882 45250 46449
764 1619 2243 10130 25528 38421 44789 45032 48064
779 1651 3431 4707 8887 24180 36687 37770 39583
136 1352 3105 9580 25493 28929 29003 43731 44941
0 2147 3434 4402 19742 21221 37419 46590 49082
1658 1953 2935 17606 21613 29311 33878 46163 47126
804 1362 2596 15920 25368 28032 32218 37251 38385
733 3180 3549 12710 14684 32429 36039 39164 47531
807 2668 2811 23227 39984 42091 45708 46426 47788
1142 3373 3414 4219 7793 11379 15389 28832 32362
246 2670 3141 11465 24513 25038 31936 36501 45021
1365 2399 3107 4460 24713 30758 32422 38041 43379
323 578 1392 22591 26966 35332 35884 36454 38254
24 78 229 8741 17149 21008 30309 32441 38141
587 1595 3531 9258 15476 30673 33744 41847 44930
980 2136 2883 18306 22032 31618 33154 45208 48127
1518 1796 2304 7939 24330 29552 33426 39907 41568
599 681 3597 10689 10811 19776 20651 34661 46473
970 1152 2675 13311 15762 16363 26575 37047 48249
1872 1968 2620 16207 31197 33577 37990 42868 45881
1105 1351 3374 28454 28667 37692 42083 46115
1019 1816 3153 7354 14190 15535 29787 40081
114 1127 3412 17706 21953 31166 48855 49247
411 1346 2860 6474 12912 28627 30225 31396
109 1895 2803 8192 22957 30924 32515 39258
1067 1547 3218 10928 18459 24102 24958 48228
1022 2939 3593 16210 20143 22128 36148 48748
1826 2281 3110 10706 11745 27544 29705 32385
165 1794 3038 13953 15929 20587 35639 37360
122 1107 1776 7992 15442 26707 28761 39718
344 1449 2018 7930 11023 11967 18210 48998
203 2541 3360 6249 8145 10115 16796 19830 39389 39409
1333 1476 1855 4261 5127 16893 20060 23938 25433 32522
1972 3154 3539 10244 10601 12317 18404 29191 35539 41261
1621 1817 3280 15943 26444 28455 28595 29822 38852 48190
2048 2565 2660 4707 12386 15311 19315 20091 24908 37754
2825 3043 3516 9940 11806 11981 20375 20597 22471 31060
2597 2792 3444 11226 16387 17531 18473 25142 39461 42139
439 2788 3511 3684 5549 16067 23077 39829 39920 44862
1076 2271 2797 6573 12043 17816 20967 21726 23200 38056
553 2080 2948 5535 16026 22119 23794 37157 46602 46720
112 2115 3084 8090 10494 13165 29078 31417 33314 39595
2275 2449 3058 10121 12474 12563 25072 25610 39483 43489
741 2186 2270 5146 10831 17517 20875 29107 35695 41244
1693 1902 2907 6756 10924 18965 24040 33793 41089 42464
2469 2514 2769 6664 8813 8938 19741 23113 34293 45892
1761 2326 2998 17255 23220 26747 28416 37450 38574 41110
1083 1375 1867 4468 6706 6899 15494 19170 28463 28858
1394 1412 1510 7439 27005 29288 32683 34307 34607 45091
2477 2978 3539 22378 23848 24738 28734 31460 41873 45398
191 803 1500 9030 14071 26093 26432 27827 35890 47458
556 2942 3114 10130 11981 33368 34732 42472 47188 47655
425 2875 2946 16084 19184 26801 27069 27090 31317 34103
121 1674 3258 5208 13340 26019 37492 38723 40779 49200
3968 7741 12550 32061
17972 19666 20231 33590
9086 34375 41691 42567
12168 14189 15095 49129
19291 26450 29950 39068
19852 25195 35124 36192
10447 32405 36184 40786
8911 19949 27496 41273
14679 16883 20951 29727
30296 32681 34757 36501
is a transmitting apparatus/method.

In the fourth receiving apparatus/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 5/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding step of generating a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 5/16 is provided by puncturing the beginning of the information bits by the puncture length L, and the extended parity check matrix is , a predetermined value M1, and an M1-by-K-column A matrix represented by the information length K=N×r, the upper left A matrix of the extended parity check matrix, and an M1-by-M1-column A matrix adjacent to the right of the A matrix The B matrix of the staircase structure, the Z matrix that is the zero matrix adjacent to the right of the B matrix with M1 rows and N+LK-M1 columns, the A matrix with N+LK-M1 rows and K+M1 columns, and the above including a C matrix adjacent below the B matrix and a D matrix that is an identity matrix adjacent to the right of the C matrix with N+LK-M1 rows and N+LK-M1 columns, and the puncture length L is 1800 and the predetermined value M1 is 3600, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is the position of the element of 1 in the A matrix and the C matrix A table representing every 360 columns of
3 1525 35873 36202 45585 47150 47845 49311
851 2755 5753 8521 10162 12036 16914 17857 18538 22342 24470 28199 33144 34233 35459 35506 38894 39300 41198 41995 42243 43310 44187 44969 46306 46719 47907 48844
803 828 7874 8667 12187 15086 16097 20436 21143 22142 27188 29052 30895 30927 30963 31563 34591 35419 36521 38142 38825 4 2538 43514 44432 45634 47807 47953
3442 3596 4211 4790 5276 5379 6950 8256 10939 13398 13563 13720 18074 22070 22760 26767 27057 28054 29148 33155 33760 385 00 42760 44861 45653 46507 48695
1337 3179 3936 4019 4207 4915 5953 6200 7596 10085 10241 15048 16788 25083 27412 27478 28623 33014 33168 33296 34087 3592 2 36818 38225 40169 41762 46370
230 2417 2466 10915 19279 39243 39762 42664 45750
595 1792 2788 16000 19698 28701 38882 45250 46449
764 1619 2243 10130 25528 38421 44789 45032 48064
779 1651 3431 4707 8887 24180 36687 37770 39583
136 1352 3105 9580 25493 28929 29003 43731 44941
0 2147 3434 4402 19742 21221 37419 46590 49082
1658 1953 2935 17606 21613 29311 33878 46163 47126
804 1362 2596 15920 25368 28032 32218 37251 38385
733 3180 3549 12710 14684 32429 36039 39164 47531
807 2668 2811 23227 39984 42091 45708 46426 47788
1142 3373 3414 4219 7793 11379 15389 28832 32362
246 2670 3141 11465 24513 25038 31936 36501 45021
1365 2399 3107 4460 24713 30758 32422 38041 43379
323 578 1392 22591 26966 35332 35884 36454 38254
24 78 229 8741 17149 21008 30309 32441 38141
587 1595 3531 9258 15476 30673 33744 41847 44930
980 2136 2883 18306 22032 31618 33154 45208 48127
1518 1796 2304 7939 24330 29552 33426 39907 41568
599 681 3597 10689 10811 19776 20651 34661 46473
970 1152 2675 13311 15762 16363 26575 37047 48249
1872 1968 2620 16207 31197 33577 37990 42868 45881
1105 1351 3374 28454 28667 37692 42083 46115
1019 1816 3153 7354 14190 15535 29787 40081
114 1127 3412 17706 21953 31166 48855 49247
411 1346 2860 6474 12912 28627 30225 31396
109 1895 2803 8192 22957 30924 32515 39258
1067 1547 3218 10928 18459 24102 24958 48228
1022 2939 3593 16210 20143 22128 36148 48748
1826 2281 3110 10706 11745 27544 29705 32385
165 1794 3038 13953 15929 20587 35639 37360
122 1107 1776 7992 15442 26707 28761 39718
344 1449 2018 7930 11023 11967 18210 48998
203 2541 3360 6249 8145 10115 16796 19830 39389 39409
1333 1476 1855 4261 5127 16893 20060 23938 25433 32522
1972 3154 3539 10244 10601 12317 18404 29191 35539 41261
1621 1817 3280 15943 26444 28455 28595 29822 38852 48190
2048 2565 2660 4707 12386 15311 19315 20091 24908 37754
2825 3043 3516 9940 11806 11981 20375 20597 22471 31060
2597 2792 3444 11226 16387 17531 18473 25142 39461 42139
439 2788 3511 3684 5549 16067 23077 39829 39920 44862
1076 2271 2797 6573 12043 17816 20967 21726 23200 38056
553 2080 2948 5535 16026 22119 23794 37157 46602 46720
112 2115 3084 8090 10494 13165 29078 31417 33314 39595
2275 2449 3058 10121 12474 12563 25072 25610 39483 43489
741 2186 2270 5146 10831 17517 20875 29107 35695 41244
1693 1902 2907 6756 10924 18965 24040 33793 41089 42464
2469 2514 2769 6664 8813 8938 19741 23113 34293 45892
1761 2326 2998 17255 23220 26747 28416 37450 38574 41110
1083 1375 1867 4468 6706 6899 15494 19170 28463 28858
1394 1412 1510 7439 27005 29288 32683 34307 34607 45091
2477 2978 3539 22378 23848 24738 28734 31460 41873 45398
191 803 1500 9030 14071 26093 26432 27827 35890 47458
556 2942 3114 10130 11981 33368 34732 42472 47188 47655
425 2875 2946 16084 19184 26801 27069 27090 31317 34103
121 1674 3258 5208 13340 26019 37492 38723 40779 49200
3968 7741 12550 32061
17972 19666 20231 33590
9086 34375 41691 42567
12168 14189 15095 49129
19291 26450 29950 39068
19852 25195 35124 36192
10447 32405 36184 40786
8911 19949 27496 41273
14679 16883 20951 29727
30296 32681 34757 36501
A receiving device/method comprising a decoding unit/step for decoding the punctured LDPC code obtained from data transmitted by a transmission method.

In the fifth transmission device/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 6/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding unit/step that punctures the head of the information bit by the puncture length L, generates a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 6/16, and the extension check The matrices are a predetermined value M1, an M1 row K column represented by the information length K = N × r, an upper left A matrix of the extended parity check matrix, and an M1 row M1 column to the right of the A matrix Adjacent staircase B matrix, M1 rows N+LK-M1 columns, Z matrix which is the right-adjacent zero matrix of said B matrix, and N+LK-M1 rows K+M1 columns, said A matrix and a C matrix adjacent to the bottom of the B matrix, and a D matrix that is a unit matrix of N+LK-M1 rows and N+LK-M1 columns and adjacent to the right of the C matrix, and the puncture length L is , 1800, the predetermined value M1 is 3600, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is an element of 1 in the A matrix and the C matrix A table representing the position of every 360 columns of
1594 1610 4443 4633 4971 5913 7301 7706 13474 16147 16681 17638 20084 20205 20247 20540 22484 27085 28185 29116 31096 330 68 41272 41610 43034
1883 2386 4525 5861 6762 8505 10987 11467 13389 15284 15934 22445 22893 24837 26162 26697 29883 30925 35299 38596 38645 4 1614 42730 43699 44169
1048 1205 7615 12049 12746 13032 13602 14263 14911 15606 21519 26057 26528 28217 28266 29323 31302 32457 32579 34903 3510 5 36007 40006 43828 44649
1621 1937 3806 4192 4345 4436 4464 5013 7744 9969 10235 10276 10910 12816 16020 17524 20323 30904 31663 35163 35398 35957 39093 42657 44993
49 1822 3711 3892 4990 10239 12492 18990 19520 21406 24318 24612 25751 26767 30148 31680 32384 33296 34983 35934 38715 40 286 42291 42485 42998
220 302 3574 5681 9506 24907 31216 34098 36706
26 88 1979 6254 17793 31399 31963 38968 41759
571 2797 2843 10391 18284 24224 26323 35575 43222
2778 2865 3374 13146 22196 23479 29472 40894 43961
513 2641 3267 12546 22339 22592 33324 37388 43058
89 416 2750 8737 9111 19495 26529 35507 39319
1522 1795 3155 3952 19544 28293 40910 43137 44782
68 1271 2663 22635 26043 31010 37397 42214 42940
1102 1410 2026 14095 14851 19343 23303 25716 33443
2257 2649 2734 13712 40173 42230 42240 43221 44414
714 2565 2880 4450 12908 34192 35997 36455 40728
1546 3319 3372 7492 10636 16725 26425 42426 42880
41 927 2263 6416 10637 22272 29323 34364 39763
1681 2598 3263 4337 19277 28170 31112 39274 39685
1624 2266 2712 7713 10204 19680 20781 32234 32824
1839 2578 2725 4403 4475 6187 8251 15794 34791
1372 2107 2310 8695 10370 22033 31001 38223 44215
1045 2138 3259 14898 16935 20360 28114 30232 36792
2326 3271 3510 21052 22158 24249 25709 30136 35176
347 2043 2984 10440 10461 11558 18257 42040 44932
562 1425 2428 12400 14792 16918 24373 34372 44049
959 1004 2630 14983 26147 28239 28571 33730 34758
2366 3093 3321 16340 19265 26290 28817 42082 42430
1812 2687 3030 7047 13181 15320 27308 36719 39868
118 933 1127 16601 20206 28560 42837 44651 44924
411 1346 2869 4816 6186 12098 26338 28747 28842
1985 2151 2804 7754 21167 21405 29764 35907 40584
1067 1689 3513 10225 15350 17157 22215 37316 44909
1306 1452 2564 15049 24636 29181 29918 39466 44466
558 640 2085 5522 9131 12991 24658 28599 38510
971 1333 2524 5076 14312 16292 23989 28218 37668
345 1819 2012 7598 7602 10348 11079 16828 20223
206 3490 3577 7652 9484 15485 18215 32891 36012
207 2085 2818 4223 4981 18437 18907 20797 29779
1043 1602 1711 17049 26349 37701 37805 39929 44226
528 686 2519 22288 24424 26040 27266 35523 44395
974 2063 3540 23885 24211 26226 27093 33120 34243
84 689 1292 14234 17834 34458 36109 38609 44075
656 1321 1335 9564 11031 20663 28540 33454
2798 3040 3447 10523 15178 16147 17112 23143
2785 2827 3514 3648 5406 8631 21247 36454
983 2859 3241 6313 15981 16459 29725 35759
662 1428 2716 9984 19352 21403 27521 37417
1460 1582 3397 5327 14857 27868 34040 42479
116 353 3081 9834 12252 26703 28884 30421
2275 2449 2838 9493 11608 23271 38776 39806
704 1750 2835 10462 12221 28740 29710 37673
121 2008 2529 16240 19331 23089 25481 36984
1207 1650 2956 6464 10252 30913 31894 38888
1272 2513 2764 6370 8377 8517 31368 41960
1538 1761 2999 21345 26055 30346 34230 35254
1125 1822 2953 6588 14341 16087 19369 25097
60 246 1224 19668 19837 21037 26085 26484
2023 2447 3295 7065 24779 29935 31328 32089
2977 3291 3536 20569 22895 26291 28856 38257
198 1500 1594 8474 12821 24065 24273 25489
829 2542 3457 9560 9981 11130 37448 39505
2452 3433 3465 8505 30616 36656 37451 38882
1828 2189 2401 5065 14917 17648 24809 24869
1674 1760 3256 5017 12401 34198 35372 44967
329 2242 2945 3841 11713 18179 18567 30756
1134 2993 3068 8595 13252 14014 31475 44841
671 1250 2076 18266 23182 24268 32218 33106 33153 35797
532 2267 2927 8343 13630 15565 18426 25262 27191 37728
1363 2100 2454 15244 19187 23000 25655 28410 29916 33402
251 1469 2315 13593 15859 19414 26073 29034 35496 37152
112 1736 2508 5876 14259 14532 21456 35968 37533 42515
25233 26394
5080 6930
12302 41997
27483 36076
5116 36815
11841 28243
18326 37978
22431 36141
35950 40525
41824 42674
is a transmitting apparatus/method.

In the fifth receiving apparatus/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 6/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding step of generating a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 6/16 is provided by puncturing the beginning of the information bits by the puncture length L, and the extended parity check matrix is , a predetermined value M1, and an M1-by-K-column A matrix represented by the information length K=N×r, the upper left A matrix of the extended parity check matrix, and an M1-by-M1-column A matrix adjacent to the right of the A matrix The B matrix of the staircase structure, the Z matrix that is the zero matrix adjacent to the right of the B matrix with M1 rows and N+LK-M1 columns, the A matrix with N+LK-M1 rows and K+M1 columns, and the above including a C matrix adjacent below the B matrix and a D matrix that is an identity matrix adjacent to the right of the C matrix with N+LK-M1 rows and N+LK-M1 columns, and the puncture length L is 1800 and the predetermined value M1 is 3600, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is the position of the element of 1 in the A matrix and the C matrix A table representing every 360 columns of
1594 1610 4443 4633 4971 5913 7301 7706 13474 16147 16681 17638 20084 20205 20247 20540 22484 27085 28185 29116 31096 330 68 41272 41610 43034
1883 2386 4525 5861 6762 8505 10987 11467 13389 15284 15934 22445 22893 24837 26162 26697 29883 30925 35299 38596 38645 4 1614 42730 43699 44169
1048 1205 7615 12049 12746 13032 13602 14263 14911 15606 21519 26057 26528 28217 28266 29323 31302 32457 32579 34903 3510 5 36007 40006 43828 44649
1621 1937 3806 4192 4345 4436 4464 5013 7744 9969 10235 10276 10910 12816 16020 17524 20323 30904 31663 35163 35398 35957 39093 42657 44993
49 1822 3711 3892 4990 10239 12492 18990 19520 21406 24318 24612 25751 26767 30148 31680 32384 33296 34983 35934 38715 40 286 42291 42485 42998
220 302 3574 5681 9506 24907 31216 34098 36706
26 88 1979 6254 17793 31399 31963 38968 41759
571 2797 2843 10391 18284 24224 26323 35575 43222
2778 2865 3374 13146 22196 23479 29472 40894 43961
513 2641 3267 12546 22339 22592 33324 37388 43058
89 416 2750 8737 9111 19495 26529 35507 39319
1522 1795 3155 3952 19544 28293 40910 43137 44782
68 1271 2663 22635 26043 31010 37397 42214 42940
1102 1410 2026 14095 14851 19343 23303 25716 33443
2257 2649 2734 13712 40173 42230 42240 43221 44414
714 2565 2880 4450 12908 34192 35997 36455 40728
1546 3319 3372 7492 10636 16725 26425 42426 42880
41 927 2263 6416 10637 22272 29323 34364 39763
1681 2598 3263 4337 19277 28170 31112 39274 39685
1624 2266 2712 7713 10204 19680 20781 32234 32824
1839 2578 2725 4403 4475 6187 8251 15794 34791
1372 2107 2310 8695 10370 22033 31001 38223 44215
1045 2138 3259 14898 16935 20360 28114 30232 36792
2326 3271 3510 21052 22158 24249 25709 30136 35176
347 2043 2984 10440 10461 11558 18257 42040 44932
562 1425 2428 12400 14792 16918 24373 34372 44049
959 1004 2630 14983 26147 28239 28571 33730 34758
2366 3093 3321 16340 19265 26290 28817 42082 42430
1812 2687 3030 7047 13181 15320 27308 36719 39868
118 933 1127 16601 20206 28560 42837 44651 44924
411 1346 2869 4816 6186 12098 26338 28747 28842
1985 2151 2804 7754 21167 21405 29764 35907 40584
1067 1689 3513 10225 15350 17157 22215 37316 44909
1306 1452 2564 15049 24636 29181 29918 39466 44466
558 640 2085 5522 9131 12991 24658 28599 38510
971 1333 2524 5076 14312 16292 23989 28218 37668
345 1819 2012 7598 7602 10348 11079 16828 20223
206 3490 3577 7652 9484 15485 18215 32891 36012
207 2085 2818 4223 4981 18437 18907 20797 29779
1043 1602 1711 17049 26349 37701 37805 39929 44226
528 686 2519 22288 24424 26040 27266 35523 44395
974 2063 3540 23885 24211 26226 27093 33120 34243
84 689 1292 14234 17834 34458 36109 38609 44075
656 1321 1335 9564 11031 20663 28540 33454
2798 3040 3447 10523 15178 16147 17112 23143
2785 2827 3514 3648 5406 8631 21247 36454
983 2859 3241 6313 15981 16459 29725 35759
662 1428 2716 9984 19352 21403 27521 37417
1460 1582 3397 5327 14857 27868 34040 42479
116 353 3081 9834 12252 26703 28884 30421
2275 2449 2838 9493 11608 23271 38776 39806
704 1750 2835 10462 12221 28740 29710 37673
121 2008 2529 16240 19331 23089 25481 36984
1207 1650 2956 6464 10252 30913 31894 38888
1272 2513 2764 6370 8377 8517 31368 41960
1538 1761 2999 21345 26055 30346 34230 35254
1125 1822 2953 6588 14341 16087 19369 25097
60 246 1224 19668 19837 21037 26085 26484
2023 2447 3295 7065 24779 29935 31328 32089
2977 3291 3536 20569 22895 26291 28856 38257
198 1500 1594 8474 12821 24065 24273 25489
829 2542 3457 9560 9981 11130 37448 39505
2452 3433 3465 8505 30616 36656 37451 38882
1828 2189 2401 5065 14917 17648 24809 24869
1674 1760 3256 5017 12401 34198 35372 44967
329 2242 2945 3841 11713 18179 18567 30756
1134 2993 3068 8595 13252 14014 31475 44841
671 1250 2076 18266 23182 24268 32218 33106 33153 35797
532 2267 2927 8343 13630 15565 18426 25262 27191 37728
1363 2100 2454 15244 19187 23000 25655 28410 29916 33402
251 1469 2315 13593 15859 19414 26073 29034 35496 37152
112 1736 2508 5876 14259 14532 21456 35968 37533 42515
25233 26394
5080 6930
12302 41997
27483 36076
5116 36815
11841 28243
18326 37978
22431 36141
35950 40525
41824 42674
A receiving apparatus/method comprising a decoding unit/step for decoding the punctured LDPC code obtained from data transmitted by the transmission method.

In the sixth transmission device/method of the present technology, the code length N is 69120 bits, and the row and column are extended by a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 7/16. Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding unit/step that punctures the beginning of the information bit by the puncture length L, generates a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 7/16, and the extension check The matrices are a predetermined value M1, an M1 row K column represented by the information length K = N × r, an upper left A matrix of the extended parity check matrix, and an M1 row M1 column to the right of the A matrix The adjacent staircase B matrix, the Z matrix that is the right-adjacent zero matrix of said B matrix with M1 rows and N+LK-M1 columns, and said A matrix with N+LK-M1 rows and K+M1 columns. and a C matrix adjacent to the bottom of the B matrix, and a D matrix that is a unit matrix of N+LK-M1 rows and N+LK-M1 columns adjacent to the right of the C matrix, and the puncture length L is , 2160, the predetermined value M1 is 3960, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is an element of 1 in the A matrix and the C matrix A table representing the position of every 360 columns of
1764 2277 5400 7275 7702 16018 16086 17361 18724 18869 19132 20243 21595 25512 26606 30134 36052 39329 41031
181 1916 4788 5993 10696 12604 13012 24557 24787 25876 26693 28545 32349 33375 35357 36872 37706 38697 40205
1627 3867 5245 5631 6206 7958 12408 14675 15078 16069 20924 24234 29887 31630 32133 34527 34618 35147 37843
1103 2230 7388 9550 10439 11627 13165 14144 18256 22833 26008 26531 28108 28741 29963 31479 31923 39255 39995
1285 2355 4577 6689 10485 12036 16455 18963 19252 23741 30895 31196 35315 36358 36604 38535 39352 40937 40994
3065 4434 5307 7286 7705 9549 9848 11017 11901 12627 17746 21303 23749 24143 25301 25977 32801 37365 38172
434 2357 3026 7873 22006 27928 31085 34076
1003 2078 2558 6023 7076 9453 23248 40783
275 2594 2879 4212 4816 24471 29358 33606
304 2655 3449 9926 16670 32754 33277 38132
657 1983 3058 14006 17331 24307 37692 38764
865 1808 3134 21758 27257 31888 37426 40019
562 1861 3800 12068 20650 30577 33391 39300
97 459 2970 5360 8808 17885 24492 36388
1655 1901 3486 3965 18266 21707 26083 39858
106 2971 3601 4603 17049 21044 24058 34168
105 2632 3687 12222 15389 17985 18580 24844
1067 1887 3012 11816 23805 27159 31152 32102
412 3506 3688 11340 12998 28025 30295 32802
884 2933 3112 19905 33377 35257 38730 39998
3709 3756 3774 7360 10333 13454 15712 24711
58 2494 2959 6474 10296 20685 26935 36360
1854 2850 3654 4678 18001 28593 35963 36270
1830 2363 2518 7949 10035 18345 29534 31920
1646 2020 2811 4203 4779 6289 30475 32063
465 1178 2986 18151 20386 25654 27386 40357
640 2615 3354 8542 14478 25967 25995 37471
1082 1285 3179 18952 26721 27915 37670 40010
1737 1976 2546 7547 20613 23824 25055 32654
741 1013 3328 9668 9749 17082 38386 40974
1268 1476 2671 11835 14049 22600 31513 40179
1045 1108 2992 14156 23244 24154 31043 31798
2421 2602 3798 15389 17884 24140 35871 38752
819 2169 2955 14408 22625 25191 35170 36437
334 922 3167 5119 13570 15530 39099 41014
1221 1589 2395 8195 17835 24255 33626 40708
860 2308 2450 5038 6315 23489 26114 32851
406 1679 3105 14968 19909 27383 37072 40206
633 1863 1959 14480 16090 18913 34193 41012
1488 1699 2837 14716 22731 26859 27454 35998
700 1266 2120 5664 24568 24724 31262 35236
900 1067 2778 5274 15361 17755 22211 33252
1025 2008 2182 7489 7536 15899 18803 24702
383 648 716 5156 6037 9277 30214 38571
389 1155 2887 6102 17079 19192 23080 32918
1471 1635 2511 4547 5272 14725 20498 21659
2171 3539 3896 9346 9694 10999 15963 34494
1994 2216 2771 20692 24115 32560 37794 40140
1080 2162 2696 21197 22485 25015 30419 31363
97 755 1419 13499 16636 31603 35313 40181
1469 1655 3110 9088 10592 17584 19236 26283
2952 3076 3849 10157 14317 15196 16053 35195
1861 3105 3862 3994 5564 6074 8451 19756
3145 3155 3597 14101 15059 15459 27355 32750
259 873 3006 18016 18676 19887 25385 34337
613 1595 3868 5572 14023 20249 31223 38780
200 3129 3397 7639 9614 11741 26530 28039
2223 2694 3117 9231 11140 21370 27439 35476
779 1905 3630 11778 26510 27390 33035 34468
137 624 2206 15239 18045 21398 23580 29951
1327 1763 3312 6477 9861 28455 34353 35567
2717 2763 3044 8185 8380 17045 28844 38259
265 1105 3295 22148 24070 27939 31377 32371
1785 2042 3249 6558 15036 15184 18135 23151
271 1032 1352 4622 18315 19571 24142 24376
2392 2686 3656 7062 22999 24868 27626 28882
2726 3295 3893 19111 21109 26599 35039 37863
1650 1757 2170 5928 12800 22404 22521 23554
474 912 2810 9299 9649 34316 36020 39568
721 3776 3815 8297 28150 29224 33574 35496
2009 2400 3282 14124 16587 22933 22980 28722
132 1845 3587 11790 22121 31459 32442 40951
142 361 1061 4265 11230 16948 17367 27128
1250 2600 3374 8456 12596 28890 34813 40879
738 1025 1617 17079 22449 25340 30369 32737
1876 2731 2841 9438 17215 23350 27295 34083
453 1144 3263 12936 18049 25084 25595 29278
2369 2850 2997 6628 14441 17901 21329 23717
1671 2580 3055 12903 14917 24143 26800 33983
1516 1907 2756 5106 13479 13748 32931
1708 3245 3727
216 2078 2179
137 316 3665
834 2278 3108
5345 33686
11281 26022
17244 34746
20829 33069
32952 37029
38235 38952
12779 36842
5081 34190
8352 9285
37937 39131
21873 26915
is a transmitting apparatus/method.

In the sixth receiving apparatus/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 7/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, perform LDPC encoding of information bits of information length K = N × r to generate an extended LDPC code having parity bits of parity length M = N + LK, An encoding step of generating a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 7/16 is provided by puncturing the beginning of the information bits by the puncture length L, and the extended parity check matrix is , a predetermined value M1, and an M1-by-K-column A matrix represented by the information length K=N×r, the upper left A matrix of the extended parity check matrix, and an M1-by-M1-column A matrix adjacent to the right of the A matrix A B matrix with a staircase structure, a Z matrix that is a zero matrix adjacent to the right of the B matrix with M1 rows and N+LK-M1 columns, the A matrix with N+LK-M1 rows and K+M1 columns, and the above including a C matrix adjacent to the bottom of the B matrix and a D matrix that is an identity matrix adjacent to the right of the C matrix with N+LK-M1 rows and N+LK-M1 columns, and the puncture length L is 2160 and the predetermined value M1 is 3960, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is the position of the element of 1 in the A matrix and the C matrix A table representing every 360 columns of
1764 2277 5400 7275 7702 16018 16086 17361 18724 18869 19132 20243 21595 25512 26606 30134 36052 39329 41031
181 1916 4788 5993 10696 12604 13012 24557 24787 25876 26693 28545 32349 33375 35357 36872 37706 38697 40205
1627 3867 5245 5631 6206 7958 12408 14675 15078 16069 20924 24234 29887 31630 32133 34527 34618 35147 37843
1103 2230 7388 9550 10439 11627 13165 14144 18256 22833 26008 26531 28108 28741 29963 31479 31923 39255 39995
1285 2355 4577 6689 10485 12036 16455 18963 19252 23741 30895 31196 35315 36358 36604 38535 39352 40937 40994
3065 4434 5307 7286 7705 9549 9848 11017 11901 12627 17746 21303 23749 24143 25301 25977 32801 37365 38172
434 2357 3026 7873 22006 27928 31085 34076
1003 2078 2558 6023 7076 9453 23248 40783
275 2594 2879 4212 4816 24471 29358 33606
304 2655 3449 9926 16670 32754 33277 38132
657 1983 3058 14006 17331 24307 37692 38764
865 1808 3134 21758 27257 31888 37426 40019
562 1861 3800 12068 20650 30577 33391 39300
97 459 2970 5360 8808 17885 24492 36388
1655 1901 3486 3965 18266 21707 26083 39858
106 2971 3601 4603 17049 21044 24058 34168
105 2632 3687 12222 15389 17985 18580 24844
1067 1887 3012 11816 23805 27159 31152 32102
412 3506 3688 11340 12998 28025 30295 32802
884 2933 3112 19905 33377 35257 38730 39998
3709 3756 3774 7360 10333 13454 15712 24711
58 2494 2959 6474 10296 20685 26935 36360
1854 2850 3654 4678 18001 28593 35963 36270
1830 2363 2518 7949 10035 18345 29534 31920
1646 2020 2811 4203 4779 6289 30475 32063
465 1178 2986 18151 20386 25654 27386 40357
640 2615 3354 8542 14478 25967 25995 37471
1082 1285 3179 18952 26721 27915 37670 40010
1737 1976 2546 7547 20613 23824 25055 32654
741 1013 3328 9668 9749 17082 38386 40974
1268 1476 2671 11835 14049 22600 31513 40179
1045 1108 2992 14156 23244 24154 31043 31798
2421 2602 3798 15389 17884 24140 35871 38752
819 2169 2955 14408 22625 25191 35170 36437
334 922 3167 5119 13570 15530 39099 41014
1221 1589 2395 8195 17835 24255 33626 40708
860 2308 2450 5038 6315 23489 26114 32851
406 1679 3105 14968 19909 27383 37072 40206
633 1863 1959 14480 16090 18913 34193 41012
1488 1699 2837 14716 22731 26859 27454 35998
700 1266 2120 5664 24568 24724 31262 35236
900 1067 2778 5274 15361 17755 22211 33252
1025 2008 2182 7489 7536 15899 18803 24702
383 648 716 5156 6037 9277 30214 38571
389 1155 2887 6102 17079 19192 23080 32918
1471 1635 2511 4547 5272 14725 20498 21659
2171 3539 3896 9346 9694 10999 15963 34494
1994 2216 2771 20692 24115 32560 37794 40140
1080 2162 2696 21197 22485 25015 30419 31363
97 755 1419 13499 16636 31603 35313 40181
1469 1655 3110 9088 10592 17584 19236 26283
2952 3076 3849 10157 14317 15196 16053 35195
1861 3105 3862 3994 5564 6074 8451 19756
3145 3155 3597 14101 15059 15459 27355 32750
259 873 3006 18016 18676 19887 25385 34337
613 1595 3868 5572 14023 20249 31223 38780
200 3129 3397 7639 9614 11741 26530 28039
2223 2694 3117 9231 11140 21370 27439 35476
779 1905 3630 11778 26510 27390 33035 34468
137 624 2206 15239 18045 21398 23580 29951
1327 1763 3312 6477 9861 28455 34353 35567
2717 2763 3044 8185 8380 17045 28844 38259
265 1105 3295 22148 24070 27939 31377 32371
1785 2042 3249 6558 15036 15184 18135 23151
271 1032 1352 4622 18315 19571 24142 24376
2392 2686 3656 7062 22999 24868 27626 28882
2726 3295 3893 19111 21109 26599 35039 37863
1650 1757 2170 5928 12800 22404 22521 23554
474 912 2810 9299 9649 34316 36020 39568
721 3776 3815 8297 28150 29224 33574 35496
2009 2400 3282 14124 16587 22933 22980 28722
132 1845 3587 11790 22121 31459 32442 40951
142 361 1061 4265 11230 16948 17367 27128
1250 2600 3374 8456 12596 28890 34813 40879
738 1025 1617 17079 22449 25340 30369 32737
1876 2731 2841 9438 17215 23350 27295 34083
453 1144 3263 12936 18049 25084 25595 29278
2369 2850 2997 6628 14441 17901 21329 23717
1671 2580 3055 12903 14917 24143 26800 33983
1516 1907 2756 5106 13479 13748 32931
1708 3245 3727
216 2078 2179
137 316 3665
834 2278 3108
5345 33686
11281 26022
17244 34746
20829 33069
32952 37029
38235 38952
12779 36842
5081 34190
8352 9285
37937 39131
21873 26915
A receiving apparatus/method comprising a decoding unit/step for decoding the punctured LDPC code obtained from data transmitted by the transmission method.

In the seventh transmission apparatus/method of the present technology, the code length N is 69120 bits, and the row and column are each extended by a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 8/16. Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding unit/step that punctures the head of the information bit by the puncture length L, generates a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 8/16, and the extension check The matrices are a predetermined value M1, an M1 row K column represented by the information length K = N × r, an upper left A matrix of the extended parity check matrix, and an M1 row M1 column to the right of the A matrix The adjacent staircase B matrix, the Z matrix that is the right-adjacent zero matrix of said B matrix with M1 rows and N+LK-M1 columns, and said A matrix with N+LK-M1 rows and K+M1 columns. and a C matrix adjacent to the bottom of the B matrix, and a D matrix that is a unit matrix of N+LK-M1 rows and N+LK-M1 columns adjacent to the right of the C matrix, and the puncture length L is , 2520, the predetermined value M1 is 5040, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is an element of 1 in the A matrix and the C matrix A table representing the position of every 360 columns of
2184 2245 5483 5692 9320 18011 18064 18150 20189 23469 23662 25407 28189 35779 37071
1855 3613 5755 7904 12491 14272 19654 22065 22316 23975 24503 26458 29567 34455 35556
928 4740 6537 8736 9455 16185 18167 22537 22768 26005 32031 32179 33566 34966 35808
3986 4696 5295 8034 12188 12339 14298 19661 22499 22837 28343 29201 30056 36868 36872
1049 2606 9166 13000 17407 22535 24035 24090 26423 27147 28104 29196 34765 36183 36195
2475 2705 6586 10659 14652 15858 18555 22635 25610 26796 32144 33131 35581 37072
1339 1594 5556 5731 5735 7423 7924 8287 10173 21406 26174 26965 30831 35028
2095 2692 4542 11957 16923 21339 22995 35510
753 3913 4481 24115 25745 28475 29334 34983
531 2404 4091 6823 7730 13085 21741 25943
764 2602 5000 5777 6649 28284 28457 30648
173 2884 3453 7716 16017 26720 33781 34558
804 3989 4026 10353 16302 20995 22614 29946
1369 1438 4721 11804 19454 24989 29745 33895
2413 3865 4900 9605 12227 19796 34068 35639
2280 3614 3994 5794 8725 17288 29042 32667
189 729 2807 18569 20422 29775 33106 35601
13 1942 3075 5647 16437 28792 33944 36951
2322 2774 4133 14911 23058 26276 35482 36145
1156 1915 1988 13753 20275 22750 28129 28615
1027 3254 3826 12792 25306 33398 34900 36579
1000 3662 3934 12247 28784 30051 30448 34971
2208 4777 4895 7995 15270 34546 35050 35465
865 1301 2776 5447 7236 25204 28825 33009
931 2280 3123 18312 20000 26379 29091 35547
161 313 1976 10118 19510 24067 25236 29200
495 2033 3478 18349 21388 27692 27945 29298
40 123 466 8627 14489 23804 25266 29217
1919 2239 5036 9020 10230 13401 26202 31868
2984 2990 4559 13817 15317 17982 24664 30694
4263 4578 4900 18514 19432 21056 22195 25540
486 2865 4044 10378 16367 19558 31611 37057
773 785 4692 13690 15318 17028 26614 28889
1128 2525 4918 13514 14018 21695 28403 28447
1378 2785 3945 19557 24360 26125 32618 35109
1622 2734 4728 21208 22587 28908 32086 34795
1490 2885 4429 7668 12440 13368 15096 30591
157 4782 5028 7007 8693 14921 17912 24354
1887 2821 4004 5990 7023 11617 23891 31527
2659 3026 3929 8247 18589 18766 25496 30000
1493 4505 4919 10166 15487 19375 20018 37009
1459 2038 4184 13922 16641 25405 27889 36692
2552 3118 4424 10018 10774 20992 21805 22999
1575 3751 4248 12315 13683 16910 20849 27503
169 1552 4011 8140 13348 21198 22677 22961
485 1610 2021 6883 8078 10259 10833 36872
717 3562 4705 8210 14216 16365 30074 30100
284 2060 2603 5600 6111 16526 16904 25280
1464 2306 2405 15402 22597 31453 33154 36507
793 858 958 19518 21177 22969 27465 34316
2755 4039 4916 13740 21014 22548 23393 27868
2346 2859 3724 5804 11163 13257 16059 16537
3034 3827 4257 10753 10848 16863 17910 30215
699 2077 3036 14789 28159 29959 32060 35741
842 1479 1651 8903 20126 29843 30172 36359
60 216 2154 13804 29952 30425 30451 33882
1561 2138 3179 7117 10997 17696 18819 29502
1929 2926 4119 6462 9997 17945 19143 35222
1408 3721 4733 6077 8220 23897 24532 32454
758 1062 3265 22844 25290 26795 30309 32198
723 974 2366 11325 11639 20444 30190 33000
3057 3184 4157 6124 10032 14829 22920 27535
1908 2681 3314 10175 15746 19286 30891 31312
337 3329 4284 16428 26550 26938 27394 29675
601 626 4671 7188 18716 20787 25752 31716
2736 3729 3853 14610 18790 21261 31327
1514 1926 2616 7216 7346 13375 15951
385 2731 2776 17442 17618 18488 26842
2847 3447 4837 7730 21494 25421 27060
4167 4675 4950 18125 19852 24594 31885
2100 2258 2839 6788 12190 20838 22037
598 1160 2512 9977 27667 31266 35818
726 918 4356 25915 26856 35644 35900
603 4023 4286 21322 24461 26414 31230
1378 1712 2601 6187 19972 21466 33990
2477 3873 5026 6147 11847 28736 31098
458 983 3395 5246 16300 16685 26054
1591 4194 4296 8941 12584 26579 36950
956 1266 1722 21007 23498 27878 29947
1791 2382 3477 27827
753 1172 3171 21799
577 1793 4156 14329
1221 1909 2872 23737
3201 3437 3627 24180
1422 2384 2680 17127
350 2057 3244 29775
1494 3096 4085 12712
1925 2736 3505 20471
167 1300 1330 30100
2178 4141 4741 6802
169 2635 2776 7608
1061 3955 4667 23473
185 995 4044 24130
1792 2284 4178 30200
3947 4503 4756 34653
1198 4107 4470 5969
9656
8810
34388
35438
20498
24839
23256
9966
25861
11305
7639
21600
13763
25619
is a transmitting apparatus/method.

In the seventh receiving apparatus/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 8/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding step of generating a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 8/16 is provided by puncturing the beginning of the information bits by the puncture length L, and the extended parity check matrix is , a predetermined value M1, and an M1-by-K-column A matrix represented by the information length K=N×r, the upper left A matrix of the extended parity check matrix, and an M1-by-M1-column A matrix adjacent to the right of the A matrix The B matrix of the staircase structure, the Z matrix that is the zero matrix adjacent to the right of the B matrix with M1 rows and N+LK-M1 columns, the A matrix with N+LK-M1 rows and K+M1 columns, and the above including a C matrix adjacent below the B matrix and a D matrix that is an identity matrix adjacent to the right of the C matrix with N+LK-M1 rows and N+LK-M1 columns, and the puncture length L is 2520 and the predetermined value M1 is 5040, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is the position of the element of 1 in the A matrix and the C matrix A table representing every 360 columns of
2184 2245 5483 5692 9320 18011 18064 18150 20189 23469 23662 25407 28189 35779 37071
1855 3613 5755 7904 12491 14272 19654 22065 22316 23975 24503 26458 29567 34455 35556
928 4740 6537 8736 9455 16185 18167 22537 22768 26005 32031 32179 33566 34966 35808
3986 4696 5295 8034 12188 12339 14298 19661 22499 22837 28343 29201 30056 36868 36872
1049 2606 9166 13000 17407 22535 24035 24090 26423 27147 28104 29196 34765 36183 36195
2475 2705 6586 10659 14652 15858 18555 22635 25610 26796 32144 33131 35581 37072
1339 1594 5556 5731 5735 7423 7924 8287 10173 21406 26174 26965 30831 35028
2095 2692 4542 11957 16923 21339 22995 35510
753 3913 4481 24115 25745 28475 29334 34983
531 2404 4091 6823 7730 13085 21741 25943
764 2602 5000 5777 6649 28284 28457 30648
173 2884 3453 7716 16017 26720 33781 34558
804 3989 4026 10353 16302 20995 22614 29946
1369 1438 4721 11804 19454 24989 29745 33895
2413 3865 4900 9605 12227 19796 34068 35639
2280 3614 3994 5794 8725 17288 29042 32667
189 729 2807 18569 20422 29775 33106 35601
13 1942 3075 5647 16437 28792 33944 36951
2322 2774 4133 14911 23058 26276 35482 36145
1156 1915 1988 13753 20275 22750 28129 28615
1027 3254 3826 12792 25306 33398 34900 36579
1000 3662 3934 12247 28784 30051 30448 34971
2208 4777 4895 7995 15270 34546 35050 35465
865 1301 2776 5447 7236 25204 28825 33009
931 2280 3123 18312 20000 26379 29091 35547
161 313 1976 10118 19510 24067 25236 29200
495 2033 3478 18349 21388 27692 27945 29298
40 123 466 8627 14489 23804 25266 29217
1919 2239 5036 9020 10230 13401 26202 31868
2984 2990 4559 13817 15317 17982 24664 30694
4263 4578 4900 18514 19432 21056 22195 25540
486 2865 4044 10378 16367 19558 31611 37057
773 785 4692 13690 15318 17028 26614 28889
1128 2525 4918 13514 14018 21695 28403 28447
1378 2785 3945 19557 24360 26125 32618 35109
1622 2734 4728 21208 22587 28908 32086 34795
1490 2885 4429 7668 12440 13368 15096 30591
157 4782 5028 7007 8693 14921 17912 24354
1887 2821 4004 5990 7023 11617 23891 31527
2659 3026 3929 8247 18589 18766 25496 30000
1493 4505 4919 10166 15487 19375 20018 37009
1459 2038 4184 13922 16641 25405 27889 36692
2552 3118 4424 10018 10774 20992 21805 22999
1575 3751 4248 12315 13683 16910 20849 27503
169 1552 4011 8140 13348 21198 22677 22961
485 1610 2021 6883 8078 10259 10833 36872
717 3562 4705 8210 14216 16365 30074 30100
284 2060 2603 5600 6111 16526 16904 25280
1464 2306 2405 15402 22597 31453 33154 36507
793 858 958 19518 21177 22969 27465 34316
2755 4039 4916 13740 21014 22548 23393 27868
2346 2859 3724 5804 11163 13257 16059 16537
3034 3827 4257 10753 10848 16863 17910 30215
699 2077 3036 14789 28159 29959 32060 35741
842 1479 1651 8903 20126 29843 30172 36359
60 216 2154 13804 29952 30425 30451 33882
1561 2138 3179 7117 10997 17696 18819 29502
1929 2926 4119 6462 9997 17945 19143 35222
1408 3721 4733 6077 8220 23897 24532 32454
758 1062 3265 22844 25290 26795 30309 32198
723 974 2366 11325 11639 20444 30190 33000
3057 3184 4157 6124 10032 14829 22920 27535
1908 2681 3314 10175 15746 19286 30891 31312
337 3329 4284 16428 26550 26938 27394 29675
601 626 4671 7188 18716 20787 25752 31716
2736 3729 3853 14610 18790 21261 31327
1514 1926 2616 7216 7346 13375 15951
385 2731 2776 17442 17618 18488 26842
2847 3447 4837 7730 21494 25421 27060
4167 4675 4950 18125 19852 24594 31885
2100 2258 2839 6788 12190 20838 22037
598 1160 2512 9977 27667 31266 35818
726 918 4356 25915 26856 35644 35900
603 4023 4286 21322 24461 26414 31230
1378 1712 2601 6187 19972 21466 33990
2477 3873 5026 6147 11847 28736 31098
458 983 3395 5246 16300 16685 26054
1591 4194 4296 8941 12584 26579 36950
956 1266 1722 21007 23498 27878 29947
1791 2382 3477 27827
753 1172 3171 21799
577 1793 4156 14329
1221 1909 2872 23737
3201 3437 3627 24180
1422 2384 2680 17127
350 2057 3244 29775
1494 3096 4085 12712
1925 2736 3505 20471
167 1300 1330 30100
2178 4141 4741 6802
169 2635 2776 7608
1061 3955 4667 23473
185 995 4044 24130
1792 2284 4178 30200
3947 4503 4756 34653
1198 4107 4470 5969
9656
8810
34388
35438
20498
24839
23256
9966
25861
11305
7639
21600
13763
25619
A receiving apparatus/method comprising a decoding unit/step for decoding the punctured LDPC code obtained from data transmitted by the transmission method.

In the eighth transmission apparatus/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 9/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding unit/step that punctures the head of the information bit by the puncture length L, generates a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 9/16, and the extension check The matrices are a predetermined value M1, an M1 row K column represented by the information length K = N × r, an upper left A matrix of the extended parity check matrix, and an M1 row M1 column to the right of the A matrix Adjacent staircase B matrix, M1 rows N+LK-M1 columns, Z matrix which is the right-adjacent zero matrix of said B matrix, and N+LK-M1 rows K+M1 columns, said A matrix and a C matrix adjacent to the bottom of the B matrix, and a D matrix that is a unit matrix of N+LK-M1 rows and N+LK-M1 columns and adjacent to the right of the C matrix, and the puncture length L is , 1800, the predetermined value M1 is 9000, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is an element of 1 in the A matrix and the C matrix A table representing the position of every 360 columns of
3681 3750 3985 4255 8583 9468 12078 12353 15700 16492 17127 18174 18264 22392 23070 25263 29195 32034
804 4119 5315 5489 8261 9514 10099 10268 14359 16861 21050 21439 23880 24274 26637 30518 30944 31195
3684 4224 4412 7772 8017 10100 12529 15888 16518 18089 19685 28054 28297 28345 28897 29827 30402 31794
2013 2073 4993 6278 6716 10271 13971 14141 14727 17892 21649 22734 24394 25979 26485 30156 30617 31322
671 4057 4827 6795 8726 11791 15912 16773 16823 21296 24678 28589 29419 30212 30976 31701 32035
2831 3625 4812 9421 10678 11313 11919 13859 24185 26543
105 197 4569 12767 18835 20708 21307 21922 29762 30542
1939 3334 7927 12368 22520 24007 25355 26414 27639 30526
935 4228 7324 10281 10930 14811 20832 21012 24721 31868
451 1279 6541 9174 9524 23917 24447 24765 27400 30105
596 3093 7695 12690 12805 20513 26844 26874 27238 30238
3165 4948 8257 13864 15261 19334 23340 27303 29834 30592
4311 6608 8867 12314 17011 19562 29621 29653 29867 31831
246 1043 4063 9880 12133 14403 17673 21772 26756 28865
3800 4310 7891 9005 17892 22752 29776 30960 31922
169 3202 6707 9267 19608 21494 24264 27783 30896
2756 3526 5061 14144 15208 17722 19974 23683 25622
5640 6672 8062 10253 14587 17029 23586 29354 30935
1780 6399 7013 13407 14129 26025 27047 27302 28430
3867 8295 8448 11173 12961 16355 23417 30645 30840
114 2303 5658 10578 12954 19396 23278 26133 29150
4205 6484 8154 9468 9855 17738 25225 28855 29327
4064 5671 6785 11073 12684 17900 18543 24915 25278
4591 6432 6812 9172 9497 10443 11612 15805 26385
3429 5317 5699 11875 12763 19252 24194 28715 31645
2334 5348 8140 15322 16398 18377 22674 23119 27452
5806 8178 8750 18695 19361 20500 21337 23747 26594
868 5108 7470 12695 12827 13362 17150 30388 32036
1401 3377 6069 13887 15223 16423 20548 26114 31525
2388 2511 6647 15288 20979 21546 22893 25768 26293
5918 7740 8309 16069 17648 21533 21638 30421 30592
4531 6710 7575 10870 14321 15801 22289 27422 29206
282 2349 2823 16122 18235 22889 30845 31790 32028
1028 3364 7170 9696 10463 13676 21633 22408 22987
4747 5376 7037 11344 18790 18904 23562 26963 29547
2666 4221 8779 12684 15548 16845 19631 27773 32000
3277 3636 6417 15359 20686 23258 23607 28911 31760
1394 1613 4705 10030 14240 20469 21907 25971 28392
2428 3334 6308 9823 14969 16081 20361 21680 27204
870 4539 5033 11210 11227 12757 13164 16363 18278
519 8424 8966 11266 12282 15631 17138 25283 27009
562 4648 7031 9367 9769 17258 17524 18469 23544
2607 4017 4276 12525 16477 21617 28004 29179 31638
1311 1705 6279 19425 20643 21524 21927 26759 30022
2440 5160 8827 19724 20470 21579 22088 25426 26076
247 1718 3238 15685 16926 26381 27070 28504 31522
1646 3308 3325 12196 13145 18495 22879 25613 31074
2777 6991 7582 12852 15441 16518 19845 27107 31491
24 1098 6964 10014
3834 7138 8104 27290
2467 2695 6985 23538
597 1655 2786 26365
3412 3568 3869 22313
1378 3631 7350 30759
396 2426 3965 30636
294 5276 6622 28723
889 5479 5831 13814
1355 5011 7082 24636
1737 5683 7638 12279
4248 4328 7871 13506
1867 5466 7068 23531
1400 5020 7410 9775
2727 3409 6324 21177
4027 4240 7262 16737
1442 7380 7650 24201
601 6169 6278 26698
1070 3198 6038 11626
616 3835 8339 28168
4424 5809 6656 26638
3857 4561 4879 27896
2696 2722 4665 17776
643 2333 3072 10579
232 4876 4956 18710
3486 3535 6104 29906
774 5073 6030 23656
4617 6194 7445 31653
4163 5489 8227 28295
3675 3991 4940 18635
496 2003 4758 20333
1062 2059 4493 25301
1380 7374 8642 28926
1294 1639 8662 30961
5866 6147 7653 11713
5458 7184 7361 20695
2463 4602 6018 16857
320 4682 8140 19724
4410 6923 8975 26037
306 1921 7301 11104
57 1768 5604 17338
2839 3153 5912 28608
1091 6051 7495 31918
1681 2099 2259 16924
4490 5186 6994 25446
3188 4252 6208 25437
1342 5660 7305 21071
1048 3204 7421 15675
2197 3412 5125 22484
5721 6143 6479 22800
2531 4216 4794 17691
628 3665 5783 26756
2660 5527 7289 14552
3432 4895 6255 20101
288 2324 2375 27024
3898 7386 8459 10265
301 4717 4972 10844
1895 7065 8334 22255
331 1779 7214 22726
3202 4096 7467 27090
27017
29554
30755
30289
14496
29460
27770
9663
12310
11707
30095
30852
20107
23269
22090
12537
23969
13527
10911
20907
15272
23822
31661
13732
21787
is a transmitting apparatus/method.

In the eighth receiving apparatus/method of the present technology, the code length N is 69120 bits, and the row and column of the parity check matrix of the LDPC code with the coding rate r of 9/16 are each extended by a predetermined puncture length L Based on the extended parity check matrix, LDPC encoding of information bits of information length K = N × r is performed, an extended LDPC code having parity bits of parity length M = N + LK is generated, and the extended LDPC code An encoding step of generating a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 9/16 is provided by puncturing the beginning of the information bits by the puncture length L, and the extended parity check matrix is , a predetermined value M1, and an M1-by-K-column A matrix represented by the information length K=N×r, the upper left A matrix of the extended parity check matrix, and an M1-by-M1-column A matrix adjacent to the right of the A matrix The B matrix of the staircase structure, the Z matrix that is the zero matrix adjacent to the right of the B matrix with M1 rows and N+LK-M1 columns, the A matrix with N+LK-M1 rows and K+M1 columns, and the above including a C matrix adjacent below the B matrix and a D matrix that is an identity matrix adjacent to the right of the C matrix with N+LK-M1 rows and N+LK-M1 columns, and the puncture length L is 1800 and the predetermined value M1 is 9000, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is the position of the element of 1 in the A matrix and the C matrix A table representing every 360 columns of
3681 3750 3985 4255 8583 9468 12078 12353 15700 16492 17127 18174 18264 22392 23070 25263 29195 32034
804 4119 5315 5489 8261 9514 10099 10268 14359 16861 21050 21439 23880 24274 26637 30518 30944 31195
3684 4224 4412 7772 8017 10100 12529 15888 16518 18089 19685 28054 28297 28345 28897 29827 30402 31794
2013 2073 4993 6278 6716 10271 13971 14141 14727 17892 21649 22734 24394 25979 26485 30156 30617 31322
671 4057 4827 6795 8726 11791 15912 16773 16823 21296 24678 28589 29419 30212 30976 31701 32035
2831 3625 4812 9421 10678 11313 11919 13859 24185 26543
105 197 4569 12767 18835 20708 21307 21922 29762 30542
1939 3334 7927 12368 22520 24007 25355 26414 27639 30526
935 4228 7324 10281 10930 14811 20832 21012 24721 31868
451 1279 6541 9174 9524 23917 24447 24765 27400 30105
596 3093 7695 12690 12805 20513 26844 26874 27238 30238
3165 4948 8257 13864 15261 19334 23340 27303 29834 30592
4311 6608 8867 12314 17011 19562 29621 29653 29867 31831
246 1043 4063 9880 12133 14403 17673 21772 26756 28865
3800 4310 7891 9005 17892 22752 29776 30960 31922
169 3202 6707 9267 19608 21494 24264 27783 30896
2756 3526 5061 14144 15208 17722 19974 23683 25622
5640 6672 8062 10253 14587 17029 23586 29354 30935
1780 6399 7013 13407 14129 26025 27047 27302 28430
3867 8295 8448 11173 12961 16355 23417 30645 30840
114 2303 5658 10578 12954 19396 23278 26133 29150
4205 6484 8154 9468 9855 17738 25225 28855 29327
4064 5671 6785 11073 12684 17900 18543 24915 25278
4591 6432 6812 9172 9497 10443 11612 15805 26385
3429 5317 5699 11875 12763 19252 24194 28715 31645
2334 5348 8140 15322 16398 18377 22674 23119 27452
5806 8178 8750 18695 19361 20500 21337 23747 26594
868 5108 7470 12695 12827 13362 17150 30388 32036
1401 3377 6069 13887 15223 16423 20548 26114 31525
2388 2511 6647 15288 20979 21546 22893 25768 26293
5918 7740 8309 16069 17648 21533 21638 30421 30592
4531 6710 7575 10870 14321 15801 22289 27422 29206
282 2349 2823 16122 18235 22889 30845 31790 32028
1028 3364 7170 9696 10463 13676 21633 22408 22987
4747 5376 7037 11344 18790 18904 23562 26963 29547
2666 4221 8779 12684 15548 16845 19631 27773 32000
3277 3636 6417 15359 20686 23258 23607 28911 31760
1394 1613 4705 10030 14240 20469 21907 25971 28392
2428 3334 6308 9823 14969 16081 20361 21680 27204
870 4539 5033 11210 11227 12757 13164 16363 18278
519 8424 8966 11266 12282 15631 17138 25283 27009
562 4648 7031 9367 9769 17258 17524 18469 23544
2607 4017 4276 12525 16477 21617 28004 29179 31638
1311 1705 6279 19425 20643 21524 21927 26759 30022
2440 5160 8827 19724 20470 21579 22088 25426 26076
247 1718 3238 15685 16926 26381 27070 28504 31522
1646 3308 3325 12196 13145 18495 22879 25613 31074
2777 6991 7582 12852 15441 16518 19845 27107 31491
24 1098 6964 10014
3834 7138 8104 27290
2467 2695 6985 23538
597 1655 2786 26365
3412 3568 3869 22313
1378 3631 7350 30759
396 2426 3965 30636
294 5276 6622 28723
889 5479 5831 13814
1355 5011 7082 24636
1737 5683 7638 12279
4248 4328 7871 13506
1867 5466 7068 23531
1400 5020 7410 9775
2727 3409 6324 21177
4027 4240 7262 16737
1442 7380 7650 24201
601 6169 6278 26698
1070 3198 6038 11626
616 3835 8339 28168
4424 5809 6656 26638
3857 4561 4879 27896
2696 2722 4665 17776
643 2333 3072 10579
232 4876 4956 18710
3486 3535 6104 29906
774 5073 6030 23656
4617 6194 7445 31653
4163 5489 8227 28295
3675 3991 4940 18635
496 2003 4758 20333
1062 2059 4493 25301
1380 7374 8642 28926
1294 1639 8662 30961
5866 6147 7653 11713
5458 7184 7361 20695
2463 4602 6018 16857
320 4682 8140 19724
4410 6923 8975 26037
306 1921 7301 11104
57 1768 5604 17338
2839 3153 5912 28608
1091 6051 7495 31918
1681 2099 2259 16924
4490 5186 6994 25446
3188 4252 6208 25437
1342 5660 7305 21071
1048 3204 7421 15675
2197 3412 5125 22484
5721 6143 6479 22800
2531 4216 4794 17691
628 3665 5783 26756
2660 5527 7289 14552
3432 4895 6255 20101
288 2324 2375 27024
3898 7386 8459 10265
301 4717 4972 10844
1895 7065 8334 22255
331 1779 7214 22726
3202 4096 7467 27090
27017
29554
30755
30289
14496
29460
27770
9663
12310
11707
30095
30852
20107
23269
22090
12537
23969
13527
10911
20907
15272
23822
31661
13732
21787
A receiving apparatus/method comprising a decoding unit/step for decoding the punctured LDPC code obtained from data transmitted by the transmission method.

In the first transmission device/method of the present technology, the code length N is 69120 bits, and the row and column each have a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 2/16. Based on the extended extended parity check matrix, LDPC encoding of information bits of information length K=N×r is performed to generate an extended LDPC code having parity bits of parity length M=N+LK. Furthermore, the leading end of the information bit of the extended LDPC code is punctured by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 2/16. The extended parity check matrix includes a predetermined value M1, and the upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r, and the A matrix of M1 rows and M1 columns. and the B matrix of M1 rows and N+LK-M1 columns, the Z matrix which is the zero matrix adjacent to the right of said B matrix, and the N+LK-M1 rows and K+M1 columns of The puncturing includes a C matrix adjacent below the A matrix and the B matrix, and a D matrix that is a unit matrix of N + LK-M1 rows and N + LK-M1 columns and adjacent to the right of the C matrix. The length L is 0, the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is for the A matrix and the C matrix. A table representing the position of elements of 1 in every 360 columns,
1444 1737 1780 9182 9748 9954 11859 23510 36957 41211 41804 41857 42268 42854 45152 46217 46448 52760 57528 59998 60168
281 1279 1468 9650 11337 15973 21859 24346 25864 28317 33522 35344 40280 43576 43942 50851 53221 57076 57561 59922 59962
132 758 1470 2901 2957 3365 4567 7062 10939 12288 20818 35122 39299 41903 43394 44289 49129 51394 53222 53899 56037
9 756 1510 3127 4867 15380 16575 17906 19275 20944 25462 27021 31939 34367 36491 39391 45013 45505 47768 50626 51547
188 252 1181 2939 4132 7944 12352 15443 17831 18785 18904 22672 23400 30518 30652 45102 51500 52032 52868 60341
496 564 1527 2708 2751 3658 6451 8212 11654 17193 21558 23963 28394 30554 30628 35052 44835 45090 49804 52979
793 858 1710 3561 10566 11369 17707 20970 22329 22383 24607 31237 38613 42719 43867 45715 50453 51882 55535 60316
689 980 1657 2690 4633 11070 16939 18443 20748 21753 25742 30361 31544 31693 33019 40842 47042 48850 52130 56606
198 281 1664 3384 12801 17438 24093 29656 30578 31929 35921 38919 38984 40957 43262 48155 50743 56398 56427 59215
457 1065 1196 2861 12717 15390 16655 17899 18300 22233 31560 32716 34991 43324 46709 51328 52891 54292 56334 59229
1307 1481 1599 13551 21460 22804 23439 32551 32671 35941 36329 40096 41474 45156 50568 55578 55667 56581 59061 60009
99 485 708 4043 5527 5824 7489 8809 15871 17753 18297 18507 19070 22839 28023 41124 43165 50873 51968 57000
188 412 1641 1833 5707 7556 10610 12636 14533 26728 27604 31757 32972 34677 36279 38315 42252 43155 53121 57503
300 794 1153 6459 7063 13526 17788 18308 21233 21439 22250 28514 32042 32160 36140 44273 49289 50434 51163 56471
757 1336 1440 5560 6283 10080 10986 13051 17638 22870 31581 35463 41212 42195 43305 46746 49564 56412 58207 59477
106 1195 1474 6273 14321 14746 16496 17016 17214 19472 27450 33489 40638 42896 43150 47624 51106 51339 53730 55816
98 1002 1336 2076 9328 10989 13413 13916 14455 17863 19776 24981 31172 39450 40385 43348 44833 46967 52917 58029
262 1363 1605 4715 8438 8794 12188 18208 19803 28570 36281 38576 39120 40344 44994 45827 46559 49914 50771 56658
870 1743 1764 5521 8695 11745 15888 16359 16412 33151 37033 38281 38499 39026 41174 44818 53168 56178 58405 60285
861 1142 1169 2232 4370 9265 10442 15376 15947 19420 24577 29045 36440 38242 41035 47841 49589 50529 52662 59907
231 913 1440 2695 6369 7938 8296 12107 14329 19324 25096 26108 35369 38516 41289 43604 52617 57130 59909 60020
214 667 762 3988 6762 14360 15257 18298 18943 19364 29813 33804 35106 36373 39451 39478 45683 47618 48539 59814
1144 1150 1746 1800 7038 11454 18376 18819 21869 26781 33351 35591 46571 49235 49956 50749 51642 53390 56404 58103
308 317 1510 5176 12653 13311 15884 18075 22371 26021 27004 29283 30382 32114 32978 35790 47224 48249 51701 57840
2786 5188 6809 7110 7138 7167 8042 12569 15301 27503 27894 32875 35277 48267 49051 57363
6186 6554 12052 14220 15013 15388 22130 27207 30084 30620 31562 36834 38446 52593 56791 60017
8810 12703 21600 21640 22233 26157 27268 27384 33020 39679 49298 51854 52364 53298 55215 59802
2670 6309 10054 11421 11750 11901 12053 12752 17466 28571 29910 32369 34446 38373 49448 51729
11357 12810 13252 14755 22824 30867 32868 33512 34862 35560 38704 41861 42805 43103 48692 55234
It has become.

In the first receiving apparatus/method of the present technology, the punctured LDPC code obtained from data transmitted by the first transmission method is decoded.

In the second transmission device/method of the present technology, the code length N is 69120 bits, and the row and column each have a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 3/16. Based on the extended extended parity check matrix, LDPC encoding of information bits of information length K=N×r is performed to generate an extended LDPC code having parity bits of parity length M=N+LK. Further, the leading end of the information bit of the extended LDPC code is punctured by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 3/16. The extended parity check matrix includes a predetermined value M1, and the upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r, and the A matrix of M1 rows and M1 columns. and the B matrix of M1 rows and N+LK-M1 columns, the Z matrix which is the zero matrix adjacent to the right of said B matrix, and the N+LK-M1 rows and K+M1 columns of The puncturing includes a C matrix adjacent below the A matrix and the B matrix, and a D matrix that is a unit matrix of N + LK-M1 rows and N + LK-M1 columns and adjacent to the right of the C matrix. The length L is 0, the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is for the A matrix and the C matrix. A table representing the position of elements of 1 in every 360 columns,
853 875 1192 2465 3004 4879 9062 21593 24043 26616 30909 32017 35006 42135 44268 56020
161 519 1556 3317 6015 14909 15760 21148 30072 32655 33940 34834 43430 44798 51284 52169
177 999 1683 6976 17610 18152 19591 22312 25036 27303 28584 47608 47749 50216 52322 54007
981 1000 1625 1630 6933 13217 13956 15319 22642 29483 31921 35465 43602 44250 46505 55678
1204 1242 1653 3066 6095 16862 20154 21430 23418 26408 30979 34093 41103 48385 54547 55093
316 1355 1562 2665 5222 6575 18299 19639 24268 30959 37721 47966 48255 51808 53697 56010
183 219 615 2859 6967 8044 13949 22294 28922 29355 32175 32276 33861 49675 52583 53512
263 342 1684 7426 14417 20396 27461 30075 33740 36812 38204 38420 41612 43083 45914 56035
256 870 921 3023 4662 5225 5276 19284 26034 35397 38524 44936 45178 46351 50860 51813
289 898 1442 9135 10774 13951 14133 19070 21192 27854 32118 43657 43859 43934 52772 53659
256 690 1324 3582 7066 8507 26854 34507 40768 44943 47952 50512 52080 52872 53733 53773
238 1037 1388 1929 6395 10653 21299 23085 26467 26836 27834 44924 47310 49393 53742 55883
976 1217 1469 7718 16449 19465 19983 22386 24762 28308 32395 33589 35997 41034 42118 43799
265 368 1365 1375 1808 7556 14593 15079 19648 36077 40397 41971 44940 47570 52522 55839
802 1656 1689 5554 6787 11067 15764 19656 31740 31762 36046 42258 45165 49245 52732 53420
265 307 1299 2775 6738 22483 26322 27615 30628 34194 38024 38787 46089 48680 49115 51063
698 747 1241 2898 5218 7964 15358 17928 28069 29537 33641 36103 40207 40701 42823 42929
70 293 799 16494 16696 20008 21050 23735 34060 34555 35068 37664 45312 47748 50957 52382
1151 1163 1751 7025 10775 15100 22260 24718 28905 30853 33020 43261 46849 48258 54212 56122
279 457 775 8025 13383 16978 19254 23110 28197 31454 33060 38532 41429 41621 42149 54927
494 1130 1351 18525 22446 31344 31582 38324 42396 46010 48804 49241 49379 51987 52296 53133
177 508 1032 3547 8103 13357 14344 15876 20386 22050 23593 35305 47409 53297 55610 56093
988 1091 1785 3400 5144 7245 10179 12918 32871 33462 34484 38318 43410 44103 44267 52837
520 564 1757 12204 16894 17249 21480 21541 23760 28325 36266 40606 46094 48779 55501 56065
914 943 1111 3641 4232 10215 14134 16582 23445 28767 28862 32260 35952 39907 41846 47553
466 554 1697 4921 6953 7034 7052 10648 11628 19174 27830 29210 31722 32281 52559 55802
1135 1273 1408 2599 3618 4903 7210 17368 21014 21287 21926 24070 27741 29801 36137 44272
524 801 1767 4093 9721 12200 19463 29280 31587 33577 39747 43688 46627 49807 51345 55969
489 1390 1756 3050 12113 20477 21376 26797 27049 28907 31534 32746 33345 40582 41970 55911
432 1520 1598 9292 11552 16985 18417 21847 21960 24287 25489 34478 40990 44004 47573 53982
301 592 849 1944 4128 8341 16783 19249 24983 43892 44041 44474 44942 44959 50738 54935
118 558 1470 4368 10132 11791 16523 22408 23766 25111 25426 25779 35005 42742 46197 53118
310 1059 1322 3609 7107 10048 13161 32141 33369 35206 36131 38746 44545 47963 48414
256 346 845 7363 10375 12492 13091 27987 32113 34846 36223 39863 44450 46526 49216
607 683 954 5473 10617 18484 20018 26971 28190 37592 39069 39740 43575 45676 48149
244 635 1208 5450 8082 25030 25149 28411 29333 31324 36972 42071 43401 47088 52085
2841 5514 16122 18061 18199 20340 22525 25022 29914 31732 46415
7567 22860 23157 24194 24622 29643 31255 32355 36379 38228 51173
24002 24459 25897 26955 31168 31630 39183 46791 47323 51503 55241
4817 8291 10219 13991 14318 28549 28836 30491 36884 46310 54625
8275 9585 11678 37216 38932 45186 46287 48023 48862 53636 56067
It has become.

In the second receiving apparatus/method of the present technology, the punctured LDPC code obtained from data transmitted by the second transmission method is decoded.

In the third transmission device/method of the present technology, the code length N is 69120 bits, and the row and column each have a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 4/16. Based on the extended extended parity check matrix, LDPC encoding of information bits of information length K=N×r is performed to generate an extended LDPC code having parity bits of parity length M=N+LK. Further, the leading end of the information bit of the extended LDPC code is punctured by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 4/16. The extended parity check matrix includes a predetermined value M1, and the upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r, and the A matrix of M1 rows and M1 columns. and the B matrix of M1 rows and N+LK-M1 columns, the Z matrix which is the zero matrix adjacent to the right of said B matrix, and the N+LK-M1 rows and K+M1 columns of The puncturing includes a C matrix adjacent below the A matrix and the B matrix, and a D matrix that is a unit matrix of N + LK-M1 rows and N + LK-M1 columns and adjacent to the right of the C matrix. The length L is 0, the predetermined value M1 is 1800, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is for the A matrix and the C matrix. A table representing the position of elements of 1 in every 360 columns,
797 853 885 2412 8763 16966 18074 21725 21923 22276 32414 49532 51711
39 1096 1305 6276 13449 16227 24628 29368 31384 32207 45115 47748 51161
44 427 1193 4543 10898 29586 34143 40123 44170 46228 47353 48962 49856
541 736 844 4479 7200 16262 18160 24649 29159 42952 43829 47067 48307
95 1342 1783 9131 12031 12989 13202 14244 27356 29527 32789 36795 38709
494 1203 1652 5475 16812 21005 24490 28736 31487 37840 39565 50301 50448
1532 1581 1705 10606 12678 17526 28502 35833 44124 47833 49541 51702 51831
96 185 1188 2754 2775 5499 6292 6895 9799 27158 28509 39985 48544
749 1007 1624 9110 12545 20317 27165 31146 36658 40218 45870 48593 49397
1163 1355 1556 4652 6091 6978 8979 14330 25366 27509 27927 33954 51511
1168 1311 1320 2096 3187 5119 20693 29188 35325 36538 41740 44821 47836
288 1399 1422 10030 12443 15396 19379 26774 30623 40397 40494 47324 48652
570 809 1622 8966 13182 24760 25846 37786 38499 41477 47218 49514 51673
44 208 811 3742 8390 20577 24033 26195 29483 39222 40429 45529 45643
97 1161 1310 2693 19471 21117 24844 29355 37875 38827 42599 46927 51585
620 1416 1679 12977 15285 17224 20748 22381 25697 28626 33138 37912 39470
368 1367 1465 11725 13919 13945 33353 37326 38778 40727 40875 48487 51103
1427 1519 1736 6497 10328 15345 17776 24008 29435 47926 48682 48686 49250
23 1169 1460 5251 10379 24722 25285 32822 35089 37814 44950 45474 47146
32 681 1568 6384 9728 21530 22557 24432 31527 33435 36375 37151 39510
918 1286 1362 2738 2808 5037 7483 16549 20933 31061 33375 39562 50975
844 925 1507 8014 14804 15472 22057 31449 32226 32974 34809 41852 50676
1104 1753 1780 6605 22820 24244 26745 28587 30929 33797 34123 42029 43723
296 351 1799 9595 9770 15297 17910 19571 20521 35468 38937 48238 50795
638 760 1027 15495 15806 27803 29165 32046 34804 38592 38949 39457 47996
676 1548 1687 15931 17206 27071 28999 29312 30437 39081 44646 46366 48245
164 1436 1470 3335 8452 10611 14735 17314 17457 21853 32068 49268 51360
673 987 1570 3322 4946 6830 12027 22997 28126 30952 31702 32262 40857
773 1139 1404 9840 16019 16640 18064 24251 25181 42571 46539 50656 51750
726 730 1282 9539 10718 15690 27181 28022 29831 32767 40892 45045 51229
178 355 896 3493 13148 14855 15297 17187 20332 26479 36876 38772 41342
174 909 992 4685 6611 6649 9973 10846 18348 21866 29851 48524 51503
256 1273 1407 4650 6765 16547 19484 19834 20323 22294 27570 33457 40893
27 60 100 1530 9640 11387 12526 16343 17977 24156 29307 43317 51005
908 1009 1256 15318 24411 27373 28956 29096 37447 40401 45949 47505 50608
871 1022 1050 2987 11235 11367 14631 18902 19810 40712 41044 44083 50666
322 663 669 8710 10150 15826 17085 22493 31938 37858 40689 44018 49689
589 846 1413 2627 4519 7841 15480 24061 40839 41475 41591 46883 50613
963 1135 1395 1610 5107 10991 17300 20822 21073 23236 30712 39982 42668
729 792 1696 3391 4018 6677 15323 31211 32245 38603 39662 44737 48810
274 376 1003 8907 11493 11611 25418 25885 33368 36485 41225 44260 45485
1174 1245 1412 3510 9590 17010 20708 25956 28271 29603 33362 37097 42952
813 1030 1452 5147 9859 19468 34863 35407 36002 36716 40288 42835 44337
211 230 1694 5157 23173 23285 26293 27140 29110 34165 38861 40227 43477
537 933 1476 2748 5211 5376 14853 16889 18857 20875 22806 29035 29444
697 709 765 6009 27426 29923 33631 35433 36206 43172 47174 50955
833 1096 1648 4459 13016 22371 22757 23977 26422 28211 29254 43701
214 521 895 2147 3200 3525 3561 6699 7730 7845 9000 9570 11204 11446 11570 12462 13469 14396 15475 17540 18804 18944 1932 1 19550 20001 25062 25567 26342 26709 27146 27392 27428 30782 32176 32956 33240 34420 35150 35263 35879 36407 37210 37393 3 7420 38892 40202 40583 40665 41816 42558 42720 43063 43442 44348 44378 45052 47033 49514 49845 50084 51647
7599 9277 13898 16320 19617 28012 30567 42423 43056
15934 20819 25195 28421 31073 31750 33551 35982 37823
5377 13795 16639 20686 22150 32586 33922 40431 42255
3368 14716 15016 20925 23397 25910 28917 36663 40946
3478 4545 5802 12334 27955 29363 42818 48135 48995
It has become.

In the third receiving apparatus/method of the present technology, the punctured LDPC code obtained from data transmitted by the third transmission method is decoded.

In the fourth transmission device/method of the present technology, the code length N is 69120 bits, and the row and column each have a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 5/16. Based on the extended extended parity check matrix, LDPC encoding of information bits of information length K=N×r is performed to generate an extended LDPC code having parity bits of parity length M=N+LK. Further, the leading end of the information bit of the extended LDPC code is punctured by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 5/16. The extended parity check matrix includes a predetermined value M1, and the upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r, and the A matrix of M1 rows and M1 columns. and the B matrix of M1 rows and N+LK-M1 columns, the Z matrix which is the zero matrix adjacent to the right of said B matrix, and the N+LK-M1 rows and K+M1 columns of The puncturing includes a C matrix adjacent below the A matrix and the B matrix, and a D matrix that is a unit matrix of N + LK-M1 rows and N + LK-M1 columns and adjacent to the right of the C matrix. The length L is 1800, the predetermined value M1 is 3600, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is for the A matrix and the C matrix. A table representing the position of elements of 1 in every 360 columns,
3 1525 35873 36202 45585 47150 47845 49311
851 2755 5753 8521 10162 12036 16914 17857 18538 22342 24470 28199 33144 34233 35459 35506 38894 39300 41198 41995 42243 43310 44187 44969 46306 46719 47907 48844
803 828 7874 8667 12187 15086 16097 20436 21143 22142 27188 29052 30895 30927 30963 31563 34591 35419 36521 38142 38825 4 2538 43514 44432 45634 47807 47953
3442 3596 4211 4790 5276 5379 6950 8256 10939 13398 13563 13720 18074 22070 22760 26767 27057 28054 29148 33155 33760 385 00 42760 44861 45653 46507 48695
1337 3179 3936 4019 4207 4915 5953 6200 7596 10085 10241 15048 16788 25083 27412 27478 28623 33014 33168 33296 34087 3592 2 36818 38225 40169 41762 46370
230 2417 2466 10915 19279 39243 39762 42664 45750
595 1792 2788 16000 19698 28701 38882 45250 46449
764 1619 2243 10130 25528 38421 44789 45032 48064
779 1651 3431 4707 8887 24180 36687 37770 39583
136 1352 3105 9580 25493 28929 29003 43731 44941
0 2147 3434 4402 19742 21221 37419 46590 49082
1658 1953 2935 17606 21613 29311 33878 46163 47126
804 1362 2596 15920 25368 28032 32218 37251 38385
733 3180 3549 12710 14684 32429 36039 39164 47531
807 2668 2811 23227 39984 42091 45708 46426 47788
1142 3373 3414 4219 7793 11379 15389 28832 32362
246 2670 3141 11465 24513 25038 31936 36501 45021
1365 2399 3107 4460 24713 30758 32422 38041 43379
323 578 1392 22591 26966 35332 35884 36454 38254
24 78 229 8741 17149 21008 30309 32441 38141
587 1595 3531 9258 15476 30673 33744 41847 44930
980 2136 2883 18306 22032 31618 33154 45208 48127
1518 1796 2304 7939 24330 29552 33426 39907 41568
599 681 3597 10689 10811 19776 20651 34661 46473
970 1152 2675 13311 15762 16363 26575 37047 48249
1872 1968 2620 16207 31197 33577 37990 42868 45881
1105 1351 3374 28454 28667 37692 42083 46115
1019 1816 3153 7354 14190 15535 29787 40081
114 1127 3412 17706 21953 31166 48855 49247
411 1346 2860 6474 12912 28627 30225 31396
109 1895 2803 8192 22957 30924 32515 39258
1067 1547 3218 10928 18459 24102 24958 48228
1022 2939 3593 16210 20143 22128 36148 48748
1826 2281 3110 10706 11745 27544 29705 32385
165 1794 3038 13953 15929 20587 35639 37360
122 1107 1776 7992 15442 26707 28761 39718
344 1449 2018 7930 11023 11967 18210 48998
203 2541 3360 6249 8145 10115 16796 19830 39389 39409
1333 1476 1855 4261 5127 16893 20060 23938 25433 32522
1972 3154 3539 10244 10601 12317 18404 29191 35539 41261
1621 1817 3280 15943 26444 28455 28595 29822 38852 48190
2048 2565 2660 4707 12386 15311 19315 20091 24908 37754
2825 3043 3516 9940 11806 11981 20375 20597 22471 31060
2597 2792 3444 11226 16387 17531 18473 25142 39461 42139
439 2788 3511 3684 5549 16067 23077 39829 39920 44862
1076 2271 2797 6573 12043 17816 20967 21726 23200 38056
553 2080 2948 5535 16026 22119 23794 37157 46602 46720
112 2115 3084 8090 10494 13165 29078 31417 33314 39595
2275 2449 3058 10121 12474 12563 25072 25610 39483 43489
741 2186 2270 5146 10831 17517 20875 29107 35695 41244
1693 1902 2907 6756 10924 18965 24040 33793 41089 42464
2469 2514 2769 6664 8813 8938 19741 23113 34293 45892
1761 2326 2998 17255 23220 26747 28416 37450 38574 41110
1083 1375 1867 4468 6706 6899 15494 19170 28463 28858
1394 1412 1510 7439 27005 29288 32683 34307 34607 45091
2477 2978 3539 22378 23848 24738 28734 31460 41873 45398
191 803 1500 9030 14071 26093 26432 27827 35890 47458
556 2942 3114 10130 11981 33368 34732 42472 47188 47655
425 2875 2946 16084 19184 26801 27069 27090 31317 34103
121 1674 3258 5208 13340 26019 37492 38723 40779 49200
3968 7741 12550 32061
17972 19666 20231 33590
9086 34375 41691 42567
12168 14189 15095 49129
19291 26450 29950 39068
19852 25195 35124 36192
10447 32405 36184 40786
8911 19949 27496 41273
14679 16883 20951 29727
30296 32681 34757 36501
It has become.

In the fourth receiving apparatus/method of the present technology, the punctured LDPC code obtained from the data transmitted by the fourth transmission method is decoded.

In the fifth transmission device/method of the present technology, the code length N is 69120 bits, and the coding rate r is 6/16 for the parity check matrix of the LDPC code, and each row and column has a predetermined puncture length L Based on the extended extended parity check matrix, LDPC encoding of information bits of information length K=N×r is performed to generate an extended LDPC code having parity bits of parity length M=N+LK. Further, the leading end of the information bit of the extended LDPC code is punctured by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 6/16. The extended parity check matrix includes a predetermined value M1, and the upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r, and the A matrix of M1 rows and M1 columns. and the B matrix of M1 rows and N+LK-M1 columns, the Z matrix which is the zero matrix adjacent to the right of said B matrix, and the N+LK-M1 rows and K+M1 columns of The puncturing includes a C matrix adjacent below the A matrix and the B matrix, and a D matrix that is a unit matrix of N + LK-M1 rows and N + LK-M1 columns and adjacent to the right of the C matrix. The length L is 1800, the predetermined value M1 is 3600, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is for the A matrix and the C matrix. A table representing the position of elements of 1 in every 360 columns,
1594 1610 4443 4633 4971 5913 7301 7706 13474 16147 16681 17638 20084 20205 20247 20540 22484 27085 28185 29116 31096 330 68 41272 41610 43034
1883 2386 4525 5861 6762 8505 10987 11467 13389 15284 15934 22445 22893 24837 26162 26697 29883 30925 35299 38596 38645 4 1614 42730 43699 44169
1048 1205 7615 12049 12746 13032 13602 14263 14911 15606 21519 26057 26528 28217 28266 29323 31302 32457 32579 34903 3510 5 36007 40006 43828 44649
1621 1937 3806 4192 4345 4436 4464 5013 7744 9969 10235 10276 10910 12816 16020 17524 20323 30904 31663 35163 35398 35957 39093 42657 44993
49 1822 3711 3892 4990 10239 12492 18990 19520 21406 24318 24612 25751 26767 30148 31680 32384 33296 34983 35934 38715 40 286 42291 42485 42998
220 302 3574 5681 9506 24907 31216 34098 36706
26 88 1979 6254 17793 31399 31963 38968 41759
571 2797 2843 10391 18284 24224 26323 35575 43222
2778 2865 3374 13146 22196 23479 29472 40894 43961
513 2641 3267 12546 22339 22592 33324 37388 43058
89 416 2750 8737 9111 19495 26529 35507 39319
1522 1795 3155 3952 19544 28293 40910 43137 44782
68 1271 2663 22635 26043 31010 37397 42214 42940
1102 1410 2026 14095 14851 19343 23303 25716 33443
2257 2649 2734 13712 40173 42230 42240 43221 44414
714 2565 2880 4450 12908 34192 35997 36455 40728
1546 3319 3372 7492 10636 16725 26425 42426 42880
41 927 2263 6416 10637 22272 29323 34364 39763
1681 2598 3263 4337 19277 28170 31112 39274 39685
1624 2266 2712 7713 10204 19680 20781 32234 32824
1839 2578 2725 4403 4475 6187 8251 15794 34791
1372 2107 2310 8695 10370 22033 31001 38223 44215
1045 2138 3259 14898 16935 20360 28114 30232 36792
2326 3271 3510 21052 22158 24249 25709 30136 35176
347 2043 2984 10440 10461 11558 18257 42040 44932
562 1425 2428 12400 14792 16918 24373 34372 44049
959 1004 2630 14983 26147 28239 28571 33730 34758
2366 3093 3321 16340 19265 26290 28817 42082 42430
1812 2687 3030 7047 13181 15320 27308 36719 39868
118 933 1127 16601 20206 28560 42837 44651 44924
411 1346 2869 4816 6186 12098 26338 28747 28842
1985 2151 2804 7754 21167 21405 29764 35907 40584
1067 1689 3513 10225 15350 17157 22215 37316 44909
1306 1452 2564 15049 24636 29181 29918 39466 44466
558 640 2085 5522 9131 12991 24658 28599 38510
971 1333 2524 5076 14312 16292 23989 28218 37668
345 1819 2012 7598 7602 10348 11079 16828 20223
206 3490 3577 7652 9484 15485 18215 32891 36012
207 2085 2818 4223 4981 18437 18907 20797 29779
1043 1602 1711 17049 26349 37701 37805 39929 44226
528 686 2519 22288 24424 26040 27266 35523 44395
974 2063 3540 23885 24211 26226 27093 33120 34243
84 689 1292 14234 17834 34458 36109 38609 44075
656 1321 1335 9564 11031 20663 28540 33454
2798 3040 3447 10523 15178 16147 17112 23143
2785 2827 3514 3648 5406 8631 21247 36454
983 2859 3241 6313 15981 16459 29725 35759
662 1428 2716 9984 19352 21403 27521 37417
1460 1582 3397 5327 14857 27868 34040 42479
116 353 3081 9834 12252 26703 28884 30421
2275 2449 2838 9493 11608 23271 38776 39806
704 1750 2835 10462 12221 28740 29710 37673
121 2008 2529 16240 19331 23089 25481 36984
1207 1650 2956 6464 10252 30913 31894 38888
1272 2513 2764 6370 8377 8517 31368 41960
1538 1761 2999 21345 26055 30346 34230 35254
1125 1822 2953 6588 14341 16087 19369 25097
60 246 1224 19668 19837 21037 26085 26484
2023 2447 3295 7065 24779 29935 31328 32089
2977 3291 3536 20569 22895 26291 28856 38257
198 1500 1594 8474 12821 24065 24273 25489
829 2542 3457 9560 9981 11130 37448 39505
2452 3433 3465 8505 30616 36656 37451 38882
1828 2189 2401 5065 14917 17648 24809 24869
1674 1760 3256 5017 12401 34198 35372 44967
329 2242 2945 3841 11713 18179 18567 30756
1134 2993 3068 8595 13252 14014 31475 44841
671 1250 2076 18266 23182 24268 32218 33106 33153 35797
532 2267 2927 8343 13630 15565 18426 25262 27191 37728
1363 2100 2454 15244 19187 23000 25655 28410 29916 33402
251 1469 2315 13593 15859 19414 26073 29034 35496 37152
112 1736 2508 5876 14259 14532 21456 35968 37533 42515
25233 26394
5080 6930
12302 41997
27483 36076
5116 36815
11841 28243
18326 37978
22431 36141
35950 40525
41824 42674
It has become.

In the fifth receiving apparatus/method of the present technology, the punctured LDPC code obtained from the data transmitted by the fifth transmission method is decoded.

In the sixth transmission device/method of the present technology, the code length N is 69120 bits, and the row and column each have a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 7/16. Based on the extended extended parity check matrix, LDPC encoding of information bits of information length K=N×r is performed to generate an extended LDPC code having parity bits of parity length M=N+LK. Further, the head of the information bit of the extended LDPC code is punctured by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 7/16. The extended parity check matrix includes a predetermined value M1, and the upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r, and the A matrix of M1 rows and M1 columns. and the B matrix of M1 rows and N+LK-M1 columns, the Z matrix which is the zero matrix adjacent to the right of said B matrix, and the N+LK-M1 rows and K+M1 columns of The puncturing includes a C matrix adjacent below the A matrix and the B matrix, and a D matrix that is a unit matrix of N + LK-M1 rows and N + LK-M1 columns and adjacent to the right of the C matrix. The length L is 2160, the predetermined value M1 is 3960, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is for the A matrix and the C matrix. A table representing the position of elements of 1 in every 360 columns,
1764 2277 5400 7275 7702 16018 16086 17361 18724 18869 19132 20243 21595 25512 26606 30134 36052 39329 41031
181 1916 4788 5993 10696 12604 13012 24557 24787 25876 26693 28545 32349 33375 35357 36872 37706 38697 40205
1627 3867 5245 5631 6206 7958 12408 14675 15078 16069 20924 24234 29887 31630 32133 34527 34618 35147 37843
1103 2230 7388 9550 10439 11627 13165 14144 18256 22833 26008 26531 28108 28741 29963 31479 31923 39255 39995
1285 2355 4577 6689 10485 12036 16455 18963 19252 23741 30895 31196 35315 36358 36604 38535 39352 40937 40994
3065 4434 5307 7286 7705 9549 9848 11017 11901 12627 17746 21303 23749 24143 25301 25977 32801 37365 38172
434 2357 3026 7873 22006 27928 31085 34076
1003 2078 2558 6023 7076 9453 23248 40783
275 2594 2879 4212 4816 24471 29358 33606
304 2655 3449 9926 16670 32754 33277 38132
657 1983 3058 14006 17331 24307 37692 38764
865 1808 3134 21758 27257 31888 37426 40019
562 1861 3800 12068 20650 30577 33391 39300
97 459 2970 5360 8808 17885 24492 36388
1655 1901 3486 3965 18266 21707 26083 39858
106 2971 3601 4603 17049 21044 24058 34168
105 2632 3687 12222 15389 17985 18580 24844
1067 1887 3012 11816 23805 27159 31152 32102
412 3506 3688 11340 12998 28025 30295 32802
884 2933 3112 19905 33377 35257 38730 39998
3709 3756 3774 7360 10333 13454 15712 24711
58 2494 2959 6474 10296 20685 26935 36360
1854 2850 3654 4678 18001 28593 35963 36270
1830 2363 2518 7949 10035 18345 29534 31920
1646 2020 2811 4203 4779 6289 30475 32063
465 1178 2986 18151 20386 25654 27386 40357
640 2615 3354 8542 14478 25967 25995 37471
1082 1285 3179 18952 26721 27915 37670 40010
1737 1976 2546 7547 20613 23824 25055 32654
741 1013 3328 9668 9749 17082 38386 40974
1268 1476 2671 11835 14049 22600 31513 40179
1045 1108 2992 14156 23244 24154 31043 31798
2421 2602 3798 15389 17884 24140 35871 38752
819 2169 2955 14408 22625 25191 35170 36437
334 922 3167 5119 13570 15530 39099 41014
1221 1589 2395 8195 17835 24255 33626 40708
860 2308 2450 5038 6315 23489 26114 32851
406 1679 3105 14968 19909 27383 37072 40206
633 1863 1959 14480 16090 18913 34193 41012
1488 1699 2837 14716 22731 26859 27454 35998
700 1266 2120 5664 24568 24724 31262 35236
900 1067 2778 5274 15361 17755 22211 33252
1025 2008 2182 7489 7536 15899 18803 24702
383 648 716 5156 6037 9277 30214 38571
389 1155 2887 6102 17079 19192 23080 32918
1471 1635 2511 4547 5272 14725 20498 21659
2171 3539 3896 9346 9694 10999 15963 34494
1994 2216 2771 20692 24115 32560 37794 40140
1080 2162 2696 21197 22485 25015 30419 31363
97 755 1419 13499 16636 31603 35313 40181
1469 1655 3110 9088 10592 17584 19236 26283
2952 3076 3849 10157 14317 15196 16053 35195
1861 3105 3862 3994 5564 6074 8451 19756
3145 3155 3597 14101 15059 15459 27355 32750
259 873 3006 18016 18676 19887 25385 34337
613 1595 3868 5572 14023 20249 31223 38780
200 3129 3397 7639 9614 11741 26530 28039
2223 2694 3117 9231 11140 21370 27439 35476
779 1905 3630 11778 26510 27390 33035 34468
137 624 2206 15239 18045 21398 23580 29951
1327 1763 3312 6477 9861 28455 34353 35567
2717 2763 3044 8185 8380 17045 28844 38259
265 1105 3295 22148 24070 27939 31377 32371
1785 2042 3249 6558 15036 15184 18135 23151
271 1032 1352 4622 18315 19571 24142 24376
2392 2686 3656 7062 22999 24868 27626 28882
2726 3295 3893 19111 21109 26599 35039 37863
1650 1757 2170 5928 12800 22404 22521 23554
474 912 2810 9299 9649 34316 36020 39568
721 3776 3815 8297 28150 29224 33574 35496
2009 2400 3282 14124 16587 22933 22980 28722
132 1845 3587 11790 22121 31459 32442 40951
142 361 1061 4265 11230 16948 17367 27128
1250 2600 3374 8456 12596 28890 34813 40879
738 1025 1617 17079 22449 25340 30369 32737
1876 2731 2841 9438 17215 23350 27295 34083
453 1144 3263 12936 18049 25084 25595 29278
2369 2850 2997 6628 14441 17901 21329 23717
1671 2580 3055 12903 14917 24143 26800 33983
1516 1907 2756 5106 13479 13748 32931
1708 3245 3727
216 2078 2179
137 316 3665
834 2278 3108
5345 33686
11281 26022
17244 34746
20829 33069
32952 37029
38235 38952
12779 36842
5081 34190
8352 9285
37937 39131
21873 26915
It has become.

In the sixth receiving apparatus/method of the present technology, the punctured LDPC code obtained from data transmitted by the sixth transmission method is decoded.

In the seventh transmission device/method of the present technology, the code length N is 69120 bits, and the row and column each have a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 8/16. Based on the extended extended parity check matrix, LDPC encoding of information bits of information length K=N×r is performed to generate an extended LDPC code having parity bits of parity length M=N+LK. Furthermore, the leading end of the information bit of the extended LDPC code is punctured by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 8/16. The extended parity check matrix includes a predetermined value M1, and the upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r, and the A matrix of M1 rows and M1 columns. and the B matrix of M1 rows and N+LK-M1 columns, the Z matrix which is the zero matrix adjacent to the right of said B matrix, and the N+LK-M1 rows and K+M1 columns of The puncturing includes a C matrix adjacent below the A matrix and the B matrix, and a D matrix that is a unit matrix of N + LK-M1 rows and N + LK-M1 columns and adjacent to the right of the C matrix. The length L is 2520, the predetermined value M1 is 5040, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is for the A matrix and the C matrix. A table representing the position of elements of 1 in every 360 columns,
2184 2245 5483 5692 9320 18011 18064 18150 20189 23469 23662 25407 28189 35779 37071
1855 3613 5755 7904 12491 14272 19654 22065 22316 23975 24503 26458 29567 34455 35556
928 4740 6537 8736 9455 16185 18167 22537 22768 26005 32031 32179 33566 34966 35808
3986 4696 5295 8034 12188 12339 14298 19661 22499 22837 28343 29201 30056 36868 36872
1049 2606 9166 13000 17407 22535 24035 24090 26423 27147 28104 29196 34765 36183 36195
2475 2705 6586 10659 14652 15858 18555 22635 25610 26796 32144 33131 35581 37072
1339 1594 5556 5731 5735 7423 7924 8287 10173 21406 26174 26965 30831 35028
2095 2692 4542 11957 16923 21339 22995 35510
753 3913 4481 24115 25745 28475 29334 34983
531 2404 4091 6823 7730 13085 21741 25943
764 2602 5000 5777 6649 28284 28457 30648
173 2884 3453 7716 16017 26720 33781 34558
804 3989 4026 10353 16302 20995 22614 29946
1369 1438 4721 11804 19454 24989 29745 33895
2413 3865 4900 9605 12227 19796 34068 35639
2280 3614 3994 5794 8725 17288 29042 32667
189 729 2807 18569 20422 29775 33106 35601
13 1942 3075 5647 16437 28792 33944 36951
2322 2774 4133 14911 23058 26276 35482 36145
1156 1915 1988 13753 20275 22750 28129 28615
1027 3254 3826 12792 25306 33398 34900 36579
1000 3662 3934 12247 28784 30051 30448 34971
2208 4777 4895 7995 15270 34546 35050 35465
865 1301 2776 5447 7236 25204 28825 33009
931 2280 3123 18312 20000 26379 29091 35547
161 313 1976 10118 19510 24067 25236 29200
495 2033 3478 18349 21388 27692 27945 29298
40 123 466 8627 14489 23804 25266 29217
1919 2239 5036 9020 10230 13401 26202 31868
2984 2990 4559 13817 15317 17982 24664 30694
4263 4578 4900 18514 19432 21056 22195 25540
486 2865 4044 10378 16367 19558 31611 37057
773 785 4692 13690 15318 17028 26614 28889
1128 2525 4918 13514 14018 21695 28403 28447
1378 2785 3945 19557 24360 26125 32618 35109
1622 2734 4728 21208 22587 28908 32086 34795
1490 2885 4429 7668 12440 13368 15096 30591
157 4782 5028 7007 8693 14921 17912 24354
1887 2821 4004 5990 7023 11617 23891 31527
2659 3026 3929 8247 18589 18766 25496 30000
1493 4505 4919 10166 15487 19375 20018 37009
1459 2038 4184 13922 16641 25405 27889 36692
2552 3118 4424 10018 10774 20992 21805 22999
1575 3751 4248 12315 13683 16910 20849 27503
169 1552 4011 8140 13348 21198 22677 22961
485 1610 2021 6883 8078 10259 10833 36872
717 3562 4705 8210 14216 16365 30074 30100
284 2060 2603 5600 6111 16526 16904 25280
1464 2306 2405 15402 22597 31453 33154 36507
793 858 958 19518 21177 22969 27465 34316
2755 4039 4916 13740 21014 22548 23393 27868
2346 2859 3724 5804 11163 13257 16059 16537
3034 3827 4257 10753 10848 16863 17910 30215
699 2077 3036 14789 28159 29959 32060 35741
842 1479 1651 8903 20126 29843 30172 36359
60 216 2154 13804 29952 30425 30451 33882
1561 2138 3179 7117 10997 17696 18819 29502
1929 2926 4119 6462 9997 17945 19143 35222
1408 3721 4733 6077 8220 23897 24532 32454
758 1062 3265 22844 25290 26795 30309 32198
723 974 2366 11325 11639 20444 30190 33000
3057 3184 4157 6124 10032 14829 22920 27535
1908 2681 3314 10175 15746 19286 30891 31312
337 3329 4284 16428 26550 26938 27394 29675
601 626 4671 7188 18716 20787 25752 31716
2736 3729 3853 14610 18790 21261 31327
1514 1926 2616 7216 7346 13375 15951
385 2731 2776 17442 17618 18488 26842
2847 3447 4837 7730 21494 25421 27060
4167 4675 4950 18125 19852 24594 31885
2100 2258 2839 6788 12190 20838 22037
598 1160 2512 9977 27667 31266 35818
726 918 4356 25915 26856 35644 35900
603 4023 4286 21322 24461 26414 31230
1378 1712 2601 6187 19972 21466 33990
2477 3873 5026 6147 11847 28736 31098
458 983 3395 5246 16300 16685 26054
1591 4194 4296 8941 12584 26579 36950
956 1266 1722 21007 23498 27878 29947
1791 2382 3477 27827
753 1172 3171 21799
577 1793 4156 14329
1221 1909 2872 23737
3201 3437 3627 24180
1422 2384 2680 17127
350 2057 3244 29775
1494 3096 4085 12712
1925 2736 3505 20471
167 1300 1330 30100
2178 4141 4741 6802
169 2635 2776 7608
1061 3955 4667 23473
185 995 4044 24130
1792 2284 4178 30200
3947 4503 4756 34653
1198 4107 4470 5969
9656
8810
34388
35438
20498
24839
23256
9966
25861
11305
7639
21600
13763
25619
It has become.

In the seventh receiving apparatus/method of the present technology, the punctured LDPC code obtained from the data transmitted by the seventh transmission method is decoded.

In the eighth transmission device/method of the present technology, the code length N is 69120 bits, and the row and column each have a predetermined puncture length L for the parity check matrix of the LDPC code with the coding rate r of 9/16. Based on the extended extended parity check matrix, LDPC encoding of information bits of information length K=N×r is performed to generate an extended LDPC code having parity bits of parity length M=N+LK. Furthermore, the head of the information bit of the extended LDPC code is punctured by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 9/16. The extended parity check matrix includes a predetermined value M1, and the upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r, and the A matrix of M1 rows and M1 columns. and the B matrix of M1 rows and N+LK-M1 columns, the Z matrix which is the zero matrix adjacent to the right of said B matrix, and the N+LK-M1 rows and K+M1 columns of The puncturing includes a C matrix adjacent below the A matrix and the B matrix, and a D matrix that is a unit matrix of N + LK-M1 rows and N + LK-M1 columns and adjacent to the right of the C matrix. The length L is 1800, the predetermined value M1 is 9000, the A matrix and the C matrix are represented by a parity check matrix initial value table, and the parity check matrix initial value table is for the A matrix and the C matrix. A table representing the position of elements of 1 in every 360 columns,
3681 3750 3985 4255 8583 9468 12078 12353 15700 16492 17127 18174 18264 22392 23070 25263 29195 32034
804 4119 5315 5489 8261 9514 10099 10268 14359 16861 21050 21439 23880 24274 26637 30518 30944 31195
3684 4224 4412 7772 8017 10100 12529 15888 16518 18089 19685 28054 28297 28345 28897 29827 30402 31794
2013 2073 4993 6278 6716 10271 13971 14141 14727 17892 21649 22734 24394 25979 26485 30156 30617 31322
671 4057 4827 6795 8726 11791 15912 16773 16823 21296 24678 28589 29419 30212 30976 31701 32035
2831 3625 4812 9421 10678 11313 11919 13859 24185 26543
105 197 4569 12767 18835 20708 21307 21922 29762 30542
1939 3334 7927 12368 22520 24007 25355 26414 27639 30526
935 4228 7324 10281 10930 14811 20832 21012 24721 31868
451 1279 6541 9174 9524 23917 24447 24765 27400 30105
596 3093 7695 12690 12805 20513 26844 26874 27238 30238
3165 4948 8257 13864 15261 19334 23340 27303 29834 30592
4311 6608 8867 12314 17011 19562 29621 29653 29867 31831
246 1043 4063 9880 12133 14403 17673 21772 26756 28865
3800 4310 7891 9005 17892 22752 29776 30960 31922
169 3202 6707 9267 19608 21494 24264 27783 30896
2756 3526 5061 14144 15208 17722 19974 23683 25622
5640 6672 8062 10253 14587 17029 23586 29354 30935
1780 6399 7013 13407 14129 26025 27047 27302 28430
3867 8295 8448 11173 12961 16355 23417 30645 30840
114 2303 5658 10578 12954 19396 23278 26133 29150
4205 6484 8154 9468 9855 17738 25225 28855 29327
4064 5671 6785 11073 12684 17900 18543 24915 25278
4591 6432 6812 9172 9497 10443 11612 15805 26385
3429 5317 5699 11875 12763 19252 24194 28715 31645
2334 5348 8140 15322 16398 18377 22674 23119 27452
5806 8178 8750 18695 19361 20500 21337 23747 26594
868 5108 7470 12695 12827 13362 17150 30388 32036
1401 3377 6069 13887 15223 16423 20548 26114 31525
2388 2511 6647 15288 20979 21546 22893 25768 26293
5918 7740 8309 16069 17648 21533 21638 30421 30592
4531 6710 7575 10870 14321 15801 22289 27422 29206
282 2349 2823 16122 18235 22889 30845 31790 32028
1028 3364 7170 9696 10463 13676 21633 22408 22987
4747 5376 7037 11344 18790 18904 23562 26963 29547
2666 4221 8779 12684 15548 16845 19631 27773 32000
3277 3636 6417 15359 20686 23258 23607 28911 31760
1394 1613 4705 10030 14240 20469 21907 25971 28392
2428 3334 6308 9823 14969 16081 20361 21680 27204
870 4539 5033 11210 11227 12757 13164 16363 18278
519 8424 8966 11266 12282 15631 17138 25283 27009
562 4648 7031 9367 9769 17258 17524 18469 23544
2607 4017 4276 12525 16477 21617 28004 29179 31638
1311 1705 6279 19425 20643 21524 21927 26759 30022
2440 5160 8827 19724 20470 21579 22088 25426 26076
247 1718 3238 15685 16926 26381 27070 28504 31522
1646 3308 3325 12196 13145 18495 22879 25613 31074
2777 6991 7582 12852 15441 16518 19845 27107 31491
24 1098 6964 10014
3834 7138 8104 27290
2467 2695 6985 23538
597 1655 2786 26365
3412 3568 3869 22313
1378 3631 7350 30759
396 2426 3965 30636
294 5276 6622 28723
889 5479 5831 13814
1355 5011 7082 24636
1737 5683 7638 12279
4248 4328 7871 13506
1867 5466 7068 23531
1400 5020 7410 9775
2727 3409 6324 21177
4027 4240 7262 16737
1442 7380 7650 24201
601 6169 6278 26698
1070 3198 6038 11626
616 3835 8339 28168
4424 5809 6656 26638
3857 4561 4879 27896
2696 2722 4665 17776
643 2333 3072 10579
232 4876 4956 18710
3486 3535 6104 29906
774 5073 6030 23656
4617 6194 7445 31653
4163 5489 8227 28295
3675 3991 4940 18635
496 2003 4758 20333
1062 2059 4493 25301
1380 7374 8642 28926
1294 1639 8662 30961
5866 6147 7653 11713
5458 7184 7361 20695
2463 4602 6018 16857
320 4682 8140 19724
4410 6923 8975 26037
306 1921 7301 11104
57 1768 5604 17338
2839 3153 5912 28608
1091 6051 7495 31918
1681 2099 2259 16924
4490 5186 6994 25446
3188 4252 6208 25437
1342 5660 7305 21071
1048 3204 7421 15675
2197 3412 5125 22484
5721 6143 6479 22800
2531 4216 4794 17691
628 3665 5783 26756
2660 5527 7289 14552
3432 4895 6255 20101
288 2324 2375 27024
3898 7386 8459 10265
301 4717 4972 10844
1895 7065 8334 22255
331 1779 7214 22726
3202 4096 7467 27090
27017
29554
30755
30289
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29460
27770
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30095
30852
20107
23269
22090
12537
23969
13527
10911
20907
15272
23822
31661
13732
21787
It has become.

In the eighth receiving apparatus/method of the present technology, the punctured LDPC code obtained from the data transmitted by the eighth transmission method is decoded.

The transmitting device and the receiving device may be independent devices, or may be internal blocks forming one device.

According to the present technology, it is possible to ensure good communication quality in data transmission using LDPC codes.

Note that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

FIG. 3 is a diagram for explaining parity check matrix H of an LDPC code; 10 is a flowchart for explaining the decoding procedure of an LDPC code; FIG. 4 is a diagram showing an example of a parity check matrix of an LDPC code; It is a figure which shows the example of the Tanner graph of a parity check matrix. FIG. 10 is a diagram showing an example of a variable node; FIG. FIG. 4 is a diagram showing an example of check nodes; 1 is a diagram illustrating a configuration example of an embodiment of a transmission system to which the present technology is applied; FIG. 2 is a block diagram showing a configuration example of a transmission device 11; FIG. 3 is a block diagram showing a configuration example of a bit interleaver 116; FIG. It is a figure which shows the example of a parity check matrix. FIG. 4 is a diagram showing an example of a parity matrix; FIG. 2 is a diagram illustrating a parity check matrix of an LDPC code stipulated in the DVB-T.2 standard; FIG. 2 is a diagram illustrating a parity check matrix of an LDPC code stipulated in the DVB-T.2 standard; FIG. 10 is a diagram showing an example of a Tanner graph for decoding an LDPC code; FIG. 3 is a diagram showing an example of a parity matrix H _T having a staircase structure and a Tanner graph corresponding to the parity matrix H _T ; FIG. 4 is a diagram showing an example of parity matrix H _T of parity check matrix H corresponding to an LDPC code after parity interleaving; 4 is a flowchart illustrating an example of processing performed by a bit interleaver 116 and a mapper 117; 3 is a block diagram showing a configuration example of an LDPC encoder 115; FIG. 4 is a flowchart for explaining an example of processing of the LDPC encoder 115; FIG. 10 is a diagram showing an example of a parity check matrix initial value table with a coding rate of 1/4 and a code length of 16200; FIG. 10 is a diagram illustrating a method of obtaining a parity check matrix H from a parity check matrix initial value table; It is a figure which shows the structure of a parity check matrix. It is a figure which shows the example of a parity check matrix initial value table. FIG. 10 is a diagram illustrating an A matrix generated from a parity check matrix initial value table; FIG. 10 is a diagram illustrating parity interleaving of a B matrix; FIG. 4 is a diagram illustrating a C matrix generated from a check matrix initial value table; FIG. 4 is a diagram explaining parity interleaving of a D matrix; FIG. 10 is a diagram showing a parity check matrix that has been subjected to column permutation as parity deinterleaving for restoring parity interleaving. FIG. 4 is a diagram showing a transformed parity check matrix obtained by performing row permutation on a parity check matrix; FIG. 10 is an example of a Tanner graph for an ensemble of degree sequences with a column weight of 3 and a row weight of 6; FIG. 10 is a diagram showing an example of a Tanner graph of a multi-edge type ensemble; FIG. 4 is a diagram showing an example of coordinates of UC signal points when the modulation scheme is QPSK; FIG. 10 is a diagram showing an example of coordinates of signal points of a 2D-NUC when the modulation scheme is 16QAM; FIG. 4 is a diagram showing an example of coordinates of signal points of a 1D-NUC when the modulation scheme is 1024QAM; FIG. 4 is a diagram showing the relationship between a 1024QAM symbol y and a position vector u. FIG. 4 is a diagram showing an example of coordinates z _q of signal points in QPSK-UC; FIG. 4 is a diagram showing an example of coordinates z _q of signal points in QPSK-UC; FIG. 4 is a diagram showing an example of coordinates z _q of signal points in 16QAM-UC; FIG. 4 is a diagram showing an example of coordinates z _q of signal points in 16QAM-UC; FIG. 10 is a diagram showing an example of coordinates z _q of signal points in 64QAM-UC; FIG. 10 is a diagram showing an example of coordinates z _q of signal points in 64QAM-UC; FIG. 4 is a diagram showing an example of coordinates z _q of signal points of 256QAM-UC; FIG. 4 is a diagram showing an example of coordinates z _q of signal points of 256QAM-UC; FIG. 10 is a diagram showing an example of coordinates z _q of signal points of 1024QAM-UC; FIG. 10 is a diagram showing an example of coordinates z _q of signal points of 1024QAM-UC; FIG. 10 is a diagram showing an example of coordinates z _q of signal points of 4096QAM-UC; FIG. 10 is a diagram showing an example of coordinates z _q of signal points of 4096QAM-UC; FIG. 10 is a diagram showing an example of coordinates _zs of signal points of 16QAM-2D-NUC; FIG. 10 is a diagram showing an example of coordinates _zs of signal points of 64QAM-2D-NUC; FIG. 10 is a diagram showing an example of coordinates _zs of signal points of 256QAM-2D-NUC; FIG. 10 is a diagram showing an example of coordinates _zs of signal points of 256QAM-2D-NUC; FIG. 10 is a diagram showing an example of coordinates _zs of signal points of 1024QAM-1D-NUC; FIG. 4 is a diagram showing the relationship between a 1024QAM symbol y and a position vector u. FIG. 10 is a diagram showing an example of coordinates _zs of signal points of 4096QAM-1D-NUC; FIG. 4 is a diagram showing the relationship between a 4096QAM symbol y and a position vector u. FIG. 4 is a diagram showing the relationship between a 4096QAM symbol y and a position vector u. 4 is a diagram for explaining block interleaving performed by a block interleaver 25; FIG. 4 is a diagram for explaining block interleaving performed by a block interleaver 25; FIG. 4 is a diagram for explaining group-wise interleaving performed by a group-wise interleaver 24; FIG. FIG. 10 is a diagram showing an example of a GW pattern for an LDPC code with a code length N of 69120 bits; 2 is a block diagram showing a configuration example of a receiving device 12; FIG. 3 is a block diagram showing a configuration example of a bit deinterleaver 165; FIG. FIG. 10 is a flowchart illustrating an example of processing performed by a demapper 164, a bit deinterleaver 165, and an LDPC decoder 166; FIG. FIG. 4 is a diagram showing an example of a parity check matrix of an LDPC code; FIG. 10 is a diagram showing an example of a matrix (transformed parity check matrix) obtained by subjecting a parity check matrix to row permutation and column permutation; It is a figure which shows the example of the conversion check matrix divided|segmented into 5x5 units. FIG. 4 is a block diagram showing a configuration example of a decoding device that performs P node operations collectively; 3 is a block diagram showing a configuration example of an LDPC decoder 166; FIG. 4 is a diagram for explaining block deinterleaving performed by a block deinterleaver 54; FIG. FIG. 12 is a block diagram showing another configuration example of the bit deinterleaver 165; 1 is a block diagram showing a first configuration example of a reception system to which a reception device 12 can be applied; FIG. FIG. 4 is a block diagram showing a second configuration example of a receiving system to which the receiving device 12 is applicable; FIG. 11 is a block diagram showing a third configuration example of a receiving system to which the receiving device 12 is applicable; FIG. 2 is a diagram explaining a punctured LDPC code; FIG. 4 is a diagram illustrating the structure of an extended parity check matrix of a type A scheme that encodes K-bit information bits into an N+L-bit extended LDPC code; FIG. 3 is a diagram illustrating the structure of an extended parity check matrix of a type B scheme that encodes K-bit information bits into an N+L-bit extended LDPC code; FIG. 10 is a flowchart illustrating an example of processing (encoding processing) of the LDPC encoder 115 when a punctured LDPC code with a code length of N=69120 is used for data transmission. FIG. FIG. 13 is a flowchart illustrating an example of processing (decoding processing) of the LDPC decoder 166 when a punctured LDPC code with a code length of N=69120 is used for data transmission; FIG. FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,2/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,2/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,3/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,3/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,4/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,4/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,5/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,5/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k, 6/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k, 6/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,7/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,7/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,7/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,8/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,8/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,8/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,9/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,9/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,9/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of a type A extended LDPC code for (69k,9/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k,9/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k,9/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k,9/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 10/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 10/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 10/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 10/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 11/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 11/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 11/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 11/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k,12/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k,12/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k,12/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k,12/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 13/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 13/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 13/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 13/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 14/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 14/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 14/16); FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of a type B extended LDPC code for (69k, 14/16); FIG. 4 is a diagram for explaining column weights of a type A extended parity check matrix represented by a parity check matrix initial value table of the type A scheme; FIG. 10 is a diagram showing parameters of a type A extended parity check matrix represented by a parity check matrix initial value table of the type A scheme; FIG. 4 is a diagram for explaining column weights of a type B extended parity check matrix represented by a parity check matrix initial value table of the type B scheme; FIG. 10 is a diagram showing parameters of a type B extended parity check matrix represented by a parity check matrix initial value table of the type B scheme; 1 is a block diagram showing a configuration example of an embodiment of a computer to which the present technology is applied; FIG.

Hereinafter, embodiments of the present technology will be described, but before that, LDPC codes will be described.

<LDPC code>

Note that the LDPC code is a linear code and does not necessarily have to be binary, but here it will be described as being binary.

The LDPC code is most characterized in that the parity check matrix defining the LDPC code is sparse. Here, a sparse matrix is a matrix in which the number of "1"s in matrix elements is very small (a matrix in which most of the elements are 0).

FIG. 1 is a diagram showing an example of parity check matrix H of an LDPC code.

In the parity check matrix H of FIG. 1, the weight of each column (column weight) (the number of "1"s) is "3", and the weight of each row (row weight) is "6". .

In coding by LDPC code (LDPC coding), for example, a generator matrix G is generated based on parity check matrix H, and by multiplying binary information bits by this generator matrix G, a codeword (LDPC code ) is generated.

Specifically, an encoding device that performs LDPC encoding first calculates a generator matrix G that satisfies the formula G ^T =0 between the parity check matrix H and the transposed matrix H ^T . Here, when the generator matrix G is a K×N matrix, the encoding device multiplies the generator matrix G by a bit string of information bits (vector u) consisting of K bits to obtain a code consisting of N bits. Generate the word c(=uG). A codeword (LDPC code) generated by this encoding device is received by the receiving side via a predetermined communication channel.

The decoding of the LDPC code is an algorithm proposed by Gallager called Probabilistic Decoding, which consists of a variable node (also called a message node) and a check node. can be done by a message passing algorithm by belief propagation on a so-called Tanner graph. Here, hereinafter, the variable node and the check node are also simply referred to as nodes as appropriate.

FIG. 2 is a flow chart showing the procedure for decoding an LDPC code.

Hereinafter, a real value (receiving LLR ) is also called the received value u _0i . Let u _j be the message output from the check node, and v _i be the message output from the variable node.

First, in the decoding of the LDPC code, as shown in FIG. 2, in step S11, the LDPC code is received, the message (check node message) u _j is initialized to "0", and as a counter for the iterative process is initialized to "0", and the process proceeds to step S12. In step S12, the message (variable node message) v _i is obtained by performing the calculation (variable node calculation) shown in Equation (1) based on the received value u _0i obtained by receiving the LDPC code, and further, Based on this message v _i , message u _j is obtained by performing the operation (check node operation) shown in Equation (2).

・・・（１）

... (1)

・・・（２）

... (2)

Here, d _v and d _c in equations (1) and (2) can be arbitrarily selected to indicate the number of “1”s in the vertical direction (column) and the horizontal direction (row) of parity check matrix H, respectively. parameter. For example, in the case of an LDPC code ((3,6) LDPC code) for parity check matrix H with a _column weight of 3 and a _row weight of 6 as shown in FIG. Become.

In addition, in the variable node calculation of formula (1) and the check node calculation of (2), the message input from the edge (the line connecting the variable node and the check node) to output the message is is not subject to calculation, the range of calculation is 1 to d _v -1 or 1 to d _c -1. In addition, the check node operation of formula (2) actually creates in advance a table of function R(v ₁ , v ₂ ) shown in formula (3) defined by one output for two inputs v ₁ and v ₂ . This is done by continuously (recursively) using this as shown in equation (4).

・・・（３）

... (3)

・・・（４）

... (4)

In step S12, the variable k is incremented by "1", and the process proceeds to step S13. In step S13, it is determined whether or not the variable k is greater than a predetermined iterative decoding number C. If it is determined in step S13 that the variable k is not greater than C, the process returns to step S12, and the same processing is repeated thereafter.

If it is determined in step S13 that the variable k is greater than C, the process proceeds to step S14, where the message v _i as the decoding result to be finally output is obtained by performing the calculation shown in equation (5). is output, and the decoding process of the LDPC code ends.

・・・（５）

... (5)

Here, the computation of equation (5) is performed using messages u _j from all branches connected to the variable node, unlike the variable node computation of equation (1).

FIG. 3 is a diagram showing an example of parity check matrix H of (3,6) LDPC code (coding rate ½, code length 12).

In the parity check matrix H of FIG. 3, the column weight is 3 and the row weight is 6, as in FIG.

FIG. 4 is a diagram showing a Tanner graph of the parity check matrix H of FIG.

Here, in FIG. 4, a check node is represented by a plus "+", and a variable node is represented by an equals "=". A check node and a variable node correspond to rows and columns of the parity check matrix H, respectively. A connection between the check node and the variable node is an edge, which corresponds to the element "1" of the parity check matrix.

That is, when the element of the j-th row and i-th column of the parity check matrix is 1, in FIG. +" nodes) are connected by branches. A branch indicates that a code bit corresponding to a variable node has a constraint condition corresponding to a check node.

In the Sum Product Algorithm, which is a decoding method for LDPC codes, variable node operations and check node operations are repeatedly performed.

FIG. 5 is a diagram showing variable node operations performed at variable nodes.

At the variable node, the message v _i corresponding to the branch to _be calculated is the message u ₁ and u ₂ from the remaining branches connected to the variable node and the variable node Calculated by calculation. Messages corresponding to other branches are similarly sought.

FIG. 6 is a diagram showing check node operations performed at check nodes.

Here, the check node operation of formula (2) uses the relation of formula a×b=exp{ln(|a|)+ln(|b|)}×sign(a)×sign(b), Equation (6) can be rewritten. However, sign(x) is 1 when x≧0 and -1 when x<0.

・・・（６）

... (6)

When x≧0, when the function φ(x) is defined as the formula φ(x)=ln(tanh(x/2)), the formula φ ^-1 (x)=2tanh ^-1 (e ^-x ) holds. , equation (6) can be transformed into equation (7).

・・・（７）

... (7)

At the check node, the check node operation of equation (2) is performed according to equation (7).

That is, at the check node, as shown in FIG. 6, the message u _j corresponding to the branch to be calculated is the messages v ₁ , v ₂ , v ₃ , v ₄ , v from the remaining branches connected to the check node. It is obtained by the check node operation of equation (7) using ₅ . Messages corresponding to other branches are similarly sought.

Note that the function φ(x) in Equation (7) can be expressed by the formula φ(x)=ln((e ^x +1)/(e ^x -1)), and when x>0, φ(x )=φ ⁻¹ (x). When the functions φ(x) and φ ⁻¹ (x) are implemented in hardware, they may be implemented using a LUT (Look Up Table), but both are the same LUT.

<Configuration example of transmission system to which this technology is applied>

FIG. 7 shows an example of a transmission system to which the present technology is applied (a system refers to an entity in which a plurality of devices are logically aggregated, and it does not matter whether or not devices of each configuration are in the same housing). It is a figure which shows the structural example of embodiment.

In FIG. 7, the transmission system is composed of a transmitter 11 and a receiver 12 .

The transmission device 11 transmits (broadcasts) (transmits), for example, television broadcast programs. That is, the transmitting device 11 encodes target data to be transmitted, such as image data and audio data as a program, into an LDPC code, for example, a satellite line, a terrestrial wave, a cable (wired line), etc. It transmits via the communication channel 13 .

The receiving device 12 receives the LDPC code transmitted from the transmitting device 11 via the communication channel 13, decodes it into target data, and outputs the decoded data.

Here, it is known that the LDPC code used in the transmission system of FIG. 7 exhibits extremely high performance in an AWGN (Additive White Gaussian Noise) channel.

On the other hand, the communication path 13 may generate burst errors or erasures. For example, especially when the communication channel 13 is a terrestrial wave, in an OFDM (Orthogonal Frequency Division Multiplexing) system, D/U (Desired to Undesired Ratio) is 0 dB (Undesired = echo power is equal to Desired = main path power) ), depending on the delay of the echo (paths other than the main path), the power of a particular symbol may be erasured.

Also, even in flutter (a communication channel where echo with a delay of 0 and a Doppler frequency is added), if the D/U is 0 dB, the Doppler frequency will change the OFDM at a specific time. There are cases where the power of the entire symbol is erasure.

Furthermore, due to the wiring situation from the reception unit (not shown) such as an antenna that receives the signal from the transmission device 11 to the reception device 12 on the reception device 12 side, and the unstable power supply of the reception device 12, burst errors may occur.

On the other hand, in the decoding of the LDPC code, as shown in _FIG . Since the variable node operation of equation (1) is performed with addition, if an error occurs in the sign bit used in the variable node operation, the accuracy of the desired message is reduced.

Then, in the decoding of the LDPC code, at the check node, the check node operation of Equation (7) is performed using the message obtained at the variable node connected to the check node, so that the multiple connected variable nodes ( If the number of check nodes in which the code bits of the LDPC code corresponding to ) are simultaneously in error (including erasures), the decoding performance deteriorates.

That is, for example, if two or more of the variable nodes connected to the check node become erasure at the same time, the check node sends a message with the same probability that the value is 0 and that the value is 1. return. In this case, the check nodes that return messages with equal probability do not contribute to one decoding process (one set of variable node operations and check node operations), and as a result, the number of iterations of the decoding process is increased. As a result, the decoding performance deteriorates, and the power consumption of the receiving device 12 that decodes the LDPC code increases.

Therefore, in the transmission system of FIG. 7, it is possible to improve resistance to burst errors and erasures while maintaining the performance of the AWGN channel (AWGN channel).

<Configuration example of transmission device 11>

FIG. 8 is a block diagram showing a configuration example of the transmission device 11 of FIG.

In the transmitting device 11 , one or more input streams (Input Streams) as target data are supplied to a mode adaptation/multiplexer (Mode Adaptation/Multiplexer) 111 .

Mode adaptation/multiplexer 111 performs processing such as mode selection and multiplexing of one or more input streams supplied thereto as necessary, and supplies the resulting data to padder 112. .

Pader 112 performs the necessary zero padding (null insertion) on the data from mode adaptation/multiplexer 111 and supplies the resulting data to BB Scrambler 113 .

A BB scrambler 113 applies BB scrambling (Base-Band Scrambling) to the data from the padder 112 and supplies the resulting data to a BCH encoder (BCH encoder) 114 .

The BCH encoder 114 BCH-encodes the data from the BB scrambler 113 and supplies the resulting data to an LDPC encoder 115 as LDPC target data to be LDPC-encoded.

The LDPC encoder 115 performs LDPC encoding on the LDPC target data from the BCH encoder 114, for example, according to a check matrix in which the parity matrix, which is a part corresponding to the parity bits of the LDPC code, has a dual diagonal structure. and outputs an LDPC code with the LDPC target data as information bits.

That is, the LDPC encoder 115 converts the LDPC target data to a predetermined standard such as DVB-S.2, DVB-T.2, DVB-C.2, ATSC 3.0 (in the check matrix (Corresponding) LDPC code, LDPC encoding for encoding into other LDPC codes is performed, and the resulting LDPC code is output.

Here, the LDPC code specified in the DVB-S.2 and ATSC3.0 standards and the LDPC code to be adopted in ATSC3.0 are IRA (Irregular Repeat Accumulate) codes, and the check matrix of the LDPC code (Part or all of) the parity matrix in has a staircase structure. A parity matrix and a staircase structure will be described later. For IRA codes, see, for example, "Irregular Repeat-Accumulate Codes," H. Jin, A. Khandekar, and R. J. McEliece, in Proceedings of 2nd International Symposium on Turbo codes and Related Topics, pp. 1-8, Sept. 2000.

The LDPC code output by the LDPC encoder 115 is supplied to a bit interleaver 116 .

The bit interleaver 116 performs bit interleaving, which will be described later, on the LDPC code from the LDPC encoder 115 , and supplies the LDPC code after the bit interleaving to the mapper 117 .

The mapper 117 maps the LDPC code from the bit interleaver 116 to a signal point representing one symbol of orthogonal modulation in units of one or more code bits (symbol units) of the LDPC code, thereby performing orthogonal modulation (multiple modulation). value modulation).

That is, the mapper 117 converts the LDPC code from the bit interleaver 116 onto a constellation that is an IQ plane defined by the I-axis representing the I component in phase with the carrier and the Q-axis representing the Q component orthogonal to the carrier. are mapped to the signal points determined by the modulation scheme for orthogonal modulation of the LDPC code, and orthogonal modulation is performed.

When the number of signal points of the constellation used in the orthogonal modulation method performed by the mapper 117 is 2 ^m , the mapper 117 uses m code bits of the LDPC code as a symbol (1 symbol), The LDPC code from bit interleaver 116 is mapped on a symbol-by-symbol basis to a signal point representing a symbol among the 2 ^m signal points.

Here, as the modulation method of the quadrature modulation performed by the mapper 117, for example, the modulation method stipulated in the DVB-S.2 or ATSC3.0 standards, or other modulation method, that is, for example, BPSK (Binary Phase Shift Keying), QPSK (Quadrature Phase Shift Keying), 8PSK (Phase-Shift Keying), 16APSK (Amplitude Phase-Shift Keying), 32APSK, 16QAM (Quadrature Amplitude Modulation), 16QAM, 64QAM, 256QAM, 1024QAM, 4096QAM, 4PAM (Pulse Amplitude Modulation), etc. Which modulation scheme is to be used for quadrature modulation in the mapper 117 is set in advance according to, for example, the operation of the operator of the transmission device 11 or the like.

Data obtained by the processing in the mapper 117 (mapping result of mapping symbols to signal points) is supplied to a time interleaver 118 .

A time interleaver 118 time-interleaves the data from the mapper 117 on a symbol-by-symbol basis (interleaves in the time direction), and converts the resulting data into a SISO/MISO encoder (SISO/MISO (Single Input Single Output/Multiple Input)). Input (Single Output) encoder) 119 .

The SISO/MISO encoder 119 performs space-time encoding on the data from the time interleaver 118 and supplies it to a frequency interleaver 120 .

The frequency interleaver 120 frequency-interleaves the data from the SISO/MISO encoder 119 on a symbol-by-symbol basis (interleaves in the frequency direction) and supplies the data to the frame builder/resource allocation unit (Frame Builder & Resource Allocation) 131 .

On the other hand, the BCH encoder 121 is supplied with control data (signaling) for transmission control such as BB signaling (Base Band Signaling) (BB Header).

The BCH encoder 121 BCH-encodes the control data supplied thereto in the same manner as the BCH encoder 114 and supplies the resulting data to the LDPC encoder 122 .

The LDPC encoder 122 LDPC-encodes the data from the BCH encoder 121 as LDPC target data in the same manner as the LDPC encoder 115 , and supplies the resulting LDPC code to the mapper 123 .

The mapper 123, like the mapper 117, maps the LDPC code from the LDPC encoder 122 to a signal point representing one symbol of orthogonal modulation in units of one or more code bits (symbol units) of the LDPC code. quadrature modulation, and the resulting data is supplied to frequency interleaver 124 .

Similar to frequency interleaver 120 , frequency interleaver 124 frequency-interleaves the data from mapper 123 on a symbol-by-symbol basis and supplies the data to frame builder/resource allocation section 131 .

Frame builder/resource allocation unit 131 inserts pilot symbols into required positions of data (symbols) from frequency interleavers 120 and 124, and from the resulting data (symbols), a predetermined number of symbols (for example, a PL (Physical Layer) frame, a T2 frame, a C2 frame, etc.) is configured and supplied to an OFDM generation unit (OFDM generation) 132 .

OFDM generating section 132 generates an OFDM signal corresponding to the frame from frame from frame builder/resource allocation section 131 and transmits it via communication channel 13 (FIG. 7).

Note that the transmission device 11 may be configured without some of the blocks illustrated in FIG. 8, such as the time interleaver 118, the SISO/MISO encoder 119, the frequency interleaver 120, and the frequency interleaver 124. can be done.

<Configuration example of bit interleaver 116>

FIG. 9 is a block diagram showing a configuration example of the bit interleaver 116 in FIG.

The bit interleaver 116 has a function of interleaving data and is composed of a parity interleaver 23 , a group-wise interleaver 24 and a block interleaver 25 .

Parity interleaver 23 performs parity interleaving to interleave the parity bits of the LDPC code from LDPC encoder 115 at other parity bit positions, and supplies the LDPC code after parity interleaving to group-wise interleaver 24 .

Group-wise interleaver 24 performs group-wise interleaving on the LDPC code from parity interleaver 23 and supplies the LDPC code after group-wise interleaving to block interleaver 25 .

Here, in group-wise interleaving, the LDPC code for one code is divided into 360-bit units equal to the parallel factor P described later from the beginning, and the 360 bits of one division are used as a bit group, and the parity interleaver 23 LDPC codes from are interleaved in bit groups.

When group-wise interleaving is performed, the error rate can be improved compared to when group-wise interleaving is not performed, and as a result, good communication quality can be ensured in data transmission.

The block interleaver 25 performs block interleaving for demultiplexing the LDPC code from the group-wise interleaver 24, for example, converting one code worth of LDPC code into a symbol of m bits, which is a unit of mapping. and supplied to mapper 117 (FIG. 8).

Here, in block interleaving, for example, a column as a storage area for storing a predetermined number of bits in the column (vertical) direction is arranged in the row (horizontal) direction by a number equal to the number of bits m of a symbol. The LDPC code from the group-wise interleaver 24 is written in the column direction and read out in the row direction to the storage areas arranged in the same manner as the LDPC code, so that the LDPC code is symbolized into m-bit symbols.

<Parity Check Matrix of LDPC Code>

FIG. 10 is a diagram showing an example of parity check matrix H used for LDPC encoding by the LDPC encoder 115 of FIG.

The parity check matrix H has an LDGM (Low-Density Generation Matrix) structure, and includes an information matrix H _A of a portion corresponding to the information bit of the code bits of the LDPC code, and a parity matrix H _T corresponding to the parity bit. can be represented by the formula H=[H _A |H _T ] (a matrix in which the elements of the information matrix H _A are the elements on the left side and the elements of the parity matrix H _T are the elements on the right side).

Here, the number of information bits and the number of parity bits in the code bits of one LDPC code (one codeword) are respectively referred to as information length K and parity length M, and one (1 codeword), the number of code bits of the LDPC code is called a code length N (=K+M).

The information length K and parity length M for an LDPC code of a given code length N are determined by the coding rate. Also, the parity check matrix H is a matrix with M×N rows and columns (a matrix with M rows and N columns). The information matrix H _A becomes an M×K matrix, and the parity matrix H _T becomes an M×M matrix.

FIG. 11 is a diagram showing an example of parity matrix H _T of parity check matrix H used for LDPC encoding in LDPC encoder 115 of FIG.

As the parity matrix H _T of the parity check matrix H used for LDPC encoding in the LDPC encoder 115, for example, a parity matrix H _T similar to the parity matrix H of the LDPC code specified in standards such as DVB-T.2. can be adopted.

The parity matrix H _T of the parity check matrix H of the LDPC code specified in standards such as DVB-T.2 is, as shown in FIG. matrix). The row weight of the parity matrix H _T is 1 for the first row and 2 for all remaining rows. Also, the column weight is 1 for the last column and 2 for all remaining columns.

As described above, an LDPC code for a parity check matrix H whose parity matrix H _T has a staircase structure can be easily generated using the parity check matrix H.

That is, an LDPC code (one codeword) is represented by a row vector c, and a column vector obtained by transposing the row vector is represented by ^cT . Also, in the row vector c of the LDPC code, the information bit portion is represented by row vector A, and the parity bit portion is represented by row vector T. FIG.

In this case, row vector c is obtained by the formula c = [A|T] (where the elements of row vector A are the elements on the left, row vector T can be represented as a row vector with the element of the right as the element of

The check matrix H and the row vector c = [A|T] as the LDPC code must satisfy the expression Hc ^T = 0, and the row vector c = [A | T] that satisfies the expression Hc ^T = 0 If the ^parity matrix H _T of parity check matrix H = [H _A |H _T ] has the staircase structure shown in FIG. By setting the elements of each row to 0 in order from the first row of the column vector Hc ^T , it is possible to obtain them sequentially (in order).

FIG. 12 is a diagram for explaining parity check matrix H of an LDPC code specified in standards such as DVB-T.2.

For the KX columns from the first column of the parity check matrix H of the LDPC code specified in standards such as DVB-T.2, the column weight is X, and for the subsequent K3 columns, the column weight is 3, and then has a column weight of 2 for the M-1 columns of , and a column weight of 1 for the last column.

where KX+K3+M-1+1 is equal to the code length N.

FIG. 13 is a diagram showing the number of columns KX, K3 and M and the column weight X for each coding rate r of the LDPC code specified in standards such as DVB-T.2.

Standards such as DVB-T.2 define LDPC codes with a code length N of 64800 bits and 16200 bits.

And for LDPC code with code length N of 64800 bits, 11 nominal rates 1/4, 1/3, 2/5, 1/2, 3/5, 2/3, 3/ 4, 4/5, 5/6, 8/9, and 9/10 are specified, and for an LDPC code with a code length N of 16200 bits, ten coding rates 1/4, 1/3, 2/5, 1/2, 3/5, 2/3, 3/4, 4/5, 5/6 and 8/9 are provided.

Here, hereinafter, the code length N of 64800 bits is also referred to as 64 kbits, and the code length N of 16200 bits is also referred to as 16 kbits.

As for the LDPC code, code bits corresponding to columns with higher column weights in the check matrix H tend to have lower error rates.

12 and 13, in the parity check matrix H specified in standards such as DVB-T.2, the column weight tends to be larger toward the leading side (left side) of the column. Therefore, the parity check matrix As for the LDPC code corresponding to H, the leading code bit tends to be more resistant to errors (tolerant to errors), and the trailing code bit tends to be less resistant to errors.

<Parity interleave>

Parity interleaving by parity interleaver 23 in FIG. 9 will be described with reference to FIGS.

FIG. 14 is a diagram showing an example of (part of) a Tanner graph of a parity check matrix of an LDPC code.

As shown in FIG. 14, when a plurality of (such as two) variable nodes (corresponding code bits) connected to the check node become errors such as erasure at the same time, all the check nodes connected to the check node Returns to the variable node a message with an equal probability of a value of 0 and a value of 1. Therefore, if a plurality of variable nodes connected to the same check node become erasures at the same time, the decoding performance deteriorates.

By the way, the LDPC code output by the LDPC encoder 115 in FIG. 8 is, for example, an IRA code similar to the LDPC code specified in standards such as DVB-T.2, and the parity matrix _HT of the parity check matrix H is , as shown in FIG. 11, has a staircase structure.

FIG. 15 is a diagram showing an example of a parity matrix H _T having a staircase structure and a Tanner graph corresponding to the parity matrix H _T as shown in FIG. 11 .

FIG. 15A shows an example of a parity matrix H _T having a staircase structure, and FIG. 15B shows a Tanner graph corresponding to the parity matrix H _T of FIG. 15A.

In the parity matrix H _T that has a staircase structure, elements of 1 are adjacent in each row (except for the first row). Therefore, in the Tanner graph of the parity matrix H _T , two adjacent variable nodes corresponding to two adjacent columns of elements in which the value of the parity matrix H _T is 1 are connected to the same check node. there is

Therefore, if parity bits corresponding to two adjacent variable nodes described above become erroneous at the same time due to a burst error, erasure, or the like, two variable nodes corresponding to the two erroneous parity bits (using parity bits A check node connected to a variable node that requests a message) returns a message with an equal probability of 0 and 1 to the variable node connected to the check node, so the decoding performance is reduced. to degrade. When the burst length (the number of parity bits with consecutive errors) increases, the number of check nodes returning messages with equal probability increases, further degrading the decoding performance.

Therefore, the parity interleaver 23 (FIG. 9) performs parity interleaving for interleaving the parity bits of the LDPC code from the LDPC encoder 115 into the positions of other parity bits in order to prevent the deterioration of the decoding performance described above. .

FIG. 16 is a diagram showing parity matrix H _T of parity check matrix H corresponding to the LDPC code after parity interleaving performed by parity interleaver 23 of FIG.

Here, the information matrix H _A of the parity check matrix H corresponding to the LDPC code output by the LDPC encoder 115 is similar to the information matrix of the parity check matrix H corresponding to the LDPC code specified in standards such as DVB-T.2 In addition, it has a circular structure.

A cyclic structure is a structure in which a column matches a cyclically shifted version of another column. columns are cyclically shifted in the column direction by a predetermined value, such as a value proportional to the value q obtained by dividing the parity length M. Hereinafter, the P columns in the cyclic structure are referred to as parallel factors as appropriate.

As LDPC codes specified in standards such as DVB-T.2, there are two types of LDPC codes with code lengths N of 64800 bits and 16200 bits, as described with reference to FIGS. For both types of LDPC codes, the parallel factor P is defined as 360, which is one of the divisors of the parity length M, excluding 1 and M.

Also, the parity length M is a value other than a prime number represented by the formula M=q×P=q×360 using a value q that varies depending on the coding rate. Therefore, the value q, like the parallel factor P, is also one of the divisors of the parity length M, excluding 1 and M, and dividing the parity length M by the parallel factor P (The product of P and q, which is a divisor of the parity length M, gives the parity length M).

As described above, the parity interleaver 23 has an information length of K, an integer of 0 or more and less than P is x, and an integer of 0 or more and less than q is y. As a parity interleave, N-bit LDPC Among the code bits of the code, interleave the K+qx+y+1th code bit into the position of the K+Py+x+1th code bit.

Both the K+qx+y+1th code bit and the K+Py+x+1th code bit are the code bits after the K+1th code bit, so they are parity bits. Interleaving moves the position of the parity bit of the LDPC code.

According to such parity interleaving, (parity bits corresponding to) variable nodes connected to the same check node are separated by a parallel factor P, ie, 360 bits here, so the burst length is less than 360 bits. In this case, it is possible to avoid a situation in which a plurality of variable nodes connected to the same check node become erroneous at the same time, and as a result, it is possible to improve robustness against burst errors.

Note that the LDPC code after parity interleaving, which interleaves the K+qx+y+1st code bit at the position of the K+Py+x+1th code bit, is K+qx+ Matches the LDPC code of a parity check matrix obtained by performing column permutation in which the y+1-th column is replaced with the K+Py+x+1-th column (hereinafter also referred to as a transformed parity check matrix).

Also, as shown in FIG. 16, the parity matrix of the transform parity matrix has a pseudo-cyclic structure in units of P columns (360 columns in FIG. 16).

Here, the pseudo cyclic structure means a structure in which a part except for a part is a cyclic structure.

The transform parity check matrix obtained by applying column permutation corresponding to parity interleaving to the parity check matrix of the LDPC code specified in standards such as DVB-T.2 is 360 rows in the upper right corner of the transform parity check matrix. In the 360 column part (shift matrix described later), there is only one element of 1 (it is an element of 0), and in that respect, it is not a (complete) cyclic structure, but a pseudo-cyclic structure. ing.

The transformed parity check matrix for the parity check matrix of the LDPC code output by the LDPC encoder 115 has, for example, a pseudo-cyclic structure similar to the transformed parity check matrix for the parity check matrix of the LDPC code specified in standards such as DVB-T.2. ing.

Note that the transformation parity check matrix of FIG. 16 is a column permutation corresponding to parity interleaving with respect to the original parity check matrix H, and also a row permutation so that the transformation parity check matrix is composed of constituent matrices described later. (row permutation) is also applied to the matrix.

FIG. 17 is a flowchart illustrating the processing performed by the LDPC encoder 115, bit interleaver 116, and mapper 117 of FIG.

The LDPC encoder 115 waits for the LDPC target data to be supplied from the BCH encoder 114, encodes the LDPC target data into an LDPC code in step S101, and supplies the LDPC code to the bit interleaver 116. , the process proceeds to step S102.

In step S102, the bit interleaver 116 performs bit interleaving on the LDPC code from the LDPC encoder 115, supplies symbols obtained by the bit interleaving to the mapper 117, and the process proceeds to step S103.

That is, in step S102, in the bit interleaver 116 (FIG. 9), the parity interleaver 23 performs parity interleaving on the LDPC code from the LDPC encoder 115, and converts the parity-interleaved LDPC code into group-wise interleaved It feeds the leaver 24 .

Group-wise interleaver 24 performs group-wise interleaving on the LDPC code from parity interleaver 23 and supplies it to block interleaver 25 .

The block interleaver 25 performs block interleaving on the LDPC code after group-wise interleaving by the group-wise interleaver 24 , and supplies m-bit symbols obtained as a result to the mapper 117 .

In step S103, the mapper 117 maps the symbols from the block interleaver 25 to any one of 2 ^m signal points determined by the modulation method of the orthogonal modulation performed by the mapper 117 and orthogonally modulates them. The data is provided to time interleaver 118 .

As described above, by performing parity interleaving or group-wise interleaving, it is possible to improve the error rate when a plurality of code bits of an LDPC code are transmitted as one symbol.

Here, in FIG. 9, for convenience of explanation, the parity interleaver 23, which is a block for performing parity interleaving, and the groupwise interleaver 24, which is a block for performing groupwise interleaving, are configured separately. , the parity interleaver 23 and the group-wise interleaver 24 can be configured integrally.

That is, both parity interleaving and groupwise interleaving can be performed by writing and reading code bits to and from memory, and the address for writing code bits (write address) is the address for reading code bits. It can be represented by a matrix that translates to (read address).

Therefore, if a matrix obtained by multiplying a matrix representing parity interleaving and a matrix representing groupwise interleaving is obtained, parity interleaving is performed by converting code bits using these matrices. A result of group-wise interleaving the LDPC code after parity interleaving can be obtained.

In addition to the parity interleaver 23 and the groupwise interleaver 24, the block interleaver 25 can also be configured integrally.

That is, the block interleaving performed by the block interleaver 25 can also be represented by a matrix that converts the write address of the memory storing the LDPC code into the read address.

Therefore, if a matrix obtained by multiplying a matrix representing parity interleaving, a matrix representing group-wise interleaving, and a matrix representing block interleaving is obtained, parity interleaving, group-wise interleaving, and block interleaving can be performed using these matrices. Interleaving can be done in bulk.

Note that one or the amount of parity interleaving and group-wise interleaving may be omitted.

<Configuration example of LDPC encoder 115>

FIG. 18 is a block diagram showing a configuration example of the LDPC encoder 115 of FIG.

Note that the LDPC encoder 122 in FIG. 8 is similarly configured.

As described with reference to FIGS. 12 and 13, standards such as DVB-T.2 define two types of LDPC codes with a code length N of 64800 bits and 16200 bits.

And for the LDPC code whose code length N is 64800 bits, 11 coding rates 1/4, 1/3, 2/5, 1/2, 3/5, 2/3, 3/4, 4/ 5, 5/6, 8/9, and 9/10 are specified, and for an LDPC code with a code length N of 16200 bits, ten coding rates 1/4, 1/3, 2/5, 1/2, 3/5, 2/3, 3/4, 4/5, 5/6, and 8/9 are defined (Figs. 12 and 13).

The LDPC encoder 115, for example, encodes (error correction encoding) by the LDPC code of each encoding rate such that the code length N is 64800 bits or 16200 bits, for each code length N and each encoding rate It can be performed according to the prepared check matrix H.

In addition, the LDPC encoder 115 can perform LDPC encoding according to parity check matrix H of an LDPC code of arbitrary code length N and arbitrary coding rate r.

The LDPC encoder 115 is composed of an encoding processing unit 601 and a storage unit 602 .

The encoding processing unit 601 includes an encoding rate setting unit 611, an initial value table reading unit 612, a parity check matrix generating unit 613, an information bit reading unit 614, an encoding parity calculation unit 615, and a control unit 616. LDPC encoding is performed on the LDPC target data supplied to 115, and the resulting LDPC code is supplied to bit interleaver 116 (FIG. 8).

That is, the coding rate setting unit 611 sets, for example, the code length N and the coding rate r of the LDPC code, and other specific information for identifying the LDPC code, according to the operator's operation or the like.

Initial value table reading section 612 reads from storage section 602 a later-described parity check matrix initial value table representing the parity check matrix of the LDPC code specified by the specific information set by coding rate setting section 611 .

The check matrix generation unit 613 generates a check matrix H based on the check matrix initial value table read by the initial value table reading unit 612 and stores it in the storage unit 602 . For example, parity check matrix generating section 613 generates information matrix H _A corresponding to information length K (= code length N-parity length M) according to code length N and coding rate r set by coding rate setting section 611. A parity check matrix H is generated by arranging 1 elements in the column direction at intervals of 360 columns (parallel factor P) and stored in the storage unit 602 .

The information bit reading unit 614 reads (extracts) information bits of information length K from the LDPC target data supplied to the LDPC encoder 115 .

Encoding parity calculation section 615 reads parity check matrix H generated by parity check matrix generation section 613 from storage section 602, and uses parity bit for the information bit read by information bit reading section 614 to obtain a predetermined parity bit. A codeword (LDPC code) is generated by calculating based on the equation.

A control unit 616 controls each block constituting the encoding processing unit 601 .

Storage unit 602 stores, for example, a plurality of parity check matrix initial value tables corresponding to the plurality of coding rates shown in FIGS. 12 and 13 for each code length N such as 64800 bits and 16200 bits. It is The storage unit 602 also temporarily stores data necessary for the processing of the encoding processing unit 601 .

FIG. 19 is a flowchart illustrating an example of processing of the LDPC encoder 115 of FIG.

In step S201, the coding rate setting unit 611 sets the code length N and the coding rate r for LDPC coding, and other specific information for identifying the LDPC code.

In step S202, the initial value table reading unit 612 retrieves a predetermined parity check matrix initial value table specified by the code length N and the encoding rate r as the specific information set by the encoding rate setting unit 611. , is read from the storage unit 602 .

In step S203, the parity check matrix generating unit 613 uses the parity check matrix initial value table read from the storage unit 602 by the initial value table reading unit 612, the code length N and the coding rate set by the coding rate setting unit 611. The parity check matrix H of the LDPC code of r is obtained (generated), supplied to the storage unit 602, and stored.

In step S204, the information bit reading unit 614 extracts the information length K (=N ×r) information bits are read, and parity check matrix H obtained by parity check matrix generation section 613 is read out from storage section 602 and supplied to encoding parity calculation section 615 .

In step S205, the encoding parity calculation unit 615 uses the information bits from the information bit reading unit 614 and the parity check matrix H to sequentially calculate the parity bits of the codeword c that satisfy equation (8).

^HcT = 0
... (8)

In Equation (8), c represents a row vector as a codeword (LDPC code), and c ^T represents transposition of row vector c.

Here, as described above, in the row vector c as the LDPC code (one codeword), the information bit portion is represented by the row vector A, and the parity bit portion is represented by the row vector T. can be expressed by the equation c=[A|T] with row vector A as information bits and row vector T as parity bits.

The check matrix H and the row vector c = [A|T] as the LDPC code must satisfy the expression Hc ^T = 0, and the row vector c = [A | T] that satisfies the expression Hc ^T = 0 If the ^parity matrix H _T of parity check matrix H = [H _A |H _T ] has the staircase structure shown in FIG. By setting the elements of each row to 0 in order from the first row of the column vector Hc ^T , it is possible to obtain them sequentially.

Encoding parity computing section 615 obtains parity bit T for information bit A from information bit reading section 614, and codeword c represented by information bit A and parity bit T = [A|T] is output as the LDPC encoding result of information bit A.

Thereafter, in step S206, control section 616 determines whether or not to end LDPC encoding. In step S206, if it is determined not to end the LDPC encoding, i.e., for example, if there is still LDPC target data to be LDPC encoded, the process returns to step S201 (or step S204). The processing of S201 (or steps S204) to S206 is repeated.

Further, when it is determined in step S206 to end the LDPC encoding, that is, when there is no LDPC target data to be LDPC-encoded, the LDPC encoder 115 ends the process.

For the LDPC encoder 115, parity check matrix initial value tables (representing parity check matrices) of LDPC codes of various code lengths N and coding rates r can be prepared in advance. The LDPC encoder 115 can perform LDPC encoding into LDPC codes of various code lengths N and coding rates r using a parity check matrix H generated from a parity check matrix initial value table prepared in advance. Since the parity check matrix H can be generated from the parity check matrix initial value table, the parity check matrix H and the parity check matrix initial value table are equivalent information. In the implementation of the LDPC encoder 115, in addition to generating a parity check matrix H from a parity check matrix initial value table and performing LDPC encoding using the parity check matrix H, LDPC encoding can be performed using the parity check matrix initial value table as it is. can.

<Example of check matrix initial value table>

The parity check matrix initial value table is, for example, an information matrix H _A ( 10) for each 360 columns (parallel factor P), and is created in advance for each parity check matrix H of each code length N and each coding rate r.

That is, the parity check matrix initial value table represents at least the position of the element of 1 in the information matrix H _A for every 360 columns (parallel factor P).

The check matrix H includes a check matrix in which the entire parity matrix H _T has a staircase structure, and a parity matrix H _T in which a part of the parity matrix H T has a staircase structure and the remaining part is a diagonal matrix (identity matrix). ) is a check matrix.

Hereinafter, the expression method of the parity check matrix initial value table representing the parity check matrix in which part of the parity matrix H _T has a staircase structure and the remaining portion is a diagonal matrix is also referred to as a type A method. Also, the expression method of the parity check matrix initial value table representing the parity check matrix in which the entire parity matrix H _T has a staircase structure is also called the type B method.

An LDPC code for a parity check matrix represented by a type A parity check matrix initial value table is also called a type A code, and an LDPC code for a parity check matrix represented by a type B parity check matrix initial value table is also called a type B code.

"Type A" and "Type B" designations are based on the ATSC 3.0 standard. For example, ATSC 3.0 employs both type A and type B codes.

Note that DVB-T.2 and others use type B codes.

FIG. 20 is a diagram showing an example of a parity check matrix initial value table for the type B scheme.

That is, FIG. 20 shows a case where the code length N is 16200 bits and the coding rate (coding rate in DVB-T.2 notation) r is 1/4, which is specified in the DVB-T.2 standard. FIG. 10 shows a parity check matrix initial value table (representing parity check matrix H) for type B code.

The parity check matrix generation unit 613 (FIG. 18) uses the parity check matrix initial value table of the type B method to obtain the parity check matrix H as follows.

FIG. 21 is a diagram illustrating a method of obtaining a parity check matrix H from a parity check matrix initial value table of the type B method.

That is, FIG. 21 shows a parity check matrix initial value table for a type B code with a code length N of 16200 bits and a coding rate r of 2/3, which is specified in the DVB-T.2 standard.

The parity check matrix initial value table of the type B method stores the positions of all 1 elements in the information matrix H _A corresponding to the information length K according to the code length N and coding rate r of the LDPC code in 360 columns (parallel factor P), and in the ith row, the row number of the 1 element in the 1+360×(i-1)th column of the parity check matrix H (the row number of the first row of the parity check matrix H is 0) are lined up by the number of column weights of the 1+360×(i−1)th column.

Here, the parity matrix H _T (FIG. 10) corresponding to the parity length M of the parity check matrix H of the type B method is determined to have a staircase structure as shown in FIG. If the information matrix H _A (FIG. 10) corresponding to the information length K can be obtained, the parity check matrix H can be obtained.

The number of rows k+1 of the parity check matrix initial value table of the type B method differs depending on the information length K.

The relationship of Equation (9) holds between the information length K and the number of rows k+1 in the parity check matrix initial value table.

K＝(k+1)×360
... (9)

Here, 360 in equation (9) is the parallel factor P explained in FIG.

In the parity check matrix initial value table of FIG. 21, 13 numerical values are arranged from the 1st to 3rd rows, and 3 numerical values are arranged from the 4th row to the k+1th row (the 30th row in FIG. 21). numbers are lined up.

Therefore, the column weights of the parity check matrix H obtained from the parity check matrix initial value table in FIG. From the (3-1)th column to the Kth column are 3.

The first row of the parity check matrix initial value table in FIG. In the first column of the row numbers 0, 2084, 1613, 1548, 1286, 1460, 3196, 4297, 2481, 3369, 3451, 4620, 2622 row elements are 1 (and other elements is 0).

The second row of the parity check matrix initial value table in FIG. (= 1 + 360 × (2 - 1)) column, row numbers 1, 122, 1516, 3448, 2880, 1407, 1847, 3799, 3529, 373, 971, 4358, 3108 row elements are 1 ing.

As described above, the parity check matrix initial value table represents the position of the 1 element of the information matrix H _A of the parity check matrix H for every 360 columns.

Columns other than the 1+360×(i-1)th column of the check matrix H, that is, each column from the 2+360×(i-1)th column to the 360×ith column are the check matrix initial value table The 1 elements in the 1+360×(i−1)th column determined by are arranged by periodically cyclically shifting downward (downward of the column) according to the parity length M.

That is, for example, the 2+360×(i-1)th column is obtained by cyclically shifting the 1+360×(i-1)th column downward by M/360 (=q). , the next 3+360×(i-1)th column is the 1+360×(i-1)th column cyclically shifted downward by 2×M/360 (=2×q) ( 2+360×(i−1)th column is cyclically shifted downward by M/360 (=q)).

Let h i,j be the number in the i-th row (i-th from the top) and j-th column ( _j -th from the left) of the parity check matrix initial value table. Let H _wj be the row number of the 1st element in the parity check matrix H. _wj can be obtained by equation (10).

_Hwj = mod{h _i,j + mod((w-1),P)×q，M)
(10)

where mod(x, y) means the remainder of x divided by y.

Also, P is the above-described parallel factor, and in this embodiment, it is 360, for example, like the DVB-T.2 and ATSC 3.0 standards. Furthermore, q is the value M/360 obtained by dividing the parity length M by the parallel factor P (=360).

The check matrix generator 613 (FIG. 18) identifies the row number of the 1 element in the 1+360×(i−1)-th column of the check matrix H from the check matrix initial value table.

Furthermore, the parity check matrix generation unit 613 (FIG. 18) converts the row number H _wj of the 1 element in the w-th column, which is a column other than the 1+360×(i−1)-th column of the parity check matrix H, to the formula ( 10), and generate a parity check matrix H in which the element of the row number obtained by the above is set to 1.

FIG. 22 is a diagram showing the structure of the parity check matrix H of the type A scheme.

A check matrix for the type A scheme is composed of an A matrix, a B matrix, a C matrix, a D matrix, and a Z matrix.

The A matrix is the upper left matrix of the parity check matrix H of M1 rows and K columns represented by the predetermined value M1 and the information length K of the LDPC code=code length N×encoding rate r.

The B matrix is an M1-by-M1 matrix with a staircase structure adjacent to the right of the A matrix.

The C matrix is the adjacent matrix below the A matrix and the B matrix, with N−K−M1 rows and K+M1 columns.

The D matrix is the identity matrix adjacent to the right of the C matrix, with N-K-M1 rows and N-K-M1 columns.

The Z matrix is the zero matrix (zero matrix) adjacent to the right of the B matrix, with M1 rows and N-K-M1 columns.

In the type A check matrix H composed of the A matrix to the D matrix and the Z matrix as described above, part of the A matrix and the C matrix constitute an information matrix, and the B matrix, The rest of the C matrix, the D matrix and the Z matrix make up the parity matrix.

Note that the B matrix is a matrix with a staircase structure, and the D matrix is a unit matrix, so part of the parity matrix of the parity matrix H of the type A method (part of the B matrix) has a staircase structure. , the remaining part (part of the D matrix) is a diagonal matrix (identity matrix).

The A matrix and the C matrix have a cyclic structure for each column of the parallel factor P (for example, 360 columns) in the same way as the information matrix of the check matrix H of the type B method, and the check matrix initial value table of the type A method represents the position of the 1 element in the A and C matrices every 360 columns.

Here, as described above, part of the A matrix and the C matrix constitute an information matrix, so the type A parity check matrix representing the position of the element of 1 in the A matrix and the C matrix for every 360 columns It can be said that the initial value table represents at least the position of the 1 element of the information matrix for every 360 columns.

In addition, since the check matrix initial value table of the type A method represents the position of the 1 element in the A matrix and the C matrix for every 360 columns, It can also be said that the position is represented every 360 columns.

FIG. 23 is a diagram showing an example of a parity check matrix initial value table for the type A scheme.

That is, FIG. 23 shows an example of a parity check matrix initial value table representing a parity check matrix H with a code length N of 35 bits and a coding rate r of 2/7.

The parity check matrix initial value table of the type A method is a table that represents the position of the element of 1 in the A matrix and the C matrix for each parallel factor P, and the ith row contains 1+P×( The row number of the 1 element in the i-1)th column (row number where the row number of the first row of the check matrix H is 0) is the column that the 1+P×(i-1)th column has They are lined up by the number of weights.

For simplicity of explanation, the parallel factor P is assumed to be 5, for example.

The parity check matrix H of the type A method has parameters M1, M2, Q1, and Q2.

M1 (FIG. 22) is a parameter that determines the size of the B matrix and takes a value that is a multiple of the parallel factor P. By adjusting M1, the performance of the LDPC code changes and is adjusted to a predetermined value when parity check matrix H is determined. Here, it is assumed that 15, which is three times the parallel factor P=5, is adopted as M1.

M2 (FIG. 22) takes a value M-M1 obtained by subtracting M1 from the parity length M.

Here, the information length K is N × r = 35 × 2/7 = 10, and the parity length M is N - K = 35 - 10 = 25, so M2 is M - M1 = 25 - 15 = 10 becomes.

Q1 is obtained according to the formula Q1=M1/P and represents the shift number (number of rows) of the cyclic shift in the A matrix.

That is, columns other than the 1+P×(i-1)th column of the A matrix of the type A system check matrix H, that is, from the 2+P×(i-1)th column to the P×ith column In each column, the 1 elements in the 1+P×(i-1)th column determined by the parity check matrix initial value table are cyclically shifted downward (toward the bottom of the column) and arranged. and Q1 represents the shift number of that cyclic shift in the A matrix.

Q2 is determined according to the formula Q2=M2/P and represents the shift number (number of rows) of the cyclic shift in the C matrix.

That is, columns other than the 1+P×(i-1)th column of the C matrix of the check matrix H of the type A method, that is, from the 2+P×(i-1)th column to the P×ith column In each column, the 1 elements in the 1+P×(i-1)th column determined by the parity check matrix initial value table are cyclically shifted downward (toward the bottom of the column) and arranged. and Q2 represents the shift number of that cyclic shift in the C matrix.

Here Q1 has M1/P=15/5=3 and Q2 has M2/P=10/5=2.

In the parity check matrix initial value table of FIG. 23, three numerical values are arranged in the first and second rows, and one numerical value is arranged in the third to fifth rows. For example, the column weights of the parts of the A matrix and the C matrix of the parity check matrix H obtained from the parity check matrix initial value table in FIG. From the 11=1+5×(3−1)th column to the 25=5×5th column, it is 1.

That is, the first row of the parity check matrix initial value table in FIG. It indicates that the element is 1 (and the other elements are 0).

Here, in this case, the A matrix (FIG. 22) is a matrix of 15 rows and 10 columns (M1 rows and K columns), and the C matrix (FIG. 22) is a matrix of 10 rows and 25 columns (N-K-M1 rows and K+M1 columns), the rows with row numbers 0 to 14 of the parity check matrix H are the rows of the A matrix, and the rows with row numbers 15 to 24 of the parity check matrix H are the rows of the C matrix.

Therefore, among the rows with row numbers 2, 6, and 18 (hereinafter referred to as rows #2, #6, and #18), rows #2 and #6 are rows of the A matrix, and row #18 is the row of the C matrix.

The second row of the parity check matrix initial value table in FIG. It shows that the elements of 2, #10, and #19 are 1.

Here, in the 6th (= 1 + 5 × (2-1)) column of the check matrix H, rows #2 and #10 among rows #2, #10, and #19 are rows of the A matrix , and row #19 is a row of the C matrix.

The third row of the parity check matrix initial value table in FIG. 1.

Here, in the 11th (=1+5×(3−1)) column of parity check matrix H, row #22 is the row of C matrix.

Similarly, 19 in the 4th row of the parity check matrix initial value table in FIG. 15 in the 5th row of the parity check matrix initial value table in FIG. It shows that

As described above, the parity check matrix initial value table represents the positions of the elements of 1 in the A matrix and the C matrix of the parity check matrix H for every parallel factor P=5 columns.

Columns other than the 1+5×(i-1)th column of the A matrix and the C matrix of the check matrix H, that is, each column from the 2+5×(i-1)th column to the 5×ith column are , the 1 element in the 1+5×(i-1)th column determined by the check matrix initial value table is arranged by periodically cyclically shifting downward (downward of the column) according to the parameters Q1 and Q2 It has become a thing.

That is, for example, the 2+5×(i-1)th column of the A matrix is obtained by cyclically shifting the 1+5×(i-1)th column downward by Q1 (=3). and the next 3+5×(i-1)th column is the 1+5×(i-1)th column cyclically shifted downward by 2×Q1 (=2×3) ( 2+5×(i−1)th column cyclically shifted downward by Q1).

Also, for example, the 2+5×(i-1)th column of the C matrix is obtained by cyclically shifting the 1+5×(i-1)th column downward by Q2 (=2). and the next 3+5×(i-1)th column is the 1+5×(i-1)th column cyclically shifted downward by 2×Q2 (=2×2) ( 2+5×(i−1)th column is cyclically shifted downward by Q2).

24 is a diagram showing an A matrix generated from the parity check matrix initial value table of FIG. 23. FIG.

In the A matrix of FIG. 24, the elements of rows #2 and #6 of the 1 (=1+5×(1-1)) column are 1 according to the first row of the check matrix initial value table of FIG. ing.

Then, each column from the 2nd (=2+5×(1-1)) to the 5th (=5+5×(1-1)) column moves down the previous column by Q1=3. is cyclically shifted to

Furthermore, in the A matrix of FIG. 24, according to the second row of the check matrix initial value table of FIG. It has become.

Then, each column from the 7th (=2+5×(2-1)) to the 10th (=5+5×(2-1)) columns moves down the previous column by Q1=3. is cyclically shifted to

FIG. 25 is a diagram showing parity interleaving of the B matrix.

The parity check matrix generation unit 613 (FIG. 18) uses the parity check matrix initial value table to generate the A matrix, and arranges the stepped B matrix to the right of the A matrix. Then, parity check matrix generation section 613 regards the B matrix as a parity matrix, and performs parity interleaving so that adjacent 1 elements in the B matrix with a staircase structure are separated by a parallel factor P=5 in the row direction.

FIG. 25 shows the A and B matrices after parity interleaving of the B matrix in FIG.

26 is a diagram showing a C matrix generated from the parity check matrix initial value table of FIG. 23. FIG.

In the C matrix of FIG. 26, according to the first row of the parity check matrix initial value table of FIG. It's becoming

Then, each column from the 2 (= 2 + 5 x (1-1)) to the 5 (= 5 + 5 x (1-1)) columns of the C matrix replaces the previous column with Q2 = 2 is cyclically shifted downward by

Furthermore, in the C matrix of FIG. 26, according to the 2nd to 5th rows of the check matrix initial value table of FIG. 19, row #22 in column 11 (=1+5×(3-1)), row #19 in column 16 (=1+5×(4-1)), and row 21 (=1+5 The element in row #15 of the ×(5-1)) column is 1.

And each column from 7(=2+5×(2-1)) to 10(=5+5×(2-1)), 12(=2+5×(3-1) ) to 15(=5+5×(3-1)) columns, 17(=2+5×(4-1)) to 20(=5+5×(4- 1) Each column up to column 22 (= 2 + 5 x (5-1)) to 25 (= 5 + 5 x (5-1)) is immediately before column is cyclically shifted downward by Q2=2.

The parity check matrix generation unit 613 (FIG. 18) uses the parity check matrix initial value table to generate the C matrix, and arranges the C matrix below the A matrix and the B matrix (after parity interleaving).

Further, parity check matrix generation section 613 arranges Z matrix to the right of B matrix and arranges D matrix to the right of C matrix to generate parity check matrix H shown in FIG.

FIG. 27 is a diagram showing parity interleaving of the D matrix.

After generating the parity check matrix H in FIG. 26, the parity check matrix generation unit 613 regards the D matrix as a parity matrix, and the elements of 1 in the odd-numbered rows and the next even-numbered rows of the unit matrix D matrix are arranged in the row direction. , parity interleave (only the D matrix) such that they are separated by a parallel factor P=5.

FIG. 27 shows the parity interleaving of the D matrix with respect to the parity check matrix H of FIG.

The LDPC encoder 115 (the encoding parity calculation unit 615 (FIG. 18)) performs LDPC encoding (generation of LDPC code) using parity check matrix H in FIG. 27, for example.

Here, the LDPC code generated using the parity check matrix H in FIG. 27 is an LDPC code that performs parity interleaving. Therefore, the LDPC code generated using the parity check matrix H in FIG. There is no need to perform parity interleaving in the parity interleaver 23 (FIG. 9). That is, the LDPC code generated using the check matrix H after parity interleaving of the D matrix is an LDPC code that has undergone parity interleaving. is skipped.

FIG. 28 restores the parity interleaving to the B matrix, part of the C matrix (the part of the C matrix located below the B matrix), and the D matrix of the parity check matrix H in FIG. FIG. 10 is a diagram showing parity check matrix H subjected to column permutation as parity deinterleaving;

The LDPC encoder 115 can perform LDPC encoding (generation of LDPC code) using parity check matrix H in FIG.

When LDPC encoding is performed using parity check matrix H in FIG. 28 , an LDPC code without parity interleaving is obtained by the LDPC encoding. Therefore, when performing LDPC encoding using parity check matrix H in FIG. 28, parity interleaving is performed in parity interleaver 23 (FIG. 9).

FIG. 29 is a diagram showing a transformed parity check matrix obtained by performing row permutation on the parity check matrix H of FIG.

As will be described later, the transformation check matrix is a P×P identity matrix, a quasi-identity matrix in which one or more of 1 of the identity matrix is 0, a shift matrix obtained by cyclically shifting the identity matrix or the quasi-identity matrix, It is a matrix represented by a combination of a sum matrix that is the sum of two or more of the unit matrix, quasi-unit matrix, or shift matrix, and a P×P zero matrix.

By using the transform parity check matrix for decoding the LDPC code, it is possible to employ an architecture in which P check node operations and P variable node operations are simultaneously performed in the decoding of the LDPC code, as will be described later.

In data transmission using LDPC codes, one method of ensuring good communication quality is to use LDPC codes with good performance.

Here, an LDPC code with good performance is an LDPC code obtained from an appropriate parity check matrix H.

An appropriate parity check matrix H is, for example, an LDPC code obtained from the parity check matrix H, when transmitted with a low E _s /N ₀ or E _b /N _o (signal power to noise power ratio per bit) , BER (bit error rate) (and FER (frame error rate)) is a parity check matrix that satisfies a predetermined condition.

An appropriate parity check matrix H can be obtained, for example, by performing a simulation of measuring BER when LDPC codes obtained from various parity check matrices satisfying predetermined conditions are transmitted at low E _s /N _o .

Predetermined conditions that an appropriate parity check matrix H should satisfy are, for example, that the analysis result obtained by a code performance analysis method called Density Evolution is good, and that the number of elements of 1, called cycle 4, is good. There is no loop, and so on.

Here, it is known that the decoding performance of the LDPC code is degraded when the information matrix H _A is densely populated with 1 elements like cycle 4. Therefore, the parity check matrix H includes cycles 4 should be absent.

In the parity check matrix H, the minimum value of the loop length (loop length) composed of 1 elements is called girth. Absence of cycle 4 means that girth is greater than 4.

A predetermined condition that an appropriate parity check matrix H should satisfy can be appropriately determined from the viewpoint of improving the decoding performance of the LDPC code, facilitating (simplifying) the decoding process of the LDPC code, and the like.

30 and 31 are diagrams for explaining density evolution for obtaining analysis results as predetermined conditions that an appropriate parity check matrix H should satisfy.

Density evolution is a code analysis method that calculates the expected value of the error probability for the entire LDPC code (ensemble) with a code length N of ∞ characterized by the degree sequence described later. is.

For example, on an AWGN channel, when the noise variance value is increased from 0, the expected value of the error probability of a certain ensemble is 0 at first, but the noise variance value exceeds a certain threshold. Then it will not be 0.

According to Density Evolution, the performance of the ensemble (appropriateness of the parity check matrix) is evaluated by comparing the threshold value of the noise variance value (hereinafter also referred to as the performance threshold) at which the expected value of the error probability is not 0. can decide.

For a specific LDPC code, the ensemble to which the LDPC code belongs is determined, and density evolution is performed on the ensemble to roughly predict the performance of the LDPC code.

Therefore, if an ensemble with good performance is found, an LDPC code with good performance can be found among the LDPC codes belonging to that ensemble.

Here, the above-mentioned degree sequence represents the proportion of variable nodes and check nodes having weights of respective values with respect to the code length N of the LDPC code.

For example, a regular(3,6) LDPC code with a rate of 1/2 has a degree of 3 in which all variable nodes have a weight (column weight) and all check nodes have a weight (row weight) of 6. Belongs to an ensemble characterized by a sequence.

Figure 30 shows the Tanner graph of such an ensemble.

In the Tanner graph of FIG. 30, there are N variable nodes indicated by circles (○) in the figure, which are equal to the code length N, and check nodes indicated by squares (□) in the figure are the code length N and the coding rate There are N/2 equal to the product multiplied by 1/2.

Each variable node has 3 edges connected to it equal to the column weight, so there are a total of 3N edges connecting to N variable nodes.

Also, each check node has 6 branches connected to it equal to the row weight, so there are a total of 3N branches connecting to N/2 check nodes.

Furthermore, in the Tanner graph of FIG. 30 there is one interleaver.

The interleaver randomly permutes the 3N branches connected to N variable nodes, and converts each permuted branch to one of the 3N branches connected to N/2 check nodes. Connect to one of us.

There are (3N)! (= (3N) x (3N-1) x ... x 1) permutation patterns for permuting 3N branches connected to N variable nodes in the interleaver. There is only Therefore, an ensemble characterized by degree-leakage where all variable nodes have a weight of 3 and all check nodes have a weight of 6 is a set of (3N)! LDPC codes.

In a simulation for obtaining an LDPC code (appropriate parity check matrix) with good performance, a multi-edge type ensemble can be used in density evolution.

In the multi-edge type, the interleaver through which the branches connecting to the variable nodes and the branches connecting to the check nodes go through is divided into multiple (multi-edge), which makes the characterization of the ensemble more strictly done.

FIG. 31 shows an example of a Tanner graph of a multi-edge type ensemble.

In the Tanner graph of FIG. 31, there are two interleavers, a first interleaver and a second interleaver.

Also, in the Tanner graph of FIG. 31, there is only v1 variable node with one branch connected to the first interleaver, zero branch connected to the second interleaver, and one branch connected to the first interleaver. , only v2 variable nodes with 2 branches leading to the second interleaver, v3 variable nodes with 0 branches leading to the first interleaver and 2 branches leading to the second interleaver, respectively exist.

Furthermore, in the Tanner graph of FIG. 31, there are 2 branches connected to the first interleaver, c1 check nodes with 0 branches connected to the second interleaver, and 2 branches connected to the first interleaver. , c2 check nodes with 2 branches leading to the second interleaver, c3 check nodes with 0 branches leading to the first interleaver and 3 branches leading to the second interleaver, respectively. exist.

Here, regarding density evolution and its implementation, see, for example, "On the Design of Low-Density Parity-Check Codes within 0.0045 dB of the Shannon Limit", S.Y.Chung, G.D.Forney, T.J.Richardson,R.Urbanke, IEEE Communications Leggers, VOL.5, NO.2, Feb 2001.

In the simulation for obtaining the (parity check matrix of) LDPC _code , the BER starts to drop (becomes _smaller ) due to multi-edge type density evolution. Find an ensemble whose threshold value is equal to or less than a predetermined value, and select an LDPC code that reduces BER when using one or more orthogonal modulations such as QPSK from among the LDPC codes belonging to that ensemble as an LDPC code with good performance. can do.

In the data transmission of the transmission system in FIG. 7, for example, the parallel factor P obtained by the above simulation is 360, which is the same as DVB-T.2, ATSC 3.0, etc. Corresponding type A and type B codes can be employed.

For data transmission in the transmission system of FIG. 7, an LDPC code with a longer code length N than DVB-T.2 or ATSC3.0, that is, for example, the code length N is 69120 bits and the coding rate r is 2. /16, 3/16, 4/16, 5/16, 6/16, 7/16, 8/16, 9/16, 10/16, 11/16, 12/16, 13/16, 14/16 LDPC code can be adopted.

<Constellation>

32 to 56 are diagrams showing examples of constellations that can be employed in the transmission system of FIG. 7. FIG.

In the transmission system of FIG. 7, for example, a constellation to be used in MODCOD can be set for MODCOD that is a combination of a modulation scheme (MODulation) and an LDPC code (CODE).

One or more constellations can be set for one MODCOD.

Constellations include UC (Uniform Constellation) in which signal points are arranged uniformly and NUC (Non Uniform Constellation) in which the arrangement of signal points is not uniform.

In addition, NUC includes, for example, a constellation called 1D-NUC (1-dimensional (M ² -QAM) non-uniform constellation) and a constellation called 2D-NUC (2-dimensional (QQAM) non-uniform constellation). ration, etc.

In general, 1D-NUC improves BER more than UC, and 2D-NUC improves BER more than 1D-NUC.

UC can be adopted as a constellation whose modulation scheme is QPSK. As a constellation with a modulation method of 16QAM, 64QAM, 256QAM, etc., for example, UC or 2D-NUC can be adopted. -NUC can be adopted.

In the transmission system of FIG. 7, for example, a constellation specified by ATSC3.0, DVB-C.2, etc., and various other constellations that improve the error rate can be used.

That is, when the modulation scheme is QPSK, for example, the same UC can be used for each coding rate r of the LDPC code.

Also, when the modulation scheme is 16QAM, 64QAM, or 256QAM, for example, the same UC can be used for each coding rate r of the LDPC code. Furthermore, when the modulation scheme is 16QAM, 64QAM, or 256QAM, for example, a different 2D-NUC can be used for each coding rate r of the LDPC code.

Also, when the modulation scheme is 1024QAM or 4096QAM, for example, the same UC can be used for each coding rate r of the LDPC code. Furthermore, when the modulation scheme is 1024QAM or 4096QAM, for example, a different 1D-NUC can be used for each coding rate r of the LDPC code.

Here, QPSK UC is also described as QPSK-UC, and 2 ^m QAM UC is also described as 2 ^m QAM-UC. 2 ^m QAM 1D-NUC and 2D-NUC are also described as 2 ^m QAM-1D-NUC and 2 ^m QAM-2D-NUC, respectively.

Some of the constellations specified in ATSC 3.0 are described below.

FIG. 32 is a diagram showing coordinates of QPSK-UC signal points used for all coding rates of LDPC codes defined in ATSC 3.0 when the modulation scheme is QPSK.

In FIG. 32, "Input Data cell y" represents a 2-bit symbol mapped to QPSK-UC, and "Constellation point _zs " represents the coordinates of signal point _zs . Note that the index s of the signal point _zs (the same applies to the index q of the signal point _zq , which will be described later) represents the discrete time of the symbol (time interval between one symbol and the next symbol).

In FIG. 32, the coordinates of the signal point _zs are represented in the form of complex numbers, and j represents the imaginary unit (√(-1)).

FIG. 33 shows that when the modulation scheme is 16QAM, the coding rate r (CR) of the LDPC code specified by ATSC 3.0 = 2/15, 3/15, 4/15, 5/15, 6/ 15, 7/15, 8/15, 9/15, 10/15, 11/15, 12, 15, and 13/15 are diagrams showing coordinates of signal points of 16QAM-2D-NUC used; FIG.

In FIG. 33, as in FIG. 32, the coordinates of the signal point _zs are represented in the form of complex numbers, and j represents the imaginary unit.

In FIG. 33, w#k represents the coordinates of the signal point in the first quadrant of the constellation.

In the 2D-NUC, the signal points in the 2nd quadrant of the constellation are placed in positions symmetrically shifted from the signal points in the 1st quadrant with respect to the Q-axis, and the signal points in the 3rd quadrant of the constellation are placed in the 3rd quadrant. The signal points of one quadrant are arranged at positions shifted symmetrically with respect to the origin. Then, the signal points in the fourth quadrant of the constellation are arranged at positions shifted symmetrically with respect to the I axis from the signal points in the first quadrant.

Here, when the modulation scheme is 2 ^m QAM, m bits are defined as one symbol, and that one symbol is mapped to the signal point corresponding to that symbol.

For ^example , an m-bit symbol can be represented ^{by an integer value from 0 to 2 m -1} . y(0), y(1), ^. 2b) to y(3b-1) and y(3b) to y(4b-1).

In FIG. 33, the suffix k of w#k takes integer values ranging from 0 to b-1, and w#k is the symbol y(k) ranging from symbols y(0) to y(b-1). represents the coordinates of the signal point corresponding to .

Then, the coordinates of the signal point corresponding to symbol y(k+b) in the range of symbols y(b) to y(2b-1) are represented by -conj(w#k) and symbol y(2b) to The coordinates of the signal point corresponding to the symbol y(k+2b) within the range y(3b-1) are represented by conj(w#k). Also, the coordinates of the signal point corresponding to symbol y(k+3b) in the range of symbols y(3b) to y(4b-1) are represented by -w#k.

where conj(w#k) represents the complex conjugate of w#k.

For example, if the modulation scheme is 16QAM, m= ⁴ -bit symbols y(0), y(1), . It is classified into four categories: (0) to y(3), y(4) to y(7), y(8) to y(11), and y(12) to y(15).

Then, among symbols y(0) to y(15), for example, symbol y(12), symbol y(k+3b)=y( 0+3×4) and k=0, the coordinates of the signal point corresponding to symbol y(12) are -w#k=-w0.

Now, assuming that the coding rate r(CR) of the LDPC code is, for example, 9/15, according to FIG. 33, w0 is 0.2386+j0.5296, so the coordinate -w0 of the signal point corresponding to symbol y(12) is -(0.2386+j0.5296).

FIG. 34 shows that when the modulation scheme is 1024QAM, the coding rate r (CR) of the LDPC code specified by ATSC 3.0 = 2/15, 3/15, 4/15, 5/15, 6/ 15, 7/15, 8/15, 9/15, 10/15, 11/15, 12, 15, and 13/15 are diagrams showing examples of coordinates of signal points of 1024QAM-1D-NUC. .

In FIG. 34, u#k represents the complex real part Re(z _s ) and imaginary part Im(z _s ) as the coordinates of the signal point z _s of the 1D-NUC, and the vector u=(u0 , u1,..., u#V-1). The number V of components u#k of the position vector u is given by the formula V=√(2 ^m )/2.

FIG. 35 is a diagram showing the relationship between the 1024QAM symbol y and the position vector u (component u#k of).

Now, let's take a 1024QAM 10-bit symbol y from its leading bit (most significant bit) as _y0,s , _y1,s , y2 _,s , _y3,s , _y4,s , _{y5, s} , _y6,s , _y7,s , _y8,s , and _y9,s .

FIG. 35A shows five even-numbered bits _y1,s , _y3,s , _y5,s , _y7,s , _{y9,s of the} symbol y and the signal point _zs corresponding to the symbol y. , which represents the correspondence with u#k representing the (coordinate) real part Re(z _s ).

B in FIG. 35 shows five odd-numbered bits _y0,s , _y2,s , _y4,s , _y6,s , _y8,s of the symbol y and the signal point _zs corresponding to the symbol y. represents the correspondence with u#k representing the imaginary part Im(z _s ) of .

1024QAM 10-bit symbol y = ( _y0,s , _{y1,s, y2} ,s _{, y3,s} , _{y4,s , y5,s} , _y6,s , _y7,s , y _8,s , y _9,s ) is, for example, (0,0,1,0,0,1,1,1,0,0), the odd-numbered 5 bits (y _0,s , y _2,s , y _4,s , y _6,s , y _8,s ) is (0,1,0,1,0) and even-numbered 5 bits (y _1,s , y _3,s , _y5,s , _y7,s , _y9,s ) are (0,0,1,1,0).

In FIG. 35A, even-numbered 5 bits (0,0,1,1,0) are associated with u11, so symbol y=(0,0,1,0,0,1, The real part Re(z _s ) of the signal point z _s corresponding to 1,1,0,0) is u11.

In FIG. 35B, the 5 odd-numbered bits (0,1,0,1,0) are associated with u3, so symbol y=(0,0,1,0,0,1, 1,1,0,0), the imaginary part Im(z _s ) of the signal point z _s is u3.

On the other hand, if the coding rate r of the LDPC code is, for example, 6/15, according to FIG. For the 1D-NUC used in some cases, u3 is 0.1295 and u11 is 0.7196.

Therefore, the real part Re(z _s ) of signal point z _s corresponding to symbol y = (0,0,1,0,0,1,1,1,0,0) is u11 = 0.7196, which is the imaginary The part Im(z _s ) becomes u3=0.1295. As a result, the coordinates of the signal point _zs corresponding to the symbol y=(0,0,1,0,0,1,1,1,0,0) are represented by 0.7196+j0.1295.

In the constellation, the signal points of the 1D-NUC are arranged in a grid on straight lines parallel to the I axis and straight lines parallel to the Q axis. However, the intervals between signal points are not constant. Also, in transmitting (data mapped to) signal points, the average power of the signal points on the constellation can be normalized. Let P _ave be the mean square of _the absolute values of all signal points (coordinates) on the constellation _. P _ave ) can be done by multiplying each signal point z _s on the constellation.

The transmission system in FIG. 7 can use the constellation defined by ATSC 3.0 as described above.

36 to 47 are diagrams showing coordinates of UC signal points defined in DVB-C.2.

That is, FIG. 36 is a diagram showing the real part Re(z _q ) of the coordinate z _q of the signal point of QPSK-UC (UC of QPSK) defined by DVB-C.2. FIG. 37 is a diagram showing the imaginary part Im(z _q ) of the coordinate z _q of the QPSK-UC signal point defined in DVB-C.2.

FIG. 38 is a diagram showing the real part Re(z _q ) of the coordinate z _q of the 16QAM-UC (16QAM UC) signal point defined by DVB-C.2. FIG. 39 is a diagram showing the imaginary part Im(z _q ) of the coordinates z _q of the 16QAM-UC signal point defined by DVB-C.2.

FIG. 40 is a diagram showing the real part Re(z _q ) of the coordinate z _q of the 64QAM-UC (UC of 64QAM) signal point defined by DVB-C.2. FIG. 41 is a diagram showing the imaginary part Im(z _q ) of the coordinate z _q of the 64QAM-UC signal point defined by DVB-C.2.

FIG. 42 is a diagram showing the real part Re(z _q ) of the coordinates z _q of the 256QAM-UC (UC of 256QAM) signal point defined by DVB-C.2. FIG. 43 is a diagram showing the imaginary part Im(z _q ) of the coordinate z _q of the 256QAM-UC signal point defined by DVB-C.2.

FIG. 44 is a diagram showing the real part Re(z _q ) of the coordinates z _q of the 1024QAM-UC (UC of 1024QAM) signal point defined by DVB-C.2. FIG. 45 is a diagram showing the imaginary part Im(z _q ) of the coordinate z _q of the 1024QAM-UC signal point defined by DVB-C.2.

FIG. 46 is a diagram showing the real part Re(z _q ) of the coordinates z _q of the 4096QAM-UC (UC of 4096QAM) signal point defined by DVB-C.2. FIG. 47 is a diagram showing the imaginary part Im(z _q ) of the coordinate z _q of the 4096QAM-UC signal point defined by DVB-C.2.

In FIGS. 36 to 47, y _i,q represents the (i+1)th bit from the beginning of the m-bit symbol of 2 ^m QAM (for example, 2 bits in QPSK). In addition, when transmitting (data mapped to) UC signal points, the average power of the signal points on the constellation can be normalized. Let P _ave be the mean square of _the absolute values of all signal points (coordinates) on the constellation _. P _ave ) can be done by multiplying each signal point z _q on the constellation.

The transmission system in FIG. 7 can use the UC defined by DVB-C.2 as described above.

48 to 56 are diagrams showing examples of coordinates of signal points of other NUCs.

That is, FIG. 48 is a diagram showing an example of coordinates of signal points of 16QAM-2D-NUC.

FIG. 49 is a diagram showing an example of coordinates of signal points of 64QAM-2D-NUC.

50 and 51 are diagrams showing examples of coordinates of signal points of 256QAM-2D-NUC.

Note that FIG. 51 is a diagram following FIG. 50 .

In FIGS. 48 to 51, as in FIG. 33, the coordinates of the signal point _zs are represented in the form of complex numbers, and j represents the imaginary unit.

48 to 51, w#k represents the coordinates of the signal point in the first quadrant of the constellation, as in FIG.

Here, as explained in FIG. 33, an m-bit symbol is represented by an integer value of 0 to 2 ^m -1, and if b=2 ^m /4, an integer value of 0 to 2 ^m -1 Symbols y(0), y(1), ..., y(2 ^m -1) represented by 1), y(2b) to y(3b-1), and y(3b) to y(4b-1).

In FIGS. 48-51, as in FIG. 33, the suffix k of w#k takes integer values ranging from 0 to b-1, and w#k is the symbol y(0) to y(b-1 ) represents the coordinates of the signal point corresponding to the symbol y(k).

Furthermore, in FIGS. 48 to 51, as in FIG. 33, the coordinates of the signal point corresponding to symbol y(k+3b) in the range of symbols y(3b) to y(4b-1) are -w#k is represented by

However, in FIG. 33, the coordinates of the signal point corresponding to symbol y(k+b) in the range of symbols y(b) to y(2b-1) are represented by -conj(w#k), and symbol y The coordinates of the signal point corresponding to the symbol y(k+2b) in the range from (2b) to y(3b-1) are represented by conj(w#k). sign is reversed.

That is, in FIGS. 48 to 51, the coordinates of the signal point corresponding to symbol y(k+b) in the range of symbols y(b) to y(2b-1) are represented by conj(w#k), The coordinates of the signal point corresponding to symbol y(k+2b) in the range of symbols y(2b) to y(3b-1) are represented by -conj(w#k).

FIG. 52 is a diagram showing an example of coordinates of signal points of 1024QAM-1D-NUC.

That is, FIG. 52 shows the real part Re(z _s ) and the imaginary part Im(z _s ) of the complex numbers as the coordinates of the signal point z _s of the 1024QAM-1D-NUC, the position vector u (component u#k of), and is a diagram showing the relationship of

FIG. 53 is a diagram showing the relationship between the 1024QAM symbol y and the position vector u (component u#k of) in FIG.

That is, now, let's take a 1024QAM 10-bit symbol y from its leading bit (most significant bit) as y _0,s , y _{1,s ,} y _2,s , y _3,s , y _4,s , y _5,s , _y6,s , _y7,s , _y8,s , and _y9,s .

FIG. 53A shows odd-numbered 5 bits _y0,s , _y2,s , _y4,s , _y6,s , _y8,s of a 10-bit symbol y, and a signal corresponding to the symbol y. It represents the correspondence between the position vector u#k representing the real part Re(z _s ) of (the coordinates of) the point z _s .

B in FIG. 53 shows the even-numbered 5 bits _y1,s , _y3,s , _y5,s , _y7,s , _y9,s of the 10-bit symbol y and the signal corresponding to the symbol y. It represents the correspondence relationship with the position vector u#k representing the imaginary part Im(z _s ) of the point z _s .

When the 1024QAM 10-bit symbol y is mapped to the 1024QAM-1D-NUC signal _{point zs} defined in FIGS. Since it is the same as the case described with reference to FIG. 35, the description is omitted.

FIG. 54 is a diagram showing an example of coordinates of signal points of 4096QAM-1D-NUC.

That is, FIG. 54 shows the relationship between the complex number real part Re(z _s ) and imaginary part Im(z _s ) as the coordinates of the signal point z _s of the 4096QAM-1D-NUC and the position vector u(u#k). It is a figure which shows.

55 and 56 are diagrams showing the relationship between the 4096QAM symbol y and the position vector u (component u#k of) in FIG.

That is, now, the 12-bit symbol y of 4096QAM is taken from the leading bit (most significant bit) of _y0,s , _y1,s , y2 _,s , _y3,s , _y4,s , y _5,s , _y6,s , _y7,s , _y8,s , _y9,s , _y10,s , _y11,s .

FIG. 55 shows odd-numbered 6 bits _y0,s , _y2,s , _y4,s , _y6,s , _y8,s , _y10,s of the 12-bit symbol y, and It represents the correspondence relationship with the position vector u#k representing the real part Re(z _s ) of the corresponding signal point z _s .

FIG. 56 shows even-numbered 6 bits _y1,s , _y3,s , _y5,s , _y7,s , _y9,s , _y11,s of the 12-bit symbol y, and It represents the correspondence relationship with the position vector u#k representing the imaginary part Im(z _s ) of the corresponding signal point z _s .

When the 4096QAM 12-bit symbol y is mapped to the 4096QAM-1D-NUC signal _{point zs} defined in FIGS. Since it is the same as the case described with reference to FIG. 35, the description is omitted.

In transmitting (data mapped to) the NUC signal points in FIGS. 48 to 56, the average power of the signal points on the constellation can be normalized. Let P _ave be the mean square of _the absolute values of all signal points (coordinates) on the constellation _. P _ave ) can be done by multiplying each signal point z _s on the constellation. Also, in FIG. 35 described above, odd-numbered bits of symbol y are associated with position vector u#k representing the imaginary part Im(z _s ) of signal point z _s , and even-numbered bits of symbol y is associated with the position vector u#k representing the real part Re(z _s ) of the signal point z _s . is associated with the position vector u#k representing the real part Re(z _s ) of signal point z _s , and the even-numbered bits of symbol y represent the imaginary part Im(z _s ) of signal point z _s It is associated with the position vector u#k.

<Block Interleaver 25>

FIG. 57 is a diagram for explaining block interleaving performed by block interleaver 25 in FIG.

Block interleaving is performed by dividing the LDPC code of one codeword into a part called part 1 and a part called part 2 from the beginning.

Letting the length of part 1 (number of bits) be Npart1 and the length of part 2 be Npart2, Npart1+Npart2 is equal to code length N.

Conceptually, in block interleaving, the column (vertical) direction as one direction is a storage area for storing Npart1/m bits, and the row direction orthogonal to the column direction is the number of bits of a symbol. Arranged by a number m equal to m, each column is partitioned from above into 360-bit subunits with a parallel factor P. This small column unit is also called a column unit.

In block interleaving, as shown in FIG. 57, writing part 1 of the 1-codeword LDPC code from the top to the bottom (column direction) of the first column unit of a column is equivalent to writing from the left to the right column. It is done towards

Then, when the writing to the first column unit of the rightmost column is completed, as shown in FIG. Part 1 of the LDPC code of one codeword is written in the same manner, starting from the rightward column.

When the writing of the part 1 of the LDPC code of one code word is completed, as shown in FIG. 57, the part 1 of the LDPC code is read in units of m bits in the row direction from the first row of all m columns. .

This m-bit unit of part 1 is provided from block interleaver 25 to mapper 117 (FIG. 8) as an m-bit symbol.

Part 1 is read in units of m bits, starting from the bottom row of m columns. is supplied from the block interleaver 25 to the mapper 117 as symbols of .

Therefore, part 1 is symbolized while being interleaved, and part 2 is symbolized by dividing into m bits sequentially without being interleaved.

Npart1/m, the column length, is a multiple of 360, which is the parallel factor P, so that Npart1/m is a multiple of 360, a one-codeword LDPC code has part 1 and part 2 can be divided into

FIG. 58 is a diagram showing an example of Part 1 and Part 2 of an LDPC code with a code length N of 69120 bits for each of QPSK, 16QAM, 64QAM, 256QAM, 1024QAM, and 4096QAM modulation schemes.

In FIG. 58, when the modulation scheme is 1024QAM, part 1 is 68400 bits and part 2 is 720 bits, and the modulation schemes are QPSK, 16QAM, 64QAM, 256QAM, and 4096QAM. In both cases, part 1 is 69120 bits and part 2 is 0 bits. The number of columns required for block interleaving is equal to the number m of bits in a symbol.

<Groupwise interleave>

FIG. 59 is a diagram for explaining the groupwise interleaving performed by the groupwise interleaver 24 of FIG.

In group-wise interleaving, as shown in FIG. 59, the LDPC code of one codeword is divided into 360-bit units equal to the parallel factor P from the beginning, and the 360 bits of one division are used as a bit group for one code. The LDPC codes of words are interleaved in bit groups according to a predetermined pattern (hereinafter also referred to as GW pattern).

Here, when the LDPC code of one codeword is divided into bit groups, the (i+1)-th bit group from the beginning is hereinafter also referred to as bit group i.

When the parallel factor P is 360, for example, an LDPC code with a code length N of 1800 bits is divided into 5 (=1800/360) bit groups of bit groups 0, 1, 2, 3 and 4. Further, for example, an LDPC code with a code length N of 69120 bits is divided into 192 (=69120/360) bit groups of bit groups 0, 1, .

Also, hereinafter, the GW pattern is represented by a sequence of numbers representing bit groups. For example, for an LDPC code with a code length N of 1800 bits, for example, the GW pattern 4,2,0,3,1 replaces the sequence of bit groups 0,1,2,3,4 with bit groups 4,2,0 , 3, 1 to be interleaved (rearranged).

For example, let x _i be the i+1-th code bit from the beginning of an LDPC code with a code length N of 1800 bits.

In this case, according to the group-wise interleaving of the GW pattern 4,2,0,3,1, the 1800-bit LDPC code { _x0 , _x1 ,..., _x1799 } is represented by { _x1440 , _x1441 , ...,x ₁₇₉₉ }，{x ₇₂₀ ,x ₇₂₁ ,...,x ₁₀₇₉ }，{x ₀ ,x ₁ ,...,x ₃₅₉ }，{x ₁₀₈₀ ,x ₁₀₈₁ ,...,x ₁₄₃₉ }, {x ₃₆₀ , x ₃₆₁ ,..., x ₇₁₉ } are interleaved.

The GW pattern is for each code length N of the LDPC code, each coding rate r, each modulation scheme, each constellation, and two or more of the code length N, coding rate r, modulation scheme, and constellation. It can be set for each combination.

<Example of GW pattern for LDPC code>

FIG. 60 is a diagram showing an example of a GW pattern for an LDPC code with a code length N of 69120 bits.

According to the GW pattern in FIG. 60, the sequence of bit groups 0 to 191 of the 69120-bit LDPC code is the bit group
12, 8, 132, 26, 3, 18, 19, 98, 37, 190, 123, 81, 95, 167, 76, 66, 27, 46, 105, 28, 29, 170, 20, 96, 35, 177, 24, 86, 114, 63, 52, 80, 119, 153, 121, 107, 97, 129, 57, 38, 15, 91, 122, 14, 104, 175, 150, 1, 124, 72, 90, 32, 161, 78, 44, 73, 134, 162, 5, 11, 179, 93, 6, 152, 180, 68, 36, 103, 160, 100, 138, 146, 9, 82, 187, 147, 7, 87, 17, 102, 69, 110, 130, 42, 16, 71, 2, 169, 58, 33, 136, 106, 140, 84, 79, 143, 156, 139, 55, 116, 4, 21, 144, 64, 70, 158, 48, 118, 184, 50, 181, 120, 174, 133, 115, 53, 127, 74, 25, 49, 88, 22, 89, 34, 126, 61, 94, 172, 131, 39, 99, 183, 163, 111, 155, 51, 191, 31, 128, 149, 56, 85, 109, 10, 151, 188, 40, 83, 41, 47, 178, 186, 43, 54, 164, 13, 142, 117, 92, 113, 182, 168, 165, 101, 171, 159, 60, 166, 77, 30, 67, 23, 0, 65, 141, 185, 112, 145, 135, 108, 176, 45, 148, 137, 125, 62, 75, 189, 59, 173, 154, 157
are interleaved alongside.

<Configuration example of receiving device 12>

FIG. 61 is a block diagram showing a configuration example of the receiving device 12 of FIG.

An OFDM processing unit (OFDM operation) 151 receives an OFDM signal from the transmitting device 11 (FIG. 7) and performs signal processing on the OFDM signal. Data obtained by signal processing performed by the OFDM processing unit 151 is supplied to a frame management unit (Frame Management) 152 .

The frame management unit 152 performs processing (frame interpretation) on a frame composed of data supplied from the OFDM processing unit 151, and converts the resulting target data signal and control data signal to a frequency deinterleaver. (Frequency Deinterleaver) 161 and 153, respectively.

The frequency deinterleaver 153 frequency deinterleaves the data from the frame management unit 152 on a symbol-by-symbol basis and supplies the data to the demapper 154 .

The demapper 154 demaps the data (the data on the constellation) from the frequency deinterleaver 153 based on the signal point arrangement (constellation) determined by the quadrature modulation performed on the transmitter 11 side. decoding) and orthogonal demodulation, and the resulting data (LDPC code (likelihood of)) is supplied to an LDPC decoder 155 .

The LDPC decoder 155 performs LDPC decoding of the LDPC code from the demapper 154 and supplies the resulting LDPC target data (BCH code here) to the BCH decoder 156 .

The BCH decoder 156 performs BCH decoding on the LDPC target data from the LDPC decoder 155 and outputs control data (signaling) obtained as a result.

On the other hand, the frequency deinterleaver 161 performs frequency deinterleaving on a symbol-by-symbol basis for the data from the frame management unit 152 and supplies the data to the SISO/MISO decoder (SISO/MISO decoder) 162 .

The SISO/MISO decoder 162 performs space-time decoding on the data from the frequency deinterleaver 161 and supplies it to a time deinterleaver (Time Deinterleaver) 163 .

A time deinterleaver 163 time-deinterleaves the data from the SISO/MISO decoder 162 on a symbol-by-symbol basis and supplies it to a demapper 164 .

The demapper 164 demaps the data (the data on the constellation) from the time deinterleaver 163 based on the signal point arrangement (constellation) determined by the orthogonal modulation performed on the transmitter 11 side. decoding) and orthogonal demodulation, and the resulting data is supplied to a bit deinterleaver 165 .

The bit deinterleaver 165 bit deinterleaves the data from the demapper 164 and supplies the LDPC code (likelihood thereof), which is the data after the bit deinterleaving, to the LDPC decoder 166 .

The LDPC decoder 166 performs LDPC decoding of the LDPC code from the bit deinterleaver 165 and supplies the resulting LDPC target data (BCH code here) to the BCH decoder 167 .

The BCH decoder 167 performs BCH decoding of the LDPC target data from the LDPC decoder 155 and supplies the resulting data to a BB descrambler (BB DeScrambler) 168 .

The BB descrambler 168 applies BB descramble to the data from the BCH decoder 167 and supplies the resulting data to a null deletion unit (Null Deletion) 169 .

A null deletion unit 169 deletes the nulls inserted by the padder 112 in FIG.

The demultiplexer 170 separates one or more streams (target data) multiplexed on the data from the null removal unit 169, performs necessary processing, and outputs as an output stream.

Note that the receiving device 12 can be configured without some of the blocks shown in FIG. That is, for example, when the transmitting device 11 (FIG. 8) is configured without the time interleaver 118, the SISO/MISO encoder 119, the frequency interleaver 120, and the frequency interleaver 124, the receiving device 12 A time deinterleaver 163, a SISO/MISO decoder 162, and a frequency deinterleaver 161, which are blocks corresponding to the time interleaver 118, SISO/MISO encoder 119, frequency interleaver 120, and frequency interleaver 124 of the transmission device 11, respectively. , and can be configured without the frequency deinterleaver 153 .

<Configuration example of bit deinterleaver 165>

FIG. 62 is a block diagram showing a configuration example of the bit deinterleaver 165 of FIG.

The bit deinterleaver 165 is composed of a block deinterleaver 54 and a groupwise deinterleaver 55, and performs (bit) deinterleaving of the symbol bits of the symbols that are the data from the demapper 164 (FIG. 61).

That is, the block deinterleaver 54 performs block deinterleaving corresponding to the block interleaving performed by the block interleaver 25 in FIG. Block deinterleaving is performed to return the positions of (the likelihood of) the code bits of the LDPC code rearranged by interleaving to their original positions, and the resulting LDPC code is supplied to the groupwise deinterleaver 55 .

The group-wise deinterleaver 55 performs group-wise deinterleaving corresponding to the group-wise interleaving performed by the group-wise interleaver 24 in FIG. That is, for example, the code bits of the LDPC code whose arrangement has been changed in bit group units by the groupwise interleaving described with reference to FIG.

Here, when the LDPC code supplied from the demapper 164 to the bit deinterleaver 165 is subjected to parity interleaving, groupwise interleaving, and block interleaving, the bit deinterleaver 165 performs parity interleaving corresponding to the parity interleaving. De-interleaving (reverse processing of parity interleaving, i.e., parity de-interleaving to restore the code bits of the LDPC code reordered by parity interleaving), block de-interleaving corresponding to block interleaving, and group-wise interleaving can do all of the group-wise deinterleaving corresponding to .

However, in the bit deinterleaver 165 of FIG. 62, the block deinterleaver 54 that performs block deinterleaving corresponding to block interleaving and the groupwise deinterleaver 55 that performs groupwise deinterleaving corresponding to groupwise interleaving are However, no parity deinterleaving block corresponding to the parity interleaving is provided and no parity deinterleaving is performed.

Therefore, from the bit deinterleaver 165 (the groupwise deinterleaver 55 of) to the LDPC decoder 166, block deinterleaving and groupwise deinterleaving are performed, and parity deinterleaving is not performed LDPC code is supplied.

The LDPC decoder 166 performs LDPC decoding of the LDPC code from the bit deinterleaver 165 with respect to the parity check matrix H of the type B scheme used for the LDPC encoding by the LDPC encoder 115 in FIG. and the transformation check matrix (Fig. 29) obtained by performing row permutation on the type A check matrix (Fig. 27). Output as the result of data decoding.

FIG. 63 is a flowchart for explaining the processing performed by the demapper 164, bit deinterleaver 165, and LDPC decoder 166 of FIG.

In step S111, the demapper 164 demaps the data from the time deinterleaver 163 (the data on the constellation mapped to the signal points), orthogonally demodulates it, and supplies it to the bit deinterleaver 165. , the process proceeds to step S112.

In step S112, the bit deinterleaver 165 deinterleaves (bit deinterleaves) the data from the demapper 164, and the process proceeds to step S113.

That is, in step S112, in the bit deinterleaver 165, the block deinterleaver 54 performs block deinterleaving on the data (symbols) from the demapper 164, and divides the code bits of the resulting LDPC code into groups. It is supplied to the wise deinterleaver 55 .

The group-wise deinterleaver 55 performs group-wise deinterleaving on the LDPC code from the block deinterleaver 54 and supplies the resulting LDPC code (likelihood thereof) to the LDPC decoder 166 .

In step S113, the LDPC decoder 166 performs LDPC decoding of the LDPC code from the groupwise deinterleaver 55 using the parity check matrix H used for the LDPC encoding by the LDPC encoder 115 in FIG. The transform check matrix obtained from the matrix H is used, and the data obtained as a result is output to the BCH decoder 167 as the decoding result of the LDPC target data.

Also in FIG. 62, as in the case of FIG. 9, for convenience of explanation, the block deinterleaver 54 that performs block deinterleaving and the groupwise deinterleaver 55 that performs groupwise deinterleaving are configured separately. However, the block deinterleaver 54 and the groupwise deinterleaver 55 can be configured integrally.

Also, if the transmitting device 11 does not perform group-wise interleaving, the receiving device 12 can be configured without the group-wise deinterleaver 55 that performs group-wise deinterleaving.

<LDPC decoding>

The LDPC decoding performed by the LDPC decoder 166 of FIG. 61 will be further described.

In the LDPC decoder 166 of FIG. 61, as described above, block deinterleaving and groupwise deinterleaving from the groupwise deinterleaver 55 are performed, and parity deinterleaving is not performed LDPC of the LDPC code For decoding, the parity check matrix H of the type B scheme used for LDPC encoding by the LDPC encoder 115 in FIG. This is performed using a transformation check matrix (FIG. 29) obtained by performing row permutation on the matrix (FIG. 27).

Here, LDPC decoding has been previously proposed, in which it is possible to suppress the operating frequency within a sufficiently feasible range while suppressing the circuit scale by performing LDPC decoding using a transform parity check matrix (for example, , see Patent No. 4224777).

Therefore, first, the previously proposed LDPC decoding using a transform parity check matrix will be described with reference to FIGS. 64 to 67. FIG.

FIG. 64 is a diagram showing an example parity check matrix H of an LDPC code with a code length N of 90 and a coding rate of 2/3.

In addition, in FIG. 64 (also in FIGS. 65 and 66 described later), 0 is represented by a period (.).

In the parity check matrix H of FIG. 64, the parity matrix has a staircase structure.

FIG. 65 is a diagram showing parity check matrix H′ obtained by performing row permutation of equation (11) and column permutation of equation (12) on parity check matrix H of FIG.

Line replacement: Line 6s+t+1 → Line 5t+s+1
(11)

Column permutation: 6x+y+61st column → 5y+x+61st column
(12)

However, in formulas (11) and (12), s, t, x, and y are integers in the range of 0 ≤ s < 5, 0 ≤ t < 6, 0 ≤ x < 5, 0 ≤ t < 6, respectively is.

According to the row permutation of equation (11), the 1st, 7th, 13th, 19th, and 25th rows, which are divided by 6 and have a remainder of 1, are the 1st, 2nd, 3rd, 4th, and 5th rows, respectively. The 2nd, 8th, 14th, 20th and 26th rows, which have a remainder of 2 when divided, are replaced with the 6th, 7th, 8th, 9th and 10th rows, respectively.

Further, according to the column permutation of equation (12), the 61st, 67th, 73rd, 79th, and 85th columns that have a remainder of 1 when divided by 6 are replaced by 61 , the 62nd, 63rd, 64th and 65th columns, and the 62nd, 68th, 74th, 80th and 86th columns that are divided by 6 with a remainder of 2 are the 66th, 67th, 68th, 69th and 70th columns respectively. Substitutions are made accordingly.

In this way, a matrix obtained by permuting the rows and columns of the parity check matrix H of FIG. 64 is the parity check matrix H' of FIG.

Here, even if the row permutation of the parity check matrix H is performed, the alignment of the code bits of the LDPC code is not affected.

In addition, the column permutation of equation (12) is the information length K is 60, the parallel factor P is 5, and the divisor q (=M/P) of the parity length M (here, 30) is 6, respectively.

Therefore, the parity check matrix H' in FIG. is a transformed parity check matrix obtained by performing at least column permutation to replace the columns of .

When the transformed parity check matrix H' of FIG. 65 is multiplied by the LDPC code of the original parity check matrix H of FIG. That is, if the row vector c obtained by performing the column permutation of equation (12) on the row vector c as the LDPC code (one codeword) of the original check matrix H is denoted by c′, then from the properties of the check matrix , Hc ^T are 0 vectors, so naturally H'c' ^T is also 0 vectors.

From the above, the transformed parity check matrix H' of FIG. 65 is a parity check matrix of the LDPC code c' obtained by performing the column permutation of Equation (12) on the LDPC code c of the original parity check matrix H.

Therefore, the LDPC code c of the original parity check matrix H is subjected to the column permutation of Equation (12), and the LDPC code c' after the column permutation is decoded using the transform parity check matrix H' of FIG. 65 (LDPC decoding). Then, by performing the inverse permutation of the column permutation of Equation (12) on the decoding result, the same decoding result as when the LDPC code of the original parity check matrix H is decoded using the parity check matrix H can be obtained. can be done.

FIG. 66 is a diagram showing the transform parity check matrix H′ of FIG. 65 spaced in units of a 5×5 (5 rows by 5 columns) matrix.

In FIG. 66, the transformation parity check matrix H′ is a 5×5 (=P×P) identity matrix that is the parallel factor P, and a matrix in which one or more of the 1s of the identity matrix are 0 (hereinafter referred to as appropriate , quasi-identity matrix), a matrix obtained by cyclically shifting the identity matrix or quasi-identity matrix (hereinafter referred to as a shift matrix as appropriate), the sum of two or more of the identity matrix, the quasi-identity matrix, or the shift matrix (hereinafter referred to as a sum matrix as appropriate), which is represented by a combination of 5×5 0 matrices.

It can be said that the transformation parity check matrix H' in FIG. 66 is composed of a 5×5 identity matrix, a quasi-identity matrix, a shift matrix, a sum matrix, and a 0 matrix. Therefore, these 5×5 matrices (identity matrix, quasi-identity matrix, shift matrix, sum matrix, zero matrix) that constitute the transform check matrix H′ are hereinafter referred to as constituent matrices as appropriate.

An architecture that simultaneously performs P check node operations and P variable node operations can be used for decoding an LDPC code of a parity check matrix represented by a P×P constituent matrix.

FIG. 67 is a block diagram showing a configuration example of a decoding device that performs such decoding.

That is, FIG. 67 decodes the LDPC code using at least the transform parity check matrix H′ of FIG. 1 shows a configuration example of a decoding device.

67 includes a branch data storage memory 300 consisting of six FIFOs 300 ₁ to 300 ₆ , a selector 301 for selecting FIFOs 300 ₁ to 300 ₆ , a check node calculator 302, two cyclic shift circuits 303 and 308, Branch data storage memory 304 consisting of 18 FIFOs 304 ₁ to 304 ₁₈ , selector 305 for selecting FIFOs 304 ₁ to 304 ₁₈ , received data memory 306 for storing received data, variable node calculator 307 , decoded word calculator 309 , a received data rearranging section 310 and a decoded data rearranging section 311 .

First, a method of storing data in the branch data storage memories 300 and 304 will be described.

The edge data storage memory 300 is composed of six FIFOs 300 1 to _{300 6} obtained by dividing the number of rows of 30 in the transform parity check matrix H′ of FIG. 66 by the number of rows of the component matrix (parallel factor P) of 5. . The FIFO 300 _y (y=1, 2, . . . , 6) consists of a plurality of storage areas with a number of stages, and each storage area has 5 rows and columns (parallel factor P) of the constituent matrix. Messages corresponding to one branch can be read and written at the same time. The number of stages of the storage area of the FIFO 300 _y is 9, which is the maximum number of 1s (Hamming weights) in the row direction of the transformation parity check matrix in FIG.

In the FIFO 300 ₁ , data (messages v _i from variable nodes) corresponding to positions of 1 in the first to fifth rows of the conversion check matrix H′ of FIG. 66 are packed horizontally in each row. stored in the form (ignoring 0). That is, if the j-th row and i-th column are expressed as (j, i), the memory area of the first stage of the FIFO 300 ₁ stores (1, 1) to (5, 5) of the transform parity check matrix H'. The data corresponding to the position of 1 in the 5×5 unit matrix of is stored. A shift matrix from (1,21) to (5,25) of the transform parity matrix H' (a shift matrix obtained by cyclically shifting a 5×5 unit matrix by three cyclic shifts to the right) is stored in the second storage area. The data corresponding to the position of 1 in is stored. Similarly, data is stored in the third to eighth storage areas in association with the conversion parity check matrix H'. Then, the shift matrix from (1,86) to (5,90) of the transformation check matrix H' (1 in the first row of the 5×5 identity matrix is replaced with 0) is stored in the storage area of the ninth stage. Data corresponding to the position of 1 in the shift matrix obtained by cyclically shifting the shift matrix to the left by one is stored.

The FIFO 300 ₂ stores data corresponding to the position of 1 from the 6th row to the 10th row of the transformation parity check matrix H' in FIG. That is, in the storage area of the first stage of the FIFO 300 ₂ , the sum matrix of (6, 1) to (10, 5) of the transform parity check matrix H' (a 5×5 identity matrix is cyclically shifted to the right by one The data corresponding to the position of 1 in the first shift matrix constituting the sum matrix (which is the sum of the first shift matrix obtained by shifting the first shift matrix and the second shift matrix obtained by cyclically shifting two to the right) is stored. Further, in the storage area of the second stage, data corresponding to the position of 1 of the second shift matrix forming the sum matrix of (6, 1) to (10, 5) of the transformation parity check matrix H' is stored. be.

That is, for a component matrix with a weight of 2 or more, the component matrix is a P×P identity matrix with a weight of 1, a quasi-identity matrix in which one or more of the 1 elements of the identity matrix are 0, or Data corresponding to the position of 1 in the identity matrix, quasi-identity matrix, or shift matrix whose weight is 1 when the identity matrix or quasi-identity matrix is expressed in the form of the sum of multiple shift matrices obtained by cyclically shifting the identity matrix or quasi-identity matrix. (messages corresponding to branches belonging to the identity matrix, quasi-identity matrix, or shift matrix) are stored in the same address (the same FIFO among FIFOs 300 ₁ to 300 ₆ ).

Data are stored in the third to ninth storage areas in association with the transformation parity check matrix H'.

The FIFOs 300 ₃ to 300 ₆ also store data in association with the conversion parity check matrix H′.

The branch data storage memory 304 is composed of 18 FIFOs 304 ₁ to 304 ₁₈ obtained by dividing the 90 columns of the transform parity check matrix H' by 5, which is the number of columns of the component matrix (parallel factor P). The FIFO 304 _x (x=1, 2, . . . , 18) consists of a plurality of stages of storage areas. Messages corresponding to one branch can be read and written at the same time.

In the FIFO 304 ₁ , data (message u _j from the check node) corresponding to the positions of 1 in the first to fifth columns of the conversion parity check matrix H′ of FIG. 66 are packed vertically in each column. stored in the same format (ignoring 0). That is, the first storage area of the FIFO 304 ₁ stores the data corresponding to the position of 1 in the 5×5 identity matrix from (1,1) to (5,5) of the transformation parity check matrix H′. . In the storage area of the second stage, the sum matrix of (6,1) to (10,5) of the transformation check matrix H' (the first shift obtained by cyclically shifting the 5×5 identity matrix by one The data corresponding to the position of 1 in the first shift matrix constituting the sum matrix, which is the sum of the matrix and the second shift matrix cyclically shifted by two to the right, is stored. Further, the storage area of the third stage stores data corresponding to the position of 1 in the second shift matrix forming the sum matrix of (6, 1) to (10, 5) of the transform parity check matrix H'. be.

That is, for a component matrix with a weight of 2 or more, the component matrix is a P×P identity matrix with a weight of 1, a quasi-identity matrix in which one or more of the 1 elements of the identity matrix are 0, or Data corresponding to the position of 1 in the identity matrix, quasi-identity matrix, or shift matrix whose weight is 1 when the identity matrix or quasi-identity matrix is expressed in the form of the sum of multiple shift matrices obtained by cyclically shifting the identity matrix or quasi-identity matrix. (messages corresponding to branches belonging to the identity matrix, quasi-identity matrix, or shift matrix) are stored in the same address (the same FIFO among FIFOs 304 ₁ to 304 ₁₈ ).

Data are stored in the fourth and fifth storage areas in association with the transformation parity check matrix H'. The number of stages of the storage area of this FIFO 304 ₁ is 5, which is the maximum number of 1's (Hamming weights) in the row direction in the first to fifth columns of the transformation parity check matrix H'.

The FIFOs 304 ₂ and 304 ₃ also store data in association with the conversion parity check matrix H′, and each has a length (number of stages) of five. Similarly, the FIFOs 304 ₄ to 304 ₁₂ store data in association with the conversion parity check matrix H', each having a length of three. Similarly, the FIFOs 304 ₁₃ to 304 ₁₈ store data in association with the transform parity check matrix H', each having a length of two.

Next, the operation of the decoding device in FIG. 67 will be described.

The branch data storage memory 300 consists of 6 FIFOs 300 ₁ to 300 ₆ , and indicates to which row of the transform check matrix H' in FIG. 66 the 5 messages D311 supplied from the preceding cyclic shift circuit 308 belong. According to information (matrix data) D312, a FIFO for storing data is selected from among FIFOs ₃₀₀₁ to ₃₀₀₆ , and five messages D311 are collectively stored in the selected FIFO in order. When reading data, the branch data storage memory 300 sequentially reads five messages _D3001 from the FIFO ₃₀₀₁ and supplies them to the selector 301 in the next stage. After reading the messages from the FIFO 300 ₁ , the branch data storage memory 300 sequentially reads the messages from the FIFOs 300 ₂ to 300 ₆ and supplies them to the selector 301 .

The selector 301 selects five messages from the FIFOs from which data is currently being read out of the FIFOs 300 ₁ to 300 ₆ according to the select signal D301, and supplies them to the check node calculator 302 as messages D302.

The check node calculator 302 consists of five check node calculators 302 ₁ to 302 ₅ , and uses messages D302 (D302 ₁ to D302 ₅ ) (messages v _i in equation (7)) supplied through the selector 301 to A check node operation is performed according to equation (7), and five messages D303 (D303 ₁ to D303 ₅ ) obtained as a result of the check node operation (messages u _j in equation (7)) are supplied to the cyclic shift circuit 303 .

The cyclic shift circuit 303 shifts the five messages D303 ₁ through D303 ₅ obtained by the check node calculation unit 302 by the number of unit matrices (or quasi-unit matrices) whose corresponding branches are the originals in the transform parity check matrix H′. Based on the information (matrix data) D305 as to whether it has been click-shifted, cyclic shift is performed, and the result is supplied to the branch data storage memory 304 as a message D304.

The branch data storage memory 304 consists of 18 FIFOs 304 ₁ to 304 ₁₈ , and according to the information D 305 to which row of the conversion check matrix H′ the five messages D 304 supplied from the preceding cyclic shift circuit 303 belong. , a FIFO for storing data is selected from FIFOs 304 ₁ to 304 ₁₈ , and five messages D304 are collectively stored in the selected FIFO in order. When reading data, the branch data storage memory 304 sequentially reads five messages _D3061 from the FIFO ₃₀₄₁ and supplies them to the selector 305 in the next stage. After reading data from the FIFO 304 ₁ , the branch data storage memory 304 sequentially reads messages from the FIFOs 304 ₂ to 304 ₁₈ and supplies them to the selector 305 .

The selector 305 selects five messages from the FIFOs from which data is currently being read out of the FIFOs 304 ₁ to 304 ₁₈ according to the select signal D307, and outputs them as messages D308 from the variable node calculator 307 and the decoded word calculator. 309.

On the other hand, received data rearrangement section 310 rearranges LDPC code D313 corresponding to parity check matrix H in FIG. It is supplied to the received data memory 306 . Received data memory 306 calculates and stores received LLRs (logarithmic likelihood ratios) from received data D314 supplied from received data rearrangement section 310, and collects the received LLRs by five as received value D309. , to the variable node calculator 307 and the decoded word calculator 309 .

The variable node calculator 307 consists of five variable node calculators 307 ₁ to 307 ₅ , and receives messages D308 (D308 ₁ to D308 ₅ ) (messages u _j in equation (1)) supplied through the selector 305 and received data Using the five received values D309 (received value u _0i of equation (1)) supplied from memory 306 for variable node calculation according to equation (1), messages D310 (D310 ₁ to D310 ₅ ) (message v _i in equation (1)) to the cyclic shift circuit 308 .

The cyclic shift circuit 308 cyclically shifts the messages D310 ₁ to D310 ₅ calculated by the variable node calculation unit 307 by the number of identity matrices (or quasi-identity matrices) whose corresponding branches are the originals in the transform parity check matrix H′. Based on the information as to whether or not the data has been cyclically shifted, the result is supplied to the branch data storage memory 300 as a message D311.

One cycle of decoding (variable node operation and check node operation) of the LDPC code can be performed by repeating the above operations. After decoding the LDPC code a predetermined number of times, the decoding device in FIG. 67 obtains and outputs the final decoding result in decoded word calculation section 309 and decoded data rearrangement section 311 .

That is, the decoded word calculator 309 is composed of five decoded word calculators 309 ₁ to 309 ₅ , and five messages D308 (D308 ₁ to D308 ₅ ) output by the selector 305 (message u _j in equation (5)) and , using the five received values D309 (received values u _0i in equation (5)) supplied from the received data memory 306, and as the final stage of decoding multiple times, based on equation (5), the decoding result (decoding word), and the resulting decoded data D315 is supplied to the decoded data rearrangement unit 311.

The decoded data rearrangement unit 311 performs inverse permutation of the column permutation of equation (12) on the decoded data D315 supplied from the decoded word calculation unit 309, thereby rearranging the order, and the final decoding result Output as D316.

As described above, one or both of row permutation and column permutation are applied to the parity check matrix (original parity check matrix), and one or more of the 1s of the P × P unit matrix and its elements are changed to 0. A quasi-identity matrix, a shift matrix obtained by cyclically shifting an identity matrix or a quasi-identity matrix, a sum matrix that is the sum of multiple identity matrices, quasi-identity matrices, or shift matrices, a combination of P×P zero matrices, that is, By converting to a parity check matrix (transformation parity check matrix) that can be represented by a combination of component matrices, decoding of LDPC codes can be performed by performing check node operation and variable node operation with P It is possible to adopt an architecture in which they are performed simultaneously. When adopting an architecture that simultaneously performs P node operations (check node operations and variable node operations), the number of which is smaller than the number of rows and columns of the parity check matrix, the number of node operations equal to the number of rows and columns of the parity check matrix is used. As compared with the case of simultaneously performing multiple iterations, a large number of iterative decoding operations can be performed while keeping the operating frequency within a feasible range.

The LDPC decoder 166 constituting the receiving device 12 of FIG. 61 performs LDPC decoding by performing P check node calculations and P variable node calculations at the same time, for example, similarly to the decoding device of FIG.

That is, to simplify the explanation, the parity matrix parity matrix shown in FIG. parity interleaver 23 of the transmitting device 11 performs parity interleaving for interleaving the K+qx+y+1-th code bit into the position of the K+Py+x+1-th code bit. is performed by setting the information length K to 60, the parallel factor P to 5, and the divisor q (=M/P) of the parity length M to 6, respectively.

Since this parity interleaving corresponds to the column permutation of equation (12) as described above, the LDPC decoder 166 does not need to perform the column permutation of equation (12).

Therefore, in the receiving device 12 of FIG. 61, as described above, the groupwise deinterleaver 55 sends the LDPC code for which parity deinterleaving is not performed to the LDPC decoder 166, that is, the sequence of equation (12). A permuted LDPC code is supplied, and the LDPC decoder 166 performs the same processing as the decoding device in FIG. 67 except that the column permutation of equation (12) is not performed.

That is, FIG. 68 is a diagram showing a configuration example of the LDPC decoder 166 of FIG.

68, LDPC decoder 166 is configured in the same manner as the decoding device of FIG. 67 except that received data rearrangement section 310 of FIG. Since the processing is the same as that of the decoding device in FIG.

As described above, the LDPC decoder 166 can be configured without the reception data rearrangement section 310, so that the scale can be reduced as compared with the decoding apparatus in FIG.

64 to 68, in order to simplify the explanation, the code length N of the LDPC code is 90, the information length K is 60, and the parallel factor (the number of rows and columns of the constituent matrix) P is 5. , the divisor q (=M/P) of the parity length M is 6, respectively, but the code length N, the information length K, the parallel factor P, and the divisor q (=M/P) are respectively It is not limited to values.

That is, in the transmission device 11 of FIG. 8, the LDPC encoder 115 outputs, for example, the code length N of 64800, 16200, 69120, etc., the information length K of N-Pq (= N-M), the parallel factor P is 360, and the divisor q is M/P, respectively. The LDPC decoder 166 of FIG. Therefore, it can be applied to LDPC decoding.

Further, after the LDPC code is decoded by the LDPC decoder 166, the parity part of the decoding result is unnecessary, and only the information bits of the decoding result are output. can be configured.

<Configuration example of block deinterleaver 54>

FIG. 69 is a diagram for explaining block deinterleaving performed by the block deinterleaver 54 of FIG.

In the block deinterleaving, the sequence of the code bits of the LDPC code is restored (restored) to the original sequence by performing the processing opposite to the block interleaving of the block interleaver 25 described with reference to FIG.

That is, in block deinterleaving, for example, similarly to block interleaving, the LDPC code is written to and read from m columns equal to the number of bits of the symbol m, so that the code bit sequence of the LDPC code is restored to the original sequence. returned.

However, in block deinterleaving, LDPC codes are written in the order in which LDPC codes are read out in block interleaving. Furthermore, in block deinterleaving, reading of LDPC codes is performed in the order in which the LDPC codes are written in block interleaving.

That is, for part 1 of the LDPC code, as shown in FIG. 69, the part 1 of the LDPC code in m-bit symbol units is written in the row direction from the first row of all m columns. That is, the code bit of the LDPC code, which is an m-bit symbol, is written in the row direction.

Writing part 1 in units of m bits is performed sequentially toward the row below m columns, and when part 1 writing is completed, as shown in FIG. , reading part 1 downwards from left to right in columns.

When reading up to the rightmost column is completed, as shown in FIG. 69, returning to the leftmost column, reading part 1 from the top to the bottom of the second column unit of the column is performed from left to right. Then, part 1 of the LDPC code of one codeword is read in the same manner.

When part 1 of the 1-codeword LDPC code is read out, the m-bit symbol unit of part 2, which is in the m-bit symbol unit, is sequentially concatenated after part 1, whereby the symbol unit is returned to the code bit array of the original 1-codeword LDPC code (the LDCP code before block interleaving).

<Another configuration example of the bit deinterleaver 165>

FIG. 70 is a block diagram showing another configuration example of the bit deinterleaver 165 of FIG.

In the figure, parts corresponding to those in FIG. 62 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

That is, the bit deinterleaver 165 in FIG. 70 has the same configuration as in FIG. 62 except that the parity deinterleaver 1011 is newly provided.

In FIG. 70, the bit deinterleaver 165 is composed of a block deinterleaver 54, a groupwise deinterleaver 55, and a parity deinterleaver 1011, and performs bit deinterleaving of the code bits of the LDPC code from the demapper 164. .

That is, the block deinterleaver 54 performs block deinterleaving corresponding to the block interleaving performed by the block interleaver 25 of the transmitting device 11 (reverse processing of block interleaving) for the LDPC code from the demapper 164, that is, block interleaving block deinterleaving is performed to return the positions of the code bits replaced by .

The groupwise deinterleaver 55 performs groupwise deinterleaving corresponding to the groupwise interleaving as the rearrangement processing performed by the groupwise interleaver 24 of the transmission device 11 on the LDPC code from the block deinterleaver 54 .

The LDPC code obtained as a result of groupwise deinterleaving is supplied from groupwise deinterleaver 55 to parity deinterleaver 1011 .

The parity deinterleaver 1011 performs parity deinterleaving corresponding to the parity interleaving performed by the parity interleaver 23 of the transmitting device 11 (the reverse of parity interleaving) on code bits after groupwise deinterleaving by the groupwise deinterleaver 55. processing), that is, parity deinterleaving is performed to return the code bits of the LDPC code whose order has been changed by parity interleaving to the original order.

An LDPC code obtained as a result of parity deinterleaving is supplied from parity deinterleaver 1011 to LDPC decoder 166 .

Therefore, in the bit deinterleaver 165 of FIG. 70, the LDPC decoder 166 includes block deinterleaving, groupwise deinterleaving, and parity deinterleaving LDPC code, that is, LDPC encoding according to the parity check matrix H provides an LDPC code obtained by

The LDPC decoder 166 performs LDPC decoding of the LDPC code from the bit deinterleaver 165 using the parity check matrix H used for the LDPC encoding by the LDPC encoder 115 of the transmitting device 11 .

That is, for the type B scheme, the LDPC decoder 166 performs LDPC decoding of the LDPC code from the bit deinterleaver 165, and the parity check matrix H (of the type B scheme) used by the LDPC encoder 115 of the transmitting device 11 for LDPC encoding. This is performed using the parity check matrix itself, or using a transformed parity check matrix obtained by at least performing column permutation corresponding to parity interleaving on the parity check matrix H. In addition, for the type A scheme, the LDPC decoder 166 performs LDPC decoding of the LDPC code from the bit deinterleaver 165, and the parity check matrix (type A scheme) used by the LDPC encoder 115 of the transmitting device 11 for LDPC encoding ( FIG. 27) using a parity check matrix (FIG. 28) obtained by performing column permutation, or a transform parity check matrix (FIG. 29) obtained by performing row permutation on the parity check matrix (FIG. 27) used for LDPC coding conduct.

Here, in FIG. 70, an LDPC code obtained by LDPC encoding according to parity check matrix H is supplied from (parity deinterleaver 1011 of) bit deinterleaver 165 to LDPC decoder 166. LDPC decoding of the code, parity check matrix H itself of the type B scheme used for LDPC encoding by the LDPC encoder 115 of the transmitting device 11, or the parity check matrix of the type A scheme used for LDPC encoding (FIG. 27) column permutation 28), the LDPC decoder 166 is, for example, a full serial decoder that sequentially computes messages (check node messages, variable node messages) node by node. It consists of a decoding device that performs LDPC decoding by a coding (full serial decoding) method and a decoding device that performs LDPC decoding by a full parallel decoding method that simultaneously (parallelly) performs message calculations for all nodes. be able to.

Further, in the LDPC decoder 166, the LDPC decoding of the LDPC code is performed at least by performing column permutation corresponding to parity interleaving for the parity check matrix H of the type B scheme used for the LDPC encoding by the LDPC encoder 115 of the transmitting device 11. In the case of using the obtained transform check matrix or the transform check matrix (FIG. 29) obtained by performing row permutation on the type A check matrix (FIG. 27) used for LDPC encoding, the LDPC decoder 166 is a decoding device with an architecture that simultaneously performs P check node operations and variable node operations (or a divisor of P other than 1), and is similar to column permutation (parity interleaving) for obtaining a transform parity check matrix By subjecting the LDPC code to column permutation, the decoding device (FIG. 67) having a received data rearrangement section 310 that rearranges the code bits of the LDPC code can be configured.

For convenience of explanation, FIG. 70 shows block deinterleaver 54 for block deinterleaving, groupwise deinterleaver 55 for groupwise deinterleaving, and parity deinterleaver 1011 for parity deinterleaving. , are configured separately, but two or more of the block deinterleaver 54, the groupwise deinterleaver 55, and the parity deinterleaver 1011 are the parity interleaver 23, the groupwise interleaver 24, And, like the block interleaver 25, it can be constructed integrally.

<Configuration example of receiving system>

FIG. 71 is a block diagram showing a first configuration example of a reception system to which the reception device 12 can be applied.

In FIG. 71, the receiving system comprises an acquisition section 1101 , a transmission path decoding processing section 1102 and an information source decoding processing section 1103 .

Acquisition unit 1101 receives a signal including an LDPC code obtained by at least LDPC-encoding LDPC target data such as image data and audio data of a program, for example, digital terrestrial broadcasting, digital satellite broadcasting, CATV network, Internet, etc. is acquired via a transmission path (communication path) (not shown) such as a network of , and is supplied to the transmission path decoding processing unit 1102 .

Here, if the signal acquired by the acquiring unit 1101 is broadcast from a broadcasting station via a terrestrial wave, a satellite wave, a CATV (Cable Television) network, or the like, the acquiring unit 1101 may include a tuner, a It consists of STB (Set Top Box) etc. In addition, when the signal acquired by the acquisition unit 1101 is, for example, transmitted from a web server by multicast such as IPTV (Internet Protocol Television), the acquisition unit 1101 may use, for example, a NIC (Network Interface Card) or the like. network I/F (Interface).

The transmission path decoding processing unit 1102 corresponds to the receiving device 12 . Transmission path decoding processing section 1102 performs transmission path decoding processing including at least processing for correcting errors occurring in the transmission path on the signal acquired by acquisition section 1101 via the transmission path, and converts the resulting signal into It is supplied to the information source decoding processing unit 1103 .

That is, the signal acquired by the acquisition unit 1101 via the transmission path is a signal obtained by at least performing error correction coding for correcting errors occurring in the transmission path, and the transmission path decoding processing unit 1102 , such a signal is subjected to, for example, transmission line decoding processing such as error correction processing.

Here, error correction coding includes, for example, LDPC coding and BCH coding. Here, at least LDPC encoding is performed as error correction encoding.

Also, the channel decoding process may include demodulation of the modulated signal.

Information source decoding processing section 1103 performs information source decoding processing including at least processing for decompressing compressed information to original information on the signal subjected to transmission path decoding processing.

That is, the signal acquired by the acquisition unit 1101 via the transmission path may be subjected to compression encoding for compressing information in order to reduce the amount of data such as images and voices as information. In this case, information source decoding processing section 1103 performs information source decoding processing such as processing (decompression processing) for decompressing compressed information to original information on the signal subjected to transmission path decoding processing.

Note that if the signal acquired by the acquisition unit 1101 via the transmission line is not compression-encoded, the information source decoding processing unit 1103 does not perform processing for decompressing the compressed information to the original information. can't break

Here, as decompression processing, there is MPEG decoding, for example. Also, the transmission path decoding processing may include descrambling and the like in addition to decompression processing.

In the reception system configured as described above, in the acquisition unit 1101, for example, compression encoding such as MPEG encoding is applied to data such as images and audio, and furthermore, error correction encoding such as LDPC encoding is performed. The encoded signal is acquired via a transmission line and supplied to the transmission line decoding processing unit 1102 .

In transmission path decoding processing section 1102, the signal from acquisition section 1101 is subjected to, for example, the same processing as that performed by receiving apparatus 12 as transmission path decoding processing, and the signal obtained as a result is used as an information source. It is supplied to the decoding processing unit 1103 .

The information source decoding processing unit 1103 performs information source decoding processing such as MPEG decoding on the signal from the transmission path decoding processing unit 1102, and outputs an image or sound obtained as a result.

The reception system of FIG. 71 as described above can be applied to, for example, a television tuner for receiving television broadcasting as digital broadcasting.

Note that the acquisition unit 1101, the transmission path decoding processing unit 1102, and the information source decoding processing unit 1103 are each configured as one independent device (hardware (IC (Integrated Circuit), etc.) or software module). It is possible to

In addition, regarding the acquisition unit 1101, the transmission channel decoding processing unit 1102, and the information source decoding processing unit 1103, a set of the acquisition unit 1101 and the transmission channel decoding processing unit 1102, or a set of the transmission channel decoding processing unit 1102 and the information source decoding processing It is possible to configure the set of the section 1103, the acquisition section 1101, the transmission path decoding processing section 1102, and the information source decoding processing section 1103 as one independent device.

FIG. 72 is a block diagram showing a second configuration example of a reception system to which the reception device 12 can be applied.

In the figure, parts corresponding to those in FIG. 71 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

The receiving system of FIG. 72 is common to the case of FIG. 71 in that it has an acquisition unit 1101, a transmission path decoding processing unit 1102, and an information source decoding processing unit 1103, and an output unit 1111 is newly provided. 71 is different from the case of FIG.

The output unit 1111 is, for example, a display device for displaying images or a speaker for outputting audio, and outputs images, audio, etc. as signals output from the information source decoding processing unit 1103 . That is, the output unit 1111 displays images or outputs audio.

The reception system of FIG. 72 as described above can be applied to, for example, a TV (television receiver) for receiving television broadcasting as digital broadcasting, a radio receiver for receiving radio broadcasting, and the like.

Note that when the signal acquired by the acquisition unit 1101 is not compression-encoded, the signal output by the transmission path decoding processing unit 1102 is supplied to the output unit 1111 .

FIG. 73 is a block diagram showing a third configuration example of a reception system to which the reception device 12 can be applied.

In the figure, parts corresponding to those in FIG. 71 are denoted by the same reference numerals, and description thereof will be omitted as appropriate.

The reception system in FIG. 73 is common to the case in FIG. 71 in that it has an acquisition section 1101 and a transmission path decoding processing section 1102 .

However, the receiving system in FIG. 73 is different from the case in FIG. 71 in that the information source decoding processing section 1103 is not provided and the recording section 1121 is newly provided.

The recording unit 1121 records a signal (for example, a TS packet of MPEG TS) output by the transmission path decoding processing unit 1102 in a recording (storage) medium such as an optical disk, a hard disk (magnetic disk), or a flash memory. cause).

The reception system of FIG. 73 as described above can be applied to a recorder or the like for recording television broadcasting.

In FIG. 73, the receiving system is configured by providing an information source decoding processing unit 1103. In the information source decoding processing unit 1103, the signal after the information source decoding processing is performed, that is, the image obtained by decoding and the Audio can be recorded by the recording unit 1121 .

<Punctured LDPC code>

FIG. 74 is a diagram explaining a punctured LDPC code.

For data transmission in the transmission system of FIG. 7, in addition to using an LDPC code obtained by performing LDPC coding of information bits based on a parity check matrix, some bits of the LDPC code obtained by LDPC coding are punctured ( deletion) can be used.

Hereinafter, the code length of the punctured LDPC code is represented by N, for example N=69120 (bits).

Let K be the information length of an information bit, and r be the coding rate of a punctured LDPC code. The coding rate r is represented by the formula r=K/N.

In punctured LDPC coding in which information bits of information length K are encoded into a punctured LDPC code of coding rate r, as shown in FIG. By performing LDPC encoding of information bits of information length K = N × r based on an extended parity check matrix in which each row and column of the parity check matrix is extended by a predetermined puncture length L, parity length M = N + An extended LDPC code with L−K parity bits is generated.

Then, in punctured LDPC coding, by puncturing the beginning of the information bit of the extended LDPC code by puncturing length L, a punctured LDPC code with code length N and coding rate r is generated.

The code length of the extended LDPC code is N+L bits, and the bits of the puncture length L are punctured from the N+L bits. A punctured LDPC code is obtained.

A punctured LDPC code contains only K-L bits, not K bits, as information bits. Since the punctured LDPC code obtained by LDPC encoding has N bits, the coding rate r of the punctured LDPC code is K/N.

FIG. 75 is a diagram for explaining the structure of an extended parity check matrix of the type A scheme that encodes K-bit information bits into an N+L-bit extended LDPC code.

FIG. 75A shows the structure of a type A code parity check matrix (hereinafter also referred to as a type A regular parity check matrix) with code length N and coding rate r.

The structure of the type A regular parity check matrix is as described in FIG.

That is, the type A regular parity check matrix is a matrix of N-K rows and N columns composed of an A matrix, a B matrix, a C matrix, a D matrix, and a Z matrix.

Then, the A matrix is a matrix of M1 rows and K columns, the B matrix is a matrix of M1 rows and M1 columns, the C matrix is a matrix of N-K-M1 (=M2) rows and K + M1 columns, and the D matrix is A unit matrix of N-K-M1 (=M2) rows and N-K-M1 (=M2) columns, and the Z matrix is a zero matrix of M1 rows and N-K-M1 (=M2) columns, respectively.

FIG. 75B shows the structure of an extended parity check matrix (hereinafter also referred to as type A extended parity check matrix) in which each row and column is extended by a predetermined puncture length L with respect to the type A regular parity check matrix of FIG. showing.

The type A extended parity check matrix is composed of an A matrix, a B matrix, a C matrix, a D matrix, and a Z matrix, like the type A regular parity check matrix.

However, the type A extended parity check matrix is a matrix of N+L−K rows and N+L columns in which each of the rows and columns is extended by the puncture length L as compared to the type A regular parity check matrix.

Then, the A matrix becomes a matrix with M1 rows and K columns, the B matrix becomes a matrix with M1 rows and M1 columns, the C matrix becomes a matrix with N+L-K-M1 rows and K+M1 columns, and the D matrix becomes M2( =N+L-K-M1) rows and M2 columns, and the Z matrix is a zero matrix with M1 rows and M2 (=N+L-K-M1) columns.

Here, the parity length M of the type A regular parity check matrix is represented by the formula M=N−K, and the parity length M of the type A extended parity check matrix is represented by the formula M=N+L−K. Therefore, the type A extended parity check matrix has a parity length M longer by the puncture length L than the type A regular parity check matrix.

If the parity length M is expressed by the formula M=M1+M2 using the parameter M1, the type A regular parity check matrix M2 is expressed by the formula M2=N-K-M1, and the type A extended parity check matrix M2 is , represented by the formula M2=N+L-K-M1.

In the type A extended parity check matrix, one or both of M1 and M2 are larger than in the type A regular parity check matrix.

FIG. 76 is a diagram illustrating the structure of an extended parity check matrix of the type B scheme that encodes K-bit information bits into an N+L-bit extended LDPC code.

FIG. 76A shows the structure of a type B code parity check matrix (hereinafter also referred to as a type B regular parity check matrix) with code length N and coding rate r.

The structure of the type B regular parity check matrix is as described in FIG.

That is, the type B regular check matrix is a matrix of M (=NK) rows and N columns in which the information matrix H _A corresponding to the information bits and the parity matrix H _T corresponding to the parity bits are arranged in the horizontal direction. ing.

The information matrix H _A is a matrix with M rows and K (=N×r) columns, and the parity matrix H _T is a matrix with M rows and M columns. Note that the parity matrix H _T has a staircase structure as described with reference to FIG.

FIG. 76B shows the structure of an extended parity check matrix (hereinafter also referred to as type B extended parity check matrix) in which each row and column is extended by a predetermined puncture length L with respect to the type B regular parity check matrix of FIG. showing.

Similar to the type B regular check matrix, the type B extended check matrix is a matrix in which the information matrix H _A and the parity matrix H _T are horizontally arranged.

However, the type B extended parity check matrix is a matrix of M+L rows and N+L columns in which each of the rows and columns is extended by the puncture length L as compared to the type B regular parity check matrix.

The information matrix H _A is a matrix of M+L rows and K columns, and the parity matrix H _T is a matrix of M+L rows and M+L columns.

Therefore, the type B extended parity check matrix has a parity length M+L (=N+LK) longer by the puncture length L than the type B regular parity check matrix. As a result, in the type B extended parity check matrix, the number of rows of the information matrix H _A is larger than that of the type B regular parity check matrix by the puncture length L, and the number of rows and columns of the parity matrix H _T is the same as that of the type B regular parity check matrix. It is longer than the regular check matrix by the puncture length L.

FIG. 77 is a flowchart illustrating an example of processing (encoding processing) of the LDPC encoder 115 (FIG. 8) when a punctured LDPC code with code length N=69120 is used for data transmission.

In step S311, the LDPC encoder 115 selects the coding rate r of the punctured LDPC code with code length N=69120. For example, the LDPC encoder 115 selects a predetermined coding rate, a coding rate designated by an operator of the transmitting device 11, or the like as the selected coding rate.

In step S312, the LDPC encoder 115 performs an extended check in which each row and column is extended by a predetermined puncture length L for a parity check matrix whose encoding rate N is 69120 bits and whose encoding rate r is the selected encoding rate. Based on the matrix, by performing LDPC encoding of information bits of information length K=N×r, an extended LDPC code having parity bits of parity length M=N+L−K and code length of N+L is generated. (demand).

In step S313, the LDPC encoder 115 punctures the head of the information bit of the extended LDPC code by the puncture length L to generate (determine) a punctured LDPC code with a code length of N and a coding rate of r. , to the subsequent bit interleaver 116 (FIG. 8).

FIG. 78 is a flowchart illustrating an example of processing (decoding processing) of the LDPC decoder 166 (FIG. 61) when a punctured LDPC code with code length N=69120 is used for data transmission.

In step S321, the LDPC decoder 166 obtains the received LLR of the punctured LDPC code from the bit deinterleaver 165, and stores the received LLR as the received LLR of the leading L bits of the information bits punctured by the LDPC encoder 115. , the received LLRs of the extended LDPC code are obtained by adding LLRs that indicate that the probability that the information bit is 0 and the probability that the information bit is 1 are the same.

In step S322, the LDPC decoder 166 uses the extended parity check matrix with the code length N of 69120 bits and the coding rate r of the selected coding rate based on the extended parity check matrix whose rows and columns are extended. The received LLR is used to decode (the information bits of) the extended LDPC code.

Here, as the extended LDPC code, for example, the parallel factor P is 360, which is the same as DVB-T.2, ATSC3.0, etc., and the type A code or type B code corresponding to the parity check matrix H of the cyclic structure is adopted. can do.

Furthermore, as an extended LDPC code, for example, the code length N is longer than 64k bits such as DVB-T.2 or ATSC3.0, for example, 69120 bits, and the coding rate r is, for example, 2/16, 3/16, 4/16, 5/16, 6/16, 7/16, 8/16, 9/16, 10/16, 11/16, 12/16, 13/16, 14/16, etc. An LDPC code can be employed that yields a Chad LDPC code.

As the extended LDPC code, for example, an LDPC code from which a punctured LDPC code with good BER can be obtained by the simulations described with reference to FIGS. 30 and 31 can be adopted. In the simulation, for example, using the BER as an index, it is possible to obtain (a parity check matrix of) an extended LDPC code and a puncture length L for puncturing the extended LDPC code.

According to the punctured LDPC code obtained by puncturing the extended LDPC code obtained as described above by the puncture length L similarly obtained, it is possible to ensure good communication quality in data transmission. can.

Examples of the parity check matrix initial value table representing the extended parity check matrix of the extended LDPC code and the puncture length L obtained by simulation are shown below.

Figures 79 and 80 show the code length N of 69120 (69 k) bits and the coding rate r (Rate) of the type A scheme (before puncturing) used when obtaining a punctured LDPC code of 2/16. FIG. 4 is a diagram showing an example of a parity check matrix initial value table (code table) representing a type A extended parity check matrix of an extended LDPC code (hereinafter also referred to as a type A extended LDPC code for (69k,2/16));

Note that FIG. 80 is a diagram following FIG. 79 .

A type A extended LDPC code for (69k,2/16) is punctured with a puncture length L=0. Therefore, the punctured LDPC code obtained by puncturing the type A extended LDPC code for (69k,2/16) is the same as the type A extended LDPC code for (69k,2/16) before puncturing.

81 and 82 show an extended LDPC code of the type A method (hereinafter referred to as (69k,3/ 16) is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix for 16) type A extended LDPC code.

Note that FIG. 82 is a diagram following FIG. 81 .

A type A extended LDPC code for (69k, 3/16) is punctured with a puncture length L=0. Therefore, the punctured LDPC code obtained by puncturing the type A extended LDPC code for (69k, 3/16) is the same as the type A extended LDPC code for (69k, 3/16) before puncturing.

83 and 84, the code length N is 69120 bits, the code rate r is extended LDPC code of type A method used when obtaining a punctured LDPC code of 4/16 (hereinafter, (69k,4/ 16) is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix for 16) type A extended LDPC code.

Note that FIG. 84 is a diagram following FIG. 83 .

A type A extended LDPC code for (69k,4/16) is punctured with a puncture length L=0. Therefore, the punctured LDPC code obtained by puncturing the type A extended LDPC code for (69k,4/16) is the same as the type A extended LDPC code for (69k,4/16) before puncturing.

85 and 86 show a type A extended LDPC code (hereinafter referred to as (69k,5/ 16) is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix for 16) type A extended LDPC code.

Note that FIG. 86 is a diagram following FIG. 85 .

The (69k,5/16) type A extended LDPC code is punctured with a puncture length of L=1800. Therefore, the punctured LDPC code obtained by puncturing the type A extended LDPC code for (69k,5/16) is shorter than the type A extended LDPC code for (69k,5/16) before puncturing by the puncture length L=1800.

87 and 88 show an extended LDPC code of the type A scheme (hereinafter referred to as (69k,6/ 16) is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix for 16) type A extended LDPC code.

Note that FIG. 88 is a diagram following FIG. 87 .

(69k, 6/16) type A extended LDPC code is punctured with a puncture length of L=1800. Therefore, the punctured LDPC code obtained by puncturing the type A extended LDPC code for (69k,6/16) is shorter than the type A extended LDPC code for (69k,6/16) before puncturing by the puncture length L=1800.

Figures 89, 90, and 91 show a type A extended LDPC code (hereinafter referred to as FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix for (69k,7/16) type A extended LDPC code.

90 is a diagram following FIG. 89, and FIG. 91 is a diagram following FIG.

The (69k,7/16) type A extended LDPC code is punctured with a puncture length of L=2160. Therefore, the punctured LDPC code obtained by puncturing the type A extended LDPC code for (69k,7/16) is shorter than the type A extended LDPC code for (69k,7/16) before puncturing by the puncture length L=2160.

92, 93, and 94 show the code length N of 69120 bits and the coding rate r of the extended LDPC code of the type A method used when obtaining a punctured LDPC code of 8/16 (hereinafter referred to as FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix for (69k, 8/16) type A extended LDPC code.

93 is a diagram following FIG. 92, and FIG. 94 is a diagram following FIG.

(69k,8/16) type A extended LDPC code is punctured with a puncture length of L=2520. Therefore, the punctured LDPC code obtained by puncturing the type A extended LDPC code for (69k,8/16) is shorter than the type A extended LDPC code for (69k,8/16) before puncturing by the puncture length L=2520.

95, 96, 97, and 98 are extended LDPC codes of the type A scheme used when obtaining a punctured LDPC code with a code length N of 69120 bits and a coding rate r of 9/16. FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type A extended parity check matrix of (hereinafter also referred to as type A extended LDPC code for (69k,9/16)).

96 is a diagram following FIG. 95, and FIG. 97 is a diagram following FIG. 98 is a diagram following FIG. 97. FIG.

The (69k,9/16) type A extended LDPC code is punctured with a puncture length of L=1800. Therefore, the punctured LDPC code obtained by puncturing the type A extended LDPC code for (69k,9/16) is shorter than the type A extended LDPC code for (69k,9/16) before puncturing by the puncture length L=1800.

99, 100, and 101 show the code length N of 69120 bits and the coding rate r of the extended LDPC code of the type B method used when obtaining a punctured LDPC code of 9/16 (hereinafter referred to as FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix for (69k,9/16) type B extended LDPC code.

100 is a diagram following FIG. 99, and FIG. 101 is a diagram following FIG.

A type B extended LDPC code for (69k,9/16) is punctured with a puncture length of L=1080. Therefore, the punctured LDPC code obtained by puncturing the type B extended LDPC code for (69k,9/16) is shorter than the type B extended LDPC code for (69k,9/16) before puncturing by the puncture length L=1080.

102, 103, 104, and 105 show the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code with a code length N of 69120 bits and a coding rate r of 10/16. FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of (hereinafter also referred to as a type B extended LDPC code for (69k,10/16)).

103 is a diagram following FIG. 102, and FIG. 104 is a diagram following FIG. FIG. 105 is a diagram following FIG. 104 .

A type B extended LDPC code for (69k, 10/16) is punctured with a puncture length of L=360. Therefore, the punctured LDPC code obtained by puncturing the type B extended LDPC code for (69k, 10/16) is shorter than the type B extended LDPC code for (69k, 10/16) before puncturing by the puncture length L=360.

106, 107, 108, and 109 show the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code with a code length N of 69120 bits and a coding rate r of 11/16. FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of (hereinafter also referred to as a type B extended LDPC code for (69k,11/16)).

107 is a diagram following FIG. 106, and FIG. 108 is a diagram following FIG. 109 is a diagram following FIG. 108. FIG.

(69k, 11/16) type-B extended LDPC codes are punctured with a puncture length of L=1440. Therefore, the punctured LDPC code obtained by puncturing the type B extended LDPC code for (69k, 11/16) is shorter than the type B extended LDPC code for (69k, 11/16) before puncturing by the puncture length L=1440.

110, FIG. 111, FIG. 112, and FIG. 113 show a type B extended LDPC code used when obtaining a punctured LDPC code with a code length N of 69120 bits and a coding rate r of 12/16. FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of (hereinafter also referred to as a type B extended LDPC code for (69k,12/16)).

111 is a diagram following FIG. 110, and FIG. 112 is a diagram following FIG. 113 is a diagram following FIG. 112. FIG.

(69k, 12/16) type-B extended LDPC codes are punctured with a puncture length of L=1440. Therefore, the punctured LDPC code obtained by puncturing the type B extended LDPC code for (69k, 12/16) is shorter than the type B extended LDPC code for (69k, 12/16) before puncturing by the puncture length L=1440.

114, 115, 116, and 117 show the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code with a code length N of 69120 bits and a coding rate r of 13/16. FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of (hereinafter also referred to as a type B extended LDPC code for (69k,13/16)).

115 is a diagram following FIG. 114, and FIG. 116 is a diagram following FIG. 117 is a diagram following FIG. 116. FIG.

(69k, 13/16) type-B extended LDPC codes are punctured with a puncture length of L=720. Therefore, the punctured LDPC code obtained by puncturing the type B extended LDPC code for (69k, 13/16) is shorter than the type B extended LDPC code for (69k, 13/16) before puncturing by the puncture length L=720.

118, 119, 120, and 121 show the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code with a code length N of 69120 bits and a coding rate r of 14/16. FIG. 10 is a diagram showing an example of a parity check matrix initial value table representing a type B extended parity check matrix of (hereinafter also referred to as a type B extended LDPC code for (69k,14/16)).

119 is a diagram following FIG. 118, and FIG. 120 is a diagram following FIG. 121 is a diagram following FIG. 120. FIG.

(69k, 14/16) type-B extended LDPC codes are punctured with a puncture length of L=720. Therefore, the punctured LDPC code obtained by puncturing the type B extended LDPC code for (69k, 14/16) is shorter than the type B extended LDPC code for (69k, 14/16) before puncturing by the puncture length L=720.

FIG. 122 is a diagram for explaining the column weights of the type A extended parity check matrix represented by the type A parity check matrix initial value table of FIGS. 79 to 98 .

For the type A extended parity check matrix, as shown in FIG. 122, X1 is the column weight of the first to K1 columns of the A and C matrices, and X2 is the column weight of the subsequent K2 columns of the A and C matrices. , the column weight of the subsequent K3 columns of the A and C matrices is X3, the column weight of the subsequent K4 columns of the A and C matrices is X4, and the column weight of the subsequent K5 columns of the A and C matrices is X5. , respectively.

where the number of columns of matrix A is equal to the information length K=K1+K2+K3+K4+K5 and the number of columns of matrix C is K greater than the information length K=K1+K2+K3+K4+K5 +M1.

Also, for the type A extended parity check matrix, the column weights from the K+1-th column to the M1-th column of the C matrix are represented as XM1.

In the type A extended parity check matrix, the parity length M=N+L−K is equal to the sum M1+M2 of the number of columns M1 of the B matrix and the number of columns M2 of the Z matrix.

The code length N+L of the type A extended parity check matrix is the sum of the code length N=69120 of the punctured LDPC code and the puncture length L, 69120+L, and is K1+K2+K3+K4+K5+M1+M2. can be represented.

Also, for the type A extended parity check matrix, the column weight of the 1st to M1−1 columns of the B matrix is 2, and the column weight of the M1th column (the last column) of the B matrix is 1. Furthermore, the column weight of the D matrix is 1 and the column weight of the Z matrix is 0.

FIG. 123 is a diagram showing the parameters of the type A extended parity check matrix represented by the parity check matrix initial value table of the type A scheme in FIGS.

An extension of the Type A scheme used to find punctured LDPC codes with r=2/16, 3/16, 4/16, 5/16, 6/16, 7/16, 8/16, 9/16 X1 to X5, K1 to K5, XM1, M1, M2, information length K, and puncture length L in FIG. 122 as parameters of the type A extended parity check matrix of the LDPC code are as shown in FIG.

That is, for the type A extended parity check matrix of the extended LDPC code of the type A scheme used when obtaining a punctured LDPC code of r = 2/16, information length K, puncture length L, (X1, K1), ( X2,K2)，(X3,K3)，(X4,K4)，(X5,K5)，XM1，M1，M2 are 8640，0，(21,1440)，(20,7200)，(0,0 ), (0,0), (0,0), 16, 1800, 58680.

For the type A extended parity check matrix of the extended LDPC code of the type A scheme used when obtaining a punctured LDPC code of r = 3/16, information length K, puncture length L, (X1, K1), (X2, K2)，(X3,K3)，(X4,K4)，(X5,K5)，XM1，M1，M2 are 12960，0，(16,11520)，(15,1440)，(0,0)， (0,0), (0,0), 11, 1800, 54360.

For the type A extended parity check matrix of the extended LDPC code of the type A scheme used when obtaining a punctured LDPC code of r = 4/16, information length K, puncture length L, (X1, K1), (X2, K2)，(X3,K3)，(X4,K4)，(X5,K5)，XM1，M1，M2 are 17280，0，(13,16200)，(12,720)，(45,360)，(0,0 ), (0,0), 9, 1800, 50040.

For the type A extended parity check matrix of the extended LDPC code of the type A scheme used when obtaining a punctured LDPC code of r = 5/16, information length K, puncture length L, (X1, K1), (X2, K2), (X3, K3), (X4, K4), (X5, K5), XM1, M1, M2 are 21600, 1800, (28,720), (27,1080), (9,7560), (8 ,3960), (10,8280), 4, 3600, 45720.

For the type A extended parity check matrix of the extended LDPC code of the type A scheme used when obtaining a punctured LDPC code of r = 6/16, information length K, puncture length L, (X1, K1), (X2, K2), (X3, K3), (X4, K4), (X5, K5), XM1, M1, M2 are 25920, 1800, (25,1800), (9,13680), (8,8640), (10,1800), (0,0), 2, 3600, 41400.

For the type A extended parity check matrix of the extended LDPC code of the type A scheme used when obtaining a punctured LDPC code of r = 7/16, information length K, puncture length L, (X1, K1), (X2, K2), (X3, K3), (X4, K4), (X5, K5), XM1, M1, M2 are 30240, 2160, (19,2160), (8,26280), (7,360), (3 ,1440), (0,0), 2, 3960, 37080.

For the type A extended parity check matrix of the extended LDPC code of the type A scheme used when obtaining a punctured LDPC code of r = 8/16, information length K, puncture length L, (X1, K1), (X2, K2)，(X3,K3)，(X4,K4)，(X5,K5)，XM1，M1，M2 are 34560，2520，(15,1800)，(14,720)，(8,20880)，(7 ,5040), (4,6120), 1, 5040, 32040.

For the type A extended parity check matrix of the extended LDPC code of the type A scheme used when obtaining a punctured LDPC code of r = 9/16, information length K, puncture length L, (X1, K1), (X2, K2)，(X3,K3)，(X4,K4)，(X5,K5)，XM1，M1，M2 are 38880，1800，(18,1440)，(17,360)，(10,3240)，(9 ,12240), (4,21600), 1,9000,23040.

The parameters X1 through X5, K1 through K5, XM1, M1 (M2), and puncture length L are set to improve the performance (eg, BER, etc.) of the punctured LDPC code.

FIG. 124 is a diagram for explaining the column weights of the type B extended parity check matrix represented by the type B system parity check matrix initial value table of FIGS. 99 to 121. FIG.

For the type B extended check matrix, as shown in FIG. 124, X1 is the column weight of the first to KX1 columns, X2 is the column weight of the subsequent KX2 columns, and X3 is the column weight of the subsequent KX3 columns. Let Y1 be the column weight of the subsequent KY1 column.

KX1+KX2+KX3+KY1 is equal to the information length K, and KX1+KX2+KX3+KY1+M is equal to the code length N+L=69120+L of the extended LDPC code.

Also, for the type B extended parity check matrix, the last M columns, that is, the column weight of the M−1 columns excluding the last column of the parity matrix H _T is 2, and the column weight of the last column is is 1.

FIG. 125 is a diagram showing parameters of the type B extended parity check matrix represented by the type B system parity check matrix initial value table of FIGS.

Type B extended parity check matrix of extended LDPC code of type B scheme used when obtaining punctured LDPC code of r=9/16, 10/16, 11/16, 12/16, 13/16, 14/16 X1, KX1, X2, KX2, X3, KX3, Y1, KY1, and M in FIG. 124 as parameters of , and the information length K and puncture length L are as shown in FIG.

That is, for the type B extended parity check matrix of the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code of r = 9/16, the information length K, puncture length L, X1, KX1, X2, KX2 , X3, KX3, Y1, KY1, M are 38880, 1080, 29, 1080, 17, 3240, 12, 3240, 3, 31320, 31320.

For the type B extended parity check matrix of the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code of r = 10/16, information length K, puncture length L, X1, KX1, X2, KX2, X3 , KX3, Y1, KY1, M are 43200, 360, 73, 360, 38, 360, 14, 8280, 3, 34200, 26280.

For the type B extended parity check matrix of the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code of r = 11/16, information length K, puncture length L, X1, KX1, X2, KX2, X3 , KX3, Y1, KY1, M are 47520, 1440, 29, 1440, 8, 1800, 9, 5760, 3, 38520, 23040.

For the type B extended parity check matrix of the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code of r = 12/16, information length K, puncture length L, X1, KX1, X2, KX2, X3 , KX3, Y1, KY1, M are 51840, 1440, 24, 1440, 9, 4680, 8, 1440, 3, 44280, 18720.

For the type B extended parity check matrix of the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code of r = 13/16, information length K, puncture length L, X1, KX1, X2, KX2, X3 , KX3, Y1, KY1, M are 56160, 720, 34, 720, 10, 3600, 11, 4320, 3, 47520, 13680.

For the type B extended parity check matrix of the extended LDPC code of the type B scheme used when obtaining a punctured LDPC code of r = 14/16, information length K, puncture length L, X1, KX1, X2, KX2, X3 , KX3, Y1, KY1, M are 60480, 720, 24, 720, 12, 1080, 10, 4680, 3, 54000, 9360.

Parameters X1, KX1, X2, KX2, X3, KX3, Y1, KY1, and puncture length L (parity length M=N+L-K) are set so that the performance (e.g., BER, etc.) of the punctured LDPC code is further improved. is set to

According to the punctured LDPC code as described above, good BER/FER and capacity (communication channel capacity) are realized.

Here, in the extended parity check matrix, as shown in FIGS. 123 and 125, the weight of the left column (eg, X1) tends to be larger than the weight of the right column (eg, X3). .

Therefore, in the extended LDPC code, bits on the left side (head side) are connected to more nodes (check nodes) in the Tanner graph of the extended parity check matrix. As a result, in the extended LDPC code, if an error occurs in the left bit, the effect of the error may propagate to many nodes and hinder improvement of the BER.

Therefore, for the extended LDPC code, by puncturing the bits on the left side, that is, the bits on the leading side of the information bits, it is possible to prevent the influence of the error from propagating to many nodes and hindering the improvement of the BER. .

Note that here, the leading bit of the extended LDPC code (the leading portion of the information bit) is punctured, but the puncturing target bit is not limited to the leading bit of the extended LDPC code. do not have.

That is, puncturing of the extended LDPC code can be performed on arbitrary bits such as part of the parity bits of the extended LDPC code, for example.

<Computer Embodiment>

Next, the series of processes described above can be performed by either hardware or software. When a series of processes is performed by software, a program that constitutes the software is installed in a general-purpose computer or the like.

FIG. 126 shows a configuration example of an embodiment of a computer in which a program for executing the series of processes described above is installed.

The program can be recorded in advance in a hard disk 705 or ROM 703 as a recording medium built into the computer.

Alternatively, the program is temporarily or It can be permanently stored (recorded). Such a removable recording medium 711 can be provided as so-called package software.

In addition to installing the program on the computer from the removable recording medium 711 as described above, the program can be wirelessly transferred from the download site to the computer via an artificial satellite for digital satellite broadcasting, LAN (Local Area Network), The program can be transferred to a computer by wire via a network such as the Internet, and the computer can receive the transferred program in the communication section 708 and install it in the hard disk 705 incorporated therein.

The computer incorporates a CPU (Central Processing Unit) 702 . An input/output interface 710 is connected to the CPU 702 via a bus 701. A user operates an input unit 707 including a keyboard, a mouse, a microphone, etc. via the input/output interface 710 to the CPU 702. When a command is input by equalizing, a program stored in ROM (Read Only Memory) 703 is executed according to the command. Alternatively, the CPU 702 can receive a program stored in the hard disk 705, a program transferred from a satellite or a network, received by the communication unit 708 and installed in the hard disk 705, or a removable recording medium 711 attached to the drive 709. The program read out and installed in the hard disk 705 is loaded into a RAM (Random Access Memory) 704 and executed. As a result, the CPU 702 performs the processing according to the above-described flowchart or the processing performed by the configuration of the above-described block diagram. Then, the CPU 702 outputs the processing result from an output unit 706 configured by an LCD (Liquid Crystal Display), a speaker, etc., or from a communication unit 708 via an input/output interface 710, for example, as necessary. It is transmitted, and furthermore, it is recorded in the hard disk 705 or the like.

Here, in this specification, the processing steps describing a program for causing a computer to perform various processes do not necessarily have to be processed in chronological order according to the order described as a flowchart, and can be performed in parallel or individually. It also includes the processing that is performed (eg, parallel processing or processing by objects).

Moreover, the program may be processed by one computer, or may be processed by a plurality of computers in a distributed manner. Furthermore, the program may be transferred to a remote computer and executed.

The embodiments of the present technology are not limited to the above-described embodiments, and various modifications are possible without departing from the gist of the present technology.

For example, the new LDPC code (the parity check matrix initial value table) and GW pattern described above can be used for satellite lines, terrestrial waves, cables (wired lines), and other communication paths 13 (FIG. 7). Furthermore, the new LDPC code and GW pattern can also be used for data transmission other than digital broadcasting.

Note that the effects described in this specification are merely examples and are not limited, and other effects may be provided.

11 transmitter, 12 receiver, 23 parity interleaver, 24 group-wise interleaver, 25 block interleaver, 54 block de-interleaver, 55 group-wise de-interleaver, 111 mode adaptation/multiplexer, 112 padder, 113 BB scrambler , 114 BCH encoder, 115 LDPC encoder, 116 bit interleaver, 117 mapper, 118 time interleaver, 119 SISO/MISO encoder, 120 frequency interleaver, 121 BCH encoder, 122 LDPC encoder, 123 mapper, 124 frequency interleaver, 131 Frame builder/resource allocation unit 132 OFDM generation unit 151 OFDM processing unit 152 Frame management unit 153 Frequency deinterleaver 154 Demapper 155 LDPC decoder 156 BCH decoder 161 Frequency deinterleaver 162 SISO/MISO decoder 163 time deinterleaver, 164 demapper, 165 bit deinterleaver, 166 LDPC decoder, 167 BCH decoder, 168 BB descrambler, 169 null removal unit, 170 demultiplexer, 300 branch data storage memory, 301 selector, 302 check node Calculation unit 303 Cyclic shift circuit 304 Branch data storage memory 305 Selector 306 Receive data memory 307 Variable node calculation unit 308 Cyclic shift circuit 309 Decode word calculation unit 310 Receive data rearrangement unit 311 decoded data rearrangement unit, 601 encoding processing unit, 602 storage unit, 611 coding rate setting unit, 612 initial value table reading unit, 613 check matrix generation unit, 614 information bit reading unit, 615 encoding parity calculation unit, 616 control unit, 701 bus, 702 CPU, 703 ROM, 704 RAM, 705 hard disk, 706 output unit, 707 input unit, 708 communication unit, 709 drive, 710 input/output interface, 711, removable recording medium, 1001 reverse replacement unit, 1002 memory, 1011 parity deinterleaver, 1101 acquisition unit, 1101 transmission path decoding processing unit, 1103 information source decoding processing unit, 1111 output unit, 1121 recording unit

Claims (4)

The code length N is 69120 bits, and the information length K = Perform LDPC encoding of N × r information bits to generate an extended LDPC code having parity bits with a parity length M = N + LK,
an encoding unit that punctures the head of the information bit of the extended LDPC code by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 8/16; ,
The extended check matrix is
a predetermined value M1, and an upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r;
A B matrix with a staircase structure, which has M1 rows and M1 columns and is adjacent to the right of the A matrix;
a Z matrix that is the right-adjacent zero matrix of the B matrix, with M1 rows and N+LK−M1 columns;
a C matrix adjacent below the A matrix and the B matrix, with N+LK−M1 rows and K+M1 columns;
and a D matrix that is an identity matrix adjacent to the right of the C matrix, with N+LK-M1 rows and N+LK-M1 columns, and
The puncture length L is 2520,
The predetermined value M1 is 5040,
The A matrix and C matrix are represented by a check matrix initial value table,
The parity check matrix initial value table is a table representing the positions of 1 elements in the A matrix and the C matrix for every 360 columns,
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758 1062 3265 22844 25290 26795 30309 32198
723 974 2366 11325 11639 20444 30190 33000
3057 3184 4157 6124 10032 14829 22920 27535
1908 2681 3314 10175 15746 19286 30891 31312
337 3329 4284 16428 26550 26938 27394 29675
601 626 4671 7188 18716 20787 25752 31716
2736 3729 3853 14610 18790 21261 31327
1514 1926 2616 7216 7346 13375 15951
385 2731 2776 17442 17618 18488 26842
2847 3447 4837 7730 21494 25421 27060
4167 4675 4950 18125 19852 24594 31885
2100 2258 2839 6788 12190 20838 22037
598 1160 2512 9977 27667 31266 35818
726 918 4356 25915 26856 35644 35900
603 4023 4286 21322 24461 26414 31230
1378 1712 2601 6187 19972 21466 33990
2477 3873 5026 6147 11847 28736 31098
458 983 3395 5246 16300 16685 26054
1591 4194 4296 8941 12584 26579 36950
956 1266 1722 21007 23498 27878 29947
1791 2382 3477 27827
753 1172 3171 21799
577 1793 4156 14329
1221 1909 2872 23737
3201 3437 3627 24180
1422 2384 2680 17127
350 2057 3244 29775
1494 3096 4085 12712
1925 2736 3505 20471
167 1300 1330 30100
2178 4141 4741 6802
169 2635 2776 7608
1061 3955 4667 23473
185 995 4044 24130
1792 2284 4178 30200
3947 4503 4756 34653
1198 4107 4470 5969
9656
8810
34388
35438
20498
24839
23256
9966
25861
11305
7639
21600
13763
25619
is a transmitter. The code length N is 69120 bits, and the information length K = Perform LDPC encoding of N × r information bits to generate an extended LDPC code having parity bits with a parity length M = N + LK,
an encoding step of puncturing the beginning of the information bit of the extended LDPC code by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 8/16; ,
The extended check matrix is
a predetermined value M1, and an upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r;
A B matrix with a staircase structure, which has M1 rows and M1 columns and is adjacent to the right of the A matrix;
a Z matrix that is the right-adjacent zero matrix of the B matrix, with M1 rows and N+LK−M1 columns;
a C matrix adjacent below the A matrix and the B matrix, with N+LK−M1 rows and K+M1 columns;
and a D matrix that is an identity matrix adjacent to the right of the C matrix, with N+LK-M1 rows and N+LK-M1 columns, and
The puncture length L is 2520,
The predetermined value M1 is 5040,
The A matrix and C matrix are represented by a check matrix initial value table,
The parity check matrix initial value table is a table representing the positions of 1 elements in the A matrix and the C matrix for every 360 columns,
2184 2245 5483 5692 9320 18011 18064 18150 20189 23469 23662 25407 28189 35779 37071
1855 3613 5755 7904 12491 14272 19654 22065 22316 23975 24503 26458 29567 34455 35556
928 4740 6537 8736 9455 16185 18167 22537 22768 26005 32031 32179 33566 34966 35808
3986 4696 5295 8034 12188 12339 14298 19661 22499 22837 28343 29201 30056 36868 36872
1049 2606 9166 13000 17407 22535 24035 24090 26423 27147 28104 29196 34765 36183 36195
2475 2705 6586 10659 14652 15858 18555 22635 25610 26796 32144 33131 35581 37072
1339 1594 5556 5731 5735 7423 7924 8287 10173 21406 26174 26965 30831 35028
2095 2692 4542 11957 16923 21339 22995 35510
753 3913 4481 24115 25745 28475 29334 34983
531 2404 4091 6823 7730 13085 21741 25943
764 2602 5000 5777 6649 28284 28457 30648
173 2884 3453 7716 16017 26720 33781 34558
804 3989 4026 10353 16302 20995 22614 29946
1369 1438 4721 11804 19454 24989 29745 33895
2413 3865 4900 9605 12227 19796 34068 35639
2280 3614 3994 5794 8725 17288 29042 32667
189 729 2807 18569 20422 29775 33106 35601
13 1942 3075 5647 16437 28792 33944 36951
2322 2774 4133 14911 23058 26276 35482 36145
1156 1915 1988 13753 20275 22750 28129 28615
1027 3254 3826 12792 25306 33398 34900 36579
1000 3662 3934 12247 28784 30051 30448 34971
2208 4777 4895 7995 15270 34546 35050 35465
865 1301 2776 5447 7236 25204 28825 33009
931 2280 3123 18312 20000 26379 29091 35547
161 313 1976 10118 19510 24067 25236 29200
495 2033 3478 18349 21388 27692 27945 29298
40 123 466 8627 14489 23804 25266 29217
1919 2239 5036 9020 10230 13401 26202 31868
2984 2990 4559 13817 15317 17982 24664 30694
4263 4578 4900 18514 19432 21056 22195 25540
486 2865 4044 10378 16367 19558 31611 37057
773 785 4692 13690 15318 17028 26614 28889
1128 2525 4918 13514 14018 21695 28403 28447
1378 2785 3945 19557 24360 26125 32618 35109
1622 2734 4728 21208 22587 28908 32086 34795
1490 2885 4429 7668 12440 13368 15096 30591
157 4782 5028 7007 8693 14921 17912 24354
1887 2821 4004 5990 7023 11617 23891 31527
2659 3026 3929 8247 18589 18766 25496 30000
1493 4505 4919 10166 15487 19375 20018 37009
1459 2038 4184 13922 16641 25405 27889 36692
2552 3118 4424 10018 10774 20992 21805 22999
1575 3751 4248 12315 13683 16910 20849 27503
169 1552 4011 8140 13348 21198 22677 22961
485 1610 2021 6883 8078 10259 10833 36872
717 3562 4705 8210 14216 16365 30074 30100
284 2060 2603 5600 6111 16526 16904 25280
1464 2306 2405 15402 22597 31453 33154 36507
793 858 958 19518 21177 22969 27465 34316
2755 4039 4916 13740 21014 22548 23393 27868
2346 2859 3724 5804 11163 13257 16059 16537
3034 3827 4257 10753 10848 16863 17910 30215
699 2077 3036 14789 28159 29959 32060 35741
842 1479 1651 8903 20126 29843 30172 36359
60 216 2154 13804 29952 30425 30451 33882
1561 2138 3179 7117 10997 17696 18819 29502
1929 2926 4119 6462 9997 17945 19143 35222
1408 3721 4733 6077 8220 23897 24532 32454
758 1062 3265 22844 25290 26795 30309 32198
723 974 2366 11325 11639 20444 30190 33000
3057 3184 4157 6124 10032 14829 22920 27535
1908 2681 3314 10175 15746 19286 30891 31312
337 3329 4284 16428 26550 26938 27394 29675
601 626 4671 7188 18716 20787 25752 31716
2736 3729 3853 14610 18790 21261 31327
1514 1926 2616 7216 7346 13375 15951
385 2731 2776 17442 17618 18488 26842
2847 3447 4837 7730 21494 25421 27060
4167 4675 4950 18125 19852 24594 31885
2100 2258 2839 6788 12190 20838 22037
598 1160 2512 9977 27667 31266 35818
726 918 4356 25915 26856 35644 35900
603 4023 4286 21322 24461 26414 31230
1378 1712 2601 6187 19972 21466 33990
2477 3873 5026 6147 11847 28736 31098
458 983 3395 5246 16300 16685 26054
1591 4194 4296 8941 12584 26579 36950
956 1266 1722 21007 23498 27878 29947
1791 2382 3477 27827
753 1172 3171 21799
577 1793 4156 14329
1221 1909 2872 23737
3201 3437 3627 24180
1422 2384 2680 17127
350 2057 3244 29775
1494 3096 4085 12712
1925 2736 3505 20471
167 1300 1330 30100
2178 4141 4741 6802
169 2635 2776 7608
1061 3955 4667 23473
185 995 4044 24130
1792 2284 4178 30200
3947 4503 4756 34653
1198 4107 4470 5969
9656
8810
34388
35438
20498
24839
23256
9966
25861
11305
7639
21600
13763
25619
is the transmission method. The code length N is 69120 bits, and the information length K = Perform LDPC encoding of N × r information bits to generate an extended LDPC code having parity bits with a parity length M = N + LK,
an encoding step of puncturing the head of the information bit of the extended LDPC code by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 8/16; ,
The extended check matrix is
a predetermined value M1, and an upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r;
A B matrix with a staircase structure, which has M1 rows and M1 columns and is adjacent to the right of the A matrix;
a Z matrix that is the right-adjacent zero matrix of the B matrix, with M1 rows and N+LK−M1 columns;
a C matrix adjacent below the A matrix and the B matrix, with N+LK−M1 rows and K+M1 columns;
and a D matrix that is an identity matrix adjacent to the right of the C matrix, with N+LK-M1 rows and N+LK-M1 columns, and
The puncture length L is 2520,
The predetermined value M1 is 5040,
The A matrix and C matrix are represented by a check matrix initial value table,
The parity check matrix initial value table is a table representing the positions of 1 elements in the A matrix and the C matrix for every 360 columns,
2184 2245 5483 5692 9320 18011 18064 18150 20189 23469 23662 25407 28189 35779 37071
1855 3613 5755 7904 12491 14272 19654 22065 22316 23975 24503 26458 29567 34455 35556
928 4740 6537 8736 9455 16185 18167 22537 22768 26005 32031 32179 33566 34966 35808
3986 4696 5295 8034 12188 12339 14298 19661 22499 22837 28343 29201 30056 36868 36872
1049 2606 9166 13000 17407 22535 24035 24090 26423 27147 28104 29196 34765 36183 36195
2475 2705 6586 10659 14652 15858 18555 22635 25610 26796 32144 33131 35581 37072
1339 1594 5556 5731 5735 7423 7924 8287 10173 21406 26174 26965 30831 35028
2095 2692 4542 11957 16923 21339 22995 35510
753 3913 4481 24115 25745 28475 29334 34983
531 2404 4091 6823 7730 13085 21741 25943
764 2602 5000 5777 6649 28284 28457 30648
173 2884 3453 7716 16017 26720 33781 34558
804 3989 4026 10353 16302 20995 22614 29946
1369 1438 4721 11804 19454 24989 29745 33895
2413 3865 4900 9605 12227 19796 34068 35639
2280 3614 3994 5794 8725 17288 29042 32667
189 729 2807 18569 20422 29775 33106 35601
13 1942 3075 5647 16437 28792 33944 36951
2322 2774 4133 14911 23058 26276 35482 36145
1156 1915 1988 13753 20275 22750 28129 28615
1027 3254 3826 12792 25306 33398 34900 36579
1000 3662 3934 12247 28784 30051 30448 34971
2208 4777 4895 7995 15270 34546 35050 35465
865 1301 2776 5447 7236 25204 28825 33009
931 2280 3123 18312 20000 26379 29091 35547
161 313 1976 10118 19510 24067 25236 29200
495 2033 3478 18349 21388 27692 27945 29298
40 123 466 8627 14489 23804 25266 29217
1919 2239 5036 9020 10230 13401 26202 31868
2984 2990 4559 13817 15317 17982 24664 30694
4263 4578 4900 18514 19432 21056 22195 25540
486 2865 4044 10378 16367 19558 31611 37057
773 785 4692 13690 15318 17028 26614 28889
1128 2525 4918 13514 14018 21695 28403 28447
1378 2785 3945 19557 24360 26125 32618 35109
1622 2734 4728 21208 22587 28908 32086 34795
1490 2885 4429 7668 12440 13368 15096 30591
157 4782 5028 7007 8693 14921 17912 24354
1887 2821 4004 5990 7023 11617 23891 31527
2659 3026 3929 8247 18589 18766 25496 30000
1493 4505 4919 10166 15487 19375 20018 37009
1459 2038 4184 13922 16641 25405 27889 36692
2552 3118 4424 10018 10774 20992 21805 22999
1575 3751 4248 12315 13683 16910 20849 27503
169 1552 4011 8140 13348 21198 22677 22961
485 1610 2021 6883 8078 10259 10833 36872
717 3562 4705 8210 14216 16365 30074 30100
284 2060 2603 5600 6111 16526 16904 25280
1464 2306 2405 15402 22597 31453 33154 36507
793 858 958 19518 21177 22969 27465 34316
2755 4039 4916 13740 21014 22548 23393 27868
2346 2859 3724 5804 11163 13257 16059 16537
3034 3827 4257 10753 10848 16863 17910 30215
699 2077 3036 14789 28159 29959 32060 35741
842 1479 1651 8903 20126 29843 30172 36359
60 216 2154 13804 29952 30425 30451 33882
1561 2138 3179 7117 10997 17696 18819 29502
1929 2926 4119 6462 9997 17945 19143 35222
1408 3721 4733 6077 8220 23897 24532 32454
758 1062 3265 22844 25290 26795 30309 32198
723 974 2366 11325 11639 20444 30190 33000
3057 3184 4157 6124 10032 14829 22920 27535
1908 2681 3314 10175 15746 19286 30891 31312
337 3329 4284 16428 26550 26938 27394 29675
601 626 4671 7188 18716 20787 25752 31716
2736 3729 3853 14610 18790 21261 31327
1514 1926 2616 7216 7346 13375 15951
385 2731 2776 17442 17618 18488 26842
2847 3447 4837 7730 21494 25421 27060
4167 4675 4950 18125 19852 24594 31885
2100 2258 2839 6788 12190 20838 22037
598 1160 2512 9977 27667 31266 35818
726 918 4356 25915 26856 35644 35900
603 4023 4286 21322 24461 26414 31230
1378 1712 2601 6187 19972 21466 33990
2477 3873 5026 6147 11847 28736 31098
458 983 3395 5246 16300 16685 26054
1591 4194 4296 8941 12584 26579 36950
956 1266 1722 21007 23498 27878 29947
1791 2382 3477 27827
753 1172 3171 21799
577 1793 4156 14329
1221 1909 2872 23737
3201 3437 3627 24180
1422 2384 2680 17127
350 2057 3244 29775
1494 3096 4085 12712
1925 2736 3505 20471
167 1300 1330 30100
2178 4141 4741 6802
169 2635 2776 7608
1061 3955 4667 23473
185 995 4044 24130
1792 2284 4178 30200
3947 4503 4756 34653
1198 4107 4470 5969
9656
8810
34388
35438
20498
24839
23256
9966
25861
11305
7639
21600
13763
25619
A receiving device comprising a decoding unit that decodes the punctured LDPC code obtained from data transmitted by a transmission method. The code length N is 69120 bits, and the information length K = Perform LDPC encoding of N × r information bits to generate an extended LDPC code having parity bits with a parity length M = N + LK,
an encoding step of puncturing the head of the information bit of the extended LDPC code by the puncture length L to generate a punctured LDPC code having a code length N of 69120 bits and a coding rate r of 8/16; ,
The extended check matrix is
a predetermined value M1, and an upper left A matrix of the extended parity check matrix of M1 rows and K columns represented by the information length K=N×r;
A B matrix with a staircase structure, which has M1 rows and M1 columns and is adjacent to the right of the A matrix;
a Z matrix that is the right-adjacent zero matrix of the B matrix, with M1 rows and N+LK−M1 columns;
a C matrix adjacent below the A matrix and the B matrix, with N+LK−M1 rows and K+M1 columns;
and a D matrix that is an identity matrix adjacent to the right of the C matrix, with N+LK-M1 rows and N+LK-M1 columns, and
The puncture length L is 2520,
The predetermined value M1 is 5040,
The A matrix and C matrix are represented by a check matrix initial value table,
The parity check matrix initial value table is a table representing the positions of 1 elements in the A matrix and the C matrix for every 360 columns,
2184 2245 5483 5692 9320 18011 18064 18150 20189 23469 23662 25407 28189 35779 37071
1855 3613 5755 7904 12491 14272 19654 22065 22316 23975 24503 26458 29567 34455 35556
928 4740 6537 8736 9455 16185 18167 22537 22768 26005 32031 32179 33566 34966 35808
3986 4696 5295 8034 12188 12339 14298 19661 22499 22837 28343 29201 30056 36868 36872
1049 2606 9166 13000 17407 22535 24035 24090 26423 27147 28104 29196 34765 36183 36195
2475 2705 6586 10659 14652 15858 18555 22635 25610 26796 32144 33131 35581 37072
1339 1594 5556 5731 5735 7423 7924 8287 10173 21406 26174 26965 30831 35028
2095 2692 4542 11957 16923 21339 22995 35510
753 3913 4481 24115 25745 28475 29334 34983
531 2404 4091 6823 7730 13085 21741 25943
764 2602 5000 5777 6649 28284 28457 30648
173 2884 3453 7716 16017 26720 33781 34558
804 3989 4026 10353 16302 20995 22614 29946
1369 1438 4721 11804 19454 24989 29745 33895
2413 3865 4900 9605 12227 19796 34068 35639
2280 3614 3994 5794 8725 17288 29042 32667
189 729 2807 18569 20422 29775 33106 35601
13 1942 3075 5647 16437 28792 33944 36951
2322 2774 4133 14911 23058 26276 35482 36145
1156 1915 1988 13753 20275 22750 28129 28615
1027 3254 3826 12792 25306 33398 34900 36579
1000 3662 3934 12247 28784 30051 30448 34971
2208 4777 4895 7995 15270 34546 35050 35465
865 1301 2776 5447 7236 25204 28825 33009
931 2280 3123 18312 20000 26379 29091 35547
161 313 1976 10118 19510 24067 25236 29200
495 2033 3478 18349 21388 27692 27945 29298
40 123 466 8627 14489 23804 25266 29217
1919 2239 5036 9020 10230 13401 26202 31868
2984 2990 4559 13817 15317 17982 24664 30694
4263 4578 4900 18514 19432 21056 22195 25540
486 2865 4044 10378 16367 19558 31611 37057
773 785 4692 13690 15318 17028 26614 28889
1128 2525 4918 13514 14018 21695 28403 28447
1378 2785 3945 19557 24360 26125 32618 35109
1622 2734 4728 21208 22587 28908 32086 34795
1490 2885 4429 7668 12440 13368 15096 30591
157 4782 5028 7007 8693 14921 17912 24354
1887 2821 4004 5990 7023 11617 23891 31527
2659 3026 3929 8247 18589 18766 25496 30000
1493 4505 4919 10166 15487 19375 20018 37009
1459 2038 4184 13922 16641 25405 27889 36692
2552 3118 4424 10018 10774 20992 21805 22999
1575 3751 4248 12315 13683 16910 20849 27503
169 1552 4011 8140 13348 21198 22677 22961
485 1610 2021 6883 8078 10259 10833 36872
717 3562 4705 8210 14216 16365 30074 30100
284 2060 2603 5600 6111 16526 16904 25280
1464 2306 2405 15402 22597 31453 33154 36507
793 858 958 19518 21177 22969 27465 34316
2755 4039 4916 13740 21014 22548 23393 27868
2346 2859 3724 5804 11163 13257 16059 16537
3034 3827 4257 10753 10848 16863 17910 30215
699 2077 3036 14789 28159 29959 32060 35741
842 1479 1651 8903 20126 29843 30172 36359
60 216 2154 13804 29952 30425 30451 33882
1561 2138 3179 7117 10997 17696 18819 29502
1929 2926 4119 6462 9997 17945 19143 35222
1408 3721 4733 6077 8220 23897 24532 32454
758 1062 3265 22844 25290 26795 30309 32198
723 974 2366 11325 11639 20444 30190 33000
3057 3184 4157 6124 10032 14829 22920 27535
1908 2681 3314 10175 15746 19286 30891 31312
337 3329 4284 16428 26550 26938 27394 29675
601 626 4671 7188 18716 20787 25752 31716
2736 3729 3853 14610 18790 21261 31327
1514 1926 2616 7216 7346 13375 15951
385 2731 2776 17442 17618 18488 26842
2847 3447 4837 7730 21494 25421 27060
4167 4675 4950 18125 19852 24594 31885
2100 2258 2839 6788 12190 20838 22037
598 1160 2512 9977 27667 31266 35818
726 918 4356 25915 26856 35644 35900
603 4023 4286 21322 24461 26414 31230
1378 1712 2601 6187 19972 21466 33990
2477 3873 5026 6147 11847 28736 31098
458 983 3395 5246 16300 16685 26054
1591 4194 4296 8941 12584 26579 36950
956 1266 1722 21007 23498 27878 29947
1791 2382 3477 27827
753 1172 3171 21799
577 1793 4156 14329
1221 1909 2872 23737
3201 3437 3627 24180
1422 2384 2680 17127
350 2057 3244 29775
1494 3096 4085 12712
1925 2736 3505 20471
167 1300 1330 30100
2178 4141 4741 6802
169 2635 2776 7608
1061 3955 4667 23473
185 995 4044 24130
1792 2284 4178 30200
3947 4503 4756 34653
1198 4107 4470 5969
9656
8810
34388
35438
20498
24839
23256
9966
25861
11305
7639
21600
13763
25619
A receiving method comprising a decoding step of decoding the punctured LDPC code obtained from data transmitted by the transmitting method.

Images