JP7283784B2 - MEMORY FAILURE DETECTION DEVICE, DETECTION PROGRAM, AND DETECTION METHOD - Google Patents

Description

The present invention relates to a memory failure detection device and detection method.

In memory using semiconductors, the data in the memory may become an incorrect value (hereafter referred to as "data corruption") due to factors such as collision with radiation, and such a phenomenon is called a soft error. . Since this soft error is a transient phenomenon, even if data corruption occurs, it can be repaired by writing correct data. In addition, with the recent increase in density/miniaturization of memories, the influence of soft errors tends to increase, and this soft error may cause a large amount of garbled data in the memory. Furthermore, not only such soft errors but also failures of the memory itself may cause data corruption in the memory.

As technologies related to measures against soft errors and memory failures, ECC (Error Correcting Code), SDDC (Single Device Data Correction), DDDC (Double Device Data Correction) ), etc. The SDDC technology has the ability to detect/correct as a CE even if all the data in one of the memory components that make up the memory module that supports ECC is garbled. Similarly, the DDDC technique has the ability to detect/correct as a correctable error (hereinafter referred to as CE) even if two pieces of data are garbled.
When these techniques are adopted, even if a large amount of data corruption occurs in the memory due to soft errors, it can be detected/corrected in most cases.

Furthermore, there is Patrol Scrub as a technology related to countermeasures against soft errors and memory failures. Patrol Scrub is a function in which the memory controller periodically reads all the memories and, when correctable data corruption is detected in the read data, restores correct data by writing back. If correctable data corruption occurs in the memory due to a soft error, it can be completely repaired by executing Patrol Scrub.

Further, as a function generally possessed by a device using a memory, there is a function of writing specific data to the entire memory as memory initialization processing when the device is started. If correctable data corruption occurs in the memory due to a soft error, it can be completely restored by memory initialization.

For example, Patent Documents 1 and 2 below relate to techniques for monitoring the CE of a memory using a basic input/output system program (BIOS: Basic Input Output System).
In the memory failure coping system described in Patent Document 1, the number of CE occurrences is counted using the CE occurrence notification from the memory controller to the firmware, and when the CE occurrence count reaches a threshold, it is determined that a memory failure has occurred.
Further, in the memory failure processing system described in Patent Document 2, when the total number of occurrences of failures detected in the memory exceeds the sum threshold, it is determined that there is a memory failure. It can be regarded as an error, and a value suitable for judging that there is a high possibility that the memory is out of order is set.
By selecting the threshold value of the method of Patent Document 1 by the method of Patent Document 2, it is possible to implement CE monitoring with a low possibility of erroneously determining a memory failure due to a CE caused by a soft error.

JP 2020-154591 A JP 2011-150469 A

However, when detecting a memory failure using the techniques described in Patent Documents 1 and 2, there are the following problems.
If an appropriate threshold is not selected, a failure caused by a CE due to a soft error may be mistakenly determined as a memory failure. However, it is difficult to select an appropriate threshold.
In order to select a threshold that reduces the possibility of erroneously determining a memory failure due to a CE caused by a soft error, it is necessary to set the threshold larger than the number of CE occurrences that can occur due to a soft error.
The reason for this is that, in order to estimate the number of CE occurrences that can occur due to soft errors, it is necessary to estimate the value of the following equation (1) as an example, considering that soft errors are a phenomenon that occurs continuously. .
Number of CE occurrences that can occur due to soft errors =
(Number of unit hours of monitoring period) * (Number of CE occurrences that can occur due to soft errors per unit time) ……(1)
Here, since the "monitoring period unit time" depends on the operation period of the device, it is necessary to grasp the operation period of the device at the time of threshold selection, and the difficulty of setting the value is high.
In addition, "the number of CE occurrences that can occur due to soft errors per unit time" also greatly depends on how much data is corrupted in the memory due to factors such as the impact location of radiation on the memory due to soft errors. Since it is different, the difficulty of estimating the value is high.

SUMMARY OF THE INVENTION An object of the present invention is to select a determination threshold with a low probability of false detection of a memory failure.

In order to solve the above problems, a memory failure detection device according to a first aspect of the present invention includes a memory that stores data, a memory controller that controls the memory and detects the presence or absence of an error, and firmware. The memory controller comprises an error detection unit that detects the occurrence of a correctable error in the memory, a frequency measurement unit that measures the frequency of error detection by the error detection unit, and A frequency determination unit that determines that an error has been detected by frequency, and a correctable error unit that occurs with a frequency equal to or greater than a predetermined frequency when the frequency determination unit determines that a correctable error has occurred with a frequency equal to or greater than a predetermined frequency. an error calculation unit that calculates the number of detections per time; and an error determination unit that compares the number of detections calculated by the error calculation unit with a preset error detection threshold to determine whether or not the memory has failed. and

A memory failure detection method according to a second aspect of the present invention comprises the steps of detecting occurrence of a correctable error in a memory storing data; measuring the frequency of error detection; a step of determining that a is detected; and a step of calculating the number of correctable errors detected per unit time that occur with a frequency of a predetermined frequency or more when it is determined that correctable errors have occurred with a frequency of a predetermined frequency or more. and comparing the calculated number of detections with a preset error detection threshold to determine whether the memory has failed.

According to the present invention, it is possible to select a determination threshold with a low probability of false detection of a memory fault.

1 is a block diagram of a memory failure detection device according to the minimum configuration of the present invention; FIG. 1 is a block diagram of a memory failure detection device according to an embodiment of the present invention; FIG. 4 is a flow chart showing processing steps of the memory fault detection device of one embodiment.

FIG. 1 shows an example of the minimum configuration of a memory failure detection device.
The memory failure detection device of FIG. 1 includes a memory 1 for storing data, a memory controller 2 for controlling the memory 1 and detecting the presence or absence of an error, and firmware 3. an error detection unit 10 for detecting the occurrence of a correctable error, a frequency measurement unit 11 for measuring the frequency of error detection by the error detection unit 10, and an error detected by the frequency measurement unit 11 at a frequency equal to or higher than a predetermined frequency. a frequency determination unit 12 that determines that a correctable error has occurred with a frequency equal to or greater than a predetermined frequency; An error calculation unit 13 that calculates the number of detections, and an error determination unit 14 that compares the number of detections calculated by the error calculation unit 13 with a preset error detection threshold to determine whether the memory has failed. and

According to the memory failure detection device configured as described above, counting is started after the occurrence frequency of correctable errors is determined by the frequency determination unit 12, so the possibility of erroneously determining correctable errors as failures that should be detected is low. False detection of memory faults can be minimized by choosing a threshold and comparing it to the error count.

The minimum configuration of the memory failure detection method is, for example, in the memory controller 2, a step of detecting the occurrence of a correctable error in the memory 1 that stores data, a step of measuring the frequency of error detection, and a a step of determining that errors are detected with frequency; and calculating the number of correctable errors detected per unit time that occur with a frequency of a predetermined frequency or more when it is determined that correctable errors have occurred with a frequency of a predetermined frequency or more. and determining whether or not the memory has failed by comparing the calculated number of detections with a preset error detection threshold.

According to the memory failure method configured as described above, counting is started after determining the occurrence frequency of correctable errors. False memory fault detection can be minimized by comparing error counts.

A configuration according to an embodiment of the present invention embodying FIG. 1 will be described with reference to FIGS. 2 and 3. FIG.
A CPU (Central Processing Unit) 100 includes a firmware storage section 200 storing firmware, an NVRAM (Non Volatile RAM non-volatile memory that retains memory even when the power is turned off) 300, a #1 memory 410 and #2, which will be described later. It has a function of accessing the memory controller 400 that controls the memory 420 .
The CPU 100 also has a function of executing the firmware in the firmware storage unit 200 .

The memory controller 400 has a function of accessing #1 memory 410 and #2 memory 420 .
The memory controller 400 includes a CE detection/correction unit 411 that detects and corrects a CE generated in the #1 memory 410, and notifies the firmware storage unit 200 that a CE has occurred in the #1 memory 410. A #1 CE notification unit 412, a CE detection/correction unit 421 that detects and corrects a CE generated in the #2 memory 420, and a #2 CE notification unit that notifies the firmware storage unit 200 that a CE has occurred in the #2 memory. 422, a patrol scrub control unit 450 having a function of restoring correct data by writing back correct data when garbled data is detected in the #1 memory 410 and #2 memory 420;

That is, the configuration of the failure detection device of one embodiment is summarized as follows.
(1) #1 and #2 memories 410 and 420, memory controller 400, firmware stored in firmware storage unit 200, and NVRAM 300 in which the firmware can be used.
(2) The memory controller 400 has a function of detecting correctable garbled data read from the #1 and #2 memories 410 and 420 as generation of CE and correcting it.
(3) The memory controller 400 has a function of notifying the firmware of the occurrence of CE.
(4) The firmware stored in the firmware storage unit 200 can enable and disable notification by the function (3).
(5) When the firmware stored in the firmware storage unit 200 activates the notification of (3), it is possible to implement a measure that does not notify the CE that occurred before the activation.

(6) The firmware stored in the firmware storage unit 200 has a function of recognizing the occurrence of a CE upon receiving notification by the function of (3).
(7) Specific data is written to the entire memory as initialization processing of the #1 and #2 memories 410 and 420 when the device is started.
(8) The firmware stored in the firmware storage unit 200 can recognize completion of data writing by the function (7).
(9) The memory controller 400 has Patrol Scrub or a function equivalent to Patrol Scrub.
(10) The firmware stored in the firmware storage unit 200 can recognize the completion of one cycle of processing in (9).

The firmware stored in the firmware storage unit 200 performs the following steps S1 to S8 as shown in the flowchart of FIG.
The operation of the memory failure detection device and the processing performed in each step of the memory failure detection program and the failure detection method of one embodiment will be described below.
The processing of steps S1 to S8 below is executed for each of the #1 and #2 memories 410 and 420 to be monitored.
S1: Wait for completion of initialization of #1 and #2 memories 410 and 420 or completion of one cycle of Patrol Scrub to these memories.
S2: Enable CE occurrence notification in the #1 and #2 memories 410 and 420; At the time of this validation, measures are taken to prevent CEs that occurred before validation from being notified.
S3: The #1 and #2 memories 410 and 420 continue to measure the CE occurrence frequency based on the CE occurrence notification, and wait until "the CE whose frequency exceeds the threshold" is detected.
S4: #1, #2 Invalidate the CE occurrence notification in the memories 410, 420.

S5: Store the detection time of "CE with a frequency exceeding the threshold" in step S3 or information from which the detection time can be calculated in the NVRAM.
S6: Based on the information stored in the NVRAM in step S5, the number of detected "CEs with a frequency exceeding the threshold" within a unit time is calculated.
S7: If the value calculated in step S6 is less than the threshold, return to S1. If the value calculated in S6 is greater than or equal to the threshold, the process proceeds to S8.
S8: Execute processing when a memory failure is detected.

The "threshold of CE occurrence frequency" in step S3 is assumed to be the CE occurrence frequency at which a memory failure is suspected. A soft error may cause a CE to occur at a frequency equal to or higher than this threshold. For the "CE occurrence frequency threshold" at which a memory failure is suspected, a value selected and set by a statistical method using past quality control data on memory anomalies, for example, is adopted.
The reason for using the NVRAM is to hold the information used in S6 even if the memory is initialized.

More specifically, the memory failure determination in step S7 is performed based on the following determination criteria.
If the memory has failed, even if step S1 is performed after "CE with a frequency exceeding the threshold" is detected in step S3 due to the memory failure, the memory failure will not be recovered. As a result, due to a memory failure, "CE with a frequency exceeding the threshold" is re-detected in step S3. Therefore, when the memory fails, the detection of "CE with a frequency exceeding the threshold" is repeated.
If the memory is normal, even if "CE with a frequency exceeding the threshold" is detected in step S3 due to the occurrence of a soft error on a scale that causes "CE with a frequency exceeding the threshold", the subsequent In step S1, all data garbled in the memory due to soft errors are repaired. ” will not be detected again.

By the above-described processing, the number of soft errors that generate "CE with a frequency exceeding the threshold" within a unit time is estimated, and the threshold to be compared with the number of CEs detected in step S7 is set larger than the estimation. By doing so, it is possible to monitor by detecting the occurrence of a CE with a low possibility of erroneously determining a memory failure even though the CE is caused by a soft error.

The processing of step S7 of the above embodiment may be modified as follows.
Among the steps S1 to S8 of the embodiment, the "value calculated in step S6" of one memory to be monitored in step S7 is replaced with the "value calculated in step S6" of the other memory or this Compare with the "value calculated in step S6" of the memory on the other device to which the invention is introduced, and if the "value calculated in step S6" of one memory to be monitored is extremely large, proceed to step S8. (Determine that there is a memory failure), otherwise proceed to step S1 (Determine that there is no memory failure).

In the modified example, the means for comparing with the "value calculated in step S6" in the memory of the installed other device is not limited to a specific means.
This method eliminates the need for the process of estimating and setting the threshold value to be compared in step S7 of the embodiment.

As described above, one embodiment of the present invention has been described in detail with reference to the drawings. Design changes, etc. within a range that does not deviate are also included.

INDUSTRIAL APPLICABILITY The present invention can be used for a memory error detection device, a detection program, and a detection method.

1 memory 2 memory controller 3 firmware 10 error detection unit 11 frequency measurement unit 12 frequency determination unit 13 error calculation unit 14 error determination unit 100 CPU
200 firmware storage unit 300 NVRAM
400 Memory controller 410 #1 memory 411 CE detection/correction unit 412 #1 CE notification unit 420 #2 memory 421 CE detection/correction unit 422 #2 CE notification unit 450 Patrol scrub control unit 450

Claims (6)

a memory for storing data;
a memory controller that controls this memory and detects the presence or absence of an error;
firmware;
with
The memory controller includes an error detection unit that detects occurrence of a correctable error in the memory;
a frequency measuring unit that measures the frequency of error detection by the error detecting unit;
a frequency determination unit that determines that an error is detected at a predetermined frequency or more by the frequency measurement unit;
an error calculation unit that, when the frequency determination unit determines that correctable errors have occurred with a frequency equal to or greater than a predetermined frequency, calculates the number of correctable errors detected per unit time that have occurred with a frequency equal to or greater than a predetermined frequency;
an error determination unit that compares the number of detections calculated by the error calculation unit with a preset error detection threshold to determine whether the memory has failed;
A memory failure detection device having a The frequency measurement unit starts measuring the error occurrence frequency by the frequency measurement unit after initialization of the memory is completed.
2. The memory failure detection device according to claim 1. The frequency measuring unit measures the error occurrence frequency by the frequency measuring unit after one cycle of processing for reading back data from the memory and correctable data corruption is detected and correcting the data by writing back the correct data. conduct,
2. The memory failure detection device according to claim 1. When the frequency determination unit detects that a correctable error has occurred at a frequency equal to or higher than a predetermined frequency, the error calculation unit invalidates the notification of the occurrence of the correctable error in the memory.
4. The memory failure detection device according to any one of claims 1 to 3. A process executed by the memory failure detection device according to any one of claims 1 to 4, wherein the error detection unit detects occurrence of a correctable error in the memory;
a step of measuring the frequency of error detection by the frequency measuring unit;
a step of determining, by the frequency determination unit, that an error is detected at a frequency equal to or higher than a predetermined frequency;
a step of calculating, by the error calculation unit, the number of correctable errors detected per unit time that occur with a frequency equal to or greater than a predetermined frequency, when it is determined that correctable errors have occurred with a frequency equal to or greater than a predetermined frequency; and the calculated number of detected errors. and a preset error detection threshold value, and the error determination unit determines whether or not the memory has failed;
A memory fault detection program that causes a computer to run detecting the occurrence of a correctable error in a memory storing data;
measuring the frequency with which errors are detected;
a step of determining that an error is detected with a frequency equal to or higher than a predetermined frequency;
a step of calculating the number of correctable errors detected per unit time that occur with a frequency equal to or higher than a predetermined frequency when it is determined that correctable errors have occurred with a frequency equal to or higher than a predetermined frequency;
determining whether the memory has failed by comparing the calculated number of detections with a preset error detection threshold;
A memory fault detection method comprising:

Images