JP7283598B1 - Control device for voltage source inverter - Google Patents

Abstract

Kind Code: A1 A voltage-fed inverter expands an output voltage beyond a voltage limit and suppresses both the amplitude and frequency bandwidth of harmonics. A sixth-order harmonic correction unit 100 receives a voltage command Vcmd and a phase command θv, and obtains amplitude values Vx6 and Vy6 of sixth-order correction components when the voltage command Vcmd exceeds a saturation voltage VB. Corrected voltage commands Vx and Vy are obtained based on the amplitude values Vx6 and Vy6 of the sixth-order correction components. Gate signals Gu to Gw for the switching elements are generated based on the corrected voltage commands Vx and Vy. [Selection drawing] Fig. 1

Description

The present invention is directed to an inverter device for driving an electric motor (motor), and relates to a PWM (Pulse Width Modulation) method for generating a variable voltage/variable frequency AC voltage.

In the PWM method, the PN potential of the DC power supply is output in a pulse form, and the AC voltage is output by changing the pulse width. However, when the voltage command increases and the pulse width becomes zero, the modulation limit is reached. As a method of further expanding the output voltage, there is also a method of allowing harmonic components other than sinusoidal waves such as trapezoidal waves, which is called "overmodulation (method)".

Although the present invention also produces a waveform close to a trapezoid, it is an overmodulation method that reduces harmonic components as much as possible. Furthermore, an overmodulation method that takes into account the limitation of the "minimum pulse width" caused by restrictions such as the minimum ON time and dead time of semiconductor switching elements will be described.

The present invention is intended for a voltage-type inverter having a main circuit configuration shown in FIG. 34, and relates to a pulse width modulation (PWM) system applied thereto. By controlling the reverse-conducting switching elements SWu to SWz in the figure with six gate signals Gu to Gz, eight types of voltage vectors shown in FIG. 35(a) can be output.

Assuming that the DC voltage of the DC power supply DC in FIG. -Vw and the two zero vectors V0, V8 are the output voltages.

The inside of the hexagon connecting the heads of these six space vectors is called "voltage saturation region", and the voltage region outside this hexagon is called "voltage overmodulation region". In particular, when it is desired to specify the sides of a hexagon, the voltage is set to "region boundary", and the radius of this inscribed circle "saturation voltage VB" is given by equation (1). If the voltage locus can be circular, the line voltage of the three-phase output will be a sine wave, and if the voltage locus is hexagonal, the phase voltage of the three phases will have a trapezoidal waveform.

As a method for generating six gate signals from a voltage command, a configuration as shown in FIG. 36 is common. Here, the voltage command is given as an amplitude component (voltage command) Vcmd and a frequency component (frequency command) ωcmd of the rotation vector. The integrator 2 time-integrates the frequency command ωcmd to obtain a phase command θv.

Using this phase command θv, the rotating coordinate converter 1 converts the voltage command Vcmd, which is an amplitude component, into two-phase AC voltage vectors Va and Vb. It is converted to Vu, Vv, and Vw. In the divider 4, the three-phase AC voltage commands Vu, Vv, and Vw are divided by Vdc/2 and normalized to the ratios of the DC voltage (PWM commands before zero-phase modulation) Ku, Kv, and Kw. The corrector 5 performs zero-phase modulation to obtain final (after zero-phase modulation) PWM commands Kzu, Kzv, and Kzw.

A carrier signal output unit 7 outputs a triangular wave carrier signal Cry. A comparator 8 compares the magnitudes of the PWM commands Kzu, Kzv, and Kzw after zero-phase modulation and the triangular wave carrier signal Cry to generate PWM pulse signals Su, Sv, and Sw. are output as gate signals Gu, Gx, Gv, Gy, Gw, and Gz of the switching elements SWu, SWx, SWv, SWy, SWw, and SWz.

The configuration of FIG. 36 can be represented by a formula as follows.

Assuming that the voltage command Vcmd is the amplitude component of the rotation vector, a voltage vector VXY (elements: Vx, Vy) of orthogonal biaxial rotation coordinates (XY coordinates) can be defined as in equation (2). In this specification, when “vectors/arrays” are indicated in mathematical formulas, the first characters are “bold/italic” (“vectors/arrays” are only symbols that include the string “XY/ab/uvw/abc”). is).

The frequency command ωcmd is time-integrated by the integrator 2 and converted into a phase command θv, and the phase command θv is used to convert the rotating coordinate by the rotating coordinate transforming unit 1, thereby fixing orthogonal two axes as shown in equation (3). A voltage vector v (elements: Va, Vb) of coordinates (αβ coordinates) is obtained.

Further, the two-to-three-phase conversion unit 3 can convert to a three-phase AC voltage command Vuvw (elements: Vu, Vv, Vw) as shown in equation (4).

Since the amplitude of the triangular wave carrier signal Cry is normally set to ±Vdc/2, the three-phase AC voltage command Vuvw is divided by the "carrier half amplitude Vdc/2" in the divider 4 as shown in equation (5) to obtain a DC voltage. (PWM command before zero phase modulation) Kuvw (Ku, Kv, Kw).

Further, the zero-phase modulation correction unit 5 applies zero-phase modulation, which will be described later, to generate a PWM command Kzuvw (Kzu, Kzv, Kzw) after zero-phase modulation of three-phase alternating current that can expand the output voltage by about 15%. Here, in order to distinguish between Kzuvw and Kuvw, Kuvw is used as "PWM command before zero phase modulation" and Kzuvw as "PWM command after zero phase modulation".

If the PWM command is normalized by "carrier half amplitude Vdc/2", the maximum amplitude becomes "±1", making it easier to express saturation. On the other hand, the two-phase AC voltage vector (two-axis fixed coordinate voltage) Vab is easier to understand if normalized with the saturation voltage VB as a reference. Since it is confusing when different standards are mixed, "3-phase AC components are standardized in the normalized expression of the PWM command", and "the two-axis AC voltage vector (trajectory) is standardized in the normalized expression based on the saturation voltage VB". do.

In the following description, DC potentials VP and VN corresponding to both amplitude levels of the triangular wave carrier waveform are frequently used, so the VP side is referred to as "P potential", "P level", KP=+1p. u. ”, the VN side as ““N potential”, “N level”, KN=−1p. u. ” is defined as

The case where the voltage command Vcmd exceeds the saturation voltage VB is called "overmodulation of the voltage command", ΔV0 = (Vcmd-VB) is the "overmodulation component of the voltage command", and ΔK0 = (Vcmd-VB)/VB is the "voltage commanded overmodulation rate [p.u. or %]”.

When the voltage command Vcmd becomes overmodulation (Vcmd>VB), the circular locus of the voltage vector Vab in FIG. 37 does not stay within the hexagonal voltage saturation region and also passes through the outer voltage overmodulation region. Even in this case, if the present invention is applied, the trajectory of the corrected voltage vector VabL can be corrected to a trajectory limited within the voltage saturation region as long as it is shown in FIG. This countermeasure method corresponds to the "overmodulation control" of the present invention.

When the voltage command is Vcmd=VB, the maximum amplitude of the PWM command Kuvw (equation (5)) before zero phase modulation is about ±1.15 p.s. u. exceeds the carrier amplitude, typically zero-phase modulation is applied to reduce the maximum amplitude of the three-phase PWM command by about 15%.

Although there are many methods of zero-phase modulation, two representative methods are shown here, and they are called "three-phase modulation (method)" and "two-phase modulation (method)." In each method, the zero-phase modulation component Kz (Kz3 for three-phase modulation, Kz2 for two-phase modulation) is calculated by the zero-phase modulation unit 5a of FIG. 36 as follows.
(a) Three-phase modulation method (min-max method)

Here, max() is a function that selects the maximum value of the three-phase element, and min() is a function that selects the minimum value of the three-phase element.
(b) Two-phase modulation method (60° interval alternating modulation)

Kz3 or Kz2 obtained by equation (6) or (7) is defined as the zero-phase modulation component (Kzx), and the adder 6 adds the same component to the three phases (zero-phase correction) as in equation (8). , a PWM command Kzuvw (Kzu, Kzv, Kzw) after zero-phase modulation is obtained.

Applying this zero-phase modulation distorts the phase voltage waveforms of the three phases, but the line voltage can maintain a sine wave. Moreover, if the zero-phase impedance of the load machine is sufficiently large, the zero-phase current will also be zero, so that the load machine will not be affected.

In the embodiment described later, in order to indicate the phases corresponding to the maximum value max (Kuvw) and the minimum value min (Kuvw), the phase that is the maximum value of the former is called "maximum phase", and the phase that is the minimum value of the latter is called "maximum phase". We describe the "minimum phase" and the remaining phases as the "intermediate phases".

In two-phase modulation, two types of modulation methods are switched by the phase command θv of the voltage command as shown in equation (7), so the upper equation is “P side modulation” and the lower equation is “N side modulation”. , (7) is expressed as a "sector", and switching between two expressions (modulation directions) is expressed as a "sector switch".

In two-phase modulation, the P-side sector that matches the amplitude of the maximum phase with the P potential of the DC power supply and the N-side sector that matches the amplitude of the minimum phase with the N-side potential of the DC power supply are alternately switched in 60° intervals. It is a phase modulation method.

The three-phase modulation is a method of performing zero-phase modulation so as to equalize the absolute values of the amplitudes of the maximum and minimum phases with respect to the three-phase components after the two-to-three-phase conversion.

Since there are many variables to be dealt with in this specification, we will pick up frequently used terms.
(1) αβ coordinates: voltage component (normalization reference = VB)
Voltage vector (trajectory) = Vab
Correction voltage vector = VabL
Saturation voltage = VB (when applying zero-phase modulation)
DB voltage margin width = ΔVdb
DB saturation voltage = VDB
(2) XY coordinates: voltage component (normalization reference = VB)
Voltage command = Vcmd
Voltage vector VXY (Vx, Vy)
(3) Three-phase AC: PWM command component (normalization reference = Vdc/2)
PWM command after zero-phase modulation=Kzuvw
PWM command before zero phase modulation=Kuvw
Carrier amplitude = Cry (±1 p.u.)
DB allowance width = ΔKdb

JP-A-4-79791 JP 2014-39425 A JP 2014-226035 A JP 2015-156732 A

Smith Lerdudomsak, Shinji Michiki, Shigeru Okuma, "New Voltage Limiter for High Torque Response of IPMSM in Voltage Saturation Region", IEEJ Transactions D, Vol. 128, No. 12, pp. 1346-1356 (2008) Kenji Takahashi, Kiyoshi Oishi, Toshiyuki Uemachi, "One Driving Method for Embedded Permanent Magnet Synchronous Motor Prioritizing D-axis Voltage", The Institute of Electrical Engineers of Japan Transaction D, Vol. 131, No. 9, pp. 1103-1111 (2011)

(1. Problem of low-order harmonics at voltage saturation)
When the voltage command Vcmd exceeds the saturation voltage VB, the three-phase waveform of the PWM command exceeds the carrier amplitude (±1 p.u.) even if zero-phase modulation is applied. In this exceeded interval, PWM switching is suspended and the output voltage is fixed to the P potential and the N potential, as if the PWM command were ±1 p.s. u. It works like it's saturated.

Moreover, the output PWM waveform is distorted by this saturation, and harmonic components are generated. Hereinafter, frequency components other than the fundamental wave caused by the "distorted waveform due to saturation" will be referred to as "harmonics".

Since this harmonic component increases copper loss and iron loss, it is better to reduce it. In particular, eddy current loss increases rapidly with the square of the voltage, so in consideration of the cooling capacity of the power converter and the load machine, the upper limit of the overmodulation rate can usually be kept at "about 1.06 p.u." many. The overmodulation of the present invention also covers this range.

Next, the prior art of overmodulation control will be described.

Applying the zero-phase modulation of the three-phase modulation method described above, the voltage command Vcmd is set to "(a) 0.9 p.u., (b) 1.05 p.u., (c) 1.2 p.u." FIG. 37 shows an example of waveforms when three types are set. The upper part shows the trajectory of the voltage vector Vab in the αβ coordinates, and the lower part shows the waveforms of the PWM commands Kzu, Kzy, Kzw after zero-phase modulation. Since we want to expand the waveform, the display phase is limited to 0 to 120 degrees, and for reference, the u-phase component Ku of the PWM command before zero-phase modulation is also added.

An example of the triangular wave carrier signal Cry is also shown in the lower part with a dotted line. Therefore, the voltage component corresponding to the fourth sample time is shown as "(n=4)".

The following features can be confirmed in each figure.

FIG. 37(a): At "Vcmd=0.9 p.u.", the trajectory of the voltage vector Vab in the upper row is a circle, and the markers of the carrier peak timing are also arranged at regular intervals.

Figure 37(b): Since "Vcmd = 1.05 p.u." exceeds the saturation voltage (voltage saturation limit) VB, the trajectory of the voltage vector Vab extends to the outside of the hexagon as indicated by the (small circle). expanding. In addition, the PWM commands Kzu, Kzv, and Kzw after zero-phase modulation in the lower stage also have a carrier amplitude of ±1p. u. is exceeded. Since the excess part is equivalent to the saturation of the P potential or N potential, the maximum part becomes flat like the waveforms KzuL, KzvL and KzwL.

When these waveforms KzuL, KzwL, and KzwL are inversely transformed into voltage components of αβ coordinates, the trajectory is limited (moved) on the sides of the hexagon as shown in the upper correction voltage vector VabL (marked with □). Of these three-phase PWM waveforms, "a state in which two phase components are simultaneously limited to carrier amplitudes (±1) and only the remaining one phase is switching" is defined as "one-phase modulation". In other words, the one-phase modulation is further forced to replace the "maximum phase amplitude with the P-side potential of the DC power source" and the "minimum phase amplitude with the N-side potential of the DC power source" for the three-phase modulation. It is a phase modulation method.

FIG. 37(c): "Vcmd=1.2 p.u." is an excessive voltage command that is not actually used, but is drawn to exaggerate the effects of saturation. This is an example in which the trajectory of the voltage vector Vab in the upper row exceeds the hexagon over the entire circumference. will only move. The limiting operation from the voltage vector Vab to the correction voltage vector VabL is described in US Pat.

FIG. 38 shows the characteristics when the two-phase modulation method is applied under the same conditions as in FIG. Compared with FIG. 37, there are differences in the following points.

FIG. 38(a): In the case of "Vcmd=0.9 p.u.", the locus of the voltage vector Vab on the αβ coordinates is the same as in FIG. 37(a). However, the lower three-phase PWM command alternately switches between P-side modulation and N-side modulation every 60 deg interval.

Fig. 38(b): At "Vcmd = 1.05 p.u.", in the sector switching part of the two-phase modulation, there appears a section in which one-phase modulation, that is, the two-phase components are simultaneously limited to the carrier amplitude (±1). Furthermore, it is characterized in that the fixed state of the PN level is continuous with the two-phase modulation. The direction of movement from the voltage vector Vab to the correction voltage vector VabL is also different, and the sample points are slightly sparse at the center of the side of the hexagon and conversely dense near the corners.

FIG. 38(c): At “Vcmd=1.2 p.u.”, almost the entire area of both of them is one-phase modulation, and the center of the side of the hexagon is greatly expanded between the sample points of the correction voltage vector VabL. , concentrated near the corners.

Comparing FIG. 37 and FIG. 38, there is a difference in the "movement characteristics from the voltage vector Vab (marked with ◯) to the correction voltage vector VabL (marked with □)" in the upper diagram. In the three-phase modulation (FIG. 37), all move in parallel, whereas in the two-phase modulation (FIG. 38), the directions differ by 60 degrees bordering on the 30-degree phase in the middle of the sector. As for sample points (correction voltage vector) VabL(n) on the sides of the upper hexagon, the intervals in FIG. 37 are almost equal, but in FIG. are concentrating on

This means that not only the "limitation of the amplitude component" of the voltage vector but also the "correction of the phase lead/lag component" has occurred. In other words, when the voltage is saturated, the voltage locus is limited to the hexagon, but the position (phase) on the side remains free to be corrected. Japanese Patent Laid-Open Publication No. 2002-300001 discloses an overmodulation method that is conscious of this phase correction.

In addition to this, there are methods such as devising saturation processing as in Non-Patent Document 1, and overmodulation methods that apply trapezoidal waveforms as in Patent Document 3, but none of them have been studied up to the minimization of harmonic components. do not have.

Therefore, the first problem is to develop an overmodulation method with less harmonic components. In the present application, an overmodulation method capable of suppressing the harmonic components of the phase voltage to only the 5th and 7th orders (±6th orders in a rotating coordinate system) will be described.

In the overmodulation method using a square wave or a trapezoidal wave, harmonics contain many frequency components and cause large disturbances when they match the resonance band of a filter that removes PWM ripples. Therefore, it is necessary to consider not only the effective value of harmonics (the sum of the squares of each component) but also the included frequency band.

(2. Issues regarding minimum pulse width limitation of PWM)
Even if the voltage vector trajectory is within the voltage saturation region, there is a problem that a narrow PWM pulse is generated when the PWM command approaches the carrier amplitude. A short-circuit prevention period (dead time) is inserted in the gate signal pair of the upper and lower arms in FIG. A pulse may be missing, resulting in a "sudden change in voltage error near the current zero cross".

Since it is difficult to accurately compensate for this error component, measures are taken to ensure a "minimum pulse width" wider than the dead time. The second problem is how to secure this "minimum pulse width".

In order to limit the PWM pulse to the minimum pulse width or more, a prohibited band of "DB margin width ΔKdb" is often set to the upper and lower limits of the PWM command as shown in the right diagram of FIG. 10(a). If the upper and lower limits are limited to ±KDB=±(1 p.u.-ΔKdb), a pulse width narrower than the phase width Δθdb will not occur. Hereinafter, instead of this phase width Δθdb, a DB margin width ΔKdb converted to PWM amplitude is used.

When the two-phase modulation is applied, no narrow pulse is generated in the switching quiescent interval fixed at the PN level (±1 p.u.) because the pulse itself is not generated. That is, the DB margin width ΔKdb, which is the prohibited band of the minimum pulse width, may be skipped and set to the PN level.

When these are represented by the αβ coordinates in FIG. 35(b), the forbidden band is the peripheral portion (hatched portion) of the hexagon. The permissible area is the inside of the hatched area, which is the “three-phase modulation/two-phase modulation area,” a part of the hexagonal side, which is the “single-phase modulation,” and the “non-switching area” where all three phases are switched off. It becomes the vertex part of the hexagon which is "modulation".

Hereinafter, the “three-phase modulation/two-phase modulation region” is the “DB voltage saturation region”, the radius of this inscribed circle is the “DB saturation voltage VDB”, and the width of the forbidden band is the DB voltage margin width ΔVdb=VB−VDB and

In order to secure the minimum pulse width as described above, the second task is to perform exclusive processing on the prohibited band, which is expressed as "minimum pulse width countermeasures".

Here, even if the same DB margin width ΔKdb is set, it should be noted that the width of the DB voltage margin width ΔVdb on the αβ coordinate side differs between three-phase modulation and two-phase modulation. In three-phase modulation, it is necessary to secure a margin width for both the maximum phase and the minimum phase, but in two-phase modulation, since switching is stopped on one side, it is sufficient to consider the margin width for only one side. Therefore, in the two-phase modulation, the DB voltage margin width ΔVdb can be half of that in the three-phase modulation, and in the case of applying the minimum pulse width countermeasure, the two-phase modulation can increase the output voltage.

(3. Problems of extremely small pulses that occur when switching sectors in a two-phase modulation method)
In two-phase modulation, depending on the voltage phase, "sector switching to change P-side modulation and N-side modulation" is required for each sector of 60deg, and even if the forbidden band is observed, narrow pulses are still generated at this time. There are still issues that arise.

"A two-phase modulation sector switching method that does not take into account minimum pulse width countermeasures" is described in Patent Document 4, and as shown in FIG. Inserting modulation is described. However, if the sector is switched near voltage saturation, narrow pulses such as those indicated by ΔT1 and ΔT2 in the figure are generated.

The third problem is to "ensure the minimum pulse width at the time of sector switching in two-phase modulation". The present invention describes inserting one-phase modulation instead of three-phase modulation as a countermeasure.

(4. Issues regarding expansion of output voltage under the condition that the limitation of the DB saturation region is maintained)
Even if the second and third problems can be solved by two-phase modulation considering the minimum pulse width, the voltage that can be output is still the DB saturation voltage VDB. Therefore, the fourth subject is to further extend the output voltage. In the present invention, the principle of overmodulation is applied to expand the output voltage range while maintaining the limitation within the DB voltage saturation region. do.

(5. Problems of measures for minimum pulse width in voltage saturation region)
Even if overmodulation in the DB region, which is a method for solving the fourth problem, is applied, the limit is approximately VC≈(1.06×VDB). Therefore, the fifth object is to provide an overmodulation method for obtaining a higher output voltage.

In the method for solving the third problem, one-phase modulation was inserted only during the carrier half cycle as a measure against sector switching of two-phase modulation. This is expressed as "overmodulation in the OVM region". This enlarges the section located on the side of "single-phase modulation" in FIG. 35(b).

(6. Problem of bumpless switching of different overmodulation regions)
Even if the voltage command can be expanded, it is necessary to switch the overmodulation method between the "DB region" and the "OVM region" according to the magnitude of the command. Abnormal PWM pulses may occur when switching between the different overmodulation schemes.

Therefore, the sixth object is to provide an overmodulation method switching method that does not cause abnormal pulses or load current waveform distortion.

(7. Problems of asynchronous PWM)
In addition to the above six problems, there is a problem of frequency synchronization/asynchronization between the triangular wave carrier signal and the voltage command. A PWM modulation method in which the carrier frequency is synchronized with an integral multiple of the voltage frequency is called "synchronous PWM", and a non-synchronous PWM modulation method is called "asynchronous PWM". In the case of "synchronized PWM", the number of pulses in one cycle is fixed and the same PWM pattern is repeated. Many overmodulation schemes under this condition have already been reported.

However, when the frequency of the voltage command becomes low, the number of pulses increases in inverse proportion, requiring a huge number of tables. In addition, although the carrier frequency changes according to the voltage frequency, it is desirable to fix the carrier frequency when current control is applied. Therefore, an overmodulation method that can be realized even with asynchronous PWM is required. This "response to asynchronous PWM" is a problem common to all of the above six problems.

The main points of the above seven issues are shown below.
(1) Overmodulation method with less harmonics.
(2) Minimum pulse width countermeasure for "DB restricted area" (forbidden band processing of PWM command).
(3) Suppression of extremely small pulses that occur when switching sectors in two-phase modulation.
(4) DB area overmodulation scheme.
(5) OVM region overmodulation scheme.
(6) A method of switching between the "overmodulation method in the DB area" and the "overmodulation method in the OVM area" with less transient disturbance.
(7) Applicability to asynchronous PWM.

As described above, in the voltage-fed inverter, the problem is to expand the output voltage beyond the voltage limit and to suppress both the amplitude and frequency band of harmonics.

The present invention has been devised in view of the conventional problems described above, and one aspect thereof is a voltage-fed inverter that has switching elements connected in a three-phase full-bridge connection and converts a DC voltage into a three-phase AC voltage. A control device that inputs a voltage command and a phase command, obtains the amplitude value of the sixth-order correction component by formulas (26) and (27) (or formula (28)), and calculates the corrected voltage by formula (29). It is characterized by comprising a sixth-order harmonic correction unit that obtains a command and outputs the corrected voltage command, and generates a gate signal for the switching element based on the corrected voltage command.

VB: Saturation voltage Vdc: DC voltage Vx6, Vy6: Amplitude value of sixth correction component Vcmd: Voltage command ΔV0: Overmodulation component min: Function for selecting minimum value from elements in ( ) Vx, Vy: Voltage command after correction θv: Phase command.

Further, as another aspect, a control device for a voltage-fed inverter having switching elements connected in a three-phase full-bridge connection and converting a DC voltage into a three-phase AC voltage, wherein the DB saturation voltage is determined by equation (30): , the voltage command and the phase command are input, the amplitude value of the 6th-order correction component is obtained by equations (31) and (32) (or equation (33)), the corrected voltage command is obtained by equation (29), and the above-mentioned A sixth harmonic correction unit that outputs a corrected voltage command is provided, and a gate signal for the switching element is generated based on the corrected voltage command.

VB: Saturation voltage Vdc: DC voltage Kv6: Correction coefficient VDB: DB saturation voltage ΔVdb: DB voltage margin Vx6, Vy6: Amplitude value of sixth-order correction component Vcmd: Voltage command ΔV0: Overmodulation component min: Elements in () function Vx, Vy: post-correction voltage command θv: phase command.

Further, as one aspect thereof, a zero-phase modulation/sector switching unit is provided, and the zero-phase modulation/sector switching unit generates a two-phase modulation PWM command, a three-phase modulation PWM command, and a one-phase modulation PWM command. The two-phase modulation PWM command is the main component except when switching the sector of the two-phase modulation by the predicted phase obtained by adding the phase advance amount to the phase command, and when switching the sector of the two-phase modulation by the predicted phase and three-phase When the minimum pulse width can be secured by modulation, the three-phase modulation PWM command is used as the main component for at least half the cycle of the triangular wave carrier signal, and when switching sectors of two-phase modulation by the predicted phase, and in three-phase modulation If the minimum pulse width cannot be ensured, the one-phase modulation PWM command is used as the main component for at least half the cycle of the triangular wave carrier signal, and the voltage error component generated by applying the one-phase modulation PWM command to the main component. generates a correction amount to be applied to the section immediately after the sector switching section based on, generates a PWM command after zero phase modulation based on the principal component and the correction amount, and generates a PWM command after zero phase modulation and A gate signal for the switching element is generated based on comparison with the triangular wave carrier signal.

Further, as another aspect, a zero phase modulation/sector switching unit is provided, and the sixth harmonic correction unit inputs a predicted phase obtained by adding a phase advance amount to a phase command to θv of the equation (29) for correction. A post-predicted voltage command is obtained, and the zero-phase modulation/sector switching unit inputs a pre-zero-phase modulation predicted PWM command generated based on the post-correction predicted voltage command, and converts it into the pre-zero-phase modulation predicted PWM command. Based on this, a two-phase modulation PWM command, a three-phase modulation PWM command, and a one-phase modulation PWM command are generated, and the sector of two-phase modulation by the predicted phase two cycles ahead by adding the phase advance amount to the predicted phase Except when switching, the main component is the two-phase modulation PWM command, and at least the triangular wave carrier signal when switching the sector of two-phase modulation based on the predicted phase two cycles ahead and when the minimum pulse width can be secured by three-phase modulation When the three-phase modulation PWM command is used as the main component for half a cycle, and when the two-phase modulation sector is switched by the predicted phase two cycles ahead, and when the minimum pulse width cannot be secured by the three-phase modulation, at least the triangular wave The one-phase modulation PWM command is used as the main component for half the period of the carrier signal, and based on the error component of the voltage generated by applying the one-phase modulation PWM command to the main component, a sample immediately before the sector switching period is obtained. A prediction correction amount to be applied to the period and a delay correction amount to be applied to the sample period immediately after the sector switching period are generated, and PWM after zero-phase modulation is performed based on the principal component, the prediction correction amount, and the delay correction amount. A command is generated, and a gate signal for the switching element is generated based on a comparison between the PWM command after the zero-phase modulation and the triangular wave carrier signal.

In another aspect, a zero-phase modulation/sector switching unit is provided, and the sixth harmonic correction unit obtains the corrected voltage command by inputting a phase command to θv of equation (29), and (29) The corrected predicted voltage command is obtained by inputting the predicted phase obtained by adding the phase advance amount to the phase command in θv of the equation, and the zero phase modulation/sector switching unit generates the zero phase command based on the corrected voltage command. A PWM command before modulation and a predicted PWM command before zero-phase modulation generated based on the predicted voltage command after correction are input, respectively, and based on the PWM command before zero-phase modulation, a two-phase modulation PWM command and a second 1 three-phase modulation PWM command and a first one-phase modulation PWM command are generated, and based on the predicted PWM command before zero phase modulation, a second three-phase modulation PWM command and a second one-phase modulation PWM command are generated. The two-phase modulation PWM command is the main component except when switching the sector of the two-phase modulation by the predicted phase two cycles ahead by adding the phase advance amount to the predicted phase, and the two-phase by the predicted phase two cycles ahead At the time of modulation sector switching and when the minimum pulse width can be secured by three-phase modulation, the first three-phase modulation PWM command is used as the main component for at least half the cycle of the triangular wave carrier signal, and the prediction of the two cycles ahead is performed. At the time of sector switching of two-phase modulation by phase and when the minimum pulse width cannot be secured by three-phase modulation, the first one-phase modulation PWM command is used as the main component for at least half the period of the triangular wave carrier signal, and the main component is Immediately before the sector switching period calculated from the second three-phase modulation PWM command and the second one-phase modulation PWM command based on the error component of the voltage generated by applying the first one-phase modulation PWM command to the component and a delay correction amount to be applied to the sample period immediately after the sector switching period calculated from the first three-phase modulation PWM command and the first one-phase modulation PWM command. , generating a PWM command after zero-phase modulation based on the principal component, the predicted correction amount, and the delay correction amount, and comparing the PWM command after the zero-phase modulation with the triangular wave carrier signal, generating is characterized by generating a gate signal of

Further, as another aspect, when the voltage command exceeds the saturation voltage, the determination phase width is set based on the exceeding voltage component, and the sixth-order harmonic correction unit uses equations (24) and (25) ) and (29), the corrected voltage command is set, and the insertion period of one-phase modulation is set based on the determined phase width, the phase command, and the predicted phase, and the insertion period is forced is characterized by selecting one-phase modulation for

VC: DB region upper limit voltage VMAX: OVM region upper limit voltage.

According to the present invention, in a voltage-fed inverter, it is possible to increase the output voltage beyond the voltage limit and to suppress both the amplitude and frequency band of harmonics.

2 is a diagram showing a control device for the voltage-source inverter according to Embodiment 1; FIG. FIG. 10 is a diagram showing sixth-order correction components applied to overmodulation in a voltage saturation region; FIG. 10 is a comparison diagram of voltage vector trajectories and PWM commands with respect to the magnitude of the sixth-order correction component; FIG. 10 is a diagram showing sixth-order correction components applied to overmodulation in a voltage saturation region; The figure which shows the vector movement of a 6th harmonic superposition system (Vcmd=1.06, Kx6=0.06, Ky6=0.29). The figure which shows the vector movement of a 6th harmonic superposition method (Vcmd=1.03, Kx6=0.03, Ky6=0). The figure which shows the relationship between a 6th harmonic component and the maximum value of a three-phase DC utilization factor. 4A and 4B are diagrams showing an operation example of an overmodulation method according to the first embodiment; FIG. FIG. 8 is a diagram showing a control device for a voltage-source inverter according to Embodiment 2; FIG. 11 is a diagram showing an operation example of an overmodulation method according to the second embodiment; FIG. 10 is a diagram showing a control device for a voltage-source inverter according to Embodiment 3; FIG. 11 is a diagram showing a zero-phase modulation/sector switching unit according to Embodiment 3; FIG. 11 is an explanatory diagram showing the principle of before and after compensation targets for transition control of sector switching according to the third embodiment; FIG. 4 is an explanatory diagram showing the principle of before and after compensation targets for sector switching transition control (an example of problematic conditions); FIG. 11 is a block diagram showing another example of the zero-phase modulation/sector switching unit according to the third embodiment; FIG. 11 is a diagram showing an operation example of an overmodulation method according to the third embodiment; FIG. 12 is an explanatory diagram showing the transition control of sector switching and the principle of front and rear compensation targets according to the fourth embodiment; FIG. 11 is a diagram showing an operation example of an overmodulation method according to Embodiments 4 and 5; The figure which shows the control apparatus of the voltage source inverter in Embodiment 4. FIG. FIG. 10 is a diagram showing a zero-phase modulation/sector switching unit according to Embodiment 4; FIG. 5 is a diagram showing characteristics of DB forbidden band processing; FIG. 12 is a diagram showing another example of the zero-phase modulation/sector switching unit according to the fourth embodiment; FIG. 11 is a diagram showing a control device for a voltage-source inverter according to Embodiment 5; FIG. 12 is a diagram showing a zero-phase modulation/sector switching unit according to Embodiment 5; FIG. 11 is a diagram showing operation timing of zero-phase modulation/sector switching in Embodiment 5; FIG. 5 is a diagram showing the relationship between the DB width and the overmodulation limit; FIG. 11 is a diagram showing a control device for a voltage-source inverter according to Embodiment 6; FIG. 12 is a diagram showing extended functions of a zero-phase modulation/sector switching unit according to Embodiment 6; FIG. 12 is a diagram showing two types of overmodulation region switching schemes (characteristics of sixth-order correction components) according to the sixth embodiment; FIG. 12 is a diagram showing an example of switching timings of two types of overmodulation regions according to the sixth embodiment; FIG. 11 is a diagram showing an operation example of an extended function of a zero-phase modulation/sector switching unit according to Embodiment 6; FIG. 12 is a diagram showing an example of combined operation of the DB region and the saturation region by the sixth harmonic superimposition method according to the sixth embodiment; FIG. 12 is a diagram showing an example of combined operation of the DB region and the saturation region by the sixth harmonic superimposition method according to the sixth embodiment; FIG. 2 is a main circuit configuration diagram of a voltage source inverter; The figure which shows the voltage vector of a voltage type inverter. The figure which shows the control apparatus of the conventional voltage source inverter. The figure which shows the voltage vector of a three-phase modulation, and a PWM command. FIG. 4 is a diagram showing a voltage vector of two-phase modulation and a PWM command;

Embodiments 1 to 6 of a control device for a voltage-type inverter according to the present invention will be described in detail below with reference to FIGS. 1 to 33. FIG.

[Embodiment 1]
Embodiments 1 to 6 control a voltage-fed inverter that has three-phase full-bridge-connected switching elements shown in FIG. 34 and converts a DC voltage into a three-phase AC voltage. As shown in FIG. 34, switching elements SWu and SWx are connected in series between the positive electrode P and the negative electrode N of the DC power supply DC. Switching elements SWv and SWy are connected in series between the positive electrode P and the negative electrode N of the DC power supply DC. Switching elements SWw and SWz are connected in series between the positive electrode P and the negative electrode N of the DC power supply DC. A connection point between the switching elements SWu and SWx, a connection point between the switching elements SWv and SWy, and a connection point between the switching elements SWw and SWz are connected to the load device as U-phase, V-phase, and W-phase. Here, let the DC voltage be Vdc. The controller generates gate signals Gu, Gv, Gw, Gx, Gy, and Gz of switching elements SWu, SWy, SWw, SWx, SWy, and SWz to control the voltage-type inverter.

(Overmodulation method with superimposed 6th harmonic)
FIG. 1 shows a configuration diagram of a control device for a voltage-type inverter according to Embodiment 1. As shown in FIG. This is an extension of the conventional example (FIG. 36), and inserts a "sixth harmonic correction section 100" in the voltage command section. The "zero-phase modulation block 200" is the same as the zero-phase modulation correction section 5 having the zero-phase modulation section 5a and the adder 6 in FIG.

The sixth harmonic correction section 100 has a saturation function section 10, a subtractor 11, an adder 16, and a "sixth order correction (1) section 17". Sixth-order harmonic correction unit 100 has a voltage command Vcmd of 1.0 p.m. u. It operates in the OVM region exceeding (corresponding to the saturation voltage VB). The saturation function unit 10 sets the voltage command Vcmd to ±1 p.s. u. A limit value V0 limited to . A subtractor 11 subtracts the limit value V0 from the voltage command Vcmd and outputs an overmodulation component ΔV0=(Vcmd−V0) of the voltage command.

In FIG. 1, it is considered that the voltage command Vcmd is set not only to a positive value but also to a negative value. However, in order to simplify the explanation, only the positive region is shown in figures (for example, FIG. 2) showing mathematical formulas related to the operation of the sixth harmonic correction section 100 and their characteristics. If the voltage command is negative, the set values such as the saturation level may be changed to negative values, and the characteristics shown in FIG. 2 are symmetrical with respect to the origin. Taking advantage of this symmetry, we decided to restrict it only to the positive region.

In the "6th-order correction (1) unit 17", the overmodulation component ΔV0 is input to the overmodulation factor ΔK0 which is an input terminal, the phase command θv of the voltage command is input to the phase θv of the input terminal, and the output terminal outputs two types of components, Kx6c and Ky6s, as sixth-order correction components.

The sixth-order correction component Kx6c is an X-axis component in phase with the voltage command Vcmd, and the sixth-order correction component Ky6s is a Y-axis component orthogonal thereto. In the first embodiment, the sixth-order correction components Kx6c and Ky6s output from the "sixth-order correction (1) unit 17" are directly used as the correction voltage components Vx6c and Vy6s, as in equation (9). As shown in equation (10), the adder 16 adds the corrected voltage component Vx6c to the voltage command Vcmd to obtain the corrected voltage command Vx. The other correction voltage component Vy6s is used as the post-correction voltage command Vy as it is, as shown in equation (10). These post-correction voltage commands Vx and Vy are used as input signals for the rotary coordinate conversion unit 1 . Here, since the Y-axis component of the voltage command is zero, the adder is omitted and the correction voltage component Vy6s is directly used as the Y-axis input for the rotary coordinate transformation. The above are the main components near the input and output of the "sixth harmonic correction unit 100".

The internal configuration of the "sixth-order correction (1) unit 17" is shown in another frame at the bottom of FIG. In the "sixth-order coefficient unit 12", the amplitude values Kx6 and Ky6 of the sixth-order correction components are calculated by the equations (11) and (12). Here, the voltage indicates a value normalized by VB, and min in equation (12) is a function that selects the minimum value. Instead of the minimum function min, it can be expressed as Equation (13) by transforming it into a conditional form.

In order to obtain the sine wave component of the sixth harmonic from the amplitude values Kx6 and Ky6 of the sixth correction component, the multiplier 13 calculates the phase 6×θv, which is six times the phase command θv. As shown in equation (14), the multiplier 14 multiplies the cosine wave function cos(6×θv) of phase 6×θv by the amplitude value Kx6 of the sixth correction component to generate the sixth correction component Kx6c. Similarly, the multiplier 15 multiplies the sine wave function sin(6*[theta]v) of phase 6*[theta]v by the amplitude value Ky6 of the sixth-order correction component to generate the sixth-order correction component Ky6s. These are the output components of the "sixth-order correction (1) unit 17".

FIG. 2 is a graph showing the characteristics of the sixth-order coefficient section 12 expressed by the equations (11) and (12). In the upper part of FIG. 2, the voltage command Vcmd is plotted on the horizontal axis, and the limit value V0, which is the output of the saturation function section 10, is plotted on the vertical axis. The overmodulation component .DELTA.V0 (=.DELTA.K0) is, as indicated by the arrow in FIG.

The lower horizontal axis is also the voltage command Vcmd, and ΔK0 (=ΔV0) with the origin offset is also shown. The amplitude value Kx6 of the 6th-order correction component is a straight line (solid line) proportional to the overmodulation factor ΔK0, and the amplitude value Ky6 of the other 6th-order correction component has two sections having a break point as shown in equation (13). function (dotted line). In a region where the voltage is not saturated, such as "Vcmd<VB (ΔV0<0)", the amplitude values Kx6 and Ky6 of the sixth-order correction components are also set to zero because sixth-order harmonic correction is unnecessary.

The amplitude value Ky6 of the 6th-order correction component applied to the first embodiment can be set to a value other than the value of formula (12), and may be in a range that satisfies the condition of formula (15). From this range, the condition with the least harmonic component is selected and corresponds to the equations (12) and (13).

In order to show the operation of the first embodiment, FIG. 3 shows the voltage command corrected for the sixth harmonic as a vector trajectory on the αβ coordinates and a three-phase PWM command in the same manner as in FIGS. be. Table 1 shows the characteristics of FIG. 3. Table 1 shows the results of investigation of the presence or absence of excess of the saturation limit with respect to the 6th harmonic component. In FIG. 3, voltage commands are represented by three voltage commands Vcmd=1.0 p.m. u. , 1.03 p. u , 1.06 p. u. (Kx6=0 p.u., 0.03 p.u., 0.06 p.u.), and Ky6=(+0.09, 0, -0) as the column element in Table 1 as an element to be combined with this .29) was set to 3 levels. Here, for the amplitude value Ky6 of the sixth-order correction component, we want to check not only the value specified by the formula (12) shown in the bold frame in Table 1, but also other values. I set it so that the difference (distribution of ○ and ×) can be compared.

In the lower diagram of FIG. 4, the setting conditions of Table 1 are indicated by three types of markers. In order to distinguish Kx6, the marker types are divided like "○ mark: Vcmd = 1.0 pu., △ mark: Vcmd = 1.03 pu., □ mark: Vcmd = 1.06 pu." Furthermore, markers were drawn at three levels of positive, zero, and negative (+0.09, 0, -0.29) for combined Ky6.

FIG. 3 shows the characteristics of each condition in Table 1. The upper part of each figure is the voltage locus (around 0 to 90 degrees) on the αβ coordinates. The origin is shifted by the value of Ky6. The lower part shows a three-phase PWM command (0 to 120 deg section), and the line type is changed according to the value of the amplitude value Ky6 of the sixth-order correction component.

FIG. 3(a) shows Vcmd=1.0p. u. (Kx6=0), and all three-level voltage loci of Ky6=(+0.09, 0, -0.29) do not exceed the hexagonal voltage saturation region as shown in the upper part. Similarly, the lower three-phase PWM command is also 1.0p. u. That is, the carrier amplitude is not exceeded.

As shown in FIG. 3(b), Vcmd=1.03p. u. (Kx6=0.03) In other words, in the 3% overmodulation state, only the condition of Ky6=+0.09 exceeds the voltage saturation region and carrier amplitude, but the remaining Ky6=(0, -0.29) exceeds not.

As shown in FIG. 3(c), Vcmd=1.06p. u. (Kx6=0.06) That is, near the upper limit of overmodulation of 6%, the voltage saturation region and carrier amplitude are exceeded under the two conditions of Ky6=(+0.09, 0). -0.29 condition only.

Focusing on the characteristic of Ky6=-0.29 in FIG. 3(c), the trajectory of the voltage vector in the upper stage moves on the side of the hexagon which is the saturation limit in most of the period. The lower PWM command is also trapezoidal, and the maximum phase and minimum phase are fixed to ±1 in most of the period. As a result, it can be confirmed that "saturation of the PWM command can be prevented by superimposing an appropriate sixth-order harmonic correction component".

In order to investigate why such characteristics are obtained, under the conditions of "Vcmd = 1.06 p.u. (Vx6 = 0.06 p.u.), Ky6 = -0.29 p.u." FIG. 5 shows the behavior of each voltage component over time. Here, the phase command θv is set every 10 degrees from 0 to 60 degrees, and corrected voltage commands Vx, Vy and corrected voltage components Vx6c, Vy6s in each phase are drawn.

The component of the voltage command Vcmd moves on a circle indicated by a broken line, the correction voltage components Vx6c and Vy6s superimposed thereon are indicated by vectors (white arrows), and the trajectories of the combined corrected voltage commands Vx and Vy are indicated by solid lines. is shown. When the phase command θv changes from 0 to 60 degrees, the corrected voltage components Vx6c and Vy6s make exactly one rotation on the elliptical locus, so the components of the corrected voltage commands Vx and Vy remain within the voltage saturation region due to this correction effect.

In FIGS. 5(a) and 5(g), the corrected voltage component Vx 6c, which is the voltage amplitude, increases the corrected voltage command Vx, and in the intermediate FIG. 5(d), it decreases, which limits the amplitude. working as an effect. Furthermore, the 6th-order correction component Ky6s changes the corrected voltage command Vy of the quadrature component to positive or negative. In f), the effect of correcting the phase in the advancing direction is obtained. It has been found that by adding the 6th-order component to the fundamental wave in this way, it is possible to realize unevenness correction that moves the edge just above the saturation limit due to the effects of amplitude and phase correction.

Similarly, FIG. 6 is drawn under the condition of "Vcmd=1.03 p.u. (Vx6=0.03 p.u.), Vy6=0". Here, Vy6=Vy6s=0 is fixed, and only the correction voltage component Vx6c changes, so the elliptical locus changes to a simple harmonic motion. Therefore, no phase correction effect occurs, but since the original overmodulation component ΔV0 is small, the amplitude correction alone by the correction voltage component Vx6c can be suppressed within the voltage saturation region.

Under the conditions in Table 1, if the presence or absence of the saturation limit being exceeded is indicated by "O: not exceeding, ×: exceeding", the combination of the amplitude values Kx6 and Ky6 of the 6th order correction component causes voltage saturation on the lower left side of the table. It was found that there are areas where

In order to investigate in detail the "conditions for the amplitude values Kx6 (Vx6) and Ky6 (Vy6) of the 6th order correction components that do not cause voltage saturation", the amplitude values Kx6 and Ky6 of the 6th order correction components were set in finer increments. It was obtained by calculating the "maximum value of PWM command in two-phase modulation" as shown in the lower part of . FIG. 7A shows the results as contour lines in a space where the horizontal axis represents the amplitude value Kx6 (=ΔK0) of the sixth-order correction component and the vertical axis represents the amplitude value Ky6 of the sixth-order correction component. The range of Kx6>0 on the horizontal axis is the condition for the overmodulation command (Vcmd>1), but saturation does not occur in the PWM command within the contour line of maximum amplitude≦1.0. If the contour line with the maximum amplitude of 1.0 is extracted in the range of 0≦Kx6≦0.06 and linearly approximated, a straight line as indicated by the broken line in FIG. I am doing it. FIG. 4 shows this approximate straight line as a characteristic of the amplitude values Kx6 and Ky6 of the sixth-order correction component. , saturation of the PWM command does not occur.

In FIG. 4 or FIG. 7A, if the maximum amplitude is within the contour line of 1.0 (≦1.0), voltage saturation does not occur under any conditions, but it is preferable to reduce harmonic components as much as possible. Therefore, in the range of Ky6.gtoreq.0, Ky6=0 is forcibly set to correct the breakpoint characteristics as shown in FIG. Expression (12) or (13) expresses this.

Since the coefficients of formula (12) are obtained by linear approximation from the data in FIG. As far as the voltage vector trajectories in FIGS. 5 and 6 are concerned, it can be seen that practical accuracy is obtained.

FIG. 8 shows the effects of the first embodiment. The following three types of voltage command Vcmd are set, and the trajectory of the voltage vector on the αβ coordinates and the waveform of the three-phase PWM command are drawn.
(a) Vcmd=1.00p. u. (Conditions of Vcmd=VB not requiring overmodulation in Embodiment 1)
(b) Vcmd=1.03p. u. (3% overmodulation when the overmodulation of Embodiment 1 is applied)
(c) Vcmd=1.06p. u. (When the overmodulation of Embodiment 1 is applied, 6% overmodulation, near the linear approximation limit in FIG. 7).

Voltage vector trajectories (0 to 90 deg section) are drawn on the left side of each waveform, and PWM command waveforms (0 to 180 deg section) and triangular wave carrier signals are drawn on the right side. In addition, in both figures, the timings synchronized with the upper and lower vertices of the triangular wave carrier signal are indicated by markers so that the left-right relationship can be easily understood.

In FIG. 8A, the condition of Vcmd=VB is used as a reference for comparing the effects of overmodulation. The trajectory of the correction voltage vector VabL is a circle inscribed in the voltage saturation limit, and the PWM commands Kzu, Kzv, and Kzw after the zero-phase modulation have exactly zero discontinuity at the time of sector switching in the two-phase modulation. Both phases have smooth waveforms. For reference, the U-phase (Ku) and W-phase (Kw) of the PWM command immediately after superimposition of the sixth-order correction component (before zero-phase modulation) are drawn with wavy lines. Since the sixth-order correction component itself is still zero here, these are sinusoidal waves.

The left side of FIG. 8(b) shows the trajectory of the correction voltage vector VabL at 3% overmodulation, and the circular trajectory of the voltage command Vcmd is indicated by a wavy line. The trajectory of the correction voltage vector VabL on which the sixth harmonic is superimposed swells convexly at the corners of the hexagon, becomes concave near the center of the sides of the hexagon, and moves linearly along the sides of the hexagon. In the PWM command after zero-phase modulation on the right side, the trapezoidal flat portion is widened, the one-phase modulation section fixed to the ±1 level is widened, and the slope of the intermediate phase is steep. Since the flat portion is trapezoidal, the fundamental wave voltage can be expanded, and since there are no harmonic components other than the +7th order/−5th order (XY coordinates: ±6th order), the corners are rounded.

At the time of 6% overmodulation in FIG. 8(c), the trajectory of the correction voltage vector VabL moves almost only along the sides of the hexagon. Also, the intervals between the circular markers are sparse at the center of the sides and dense at the corners, and it can be seen that the phase correction effect as shown in FIG. 38 also works. In the PWM command on the right side, the flat portion of ±1 level is expanded to approximately 120 deg, and single-phase modulation is performed in most sections, so that it is almost trapezoidal modulation.

(effect)
The PWM method applied to the three-phase voltage source inverter has an output voltage limit due to the DC power supply voltage. In a three-phase orthogonal two-axis fixed coordinate system (αβ coordinate system), the area in which the voltage vector can be output is a hexagon. In order to output a voltage higher than the inscribed circle, an overmodulation method such as trapezoidal modulation is applied. This expands the output voltage by allowing harmonic components other than the fundamental component. However, harmonic components cause copper loss and iron loss, and there is also the risk of resonance in external filters. Therefore, it is desirable to limit both the amplitude and the frequency band of the harmonic components.

In the first embodiment, even if the voltage command is equal to or higher than the output limit, in the orthogonal two-axis rotating coordinates (XY coordinates) synchronized with the voltage vector, the sixth harmonic component of the rotating phase is generated on the in-phase axis and the orthogonal axis. A superimposed overmodulation method is applied. As a result, the trajectory that has exceeded the hexagonal voltage region is contained within the hexagonal region, and the output voltage can be expanded while the PWM command is maintained at the saturation limit.

The features of this method are the following four items.
(a) With the overmodulation method of Embodiment 1, the output voltage can be expanded up to about 1.06 times.
(b) Only two harmonic frequencies are included, and their amplitude components can be set to a minimum. As a result, copper loss and iron loss caused by harmonics can be reduced.
(c) The frequencies of harmonics to be included can be limited to ±6th order in rotating coordinates (+7th/−5th order in fixed coordinates), and higher frequency components are not included. This makes it possible to avoid abnormal resonance in an external filter or the like, improve the control quality of the system, and facilitate filter design.
(d) This method can also be applied to asynchronous PWM. Initial setting of the table required for synchronous PWM is not required, and can be implemented by simple calculation of the 6th-order component.

As described above, when this overmodulation method is applied, both the amplitude and frequency band of harmonics can be suppressed, the system can be applied to asynchronous PWM, and the design of peripheral devices can be simplified. A secondary effect is also obtained.

In the first embodiment, the zero-phase modulation block 200 in FIG. 1 may apply either two-phase modulation or three-phase modulation.

[Embodiment 2]
(Overmodulation method by 6th harmonic superimposition when limiting within the DB region)
In the second embodiment, the upper limit of the voltage command is limited to the DB voltage saturation region that is reduced by the DB voltage margin width ΔVdb from the voltage saturation region in order to deal with the second problem of the minimum pulse width. be. As in the first embodiment, by superimposing the sixth harmonic component, the voltage range that can be output is expanded while ensuring the minimum pulse width.

Since the saturation level is different from that of the overmodulation of the OVM region in the first embodiment, the overmodulation of the DB region is used in the second embodiment for distinction.

FIG. 9 shows a configuration diagram of a control device for a voltage-type inverter according to the second embodiment. 1 of Embodiment 1 are the following two points in the sixth harmonic correction section 110 .

(1) The limit value of the limiter 20, which is set for calculating the excess amount of overmodulation, is changed from "VB" to "VDB=VB-ΔVdb". A subtractor 21 subtracts the output of the limiter 20 from the voltage command Vcmd to calculate an overmodulation component ΔV0. This causes the overmodulation component ΔV0 to arise from the DB saturation voltage VDB.

(2) Since the sixth-order correction (1) unit 17 and equations (11) and (12) of the first embodiment (FIG. 1) are used, the correction coefficient Kv6 is calculated by the divider 25 as shown in equation (16). Calculate Then, the divider 22 divides the overmodulation component ΔV0 (ΔV0=Vcmd−VDB) obtained by subtracting the DB saturation voltage VDB from the voltage command Vcmd as shown in equation (17) by the correction coefficient Kv6 to obtain the overmodulation rate ΔK0 of the voltage command. Convert to

The range of the correction coefficient Kv6 in equation (16) is 0<Kv6<1. The amplitude values Kx6 and Ky6 of the 6th order correction components are obtained from the equations (11) and (12) in the same manner as in the first embodiment, and are multiplied by the cosine wave and sine wave of the 6th order harmonic to obtain the 6th order correction components Kx6c and Ky6s. and Multipliers 23 and 24 multiply the sixth-order correction components Kx6c and Ky6s by the correction coefficient Kv6 as shown in (18) to convert them into correction voltage components Vx6c and Vy6s. Correction voltage components Vx6c and Vy6s are added to the voltage command by equation (10) as in the first embodiment.

The configuration in which division and multiplication are added before and after the "sixth-order correction (1) unit 17" is a form in which equations (11) and (12) of the first embodiment are diverted, but of course equation (11) and (12) with the internal coefficients of the multiplication and division, or the multiplication may be moved before the multiplication of cos (6×θv) and sin (6×θv).

By applying the second embodiment, even if the voltage command Vcmd is higher than the DB saturation voltage VDB, the trajectory of the voltage vector in the αβ coordinates can be limited to the DB voltage saturation region. The output voltage can be expanded up to the above.

The principle of overmodulation applied to the second embodiment is the same as that of the first embodiment. It only adds the coefficient Kv6. Since the operation of overmodulation has been explained in the first embodiment, it will be omitted.

FIG. 10 shows the effect of the second embodiment. The difference from FIG. 8 is that the DB margin width (ΔKdb=0.1 p.u., ΔVdb=0.05 p.u.) is set, and the voltage command Vcmd is also 0.05 p.u. u. is reduced by

(a) Vcmd=0.95p. u. (Voltage limit Vcmd=VDB that does not require overmodulation in Embodiment 2)
(b) Vcmd=0.98p. u. (When about 3% overmodulation of Embodiment 2 is applied)
(c) Vcmd=1.01p. u. (near the limit of linear approximation in FIG. 7 when about 6% overmodulation of Embodiment 2 is applied).

FIG. 10(a) is a reference waveform for comparing the effects of overmodulation. u. becomes a smaller circle. The waveform of the three-phase PWM command in the right figure shows 0.1 p.s. u. zero-phase component change (step-like discontinuity) occurs, but the maximum or minimum phase is fixed at ±1 level or limited to a level below KDB, and the minimum pulse width is secured .

FIG. 10(b) shows Vcmd=1.03×0.95p. u. ≈0.98, that is, the overmodulation condition where the overmodulation rate ΔK0 is about 3%. The locus of the correction voltage vector VabL on the left side exists within the DB voltage saturation region. It has been fixed above.

In the three-phase PWM command on the right, the interval where the maximum phase or minimum phase is fixed at ±1 level is the same, but the waveform of the intermediate phase has a width around ±(1-ΔKdb) level, which is one step lower, It changes from a sine wave to a trapezoidal shape. The swelling of the trapezoidal shoulder increases the fundamental wave component of the output voltage. Under this condition, the intervals between the markers at the carrier peak times added to the voltage locus are still substantially constant.

Under the overmodulation condition where the overmodulation ratio ΔK0 of FIG. , the intervals are dense at the corners and sparse at the center of the sides, and the phase correction effect can be confirmed.

In addition, the PWM command on the right is also maintained almost constant in the vicinity of ±(1-ΔKdb), which is one step lower, and in most regions the maximum and minimum phases are ±1 or ±(1-ΔKdb ), which is a two-level trapezoidal waveform. In this case as well, correction components are only +7th order/−5th order (XY coordinates: ±6th order), so the overmodulation method has a small effective value of harmonic components and a narrow frequency bandwidth.

(effect)
The second embodiment is an overmodulation method in which the voltage upper limit is suppressed by applying the minimum pulse width countermeasure, which is the second problem. In order to ensure the minimum pulse width of the PWM waveform (DB margin width ΔKdb in PWM command conversion), a countermeasure is applied to limit the voltage command to a DB saturation voltage VDB that is lower than the saturation voltage by the DB voltage margin width ΔVdb. With respect to this upper limit, similarly to the first embodiment, by superimposing the sixth harmonic component on the voltage command according to the component of the voltage command Vcmd exceeding the DB saturation voltage VDB, the voltage that can be output can be expanded. .

The applied overmodulation principle is the same as that of the first embodiment, and the following effects are similarly obtained.
(a) The output voltage can be increased up to about 1.06 times the DB saturation voltage VDB.
(b) Only two harmonic frequencies are included, and their amplitude components can be set to a minimum. As a result, copper loss and iron loss caused by harmonics can be reduced.
(c) Frequency components can be limited to ±6th order (+7th/−5th order in fixed coordinates) and do not include higher frequency components, so electromagnetic noise and resonance of PWM removal filters can be suppressed.
(d) This method can also be applied to asynchronous PWM. Initial setting of the table required for synchronous PWM is not required, and can be implemented by simple calculation of the 6th-order component.

Moreover, it has the following effects as an effect other than this.

(e) Since the limitation of the minimum pulse width can be maintained and a narrow PWM pulse is not generated, anomalies such as missing pulses can be suppressed.

In addition, in the second embodiment, two-phase modulation is applied in the zero-phase modulation unit 210 in FIG.

[Embodiment 3]
(Prevention method (1) for narrow pulses that occur during sector switching near voltage saturation of the two-phase modulation method)
11 and 12 show the third embodiment, which is a countermeasure against the "problem of sector switching in two-phase modulation (third problem)" in contrast to the second embodiment. This corresponds to overmodulation of the DB area similar to that of the second embodiment by adding measures for the minimum pulse width at the time of sector switching. When the offset amount of the PWM command changes during sector switching, a narrow pulse narrower than the minimum pulse width may be generated. In this case, the point of the third embodiment is to ensure the minimum pulse width by forcibly inserting a one-phase modulation section.

In the first and second embodiments, a continuous system is described, but in order to consider sector switching, it is necessary to handle the PWM command as a sampled value system that is updated in synchronization with the triangular wave carrier signal. Therefore, subsequent overmodulation correction and calculation of PWM commands are treated as "processing of a sample value system (discrete system) in which the time of the upper and lower peaks of the triangular wave carrier signal is used as the sample time". Synchronizing the update of the PWM command with the triangular wave carrier signal is a common method when the PWM method is implemented by digital control, and here an example of adopting the carrier half-cycle period Ts as the sample period is shown.

In order to change the second embodiment to a sample value system, a function of outputting a sample signal Intr (interrupt signal of the CPU) at the top and bottom times of the triangular wave carrier signal, like the carrier generator 33a in FIG. 11, is added. In synchronization with this sample signal Intr, the input command is sampled and held by the samplers Siv and Siw to perform overmodulation correction and PWM command conversion processing. Samplers Sou, Sov, and Sow are similarly inserted into the input signal of the device 8).

A "carrier synchronization control block 32" indicated by a dotted line in the drawing for reference is an example of an additional function for realizing the "synchronized PWM method". If a PLL (Phase Locked Loop) function for synchronizing the phase of the voltage command and the carrier interrupt signal is implemented here, the multiplication cycle of the voltage phase and the cycle of the triangular wave carrier signal can be synchronized. The third embodiment assumes asynchronous PWM, but it is possible to change to synchronous PWM by adding such a function.

In FIG. 11, "voltage phase command θv" is calculated by "time integration of frequency command ωcmd". A multiplier 30 multiplies the frequency command ωcmd by the sample interval time (carrier half cycle period) Ts to convert it into a phase lead amount Δθv. The integrator 31 converts the phase advance amount Δθv into a phase command θv by “integration, z/(z−1)” of the sample value system. The sixth harmonic correction section 120 is the same as the sixth harmonic correction section 110 of the second embodiment. In determining the sector switching timing, which will be described later, the adder 34 uses the predicted phase ̂θv obtained by adding the phase advance amount Δθv to the phase command θv in consideration of the time delay at the time of detecting the change.

Other differences from Embodiments 1 and 2 are concentrated in the "zero phase modulation/sector switching unit 220". FIG. 12 shows the internal configuration of this "zero phase modulation/sector switching unit 220".

Since the description of this configuration requires terms indicating elements and functions, FIG. FIG. 13(a) shows a method disclosed in Patent Document 4, in which three-phase modulation is inserted for a carrier half-cycle period Ts at the time of sector switching of two-phase modulation. The problem here is that the pulse widths at both ends of the three-phase modulation are halved like ΔT1 and ΔT2 in the figure, and the minimum pulse width cannot be satisfied. Even if the second embodiment is applied, this problem cannot be dealt with.

Therefore, in the third embodiment, when ΔT1 or ΔT2 cannot satisfy the minimum pulse width, one-phase modulation is inserted instead of three-phase modulation as shown in FIG. 13(b). In addition, transition constraints are applied to combinations of vertices and transition directions of the triangular carrier signal.

When switching from N-side modulation to P-side modulation, one-phase modulation is started from the lower vertex of the triangular wave carrier signal like the start time of section (n). Due to this transition restriction, the minimum phase continues to be fixed at the N level (-1) at the lower vertex of (n-1→n), so no pulse of ΔT2 is generated. Since the maximum phase continues to be fixed at the P level (+1) even at the upper vertex of (n→n+1), the pulse of ΔT1 can similarly be paused. As a result, sector switching can be realized while ensuring the minimum pulse width. Table 2 summarizes the transition conditions (restrictive conditions for switching timing between two-phase modulation and one-phase modulation).

Here, in order not to generate a narrow pulse when switching sectors, a transition condition (Table 2) according to the type of triangular wave carrier signal peak is added when generating the PN selection signal sel_PN. This transition condition is such that "the start or end of the P-side sector" is limited to the upper vertex of the triangular wave carrier signal, and "the start or end of the N-side sector" is limited to the lower vertex of the triangular wave carrier signal.

However, if section (n) in FIG. 13(b) is changed to single-phase modulation, the error between three-phase modulation (Δ mark and dotted line waveform) and single-phase modulation (○ mark and solid line waveform) will be voltage error of the error component ΔKa (corresponding to ΔT1) on the N side and the error component ΔKc (corresponding to ΔT2) on the N side. Since we want to compensate for this error component in the next interval (n+1), we apply delay correction as shown.

Although the error component ΔKc on the N side can be corrected in the next section (n+1), the error component ΔKa on the P side is already fixed at the P level and the pulse is in a pause state. cannot be corrected with Therefore, by applying the principle of zero-phase modulation, the error component ΔKa is dealt with by correcting the negative value for the other two phases. In the example of FIG. 13(b), the intermediate phase is corrected by (-ΔKa) and the minimum phase by (ΔKc-ΔKa). This is equivalent to moving the ΔT1 and ΔT2 components to the next interval.

In this delay correction method, "correction as a phase voltage component" cannot be performed, but "error correction as a line voltage component" can be performed, and errors occurring in the load current can be reduced.

In order to show the necessity of the transition conditions shown in Table 2, FIG. 14 shows a case in which a triangular wave carrier signal whose sign is inverted from that in FIG. 13 is applied. In this case, the following problems arise.

In the case of three-phase modulation shown in FIG. 14(a), there is no problem because the pulse width is wide at the time of sector switching. However, when the one-phase modulation shown in FIG. 14B is applied, the pulse pause cannot be realized unless the insertion period is extended to 1.5 times (3×Ts) the carrier period. In addition, as shown in the figure, a maximum delay of 3 samples occurs in the delay correction of the error component. If the amount of error is large and the correction component includes a large delay time, an accurate correction effect cannot be obtained. To avoid this problem, the transition conditions shown in Table 2 are set.

A configuration example that realizes the "operating principle of the third embodiment" in FIG. 13 is the "zero phase modulation/sector switching unit 220" portion in FIG. 11, and the details thereof are described in FIG. In FIG. 12, the following abbreviations are used.
・Convert three-phase components and array/vector signals with vertically long rectangular blocks.
・Arrangement signals are indicated with a bold line with a lead-out angle of 45°, the first letter is capitalized, and the element signals are in lowercase.
・Addition/subtraction of each element between arrays is expressed by addition/subtraction of array signals.
- Elements that are not essential to the third embodiment are indicated by dotted lines or dashed lines.
- In order to facilitate the calculation of the delay compensation amount, the three-phase components are rearranged (sorted) in order of size in FIG.

The PWM command Kuvw (ku, kv, kw) before zero-phase modulation, which is the input signal in FIG. , and the component normalized by the carrier half amplitude. The three-phase components are rearranged in order of magnitude by the magnitude rearrangement unit 230, and output as a maximum value ka, an intermediate value kb, and a minimum value kc. In addition, the "mutual conversion information before and after sorting" necessary for returning to the original three-phase components is also output as an array Indx.

The "two-phase modulation unit 231" outputs a two-phase modulation PWM command K2abc when two-phase modulation is applied based on the maximum value ka, intermediate value kb, and minimum value kc. In two-phase modulation, the direction of zero-phase modulation differs for each sector, so P-side modulation and N-side modulation are switched by the PN selection signal sel_PN. Similarly, the "single-phase modulation section 240" and the "three-phase modulation section 241" also output a single-phase modulation PWM command K1abc and a three-phase modulation PWM command K3abc, respectively, which are equivalent to PWM commands.

The "sector decision unit 235" outputs a two-phase modulated sector decision signal ^sect every 60 degrees from the predicted phase ^[theta]v that is predicted and corrected by one sample. The carrier top signal topbtm was logically inverted to be the predicted carrier top signal ^topbtm one sample ahead.

The "PN modulation transition control unit 236" detects "sector switching" from a change in the sector determination signal ^sect, applies the predicted carrier top signal ^topbtm and the switching conditions in Table 2, and performs two-phase modulation in normal operation. output a PN selection signal sel_PN to be used for It also outputs a sector switching signal sel_ALT for switching from two-phase modulation to three-phase modulation or one-phase modulation during a sector switching period of a carrier half cycle (sample period) from the switching edge of the PN selection signal sel_PN.

The PN selection signal sel_PN and the sector switching signal sel_ALT may be generated using the sector determination signal sec, which is not predicted and corrected for one sample, and the transition conditions in Table 2. However, if the transition conditions in Table 2 are not satisfied, has a delay of one sample. Considering the delay in the period during which one-phase modulation is inserted for sector switching, the countermeasure for sector switching causes a delay of "maximum 2 samples".

Since it is desired to shorten this, the switching timing is advanced by one sample by generating the PN selection signal sel_PN and the sector switching signal sel_ALT using the predicted sector determination signal ^sect. As a result, the transition limit and the total delay of the sector switching period can be improved to "minimum 0 samples" and "maximum 1 sample".

The "DB determining unit 242" outputs a selection signal sel_X1m for selecting which of the three-phase modulation and the one-phase modulation to output when switching sectors. Regarding the method of determining the selection signal, first, "(+1)-max(K3abc)" or "min(K3abc)-(-1)" is calculated from the three-phase modulation PWM command K3abc of the "three-phase modulation unit 241", If this is smaller than the "minimum pulse width determination value (2 x ΔKdb)", it is determined that the minimum pulse width cannot be secured in three-phase modulation, and a selection signal is used as a "switching command from three-phase modulation to one-phase modulation". Output sel_X1m. Here, as shown in FIG. 13(a), when switching to three-phase modulation, ΔT1 and ΔT2 are half the normal width, so the judgment value of the PWM command width is set to double (2×ΔKdb). I have

By combining the above three types of zero-phase modulation methods and selection signals, three-phase modulation or one-phase modulation is inserted at the time of mode switching. In the normal two-phase modulation state, the switch S1 is selected to the "=0 (K2abc)" side, but at the time of transition, it is switched to the "=1 (KTabc)" side by the sector switching signal sel_ALT, and is output as the main component Kzabc0. Selection of the three-phase modulation and the one-phase modulation is achieved by switching the switch S3 to the "=1 (K1abc)" side by the selection signal sel_X1m to select the one-phase modulation. The reverse sorting function unit 232 converts the principal component Kzabc0 in order of magnitude to the principal component Kzuvw0 of the PWM command in three-phase order (uvw) by the array Index.

Basically, the main component Kzuvw0 of the PWM command is calculated by two-phase modulation in which the PWM command Kuvw before zero-phase modulation is switched between the "P side sector" and the "N side sector" by the PN selection signal sel_PN. However, three-phase modulation is inserted only during the sector switching period (sel_ALT), but if a narrower pulse than the pulse width occurs in the PWM waveform at the beginning even if three-phase modulation is applied, one-phase modulation is inserted instead. .

The above is the sector switching method for preventing narrow pulses, and by applying this, the main component Kzuvw0 of the PWM command component is obtained.

The part not yet discussed above corrects for the voltage error that occurs when switching from three-phase modulation to one-phase modulation phase. If the maximum amplitude k3a and minimum amplitude k3c of three-phase modulation are normalized by (Vdc/2), there is an error of (1-k3a) on the maximum phase side and (-1-k3c) on the minimum phase side. As it occurs, this error is corrected in the sample period following the sector switching period.

The components for correcting the error between the three-phase modulation and the one-phase modulation (error components ΔKa and ΔKc in FIG. 13) are calculated by the subtractor 244, but are unnecessary except when switching modes. It is reset to zero by switch S2. The subtractor 244 calculates (k3a-k1a, k3b-k1b, k3c-k1c)=(Δka, Δkb, Δkc).

Since the error correction addition destination differs depending on the transition direction (N→P, P→N), the P→N side correction amount setting unit 250 sets the correction amount ΔKcompP, and the N→P side correction amount setting unit 251 sets the correction amount ΔKcompN. is calculated as an error correction component.

As shown in FIG. 12, ΔKcompP=[Δka-Δkc, -Δkc, 0] and ΔKcompN=[0, -Δka, Δkc-Δka].

ΔKcompP=[Δka−Δkc,−Δkc,0]=[(k3a−k1a)−(k3c−k1c),−(k3c−k1c),0], but single-phase modulation has maximum k1a=1 and minimum Since the value k1c=-1, ΔKcompP is represented by a configuration of [(k3a-1)-(1+k3c),-(1+k3c),0] in FIG.

Similarly, ΔKcompN=[0,−Δka,Δkc−Δka]=[0,−(k3a−k1a),(k3c−k1c)−(k3a−k1a)], but single-phase modulation has a maximum value of k1a= 1, since the minimum value k1c=-1, it can be represented by the configuration [0, (1-k3a), (k3c+1)+(1-k3a)].

A switch S4 selects one of the correction amounts .DELTA.KcompP and .DELTA.KcompN to be used for delay correction according to the PN selection signal sel_PN. In the case of FIG. 13, the N→P side correction amount setting unit 251 is working. Finally, the inverse sorting function unit 254 and the array Indx convert the error compensation components from the magnitude order into the delay correction amount ΔKpost in the three-phase order (u, v, w). A delay correction amount ΔKpost_z that is delayed by the delay unit 255 and synchronized in timing is output so that it will act in the next sample period.

The adder 256 adds the delay correction amount Δkpost_z to the main component Kzuvw0 of the PWM command for correction, and outputs Kzuvw1. This Kzuvw1 is output as the PWM command Kzuvw after zero-phase modulation via the DB forbidden band section 234 in consideration of the "rounding error of calculation". If the VDB setting or the like is given a margin, the DB prohibited band unit 234 may be omitted, and Kzuvw1 may be directly used as the PWM command Kzuvw after zero-phase modulation.

The above is the configuration of the "zero phase modulation/sector switching unit 220" in FIG. Here, the structure is slightly redundant so that it can be easily understood in correspondence with the principle, but when actually implemented in software etc., unnecessary operations can be omitted, and logical operators and switches can also be used for logic synthesis. can be simplified by

In FIG. 12, the subtractor 244 is used to calculate error correction components for three-phase modulation and one-phase modulation. Using the fact that the "differences" are made equal, the average error component ΔKw may be calculated as in equation (19). FIG. 15 shows a configuration example of error correction using this.

Here, in FIG. 15, max(Kuvw) and min(Kuvw) use three-phase modulation components, but in equation (19), only the difference between the maximum phase and the minimum phase is used. Components of biphasic modulation may be utilized.

An error component ΔKw is obtained from the three-phase modulation and one-phase modulation error component calculator 243 . Based on the sector switching signal sel_ALT, the switch S2A is cleared for three-phase modulation and outputs an error component ΔKw for one-phase modulation. When the switch S2A is not in the cleared state, the P→N side correction amount setting unit 250A calculates the correction amount ΔKcompP from the equation (20), and the N→P side correction amount setting unit 251A calculates the correction amount ΔKcompN from the equation (21). calculate. An error correction amount corresponding to the PN selection signal sel_PN is selected by the switch S4, and finally the reverse sorting function unit 254 converts it into a three-phase component to generate the delay correction amount ΔKpost. The change in FIG. 15 is up to the input of this switch S4.

12 and 15 are the same in other configurations. They are identical except for simplified error calculations, and otherwise behave the same.

Since the basic principle and action of the third embodiment have already been explained in the previous paragraph, they are omitted here, and only the effects thereof will be shown here.

(action)
FIG. 16 shows an example of characteristics when the third embodiment is applied, and the same conditions are used for comparison with the second embodiment (FIG. 10). The DB margin width is also the same ΔKdb=0.1p. u. is set to

Vcmd=0.95 p.s. in FIG. u. Then, the part indicated by "(1)" is the part to which one-phase modulation is applied corresponding to "interval n" in FIG. u. Since the margin width of 1 cannot be secured, it is switched to single-phase modulation. The portion of "intermediate phase and maximum phase (2)" is a section (n+1) for delay correction of the error component generated in (1), and is corrected to two switchable phases. Concave correction occurs in the waveform of each phase, but considering the line voltage component, the error is suppressed for the average value of the periods (1) and (2).

This compensating operation is easier to understand if expressed by the voltage locus of the αβ coordinates on the left side. Since it is two-phase modulation, the DB voltage margin width ΔVdb=0.05p. u. The inner hexagon becomes the DB voltage saturation region where the minimum pulse width can be secured. Since point (1) is one-phase modulation, it is corrected to be convex and moves to the side of the voltage saturation region. In the next delay correction section (2), since the two-phase modulation is performed and the correction is performed in a concave shape, it moves toward the inside of the DB voltage saturation region. Since both (1) and (2) are out of the prohibited band, the minimum pulse width is ensured.

The amounts of unevenness in (1) and (2) in FIG. 16(a) are the same distance from the hexagon in the DB voltage saturation region. I can confirm that it can be fixed.

Vcmd=0.98 p.s. in FIG. 16(b). u. is the condition in which the output voltage is expanded by applying overmodulation control while ensuring the minimum pulse width. The overmodulation factor is ΔK0=(0.98−0.95)/0.95≈0.03p. u. , and the waveform near the DB margin width of the intermediate phase expands and approaches a trapezoid as shown in the right figure. Even so, in the phase that is not fixed to the carrier amplitude, the DB margin ΔKdb=0.1p. u. can be secured, it works as a countermeasure against the minimum pulse width.

In the overmodulation control of the second embodiment, as shown in FIG. 10(b), the hexagonal side center of the DB voltage saturation region moves along the side. On the other hand, when the present embodiment 3 is applied, the position moves to point (1) in FIG. point. As expected, both points can avoid the forbidden zone in FIG. Since they are equal, the effect of error correction can also be confirmed.

Vcmd=1.03 p.s. in FIG. 16(c). u. Then, the overmodulation rate is ΔK0=(1.03−0.95)/0.95≈0.06p. u. is set near the overmodulation limit. As shown in the right figure, the intermediate phase has a substantially trapezoidal shape with a raised shoulder portion near the DB margin width. u. can be secured, and the forbidden band can be avoided. Likewise, the locus of the voltage vector on the left side has the same amount of movement in the amplitude direction in (1) and (2), so the two average value components operate normally as error correction.

From the above, even when setting the prohibited band of the DB margin width for the minimum pulse width countermeasure, by adding the sector switching method added in the third embodiment to the overmodulation method of the second embodiment, the sector The minimum pulse width can now be secured in all operating areas including switching.

This sector switching method is not limited to the overmodulation region, and can also be applied to operation with a voltage command lower than the saturation voltage. ” acts as

(effect)
The third embodiment extends the functions of the second embodiment, and has the same effects as the items (a) to (e) shown in the second embodiment. In addition, it has the following effects (f) and (g) as other effects.

(f) Although there was a possibility that a narrow pulse was generated when switching sectors of two-phase modulation, by inserting three-phase modulation or one-phase modulation and adding a transition condition synchronized with a triangular wave carrier signal, the entire operation area was reduced. can be used to limit the minimum pulse width.

(g) Since a function is added to correct voltage errors that occur when one-phase modulation is forcibly inserted in the next section, voltage accuracy can also be maintained.

[Embodiment 4]
(Prevention method (2) of narrow pulse generated at sector switching near voltage saturation of two-phase modulation method)
In FIG. 16 shown as a characteristic example of the third embodiment, uneven distortions of (1) and (2) occur in the voltage locus. By averaging these two points, the error can be suppressed, but the PWM ripple of the load current increases, although transiently, due to the time lag component. Therefore, the object of the fourth embodiment is to reduce the transient current ripple by minimizing the amplitude of the unevenness of the voltage locus.

Simply thinking, as shown in FIG. 17(b), if the error component ΔKa of the error due to the insertion of one-phase modulation can be corrected retroactively to the section (n−1), that is, to the past, the voltage trajectory will also be as shown in FIG. As shown in 18(a), it is divided into 1/2 of (2) and (3) and corrected. By doing so, the width of the concave side and the time delay of compensation are reduced, so that the amount of increase in transient current ripple can also be suppressed.

However, since it is impossible to correct the past PWM command, an "equivalent past correction effect" is realized by predicting and estimating only one sample of the input voltage command.

A three-phase PWM command is calculated from the predicted voltage command, but the time is matched by delaying one sample before output, and the current predicted correction component that does not include the delay is added to the PWM command after this delay, An effect like "prediction correction for the past" corresponding to (3) can be obtained.

Actually, the delay time (waste time) from the predicted voltage command to the output of the corrected PWM command is increasing, and in order to apply the prediction, an approximation condition that the voltage command does not change abruptly is also required. However, if this condition is permissible, applying the fourth embodiment can suppress the "transient current ripple increase amount at the time of sector switching".

Hereinafter, the correction on the (2) side of FIG. 18 (error component ΔKc in FIG. 17(b)) applied in the third embodiment will be referred to as “delay correction”, and the new correction on the (3) side of FIG. 18 (( The error component ΔKa) of b) will be called "prediction correction".

Configuration examples of the fourth embodiment are shown in FIGS. 19 and 20. FIG. This is an extension of the functions of FIGS. 11 and 12, which are configuration examples of the third embodiment. In the following, only the expanded/changed parts will be explained.

In FIG. 19, since it is desired to obtain a voltage command predicted by one sample, first, the input signal of the phase command θv of the sixth-order correction (2) unit 17 is changed to the predicted phase ̂θv. Specifically, the multiplier 30 multiplies the frequency command ωcmd by the sample time (carrier half cycle period) Ts, and the integrator 31 integrates the phase advance amount Δθv. In the unit 34, the phase advance amount Δθv is added to approximate the predicted phase ̂θv. This is replaced with the phase input of the “sixth-order correction (2) unit 17 ” or the phase input of the rotating coordinate conversion unit 1 . The sixth harmonic correction section 120 is the same as the sixth harmonic correction section 120 of the third embodiment (FIG. 11) except that the predicted phase ̂θv is input instead of the phase command θv.

As a result, the corrected predicted voltage commands ^Vx, ^Vy, ^Va, ^Vb and ^Vu, ^Vv, ^Vw and the predicted PWM commands ^Ku, ^Kv, ^Kw before zero-phase modulation are also obtained by one sample. It is the amount of future prediction. Originally, a predicted value should be used for the voltage command Vcmd as well, but here, the approximation of current value≈predicted value (Vcmd≈̂Vcmd) was applied assuming little change.

In the "zero-phase modulation/sector switching (2) unit 271", phase information advanced by one sample is necessary to suppress the delay of the sector switching timing. is added to calculate the predicted phase ^^θv two samples ahead. This is the change in the overall configuration, and the rest of the changes are applied in the "zero phase modulation/sector switching (2) section 271".

The “zero phase modulation/sector switching (2) unit 271” shown in FIG. 20 has basically the same configuration as the “zero phase modulation/sector switching unit 220” in FIG. Since a signal is also handled, a "^" symbol is added to the beginning of the predicted component, and a "^^" is added to the predicted component two samples later. For example, the input signal "^ku, ^kv, ^kw" is the predicted amount one sample ahead, and "^θv" is the predicted value two samples ahead.

As for other changes, first, since the ^^topbtm signal is twice predicted (inversion of inversion), topbtm is used as it is.

Next, since it is desired to separate the error correction components of three-phase modulation and one-phase modulation into prediction correction and delay correction, the correction amount setting unit 257a in FIG. A section 258a takes out only the minimum phase error component ^Δkc. The switches S5a and S4a alternately switch between the predicted correction amount ^ΔKcomp1 and the delay correction amount ^ΔKcomp2 according to the PN selection signal ^sel_PN, which is the PN transition direction at the time of sector switching.

When the PN selection signal ^sel_PN indicating after sector switching is P-side modulation, ^Δka→^ΔKcomp1, ^Δkc→^ΔKcomp2, and when N-side modulation, the compensation components are exchanged, and ^Δka→^ΔKcomp2, ^Δkc→ Let ^ΔKcomp1.

The prediction correction amount ^ΔKcomp1 and the delay correction amount ^ΔKcomp2 are obtained by using the inverse sorting functions of the inverse sorting function units 252a and 254a to inversely transform to the three-phase components (u, v, w), respectively, to the three-phase prediction. The correction amount ^ΔKpre and the delay correction amount ^ΔKpost are converted. At this point, the delay correction amount ̂ΔKpost is a component two samples ahead of the actual time of action.

Finally, the time alignment and summation methods of error correction are described. The delay correction amount ^ΔKpost is set as the delay correction amount ΔKpost by the delay unit 255 . The adder 256a adds this to the output (PWM command) ^Kzuvw0 of the inverse sorting function unit 232a, which is the main component of the predicted PWM command. Then, the post-stage delay unit 233 outputs the PWM command after the delay correction at the next sampling time. Since the delay correction amount ^ΔKpost passes through two delays, it acts as a delay correction amount ΔKpos_z delayed by two samples.

The adder 253 adds the predicted correction amount ̂ΔKpre to the output of the delay unit 233 as it is, so that it acts as if the past PWM command was corrected. This is the configuration content of FIG.

That is, the principal component Kzuvw0 is obtained by delaying ^Kzuvw0 by one sample, the delay correction amount ΔKpost_z is obtained by delaying ^ΔKpost by two samples, and the predicted correction amount is ^ΔKpre. Then, by adding the prediction correction amount ^ΔKpre and the delay correction amount ΔKpost_z to the principal component Kzuvw0, the PWM command Kzuvw to which the error correction before and after sector switching is applied is obtained.

The predicted correction amount ^ΔKpre is set in consideration of the switching pause phase. , "When changing from the P side to the N side", if the maximum phase of the one-phase modulation PWM command ^K1abc is 1 and the minimum phase is -1 (0, 0, (^k3c+1)), conversely "When changing from the N side to the P side" is ((^k3a-1), 0, 0).

The delay correction amount ΔKpost_z is set as the component ^ΔKpost advanced by two samples. According to the modulation sector change, "when changing from the P side to the N side" is ((^k3a-1), 0, 0), and conversely, when "changing from the N side to the P side" is (0, 0, (^k3c+1)).

A "DB forbidden band section 234" is inserted in the output section of FIG. It should be possible to secure the minimum pulse width without this, but in consideration of rounding errors in digital operations with a small number of significant digits (bit length), please indicate where to insert it to ensure that the forbidden band is avoided. there is FIG. 21 shows an example of the characteristics of this "DB forbidden band section 234", which forcibly skips signals within the forbidden band to outside the band (exclusive processing).

In FIG. 20, the subtractor 244a is used to calculate the error components of three-phase modulation and one-phase modulation, but the average error component ΔKw shown in equation (19) may be calculated and used FIG. 22 shows a configuration example of error correction. An error component ΔKw is obtained from the three-phase modulation and one-phase modulation error component calculator 243, and cleared by the switch S2b in the case of three-phase modulation. When the switch S2b is not in the cleared state, the correction amount ^ΔKcompP is calculated from the equation (22) with the correction amount setting value 257b, and the correction amount ^ΔKcompN is calculated from the equation (23) in the correction amount setting unit 258b. This is the change.

Other configurations are the same as those of FIG. 20 and FIG. 22, and since they operate in the same way, there is no difference other than the simplified calculation. Although the input to DB decision 242 in FIG. 12 utilizes the components after three-phase modulation, the pre-modulation components are used in FIGS. 20 and 21 to show that there is no need to apply zero-phase modulation. There is a form to do.

Since the principle of this operation has been explained in the previous section (FIG. 17), it is omitted here, and FIG. 18 is shown here as an example of the operation. This voltage command setting is common to the second embodiment (FIG. 10) and the third embodiment (FIG. 16), and DB margin width ΔKdb=0.1p. u. and the DB voltage margin ΔVdb=0.05p. u. is the same setting.

In the waveform of the three-phase PWM command shown in the right diagram of FIG. inserted. Among the error components caused by changing from three-phase modulation to one-phase modulation, the error component ΔKc of the minimum phase is in “section (3)”, and the error component ΔKa of the maximum phase is in “section (2)”. Correcting.

In the voltage trajectory shown on the left side of FIG. 18(a), the error correction components are separated into (2) and (3), so the amount of each dent is "the dent in section (2) of Embodiment 3 (FIG. 16). It is reduced to 1/2 compared to the amount. In addition, by adding the concave portion (3) in the opposite direction before the convex portion (1) is generated, the "maximum amplitude of error" obtained by adding these together can also be reduced. As a result, the time delay of error compensation is reduced, so the transient ripple component generated in the load current can also be reduced.

(effect)
Since the fourth embodiment extends the function of the third embodiment, it includes all the effects (a) to (g) of the second and third embodiments.

Other effects include the following effect (h1).

(h1) By extending the voltage correction function of (g), the error components caused by the insertion of one-phase modulation are separated into two types, and correction intervals are distributed immediately before and after the sector switching period. As a result, the fluctuation width and time delay of the output voltage due to errors and corrections can be reduced. In particular, since a 1/2 correction component can be inserted in the opposite direction to the error in the section immediately before sector switching, it is possible to obtain the effect of suppressing the fluctuation amount of the voltage vector integrated with the error voltage at the time of sector switching. As a result, the distortion of the load current can also be suppressed.

[Embodiment 5]
(Prevention method (3) of narrow pulse generated at sector switching near voltage saturation of two-phase modulation method)
In the fourth embodiment, "prediction and delay" are combined to simulate "correction to past PWM commands". However, since the PWM command, correction amount, etc. are calculated from the predicted voltage command one sample ahead, the effect of the error component due to the approximation applied to the prediction and the wasted time due to the delay becomes a problem.

Of the predicted correction amount ^ΔKpre and the delay correction amount ΔKpost_z, which are error components due to sector switching, only the predicted correction amount ^ΔKpre needs to be predicted. Therefore, the predicted voltage command is used only for the "predicted correction amount ^ΔKpre", and the remaining "principal component Kzuvw0 of the PWM command before error correction is applied" and "delay correction amount ΔKpost_z" are Change to calculate from the current voltage command.

In this way, the influence of prediction errors and wasted time is limited to the prediction correction amount ^ΔKpre, and the influence of approximation errors can also be reduced. Therefore, in the fifth embodiment, a configuration in which the third embodiment is adopted as the main configuration and only the calculation unit for the prediction correction amount ̂ΔKpre of the fourth embodiment is added will be described.

FIG. 23 shows the overall configuration of the fifth embodiment, and FIG. 24 shows the detailed configuration of the "zero phase modulation/sector switching (3) section 272" therein. These are obtained by extracting and combining only necessary parts from the configuration of the third embodiment and the configuration of the fourth embodiment.

In the overall configuration of FIG. 23, the delay correction amount ΔKpost_z, the phase command θv necessary for calculating the principal component Kzuvw0, the predicted phase ^θv necessary for calculating the predicted correction amount ^ΔKpre, and the correction of the 6th harmonic that it affects and rotational coordinate transformation are separated into different calculation units, two types of post-correction voltage commands Vx, Vy and post-correction predicted voltage commands ^Vx, ^Vy are calculated, and PWM commands Ku, Kv before zero-phase modulation are calculated from them. , Kw and predicted PWM commands ^Ku, ^Kv, ^Kw after zero-phase modulation are generated, and both of them are input to the "zero-phase modulation/sector switching (3) unit 272".

The difference between the sixth harmonic correction section 120a and the sixth harmonic correction section 120 of the third embodiment is that the sixth correction (2) section 17 is changed to the sixth correction (2) section 17a, and the adder 16b is added.

Since it is desired to suppress the amount of calculation for the changed portion, the "sixth-order correction (2) section 17a" is configured as shown in the lower part of FIG. A sixth-order harmonic generator based on the predicted phase ^θv is added to the basic "sixth-order harmonic correction section 110 in FIG. 9 and the sixth-order correction (1) section 17 in FIG. 1".

The point of change is that the multipliers 23 and 24 of the correction coefficient Kv6 are moved forward, and the sixth-order correction component amplitude values Vx6 and Vy6, which are common when approximated, are first calculated. Multipliers 14 and 15 multiply this by the sixth cosine/sine wave based on the phase command θv, and multipliers 14b and 15b multiply it by the sixth cosine/sine wave based on the predicted phase ^θv. Correction voltage components Vx6c, Vy6s and ̂Vx6c, ̂Vy6s are output.

As in the third embodiment, the adder 16 adds the voltage command (fundamental wave component) Vcmd and the correction voltage component Vx6c to obtain the corrected voltage command Vx. The corrected voltage component Vy6s is used as the post-correction voltage command Vy as it is.

PWM commands Ku, Kv, and Kw before zero-phase modulation are obtained by processing in the rotating coordinate conversion unit 1a and the two-to-three phase conversion unit 3a based on the phase command θv and normalization by the divider 4a.

As in the fourth embodiment, the adder 16b adds the voltage command (fundamental wave component) Vcmd and the corrected voltage component ̂Vx6c to obtain the corrected predicted voltage command ̂Vx, as in the fourth embodiment. The corrected voltage component ^Vy6s is used as the post-correction predicted voltage command ^Vy as it is.

Predicted PWM commands ̂Ku, ̂Kv, ̂Kw before zero-phase modulation are obtained by processing in the rotating coordinate conversion unit 1b and the two-to-three-phase conversion unit 3b based on the phase command ̂θv and normalization by the divider 4b. .

These PWM commands Ku, Kv, Kw before zero phase modulation and predicted PWM commands ̂Ku, ̂Kv, ̂Kw are input to a “zero phase modulation/sector switching (3) unit 272”. In addition, the phase input of the “zero phase modulation/sector switching (3) unit 272” is changed to use the predicted phase ^^θv predicted two samples ahead of the output of the adder 35 .

Next, FIG. 24 shows the internal configuration of the “zero-phase modulation/sector switching (3) unit 272”. The configuration of FIG. 24 can be roughly classified into three. The configuration of the third embodiment is used in the upper part, and main sector switching control is configured by the current PWM commands ku, kv, and kw before zero-phase modulation.

"Error Principal component Kzuvw0' of the PWM command before applying the correction is calculated.

The two-phase modulation section 231 outputs a two-phase modulation PWM command K2abc based on the PWM command Kuvw before zero-phase modulation. The one-phase modulation unit 240 outputs a first one-phase modulation PWM command K1abc based on the PWM command Kuvw before zero-phase modulation. The three-phase modulation unit 241 outputs a first three-phase modulation PWM command K3abc based on the PWM command Kuvw before zero-phase modulation.

Since the error correction calculated from the current PWM command is only the delay correction, the subtractor 244 for calculating the error correction components of the three-phase modulation and the one-phase modulation, the switch S2 for clearing the error when unnecessary, and the correction amount The setting units 257 and 258 and the switch S4 calculate the delay correction amount ΔKcomp2, and the inverse sorting function unit 254 obtains the UVW phase order delay correction amount ΔKpost.

In the middle part of FIG. 24, the configuration of Embodiment 4 (FIG. 20) is used. From the predicted PWM commands ^ku, ^kv, ^kw before zero-phase modulation obtained from the corrected predicted voltage commands ^Vx, ^Vy, the one-phase modulation unit 240a outputs the second one-phase modulation PWM command ^K1abc, The three-phase modulation section 241a outputs a second three-phase modulation PWM command ^K3abc.

Then, a subtractor 244a for calculating error correction components of three-phase modulation and one-phase modulation, a switch S2a for clearing errors when unnecessary, prediction correction amount setting units 257a and 258a, and a switch S5a predict correction amount ^ΔKcomp1. is calculated, and the predicted correction amount ̂ΔKpre for the UVW phase order is obtained in the inverse sorting function unit 254a.

The lower part of FIG. 24 is a switching timing generating part, which also uses the configuration of the fourth embodiment. A PN selection signal ̂sel_PN and a sector switching signal ̂sel_ALT are generated using the predicted phase ̂̂θv two samples ahead, and a predicted correction amount ̂ΔKpre is calculated.

Further, in the calculation of the main component Kzabc0 of the PWM command and the delay correction amounts ΔKcomp2 and ΔKpost shown in the upper part, the sector switching signal sel_ALT obtained by delaying the sector switching signal ^sel_ALT in the delay unit 261 and the PN selection signal in the delay unit 262 Use the PN selection signal sel_PN which is a delayed version of sel_PN. Since the zero-phase modulation selection signal sel_X1m is also to be matched with other signals, the selection signal sel_X1m is obtained by delaying the predicted zero-phase modulation selection signal ^sel_X1m generated by the "DB determination unit 242" in the middle stage by the delay unit 260. to use.

The PWM commands and the error correction components calculated from the voltage commands at different times in the upper and middle stages are synthesized by matching the times as follows. First, the delay correction amount ΔKpost is delayed by the delay unit 255 and converted into a delay correction amount ΔKpost_z. Then, the adder 256 adds the delay correction amount ΔKpost_z to the principal component Kzuvw0 of the three-phase PWM command, thereby acting with a delay of one sample.

On the other hand, the predicted correction amount ^ΔKpre is directly added by the adder 253 without delay. By matching the correction times in this way, it is possible to obtain the effect of correcting the error component in the sections immediately before and after the sector switching.
(Sector switching control signal and error prediction correction component)
In the predicted sector switching period (^sel_ALT), a predicted PWM command is obtained by applying two types of zero-phase modulation, three-phase modulation and one-phase modulation, to the predicted three-phase component ^Kuvw. Then, when a pulse narrower than the minimum pulse width occurs in the PWM waveform even if three-phase modulation is applied, a selection signal for inserting one-phase modulation is set by the DB determination unit 242 (̂sel_X1=1), and at the same time A predicted error correction amount ^ΔKpre is calculated.

Since the maximum amplitude (^Ka) and minimum amplitude (^Kc) of the "predicted PWM command applying three-phase modulation to the predicted three-phase component ^Kuvw" are normalized by (Vdc/2), one-phase modulation is applied, an error of (1-^k3a) occurs on the maximum phase side and (-1-^k3c) on the minimum phase side. If the estimated error correction amount ^ΔKpre is shown in the order of (maximum phase, middle phase, minimum phase), "when changing from the P side to the N side" is (0 .

(Main component of PWM command and delay correction component of error)
Basically, the main component Kzuvw0 of the PWM command is calculated from the three-phase component Kuvw before zero-phase modulation by two-phase modulation of the "P side sector" or "N side sector" according to the PN selection signal sel_PN. However, during the sector switching period (sel_ALT=1), three-phase modulation is inserted when the selection signal for inserting one-phase modulation is (sel_X1=0), and one-phase modulation is inserted when (sel_X1=1). do.

When one-phase modulation is inserted at (sel_X1=1), the maximum amplitude (k3a) and minimum amplitude (k3c) of three-phase modulation are normalized by (Vdc/2). is (1-k3a), and an error of (-1-k3c) occurs on the minimum phase side. Therefore, the remaining error components that have not been corrected by the "prediction correction described above" are added and corrected in the next sample period after the sector switching period.

When the delay correction amount ΔKpost acting in the next sample period is shown in the order of (maximum phase, middle phase, minimum phase), according to the switching stop phase of the two-phase modulation, "when changing from the P side to the N side ' is set to ((k3a-1), 0, 0), and conversely, 'when changing from the N side to the P side' is set to (0, 0, (k3c+1)).

(Time Alignment and Error Correction by Delay)
The principal component Kzuvw0 of the PWM command, the predicted correction amount ̂ΔKpre and the delay correction amount ΔKpost when one-phase modulation is inserted in sector switching are added while matching the following acting times. These error correction components are shown in the order of magnitude of the three-phase components, but are finally added and corrected corresponding to the U-phase, V-phase, and W-phase.

First, ΔKpost_z is obtained by delaying the delay correction amount ΔKpost by one sample. Then, by adding the prediction correction amount ^ΔKpre and the delay correction amount ΔKpost_z to the principal component Kzuvw0, the PWM command Kzuvw1 to which the error correction before and after sector switching is applied in a pseudo manner is obtained. The countermeasures for two-phase modulation sector switching and the calculation method of the error correction component have been described above.

FIG. 25 shows a detailed operation timing example of the fifth embodiment (FIG. 24). In principle, it works in the three types of sections (n-1, n, n+1) shown in FIG. 17, but since each signal has a time lag in generation time and action time, the relationship is shown. .

Although not directly related to the fifth embodiment, an example of "limitation of transition between sel_ALT and sel_PN" is added to (n-2) of FIG. "Sector signal ^^sect two samples ahead" is predicted from the predicted phase ^^θv two samples ahead. Since the condition is not satisfied, the transition of the ``sel_ALT and sel_PN'' signals is delayed and updated at the next (n-1) when the condition is met. The following description operates with the signal after this delay.

(a) Section (n-1)
This interval (n-1) is immediately before sector switching, and the main component Kzuvw0(n-1) of the PWM command is still in the two-phase modulation state K2(n-1) before switching. Then, the predicted correction amount ^ΔKpre acts on this.

The calculation of the prediction correction amount ̂ΔKpre is controlled by the sector switching signal ̂sel_ALT, the PN selection signal ̂sel_PN, and the selection signal ̂sel_X1m, which are prediction signals. When the selection signal ^sel_X1m selects single-phase modulation, the sector switching signal ^sel_ALT and switch S2a and the PN selection signal ^sel_PN and switch S5a calculate the predicted correction amount ^ΔKcomp1 of the error component, and further convert to UVW phase order. is converted into the predicted correction amount ^ΔKpre(n).

At this time, the switches S1, S2 and S3 have selected the two-phase modulation before sector switching, and the delay correction amount ΔKpost(n-1) remains fixed at zero. Then, the adder 253 adds the predicted correction amount ^ΔKpre(n) to the principal component K2(n-1) of the PWM command, which is two-phase modulation. (n−1) PWM command” can be obtained.

(b) section (n)
In this section, the signals for the sector switching operation generated in section (n-1) are output from the delay units 260, 261, and 262, and the selection signal sel_X1m, the sector switching signal sel_ALT, and the PN selection signal sel_PN become valid. K1(n), which is the main component Kzuvw0(n) of the PWM command, is selected for either three-phase modulation or one-phase modulation, and is output as K3(n).

If the one-phase modulation is selected, the delay correction amount ΔKcomp2 is calculated by the "subtractor 244, switch S2, correction amount setting units 257 and 258 and switch S4". The reverse sorting function unit 254 converts it in UVW phase order to generate the delay correction amount ΔKpost(n), and when the three-phase modulation is selected, the delay correction amount ΔKpost(n) is cleared. At this time, the delay correction has not yet been added.

(c) Section (n+1)
In this section, the sector switching signal sel_ALT and the PN selection signal sel_PN are in the "post-switching state", and K2(n+1), which is the main component Kzuvw0(n+1) of the PWM command, is "the two-phase modulation component after sector switching". is output. Further, the delay correction amount ΔKpost(n) calculated last time is delayed by the delay unit 255 and output as the delay correction amount ΔKpost_z(n), and the delay correction is performed by the adder 256 at this point.

As described above, the selection signal, the prediction correction, the main component of the PWM command, and the delay correction are calculated at different timings, and by inserting a delay into each correction component as well, it is made to act at an appropriate time.

With this configuration, sector switching control substantially equivalent to that of the fourth embodiment can be realized, and since the predicted voltage command is applied only to the predicted correction component, an increase in wasted time can be suppressed. The waveform example of the fifth embodiment is almost the same as that of the fourth embodiment under the condition that the voltage command changes slowly, so the description thereof will be omitted.

Embodiment 5 is a modification of the method of expanding from Embodiments 2 and 3 to Embodiment 4, and includes all the effects (a) to (g) of Embodiments 2 and 3.

In addition to this, it has the following effect (h2).

(h2) By extending the voltage correction function of (g), the error components caused by the insertion of one-phase modulation are separated into two types, and correction intervals are distributed immediately before and after the sector switching period. As a result, the fluctuation width of the output voltage due to errors and corrections can be reduced. In particular, since a 1/2 correction component can be inserted in the opposite direction to the error in the section immediately before sector switching, it is possible to obtain the effect of suppressing the fluctuation amount of the voltage vector integrated with the error voltage at the time of sector switching. As a result, the distortion of the load current can also be suppressed.

Furthermore, although the error component due to one-phase modulation is distributed to the correction section immediately before and after the sector switching period, the prediction voltage command is used to simulate the correction to the section immediately before the sector switching. By limiting the computation to only the predicted correction component, the dead time from the voltage command to the PWM command can be returned to approximately one sample, which is the same as in the third embodiment. As a result, response characteristics can be improved when external feedback control is incorporated.

[Embodiment 6]
(Overmodulation control method and mode switching for expanding the upper limit voltage)
In the "overmodulation of the DB region" shown in Embodiments 3 to 5, even if the prohibited band (DB margin width ΔKdb) near the carrier peak is set, the upper limit of the voltage command can be expanded beyond VDB. . Superimposition of the 6th harmonic component and countermeasures against sector switching avoid saturation of the PWM command and passage of the prohibited band, and narrow pulses are also prevented. However, the limit of the expansion range (DB region) of the output voltage is VC (≈1.06×VDB).

Therefore, for a voltage command equal to or higher than VC, which is the upper limit voltage of the DB region, it is necessary to shift to the "overmodulation in the OVM region" of the first embodiment. However, the following three problems arise.

First, since the PWM command passes through the DB margin width ΔKdb in the OVM region, "forbidden band processing" is required to secure the minimum pulse width.

The second problem is that the sixth harmonic component becomes discontinuous when the overmodulation scheme is switched. If FIG. 2 is expanded to two types of regions, as shown in FIG. 26A, the amplitude values Vx6 and Vy6 of the 6th-order correction components become discontinuous at the portion where the overmodulation of the OVM region is switched to at the upper limit voltage VC of the DB region. Become.

Third, as shown in FIG. 26(b), when the DB voltage margin width ΔVdb exceeds 6%, “VC<VB” holds, and a blank section VC that belongs to neither the DB region nor the OVM region. VB occurs.

Note that VMAX shown in FIG. 26 is the maximum value of the voltage command Vcmd in the OVM region (OVM region upper limit voltage).
In the sixth embodiment, the first problem, ``forbidden band processing in the OVM area'', and the remaining two problems, ``method of switching between the DB area and the OVM area'', are dealt with. Embodiment 6 shown here uses FIG. 27 and FIG. 28, which are "examples of configuration expanded with respect to Embodiment 3".

Any of the third, fourth, and fifth embodiments may be used as the overmodulation method for the DB region, but the simplest "embodiment 3" is used as a representative configuration example. Added item.

(1) Region Switching, DB Region Upper Limit Voltage VC, and 6th Harmonic Component In order to deal with “discontinuity of amplitude values Vx6 and Vy6 of 6th order correction component” in FIG. 26, characteristics are changed as shown in FIG. . The amplitude value Vx6 of the sixth-order correction component remains discontinuous as in FIG. 26(a). On the other hand, the amplitude value Vy6 of the 6th-order correction component is set to be the same as in FIG. 26A in the DB region, and is fixed to "value Vy6_Lim at DB region upper limit voltage VC" in the OVM region.

A blank section (VC to VB) in FIG. 26(b) is regarded as an OVM area, and the amplitude value Vx6 of the 6th-order correction component is treated as a negative value obtained by extending a straight line as shown in FIG. 29(b). Also, the amplitude value Vy6 of the sixth-order correction component remains fixed at the value of Vy6_Lim as in FIG. 26(a). This can be expressed as formulas (24) and (25). In equation (25), Vy6 is calculated from the command in (25a), and the upper limit is limited by Vy6_Lim in (26b). Here, max() is a function that selects the larger value from the elements.

Furthermore, if it is desired to have a hysteresis characteristic with a hysteresis width ΔVC at the time of switching, two DB region upper limit voltages VC are set as shown in FIG. The amplitude value Vx6 of the sixth-order correction component uses the higher DB region upper limit voltage VC when shifting from the DB region to the OVM region. When shifting from the OVM region to the DB region, the lower DB region upper limit voltage VC is used. Here, the lower DB region upper limit voltage VC is a value obtained by subtracting the hysteresis width ΔVC from the higher DB region upper limit voltage VC.
Also, the amplitude value Vy6 of the sixth-order correction component maintains the characteristic of having a break point at Vy6_Lim regardless of the hysteresis width.

The reason for adopting "fixing of Vy6_Lim in the OVM region" and "allowing a negative value of Vx6 (=ΔV0)" as shown in FIG. This is because it is possible to maintain the “lower left tolerance” than the contour line of . Within this range, the voltage locus can be restricted within the voltage saturation region although the harmonic components increase.

Another reason is that both the amplitude values Vx6 and Vy6 of the 6th-order correction component cannot be made continuous. This is dealt with by adding the following switching timing (phase) constraints.

(2) Constraints on switching timing (voltage phase) of sixth harmonic component In FIG. Vx6 discontinuity” has occurred, so a constraint is added to the switching timing (switching phase).

FIG. 30 shows a waveform example when switching from (5) to (6) in FIG. 29(b). The top row is the correction voltage component Vx6c obtained by multiplying the amplitude value Vx6 of the sixth-order correction component by cos (6×θv), and the second row is the correction voltage obtained by multiplying the amplitude value Vy6 of the sixth-order correction component by sin (6×θv). The third stage is the time integration of the correction voltage components Vx6c and Vy6s.

As shown in FIG. 30, when the DB region is switched to the OVM region at the timing when cos(6×θv) reaches its maximum value, the correction voltage component Vy6s(t) is inverted at the 0 level of the sine wave, so it is continuous. become a waveform. The other correction voltage component Vx6c(t) changes (inverts) at the maximum amplitude of the sine wave, so it becomes a discontinuous waveform. However, as shown in the third stage, the magnetic flux component (∫Vx6c(t)·dt) is switched at the zero level of the sine wave, and no discontinuity occurs. A detailed explanation of the principle is omitted, but by switching at the timing when the magnetic flux becomes zero, it is possible to prevent "the occurrence of an offset abnormality in the circular locus of the magnetic flux at the time of switching", which in turn prevents a sudden change in the transient current ripple. can be suppressed.

(3) Simple Minimum Pulse Width Countermeasures for Overmodulation in OVM Region Next, a countermeasure method for minimum pulse width countermeasures (forbidden band processing) in the OVM region (embodiment 1) will be described.

In the sector switching countermeasures of Embodiments 3 to 5, the voltage trajectory moves on the side of the hexagon in the voltage saturation region only during the carrier half cycle in which the one-phase modulation is inserted. However, referring to the operation examples of the first embodiment (FIGS. 8B and 8C), the voltage trajectory moves mostly along the sides of the hexagon that are the boundaries of the voltage saturation regions. From this comparison, in Embodiment 1, the application period of one-phase modulation must be further extended.

However, the transition conditions between two-phase modulation and one-phase modulation shown in Table 2 must also be considered, and the period of one-phase modulation is "(N+0.5) carrier periods (N is an integer equal to or greater than 0)". There is also a limit. In addition, since the voltage trajectory passes through the forbidden band except for one-phase modulation, forbidden band processing for forcibly moving it out of the band is also required.

Furthermore, with respect to the error component due to one-phase modulation, the longer the insertion period is, the more the error is accumulated, and the longer the delay time until error correction becomes, making it impossible to perform accurate correction. Therefore, "accurate voltage correction of overmodulation in the OVM region" is quite difficult. Implement the applicable period in a simple way as follows.
(a) The sector switching period is detected by externally setting the judgment phase width Δφ (Δφ is set by a table for ΔV0).
(b) The transition conditions shown in Table 2 are applied to the phase width detection by the determination phase width Δφ to determine the final one-phase modulation insertion period.
(c) In the OVM region, only one-phase modulation is inserted during overmodulation (three-phase modulation does not occur near the saturation voltage).

Even with the simplified configuration described above, if the output voltage can be expanded, the advantage of expanding the capacity and speed range of the load machine can be obtained. Considering that it can be extended to a system that adjusts the load current by controlling

(4) Combination Configuration of Overmodulation in DB Region and Overmodulation in OVM Region FIG. 27 shows a configuration example in which the above three items are applied to the configuration example (FIG. 11) of Embodiment 3 of the DB region. Here, in order to reduce the amount of calculation, common parts between the DB area and the OVM area are put together. Basically, the configuration for overmodulation in the DB region is adopted, and the operation signal of each selection switch is modified so that it also functions as overmodulation in the OVM region. FIG. 28 shows the details of the "zero phase modulation/sector switching (2) section 302", but here only the parts added and expanded with respect to FIG. 12 are shown.

First, in FIG. 27, the following four functions are added to the configuration example of FIG.

(a) Switching control unit 300 for overmodulation method
Here, an overmodulation method switching signal sel_OVM between the DB region and the OVM region is generated according to the voltage command Vcmd. sel_ovm=1 when Vcmd>VC, and 0 otherwise. As shown in FIG. 29, this function operates by setting the DB region upper limit voltage VC and the hysteresis width .DELTA.VC. The timing for switching this area may be set to "at the time of sector switching in the DB area" where both are single-phase modulation.

(b) Saturation Phase Width Section 301
The saturation function unit 10 and the subtractor 11 are the same as those of the first embodiment (FIG. 1), and the output of the subtractor 11 is the excess voltage component ΔV0_ovm (=Vx6_0vm).

The "saturated phase width unit 301" receives the excess voltage component ΔV0_ovm (=Vx6_ovm) in the OVM region as an input, and outputs a "determined phase width Δφ for one-phase modulation" by reading a table or the like. The decision phase width Δφ is the insertion width of one-phase modulation. As a simple means of setting the judgment phase width Δφ, the error in the overall output voltage is reduced when the continuous three-phase PWM command is calculated in advance and the "DB forbidden band (Fig. 21)" is applied to it. The phase is obtained by a convergence operation and tabulated.
(c) Saturation function unit 10, subtractor 11, switch Sm1
The sixth harmonic correction section 130 is a portion corresponding to the sixth harmonic correction section 120 of the third embodiment (FIG. 12). The switch Sm1 outputs Vx6_db (=Kx6c*VDB/VB) when Sel_OVM is 0, and outputs Vx6_ovm when Sel_OVM is 1. The output of switch Sm1 is output to adder 16 .

(d) Zero-phase modulation/sector switching (2) section 302
A detailed configuration example of the "zero phase modulation/sector switching (2) unit 302" is shown in FIG. An overmodulation function in the OVM region is added. In FIG. 28, the common parts with FIG. 12 are omitted, and only the parts added/inserted for changing to the sixth embodiment are extracted and drawn.

In the overmodulation of the OVM area, the functions of the selection signals of "switches S1, S2 (including S2a in FIGS. 20 and 24), S3" in FIG. 12 are rewritten. Switches S1 and S3 are forced to select single-phase modulation, and S2 (S2a) is also forced to deactivate the error correction function. The signal used for forced setting of this switch is generated by the additional function described in FIG.

In order to obtain a signal for correcting the "insertion period of one-phase modulation", the phase command θv is first multiplied by six by the sextuple section 313 and then triangular-wave-converted by the triangular-wave converting section 314 . A magnitude comparison unit 315 compares the magnitudes of the triangular wave, which changes at six times the cycle, and the determination phase width Δφ, and generates a signal q_OVM in the one-phase modulation period.

Further, as shown in FIG. 28, a signal that has taken measures to cause a delay due to state transition restrictions in the latter stage may be used as the signal q_OVM in the one-phase modulation period. Specifically, the sixfold unit 310 multiplies the predicted phase ^θv by six, and then the triangular wave transform unit 311 performs triangular wave conversion. A magnitude comparison unit 312 compares the magnitude of the triangular wave that changes in a six-fold cycle with the judgment phase width Δφ.

The logical sum of the outputs of the magnitude comparison units 312 and 315 is taken by the logical sum unit 316, and the output of the logical sum unit 316 is used as the signal q_OVM in the one-phase modulation period. As a result, advance correction and period expansion correction are also applied to the output of the magnitude comparison unit 315 .

This one-phase modulation period signal q_OVM is shaped into a signal selW1 that changes in synchronization with the carrier top timing according to the carrier top signal topbtm and the transition limits in Table 2 in the one-phase modulation transition control section 320 . Furthermore, since it is desired to invalidate the signal when it is not in the OVM region, the logical product section 321 changes the logical product (AND) of the signal selW1 and the overmodulation method switching signal sel_OVM to the signal selW1m.

The original selection signal sel_X1m controlling the switch S3 is changed to a new selection signal sel_WX1 as a logical sum (OR) with the signal sel_W1m in the logical sum unit 322, thereby adding a forced setting function. The original sector switching signal sel_ALT that controlled the switch S1 is also changed to a new sector switching signal sel_ALT-1 as a logical sum (OR) with the signal sel_W1m in the logical sum unit 323, thereby adding a forced setting function. . Also, if the voltage command is to be at the boundary level between one-phase modulation and three-phase modulation and it is desired that three-phase modulation cannot be selected in the OVM region, the logical product section 324 controls the switch S2 (S2a). A new sector switching signal sel_ALT-2 can be generated by ANDing the original sector switching signal sel_ALT and the inverted component of the overmodulation scheme switching signal sel_OVM.

The above is the configuration example of the sixth embodiment in which the overmodulation function in the OVM region is incorporated in the third embodiment.

FIG. 31 is a timing chart for explaining the operation of the function expanded as the sixth embodiment with respect to the third embodiment. Here, the upper side shows the signal for overmodulation in the DB region, and the lower side shows the signal for overmodulation in the OVM region.

(a) DB region overmodulation signal 1st stage: voltage command phase information (phase command) θv
2nd and 3rd stages: Sector decision signal sec in FIG. 28 and a signal ^sect signal obtained by predicting the sector decision signal sec by one sample (the time of this change is the transition period)
4th row: triangular wave carrier signal example (upper vertex timing = Top, lower vertex timing = Btm)
Fifth stage: Two-phase modulation transition period (sector switching signal sel_ALT) during overmodulation of the DB region (output of PN modulation transition control section 236 in FIG. 12)
6th stage: Two-phase modulation transition direction (PN selection signal sel_PN) during overmodulation of the DB region (output of PN modulation transition control section 236 in FIG. 12)
(b) Overmodulation signal in OVM region 7th stage: triangular wave signal of six times cycle of phase command θv and predicted phase ^θv (output of triangular wave converters 311 and 314 in FIG. 28 and generation of one-phase modulation insertion period for)
During the period when this is equal to or greater than the judgment phase width Δφ, the period during which the two kinds of 6-cycle triangular wave signals of the 8th stage and the 7th stage are equal to or more than the judgment phase width Δφ is detected and logically summed. signal q_OVM in the one-phase modulation period
Ninth stage: Signal Sel_W1m obtained by applying transition control (Table 2) according to carrier vertex type to signal q_OVM in one-phase modulation period
In the DB region, as shown in the upper signal, the sector switching signal sel_ALT generates a sector switching period every 60 deg of the predicted phase ^θv, and the two-phase modulation PN selection signal sel_PN selects zero-phase modulation and the amount of error correction. is being controlled.

In the OVM region, as shown in the lower signal, the two types of time-shifted expected phase ^θv and phase command θv are converted into triangular waves with a 6-fold cycle by Tri (6 × θv). After comparing with Δφ, a signal q_OVM of a one-phase modulation period whose period is extended is generated by ORing the two signals. Then, by applying the transition condition according to the carrier peak in Table 2 to the signal q_OVM in the one-phase modulation period, the signal sel_W1 in the one-phase modulation insertion period is obtained.

The signal sel_W1, which is the insertion period of the single-phase modulation in the OVM area, is expanded with respect to the sector switching signal sel_ALT, which is the insertion period of the single-phase modulation in the DB area. is forcibly changed, the selection function of the switches S1, S2 (S2a), S3 can be extended to overmodulation in the OVM region.

In the sixth embodiment, when voltage command Vcmd exceeds saturation voltage VB, determination phase width Δφ is set based on the exceeding voltage component ΔV0_ovm. The sixth-order harmonic correction unit 130 sets the post-correction voltage commands Vx and Vy according to the formulas (24), (25) and (29). Based on the determined phase width Δφ, the phase command θv, and the predicted phase ̂θv, the insertion period of the one-phase modulation is set, and the one-phase modulation is forcibly selected during the insertion period.

Next, FIGS. 32 and 33 show examples of operation waveforms when the sixth embodiment is applied.

FIG. 32 compares the characteristics of both ends ((2) and (3)) where the amplitude value Vx6 of the sixth-order correction component is discontinuous in FIG. 29(a). 32(b) is the overmodulation characteristic of the OVM region on the (3) side. There is a difference in the insertion period of the one-phase modulation. In FIG. 32(a), it is a half period (0.5 period) of the carrier, but in FIG. 32(b), it is expanded to 2.5 periods of the carrier. . This corresponds to increasing the number of sample points located on the hexagonal side of the voltage overmodulation region from one to five in the voltage locus of the αβ coordinates on the left side. In both FIGS. 32(a) and 32(b), the waveform of the three-phase PWM command does not pass through the DB margin width (forbidden band) ΔKdb, and the voltage locus is also the DB voltage margin width ( Forbidden band) ΔVdb is avoided, so the minimum pulse width is ensured.

In order to show the effect under the condition of "VC<VB (V6x<0)" shown in FIG. 29(b), in FIG. 2). Therefore, the width of the DB voltage margin width ΔVdb is also doubled (ΔVdb=0.1).

FIG. 29(b) compares the characteristics of both ends ((5) and (6)) when the amplitude value Vx6 of the sixth-order correction component is discontinuous. FIG. 33B is the overmodulation characteristic of the OVM area on the (6) side. Furthermore, in order to investigate the effect of expanding the width of the forbidden band also for the waveform example (FIG. 16(c)) of the third embodiment, the voltage command is set to Vcmd=1.01 p.s. u. is also shown.

In FIG. 33(a), although the one-phase modulation insertion period is half the carrier period, the DB margin width ΔKdb is wide, so the amount of depression due to error delay correction is also large. However, the forbidden band and the saturation of the PWM command can be avoided.

In the case of FIG. 33(b) as well, the switching period of the one-phase modulation is extended to 2.5 cycles of the triangular wave carrier signal, and the width of the prohibited band is widened. and saturation of the PWM command can be avoided.

The difference from FIG. 32(b) is that the waveform of the PWM command (U-phase) Kzu after zero-phase modulation to which two-phase modulation is applied is the DB margin width set by the discontinuity width that changes from the PN fixed level to the intermediate phase. It is larger than ΔKdb. This is because the amplitude value V6x of the sixth-order correction component is a negative value (V6x<0). It is considered that the waveform of Nevertheless, since the forbidden band can be avoided, narrow pulses can be avoided.

In FIG. 33(c), the voltage command is Vcmd=1.01p. u. In other words, since it returns to "V6x=0.01>0", the discontinuous width of the PWM command (U-phase) Kzu waveform after zero-phase modulation to which two-phase modulation is applied is about the same DB margin width as in FIG. It has returned to ΔKdb.

Although not described here, if the voltage command is further expanded to about 1.06×VB, the insertion period of one-phase modulation is expanded to approximately 120 deg period, which is almost trapezoidal modulation.

From the results of FIGS. 32 and 33, by applying the sixth embodiment, both of the two types of overmodulation methods can output a PWM waveform corresponding to the voltage command while ensuring the minimum pulse width. VB), the waveform distortion increases, but a PWM waveform with a minimum pulse width can be generated.

(effect)
In the region where overmodulation is applied to the DB saturation voltage VDB including the voltage margin, the overmodulation schemes of Embodiments 3, 4, and 5 are used, so the effects (a) to (h) are obtained. can get.

Furthermore, by combining the overmodulation method of Embodiment 1, the output voltage can be increased to approximately 1.06 times the saturation voltage VB.

Even when switching between two types of overmodulation, the characteristics were changed to take into consideration the continuity of the 6th-order harmonic component, and phase restrictions were added to the sector switching timing, thereby reducing load current distortion during switching. can be suppressed, and the occurrence of an offset in the magnetic flux component, which is the time integral of the voltage, can also be suppressed.

Furthermore, since it is configured to incorporate hysteresis characteristics at the time of switching, chattering countermeasures can also be applied.

Although the present invention has been described in detail only with respect to the specific examples described above, it is obvious to those skilled in the art that various modifications and modifications are possible within the scope of the technical idea of the present invention. Such variations and modifications are, of course, covered by the claims.

If Kx6 in FIG. 1 is Vx6 and ΔK0 is ΔV0, equation (11) can also be expressed as equation (26).

If Ky6 in FIG. 1 is Vy6 and ΔK0 is ΔV0, the equation (12) can also be expressed as the equation (27).

Similarly, equation (15) can also be expressed as equation (28).

Further, the corrected voltage commands Vx(θv) and Vy(θv) at the time of the phase command θv can also be expressed by equations (9), (10), and (14) to (29).

In addition, in FIG. 9 of the second embodiment, ΔV0 is Vcmd−VDB, so Vx6 is given by the following equation (31).

Further, Vy6 in the second embodiment is obtained from the equation (18) to the following equation (32).

Also, Vy6 in the second embodiment may be calculated by the following equation (33).

DESCRIPTION OF SYMBOLS 1... Rotating coordinate conversion part 2... Integration part 3... Two-phase three-phase conversion part 4... Divider 7... Carrier signal output part 8... Comparator 9... Short-circuit prevention period generation part 10... Saturation function part 11... Subtractor 12... 6th order coefficient section 13... Multiplier 14... Multiplier 15... Multiplier 16... Adder 17... 6th order correction (1) section 100... 6th order harmonic correction section 200... Zero phase modulation block

Claims (6)

A control device for a voltage-fed inverter having switching elements connected in a three-phase full-bridge connection and converting a DC voltage into a three-phase AC voltage,
A voltage command and a phase command are input, the amplitude value of the 6th-order correction component is obtained by equations (26) and (27) (or equation (28)), the corrected voltage command is obtained by equation (29), and the correction is performed. Equipped with a sixth harmonic correction unit that outputs a post-voltage command,
A control device for a voltage-type inverter, wherein a gate signal for the switching element is generated based on the corrected voltage command.

VB: Saturation voltage Vdc: DC voltage Vx6, Vy6: Amplitude value of sixth correction component Vcmd: Voltage command ΔV0: Overmodulation component min: Function for selecting minimum value from elements in ( ) Vx, Vy: Voltage command after correction θv: phase command A control device for a voltage-fed inverter having switching elements connected in a three-phase full-bridge connection and converting a DC voltage into a three-phase AC voltage,
(30) defines the DB saturation voltage by the formula,
A voltage command and a phase command are input, the amplitude value of the 6th-order correction component is obtained by equations (31) and (32) (or equation (33)), the corrected voltage command is obtained by equation (29), and the correction is performed. Equipped with a sixth harmonic correction unit that outputs a post-voltage command,
A control device for a voltage-type inverter, wherein a gate signal for the switching element is generated based on the corrected voltage command.

VB: Saturation voltage Vdc: DC voltage Kv6: Correction coefficient VDB: DB saturation voltage ΔVdb: DB voltage margin Vx6, Vy6: Amplitude value of sixth-order correction component Vcmd: Voltage command ΔV0: Overmodulation component min: Elements in () Function Vx, Vy: corrected voltage command θv: phase command Equipped with a zero-phase modulation/sector switching unit,
The zero-phase modulation/sector switching unit generates a two-phase modulation PWM command, a three-phase modulation PWM command, and a one-phase modulation PWM command, and performs two-phase modulation using a predicted phase obtained by adding a phase advance amount to the phase command. Except when switching sectors, the two-phase modulation PWM command is the main component, and when switching the two-phase modulation sector by the predicted phase and when the minimum pulse width can be secured by three-phase modulation, at least half of the triangular wave carrier signal The three-phase modulation PWM command is used as the main component for the period, and when switching the sector of the two-phase modulation by the predicted phase and when the minimum pulse width cannot be secured by the three-phase modulation, at least half the period of the triangular wave carrier signal The one-phase modulation PWM command is used as the main component, and the correction amount to be applied to the section immediately after the sector switching section is determined based on the voltage error component generated by applying the one-phase modulation PWM command to the main component. generating a PWM command after zero-phase modulation based on the principal component and the correction amount;
3. A control device for a voltage-type inverter according to claim 2, wherein a gate signal for said switching element is generated based on a comparison between said PWM command after said zero phase modulation and said triangular wave carrier signal. Equipped with a zero-phase modulation/sector switching unit,
The sixth harmonic correction unit obtains a predicted voltage command after correction by inputting a predicted phase obtained by adding a phase advance amount to the phase command to θv of equation (29),
The zero-phase modulation/sector switching unit receives a predicted PWM command before zero-phase modulation generated based on the corrected predicted voltage command, and performs two-phase modulation PWM based on the predicted PWM command before zero-phase modulation. A command, a three-phase modulation PWM command, and a one-phase modulation PWM command are generated, and the two-phase modulation is performed according to the predicted phase two cycles ahead by adding the phase advance amount to the predicted phase, except when switching the sector of the two-phase modulation. When the modulation PWM command is the main component, and when the two-phase modulation sector is switched according to the predicted phase two cycles ahead, and when the minimum pulse width can be secured in the three-phase modulation, the three-phase modulation is performed for at least half the cycle of the triangular wave carrier signal. With the phase modulation PWM command as the main component, at least half the cycle of the triangular wave carrier signal when the two-phase modulation sector is switched by the predicted phase two cycles ahead and the minimum pulse width cannot be secured in the three-phase modulation. Using the one-phase modulation PWM command as the main component, and based on a voltage error component generated by applying the one-phase modulation PWM command to the main component, a predicted correction amount to be applied to the sample period immediately before the sector switching period. and generating a delay correction amount to be applied in a sample period immediately after the sector switching period, and generating a PWM command after zero-phase modulation based on the principal component, the predicted correction amount, and the delay correction amount,
3. A control device for a voltage-type inverter according to claim 2, wherein a gate signal for said switching element is generated based on a comparison between said PWM command after said zero-phase modulation and said triangular wave carrier signal. Equipped with a zero-phase modulation/sector switching unit,
The sixth harmonic correction unit obtains the post-correction voltage command by inputting the phase command to θv of equation (29), and calculates the predicted phase obtained by adding the phase advance amount to the phase command to θv of equation (29). Input to find the predicted voltage command after correction,
The zero-phase modulation/sector switching unit inputs a PWM command before zero-phase modulation generated based on the corrected voltage command and a predicted PWM command before zero-phase modulation generated based on the predicted voltage command after correction. and generating a two-phase modulation PWM command, a first three-phase modulation PWM command, and a first one-phase modulation PWM command based on the PWM command before zero-phase modulation, and generating a predicted PWM command before zero-phase modulation A second three-phase modulation PWM command and a second one-phase modulation PWM command are generated based on the command, and two-phase modulation sector switching is performed according to the predicted phase two cycles ahead by adding the phase advance amount to the predicted phase. is the main component of the two-phase modulation PWM command, and when the two-phase modulation sector is switched by the predicted phase two cycles ahead, and when the minimum pulse width can be secured in three-phase modulation, at least half the cycle of the triangular wave carrier signal with the first three-phase modulation PWM command as the main component, and when the two-phase modulation sector is switched by the predicted phase two cycles ahead, and when the minimum pulse width cannot be secured in the three-phase modulation, at least the triangular wave carrier Using the first single-phase modulation PWM command as the main component for half the signal period, and applying the first single-phase modulation PWM command to the main component, based on the error component of the voltage, the second third A predicted correction amount to be applied to the sample period immediately before the sector switching period calculated from the phase modulation PWM command and the second one-phase modulation PWM command, and the first three-phase modulation PWM command and the first one-phase modulation PWM command. generating a delay correction amount to be applied in a sample period immediately after the sector switching period calculated from the command, generating a PWM command after zero-phase modulation based on the principal component, the predicted correction amount, and the delay correction amount;
3. A control device for a voltage-type inverter according to claim 2, wherein a gate signal for said switching element is generated based on a comparison between said PWM command after said zero phase modulation and said triangular wave carrier signal. when the voltage command exceeds the saturation voltage, setting a determination phase width based on the exceeding voltage component;
The sixth harmonic correction unit sets the post-correction voltage command according to formulas (24), (25), and (29),
An insertion period of one-phase modulation is set based on the determined phase width, the phase command, and the predicted phase, and one-phase modulation is forcibly selected during the insertion period. A control device for a voltage-type inverter according to any one of the above.

VC: DB region upper limit voltage VMAX: OVM region upper limit voltage

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