JP7281764B2 - Element chip manufacturing method - Google Patents

Description

TECHNICAL FIELD The present invention relates to a method of manufacturing an element chip, and more particularly to a method of dicing a laminate including a substrate and a resin layer by plasma etching.

When manufacturing a plurality of multi-layered element chips such as flash memory from a single substrate, the substrate is attached to a die attach film (sometimes referred to as a die bonding film) and then diced. is performed (Patent Document 1). A die attach film (DAF) is formed of, for example, a resin composition containing a resin and an inorganic filler.

JP 2017-114945 A

Normally, in dicing a substrate attached to a die attach film (DAF), the substrate is first diced (or half-cut) by a physical method such as mechanical dicing or stealth dicing, and then the DAF is diced by another method. fragmented. Examples of the method of dividing the DAF include the cool expansion method, the laser ablation method, and the like.

As packages become smaller and thinner, substrates are becoming thinner. In devices such as flash memory, the thickness of the substrate has been reduced to about 30 μm with the progress of multi-layer stacking technology. It is expected that the thickness of the substrate will further decrease to about 10 μm in the future.

In the cool expand method, the holding tape is stretched after the dicing tape (holding tape) and the substrate adhered to the DAF are cut in half. The substrate is divided at half-cut positions to form a plurality of element chips. At this time, the DAF attached to the substrate is also cut off. However, as the substrate becomes thinner, so does its physical strength. For this reason, it has become difficult to apply such a stretching force to the holding tape as to break the DAF while suppressing damage to the substrate. In addition, with the diversification of functions, the crystal orientation of silicon, which is the material of the substrate, has diversified, and the concentration of implanted ions into silicon has increased. Therefore, the direction in which the substrate is divided is not fixed, and the direction in which the DAF is divided tends to be unstable.

When using the laser ablation method, burrs are likely to occur because DAF has adhesiveness. Therefore, it is difficult for the end face of the element chip and the end face of the DAF to be flush with each other. Furthermore, the burrs may cause the separated DAFs to reattach to each other. Also, the laser irradiation is performed aiming at between the element chips. Therefore, after dicing the substrate, it is necessary to map the positions of the element chips, which tends to lengthen the process time.

Furthermore, in recent years, a multi-layer substrate having a three-dimensional structure has been developed in which a plurality of substrates having different functions are bonded together with a resin adhesive. Dicing of such a multilayer substrate is performed by the physical method as described above, or by a combination of laser processing and mechanical dicing. However, when a multilayer substrate is singulated by mechanical dicing, chipping and delamination are likely to occur.

According to one aspect of the present invention, a first substrate includes a plurality of element regions and divided regions defining the element regions, and has a first surface and a second surface opposite to the first surface. , a resin layer arranged on the second surface side; a protective film forming step of covering the first surface with a protective film; an opening forming step of removing a film to form an opening; a substrate etching step of etching the first substrate by exposing the first substrate exposed from the opening to a first plasma; and the substrate etching. after the step, exposing the resin layer exposed at the bottom of the groove formed by etching the first substrate to a second plasma to etch the resin layer; plasma is generated by a process gas containing carbon oxide gas, relating to the manufacturing method of the element chip.

According to the present invention, a desired element chip can be obtained with high quality.

5 is a graph showing an example of the relationship between the proportion of carbon oxide gas in process gas, resin layer selectivity, and resin etching rate. It is a flow chart which shows a manufacturing method concerning one embodiment of the present invention. 4 is a flow chart showing a manufacturing method according to another embodiment of the present invention; 4 is a flow chart showing a manufacturing method according to still another embodiment of the present invention; 1 is a cross-sectional view schematically showing a first substrate according to an embodiment of the invention; FIG. FIG. 4 is a top view schematically showing a transport carrier and a first substrate held thereon; FIG. 6B is a cross-sectional view taken along line AA of FIG. 6A; FIG. 4 is a top view schematically showing a first substrate and a second substrate that are bonded together via an adhesive layer; FIG. 7B is a cross-sectional view taken along line BB of FIG. 7A; 1 is a cross-sectional view schematically showing the structure of a plasma processing apparatus; FIG. 1 is a block diagram of a plasma processing apparatus used in one embodiment of the present invention; FIG. It is a sectional view showing typically the layered product prepared by the preparation process concerning one embodiment of the present invention. It is a sectional view showing typically a layered product after a protective film formation process concerning an embodiment of the present invention. FIG. 4 is a cross-sectional view schematically showing the laminate after the opening forming step according to the embodiment of the present invention; FIG. 4 is a cross-sectional view schematically showing a layered product after a substrate etching step according to the embodiment of the present invention; FIG. 4 is a cross-sectional view schematically showing a laminate (element chip) after a resin etching step according to the embodiment of the invention; FIG. 10 is a cross-sectional view schematically showing a laminate prepared by a preparation step according to another embodiment of the present invention;

As a method of dicing a substrate, plasma dicing, in which a substrate is subjected to plasma etching and divided into individual chips, has attracted attention. In plasma dicing, the device regions of the substrate are usually protected by a mask, and only the dividing regions defining the device regions are etched by plasma. The mask is formed, for example, by covering the surface of the substrate with a protective film and then removing the protective film in the divided regions.

In plasma etching, the process gas used to generate plasma must be changed according to the material, thickness, etc. of the object to be processed. When plasma dicing an object including a substrate and a resin material as described above, the process gas for etching the substrate mainly made of a semiconductor material differs from the process gas for etching the resin material, which is an organic substance.

The mask is also made of a resin material called a resist material. However, this mask is not subject to plasma etching. That is, when performing plasma etching on a laminate including a substrate and a layer made of a resin material (resin layer), it is required to etch the resin layer without etching the mask.

Therefore, in the present embodiment, after removing the first substrate in the divided regions, the resin layer is etched using plasma generated by a process gas containing carbon oxide gas. This makes it possible to etch the resin layer at a high rate while suppressing etching of the mask. In other words, the resin layer in the divided regions can be removed while maintaining the protective effect of the mask on the element regions.

Carbon oxide is a compound of carbon and oxygen and is represented, for example, by C _x O _y (x=1-5, y=1, 2). Specific examples include carbon monoxide (CO), carbon dioxide (CO ₂ ), tricarbon dioxide, and pentacarbon dioxide. These are used singly or in combination of two or more. Due to availability, the carbon oxide gas may be CO, _CO2 .

The reason why the etching rate of the resin layer increases is considered as follows.
When the process gas contains carbon oxide gas having carbon atoms together with oxygen atoms, the plasma generated in the plasma processing apparatus contains oxygen ions and radicals derived from the carbon oxide gas as well as carbon atoms derived from the carbon oxide gas. Ions and radicals are generated. Some of the carbon ions and radicals react with oxygen to form CO and are discharged from the plasma processing apparatus, while the remainder adheres to the plasma processing apparatus (for example, the substrate) as a carbon component. When a sufficient amount of carbon oxide gas is supplied as a process gas, ions and radicals of carbon collide with the first surface side surface of the protective film. When carbon ions and radicals collide with the protective film, carbon (C) derived from the carbon ions and radicals adheres to the surface of the protective film.

When oxygen ions or radicals collide with the protective film, the protective film may be etched. However, due to the carbon (C) derived from the carbon oxide gas adhering to the surface, the etching rate of the protective film is lower than when using a gas other than the carbon oxide gas.

Here, grooves are formed in the laminate by removing the first substrate in the divided regions. The resin layer corresponds to the bottom of this groove. Some of the carbon ions and radicals enter the grooves. The carbon ions and radicals that have entered the groove easily adhere to the side walls of the groove while moving toward the bottom of the groove. Therefore, ions and radicals of carbon hardly reach the bottom of the groove (the surface of the resin layer), and the amount of carbon attached to the bottom of the groove is small.

In other words, the etching rate of both the protective film and the resin layer decreases due to the adhesion of carbon, but the etching rate of the protective film with a large amount of carbon deposition decreases more significantly. Therefore, the etching rate of the resin layer with respect to the etching rate of the protective film (resin layer selection ratio) increases, and the resin layer is selectively etched.

When oxygen ions and radicals collide with the protective film and resin layer, most of the carbon contained in the protective film and resin layer reacts with the oxygen ions and radicals to become CO, which is discharged from the plasma processing apparatus.

In the laminate (see FIG. 13) from which the first substrate is removed in the division region, which is subjected to the resin etching process, the height from the second surface to the first surface in the element region (the depth of the groove D ) may be greater than or equal to twice the width W of the groove. In this case, the resin layer selection ratio tends to increase, and selective etching of the resin layer tends to proceed.

The depth D of the groove is obtained from the cross section in the direction perpendicular to the longitudinal direction of the divided region, which is in the thickness direction of the laminate. For example, the height from the second surface to the outer surface of the protective film at the boundary between the element region and the division region is measured at any five points in the cross section, and the heights are averaged. The width W of the groove can be calculated by determining the lengths of line segments connecting the outer surfaces of the protective films of the adjacent element regions at arbitrary five points in the cross section and averaging them. The width W of the groove is synonymous with the length of the divided region in the direction perpendicular to the longitudinal direction.

The proportion of carbon oxide gas in the process gas is not particularly limited. Considering the protective effect on the protective film, the above ratio of carbon oxide may be 20% by volume or more and 100% by volume or less, and may be 45% by volume or more and 100% by volume or less. When the ratio of the carbon oxide gas is within the above range, the resin layer selectivity tends to increase. In particular, when the ratio of carbon oxide gas is 45% by volume or more, the resin layer selection ratio tends to be 2 or more. Therefore, it becomes easy to remove the resin layer in the division region while suppressing damage to the element region.

The process gas may further contain a fluorine-containing gas. This further enhances the effect of removing the resin layer. Examples of the fluorine-containing gas include SF ₆ , the above-mentioned fluorocarbon gas and fluorocarbon gas. The process gas may further contain other gases such as oxygen gas and noble gases such as Ar and He. In this embodiment, the carbon oxide gas containing carbon atoms having a protective effect on the protective film is added independently of the gas having a strong etching effect (the fluorine-containing gas, oxygen gas, etc.). Therefore, the concentration of the carbon oxide gas can be appropriately set in consideration of the thickness of the protective film, the thickness and composition of the resin layer, and the like. Therefore, the manufacturing method according to this embodiment can be applied to various laminates.

FIG. 1 shows an example of the relationship between the proportion of carbon oxide gas in the process gas, the resin layer selectivity, and the resin etching rate. As can be seen from the graph of FIG. 1, the resin layer selection ratio increases as the proportion of carbon oxide gas in the process gas increases. This suggests that the carbon oxide gas adheres carbon to the protective layer.

At this time, the groove depth D was about 130 μm, the groove width W was about 35 μm, and the groove depth D was about 3.7 times the groove width W. _CO2 was used as the carbon oxide gas. The main component of the resin layer is polyimide, and the main component of the protective film is water-soluble polyester. Other components of the process gas are _O2 and _SF6 . Specifically, plasma etching is performed by changing the volume ratio (SF ₆ :O ₂ :CO ₂ ) of each component to 50:350:0, 50:175:175, and 50:0:350 to select the resin layer. A ratio was calculated. The resin layer selection ratio was calculated by dividing the etching rate (μm/minute) of the resin layer by the etching rate (μm/minute) of the protective film. A main component is a component that accounts for 50% by mass or more of all components.

Hereinafter, the manufacturing method according to this embodiment will be described with reference to the drawings as appropriate.
FIG. 2 is a flow chart showing the manufacturing method according to this embodiment.
This embodiment includes a first substrate having a first surface and a second surface opposite to the first surface, and a second substrate including a plurality of element regions and divided regions defining the element regions. A preparation step (S1) of preparing a laminate including a resin layer arranged on the surface side; a protective film forming step (S2) of covering the first surface with a protective film; An opening forming step (S3) of removing to form an opening, a substrate etching step (S4) of etching the first substrate by exposing the first substrate exposed from the opening to the first plasma, and substrate etching. After the step, a resin etching step (S5) of etching the resin layer by exposing the resin layer exposed at the bottom of the groove formed by etching the first substrate to the second plasma.

A second plasma is generated by a process gas containing carbon oxide gas. This makes it possible to etch the resin layer at a high rate while suppressing etching of the mask.

FIG. 3 is a flow chart showing another manufacturing method according to this embodiment.
In this embodiment, the resin layer is a die attach film (DAF), and the laminate to be etched includes the first substrate and the DAF. The preparation step includes attaching the first substrate to a holding sheet fixed to the frame via the DAF. Hereinafter, the frame and the holding sheet fixed to the frame will be referred to as a transport carrier. Other than this, this embodiment is the same as the manufacturing method shown in FIG.

FIG. 4 is a flow chart showing still another manufacturing method according to this embodiment. In this embodiment, the resin layer is the adhesive layer, and the laminate to be etched includes the first substrate and the adhesive layer. The preparing step includes bonding the first substrate to the second substrate via the adhesive layer. Other than this, this embodiment is the same as the manufacturing method shown in FIG.

First, one embodiment of the member used in the manufacturing method according to this embodiment will be specifically described. The configuration of each member is not limited to this.

(first substrate)
The first substrate includes a plurality of element regions and divided regions defining the element regions, and has a first surface and a second surface. The element region includes, for example, a semiconductor layer and a wiring layer laminated on the first surface side of the semiconductor layer. An element chip having a semiconductor layer and a wiring layer is obtained by etching the first substrate in the division region.

The size of the first substrate is not particularly limited, and is, for example, about 50 mm to 300 mm in maximum diameter. The shape of the first substrate is also not particularly limited, and may be circular or square, for example. Also, the first substrate may be provided with an orientation flat (orientation flat) and a notch such as a notch (none of which are shown).

The semiconductor layer includes, for example, silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), silicon carbide (SiC), and the like. The thickness of the semiconductor layer in the element chip is not particularly limited, and is, for example, 20 μm to 1000 μm, and may be 100 μm to 300 μm.

The wiring layer constitutes, for example, a semiconductor circuit, an electronic component element, MEMS, etc., and includes an insulating film (first insulating film), a metal material, a resin layer (for example, polyimide), a resist layer, an electrode pad, a bump, and the like. You may prepare. The first insulating film may be included as a laminate (multilayer wiring layer or rewiring layer) with a metal material for wiring. The shape and size of the bumps arranged on the wiring layer are not particularly limited. The bump height H _B may be, for example, 20 μm or more and 70 μm or less, and the bump diameter W _B may be, for example, 20 μm or more and 70 μm or less.

The first substrate in the division region may include, for example, an insulating film (second insulating film), a test circuit called TEG, and a metal material including copper (Cu), aluminum (Al), etc., together with the semiconductor layer. The second insulating film contains, for example, silicon dioxide (SiO ₂ ), silicon nitride (Si ₃ N ₄ ), or the like.

The shape of the divided regions is not limited to straight lines, and may be set according to the desired shape of the element chip, and may be zigzag or wavy lines. The shape of the element chip may be, for example, a rectangle, a hexagon, or the like.

The width of the divided region is not particularly limited, and may be appropriately set according to the size of the first substrate and the element chip. The width of the divided regions is, for example, 10 μm or more and 300 μm or less. The widths of the plurality of divided regions may be the same or different. A plurality of divided regions are usually arranged on the first substrate. The pitch between adjacent divided regions is also not particularly limited, and may be appropriately set according to the size of the first substrate and element chips.

FIG. 5 is a cross-sectional view schematically showing an example of the first substrate.
The first substrate 10 includes a plurality of element regions 101 and divided regions 102 that define the element regions 101, as well as a first surface 10X and a second surface 10Y. The element region 101 includes, for example, a semiconductor layer 11 and a wiring layer 12 laminated on the first surface 10X side of the semiconductor layer 11 . The wiring layer 12 further includes bumps 15 . The division region 102 includes a semiconductor layer 11 and a second insulating film 14 laminated on the first surface 10X side of the semiconductor layer 11 . By etching the first substrate 10 in the division region 102, an element chip having the semiconductor layer 11 and the wiring layer 12 having the bumps 15 is obtained.

(conveyance carrier)
The transport carrier comprises a frame and a holding sheet secured to the frame.

The frame is a frame body having an opening with an area equal to or larger than that of the entire first substrate, and has a predetermined width and a substantially constant thin thickness. The frame has sufficient rigidity to carry while holding the holding sheet and the first substrate. The shape of the opening of the frame is not particularly limited, but may be, for example, circular, rectangular, hexagonal, or other polygonal shape. Examples of materials for the frame include metals such as aluminum and stainless steel, and resins.

The material of the holding sheet is not particularly limited. Among others, the holding sheet preferably includes an adhesive layer and a flexible non-adhesive layer in terms of easy attachment of the first substrate.

The material of the non-adhesive layer is not particularly limited, and examples thereof include thermoplastic resins such as polyolefins such as polyethylene and polypropylene, and polyesters such as polyvinyl chloride and polyethylene terephthalate. The resin film contains rubber components for adding stretchability (e.g., ethylene-propylene rubber (EPM), ethylene-propylene-diene rubber (EPDM), etc.), plasticizers, softeners, antioxidants, conductive materials, etc. Various additives may be blended. Moreover, the thermoplastic resin may have a functional group that exhibits photopolymerization reaction, such as an acrylic group. The thickness of the non-adhesive layer is not particularly limited, and is, for example, 50 µm or more and 300 µm or less, preferably 50 µm or more and 150 µm or less.

The outer edge of the surface provided with the adhesive layer (adhesive surface) is adhered to one surface of the frame and covers the opening of the frame. The first substrate is held by the holding sheet by adhering one main surface (second surface) of the first substrate to the portion of the adhesive surface exposed through the opening of the frame. The first substrate may be held by a holding sheet via a die attach film (DAF), which will be described later.

The adhesive layer is preferably made of an adhesive component whose adhesive strength is reduced by irradiation with ultraviolet rays (UV). As a result, when picking up the element chip after plasma dicing, the element chip can be easily peeled off from the adhesive layer by performing UV irradiation, making it easier to pick up. For example, the adhesive layer can be obtained by applying a UV-curable acrylic adhesive to a thickness of 5 μm or more and 100 μm or less (preferably 5 μm or more and 15 μm or less) on one side of the non-adhesive layer.

(Die attach film (DAF))
The DAF is made of, for example, a resin composition containing resin and inorganic filler.
Examples of resins include photosensitive phenol resins such as phenol/formaldehyde novolak resin, cresol/formaldehyde novolak resin, xylenol/formaldehyde novolak resin, resorcinol/formaldehyde novolak resin, and phenol-naphthol/formaldehyde novolak resin.

Examples of inorganic fillers include aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, and silica.

The thickness of the DAF is not particularly limited. The thickness of the DAF may be 10 μm to 100 μm, or may be 20 μm to 50 μm, from the viewpoint of handleability. The DAF is, for example, larger than the first substrate and smaller than the opening of the frame.

FIG. 6A is a top view schematically showing the first substrate held by the transport carrier. FIG. 6B is a cross-sectional view along line AA shown in FIG. 6A. The transport carrier 20 comprises a frame 21 and a holding sheet 22 fixed to the frame 21 . The frame 21 may be provided with notches 21a and corner cuts 21b for positioning. The outer peripheral edge of the adhesive surface 22X is adhered to one surface of the frame 21, and one main surface of the first substrate 10 is adhered to the portion of the adhesive surface 22X exposed through the opening of the frame 21. FIG. 6A and 6B, the first substrate 10 is adhered to the holding sheet 22 via the DAF 30. In FIG. During plasma processing, the holding sheet 22 is placed on a stage such that the stage installed in the plasma processing apparatus and the non-adhesive surface 22Y opposite to the adhesive surface 22X are in contact with each other.

(adhesion layer)
The material of the adhesive layer is not particularly limited, and may be appropriately selected according to the material of each substrate. Materials for the adhesive layer include, for example, uncured or semi-cured UV curable resins, uncured or semi-cured thermosetting resins, pressure-sensitive adhesives, and thermoplastic resins. Examples of UV curable resins include acrylic resins. Examples of thermosetting resins include epoxy resins, polyimides, and polyamideimides. Examples of thermoplastic resins include polyester, polystyrene, and polytetrafluoroethylene. Examples of pressure-sensitive adhesives include silicone resins.

The thickness of the adhesive layer is not particularly limited. The thickness of the adhesive layer may be, for example, 5 μm or more and 100 μm or less, or 5 μm or more and 15 μm or less.

(Second substrate)
The second substrate supports the first substrate.
The material of the second substrate is not particularly limited. Examples of the second substrate include a glass substrate, a resin substrate, a glass epoxy substrate, a ceramic substrate and a silicon substrate.

The thickness of the second substrate is not particularly limited. The thickness of the second substrate may be, for example, 50 μm or more and 2 mm or less, or 100 μm or more and 500 μm or less. The size of the second substrate is also not particularly limited. The maximum diameter of the second substrate may be larger than the maximum diameter of the first substrate.

FIG. 7A is a top view schematically showing a first substrate and a second substrate bonded via an adhesive layer. FIG. FIG. 7B is a cross-sectional view taken along line BB of FIG. 7A. The first substrate 10 and the second substrate 70 are bonded via an adhesive layer 80 .

In addition to the case where the resin layer is DAF, from the viewpoint of handling, the steps after the protective film formation step, particularly after the plasma etching step, may be performed while the substrate is held by a transport carrier.

(Plasma processing device)
Next, an embodiment of the plasma processing apparatus used in the substrate etching process and the resin etching process will be specifically described. FIG. 8 is a cross-sectional view schematically showing the structure of the plasma processing apparatus. In FIG. 8, for the sake of convenience, the substrate held by the transport carrier is processed, but the DAF and the like are omitted. The structure of the plasma processing apparatus is not limited to this.

The plasma processing apparatus 100 has a stage 111 . The transport carrier 20 is mounted on the stage 111 so that the surface of the holding sheet 22 holding the first substrate 10 faces upward. The stage 111 has a size that allows the entire transport carrier 20 to be placed thereon. A cover 124 having a window portion 124W for exposing at least part of the first substrate 10 is arranged above the stage 111 . The cover 124 is provided with a pressing member 107 for pressing the frame 21 when the frame 21 is placed on the stage 111 . The pressing member 107 is preferably a member that can make point contact with the frame 21 (for example, a coil spring or elastic resin). Thereby, the distortion of the frame 21 can be corrected while suppressing the heat of the frame 21 and the cover 124 from influencing each other.

Stage 111 and cover 124 are located within vacuum chamber 103 . The vacuum chamber 103 has a generally cylindrical shape with an open top, and the top opening is closed by a dielectric member 108 that is a lid. Examples of the material forming the vacuum chamber 103 include aluminum, stainless steel (SUS), and aluminum whose surface is anodized. Examples of materials forming the dielectric member 108 include dielectric materials such as yttrium oxide (Y ₂ O ₃ ), aluminum nitride (AlN), alumina (Al ₂ O ₃ ), and quartz (SiO ₂ ). A first electrode 109 as an upper electrode is arranged above the dielectric member 108 . The first electrode 109 is electrically connected to the first high frequency power supply 110A. The stage 111 is arranged on the bottom side inside the vacuum chamber 103 .

A gas inlet 103 a is connected to the vacuum chamber 103 . A process gas source 112 and an ashing gas source 113, which are plasma generating gas (process gas) supply sources, are connected to the gas inlet 103a by pipes. Further, the vacuum chamber 103 is provided with an exhaust port 103b, and the exhaust port 103b is connected to a decompression mechanism 114 including a vacuum pump for decompressing the gas in the vacuum chamber 103 by exhausting the gas. Plasma is generated in the vacuum chamber 103 by supplying high-frequency power to the first electrode 109 from the first high-frequency power source 110A while the process gas is being supplied into the vacuum chamber 103 .

The stage 111 includes a substantially circular electrode layer 115 , a metal layer 116 , a base 117 supporting the electrode layer 115 and the metal layer 116 , and an outer peripheral portion 118 surrounding the electrode layer 115 , the metal layer 116 and the base 117 . Prepare. The outer peripheral portion 118 is made of a metal having electrical conductivity and etching resistance, and protects the electrode layer 115, the metal layer 116 and the base 117 from plasma. An annular outer ring 129 is arranged on the upper surface of the outer peripheral portion 118 . The outer ring 129 serves to protect the upper surface of the outer peripheral portion 118 from plasma. The electrode layer 115 and the outer ring 129 are made of, for example, the dielectric material described above.

Inside the electrode layer 115, an electrode for electrostatic chuck (hereinafter referred to as an ESC electrode 119) and a second electrode 120 electrically connected to the second high frequency power source 110B are arranged. It is A DC power supply 126 is electrically connected to the ESC electrode 119 . The electrostatic attraction mechanism is composed of ESC electrode 119 and DC power supply 126 . The holding sheet 22 is pressed against the stage 111 and fixed by the electrostatic adsorption mechanism. A case where an electrostatic adsorption mechanism is provided as a fixing mechanism for fixing the holding sheet 22 to the stage 111 will be described below as an example, but the present invention is not limited to this. Fixation of the holding sheet 22 to the stage 111 may be performed by a clamp (not shown).

The metal layer 116 is made of, for example, aluminum with an alumite coating formed on its surface. A coolant channel 127 is formed in the metal layer 116 . Coolant flow path 127 cools stage 111 . By cooling the stage 111 , the holding sheet 22 mounted on the stage 111 is cooled, and the cover 124 partly in contact with the stage 111 is also cooled. This prevents the first substrate 10 and the holding sheet 22 from being damaged by being heated during plasma processing. The refrigerant in refrigerant flow path 127 is circulated by refrigerant circulation device 125 .

A plurality of support portions 122 that penetrate the stage 111 are arranged near the outer periphery of the stage 111 . The support portion 122 supports the frame 21 of the transport carrier 20 . The support portion 122 is driven up and down by a first lifting mechanism 123A. When the transport carrier 20 is transported into the vacuum chamber 103, it is handed over to the support portion 122 which has been raised to a predetermined position. The transport carrier 20 is mounted at a predetermined position on the stage 111 by lowering the upper end surface of the support portion 122 to the same level as the stage 111 or below.

A plurality of elevating rods 121 are connected to the ends of the cover 124 so that the cover 124 can be elevated. The lifting rod 121 is driven up and down by a second lifting mechanism 123B. The lifting operation of the cover 124 by the second lifting mechanism 123B can be performed independently of the first lifting mechanism 123A.

The control device 128 includes a first high-frequency power source 110A, a second high-frequency power source 110B, a process gas source 112, an ashing gas source 113, a decompression mechanism 114, a refrigerant circulation device 125, a first elevating mechanism 123A, and a second elevating mechanism. 123B and the electrostatic adsorption mechanism. FIG. 9 is a block diagram of a plasma processing apparatus used in this embodiment.

Etching of the first substrate 10 is carried out with the transfer carrier 20 holding the first substrate 10 carried into the vacuum chamber and the first substrate 10 placed on the stage 111 .
When the first substrate 10 is loaded into the vacuum chamber 103 , the lift rod 121 is driven to raise the cover 124 to a predetermined position. A gate valve (not shown) is opened and the transport carrier 20 is loaded. The plurality of support portions 122 stand by in an elevated state. When the transport carrier 20 reaches a predetermined position above the stage 111 , the transport carrier 20 is transferred to the support section 122 . The conveying carrier 20 is transferred to the upper end surface of the support portion 122 so that the adhesive surface 22X of the holding sheet 22 faces upward.

When the transfer carrier 20 is transferred to the support section 122, the vacuum chamber 103 is placed in a sealed state. Next, the support portion 122 begins to descend. The transport carrier 20 is mounted on the stage 111 by lowering the upper end surface of the support portion 122 to the same level as the stage 111 or lower. Subsequently, the lifting rod 121 is driven. Lifting rod 121 lowers cover 124 to a predetermined position. At this time, the distance between the cover 124 and the stage 111 is adjusted so that the pressing member 107 arranged on the cover 124 can make point contact with the frame 21 . As a result, the frame 21 is pressed by the pressing member 107, the frame 21 is covered with the cover 124, and the first substrate 10 is exposed from the window portion 124W.

The cover 124 is, for example, donut-shaped with a substantially circular outer contour, with a constant width and a thin thickness. The window portion 124W has a diameter smaller than the inner diameter of the frame 21 and an outer diameter larger than the outer diameter of the frame 21 . Therefore, when the transport carrier 20 is mounted at a predetermined position on the stage and the cover 124 is lowered, the cover 124 can cover the frame 21 . At least a portion of the first substrate 10 is exposed through the window portion 124W.

The cover 124 is made of, for example, a dielectric such as ceramics (eg, alumina, aluminum nitride, etc.) or quartz, or a metal such as aluminum or aluminum whose surface is anodized. The pressing member 107 may be made of a resin material in addition to the above dielectrics and metals.

After the transfer carrier 20 is transferred to the support section 122 , a voltage is applied from the DC power supply 126 to the ESC electrodes 119 . As a result, the holding sheet 22 contacts the stage 111 and is electrostatically attracted to the stage 111 at the same time. Note that application of voltage to the ESC electrode 119 may be started after the holding sheet 22 is placed on the stage 111 (after contact).

After the etching is finished, the gas inside the vacuum chamber 103 is exhausted and the gate valve is opened. The transport carrier 20 holding a plurality of element chips is transported out of the plasma processing apparatus 100 by the transport mechanism entering through the gate valve. When the transport carrier 20 is unloaded, the gate valve is quickly closed. The unloading process of the transport carrier 20 may be performed in reverse order to the procedure of mounting the transport carrier 20 on the stage 111 as described above. That is, after the cover 124 is raised to a predetermined position, the voltage applied to the ESC electrode 119 is set to zero, the transport carrier 20 is released from the stage 111, and the support portion 122 is raised. After the support portion 122 is raised to a predetermined position, the transport carrier 20 is unloaded.

[First embodiment]
A manufacturing method corresponding to the flow shown in FIG. 3 will be described below with reference to the drawings as appropriate.
(1) Preparation Step First, a laminate to be diced is prepared.
The stack includes a first substrate and a DAF. The laminate is adhered to a retaining sheet fixed to the frame. A laminate is obtained, for example, by adhering the first substrate to the DAF arranged on the holding sheet. The DAF is formed, for example, by applying the resin composition, which is the material of the DAF, to a predetermined position of the holding sheet. Alternatively, the DAF may be preformed into a predetermined shape and then placed at a predetermined position on the holding sheet.

FIG. 10 is a cross-sectional view schematically showing a laminate prepared by the preparation process according to this embodiment. The stack includes a first substrate 10 and a DAF 30. As shown in FIG. The laminate is adhered to a holding sheet 22 fixed to the frame.

(2) Protective Film Forming Step A protective film is formed on the first surface of the first substrate. A protective film is provided to protect the element region from plasma.
Although the thickness of the protective film is not particularly limited, it is preferable that the protective film is not completely removed in the substrate etching process and the resin etching process. The thickness of the protective film is set, for example, by calculating the amount (thickness) by which the protective film is etched in the substrate etching process and the resin etching process so as to be equal to or greater than this etching amount.

The protective film includes, for example, a so-called resist material such as a thermosetting resin such as polyimide, a photoresist such as phenol resin, or a water-soluble resist such as acrylic resin.

After the resist material is molded into a sheet, for example, this sheet is attached to the first surface of the substrate, or the raw material liquid of the resist material is applied to the first surface by using a method such as spin coating or spray coating. Apply to surface.

FIG. 11 is a cross-sectional view schematically showing the laminate after the protective film forming process according to this embodiment. A protective film 40 is formed on the first surface 10X of the first substrate 10 .

(3) Opening Forming Step An opening is formed in the protective film to expose the first substrate in the division region.
The openings are formed, for example, by removing regions corresponding to the division regions in a protective film made of photoresist by photolithography. In the protective film formed of thermosetting resin or water-soluble resist, regions corresponding to the division regions may be patterned by laser scribing to form openings.

In this step, the semiconductor layer may be exposed by removing the second insulating film or the like arranged in the divided region. That is, in this step, the wiring layer may be separated into a plurality of layers according to the element regions. Separation of the wiring layer is performed by, for example, laser scribing, mechanical dicing, plasma etching, or the like. Note that the separation of the wiring layers may be performed in the preparation process for preparing the laminate. Separation of the wiring layer by plasma etching may be performed in the substrate etching process described later. In this case, the conditions for generating the plasma for removing the wiring layer may be different from the conditions for generating the first plasma. For example, after removing the wiring layer with plasma using a process gas containing Ar as a raw material, the semiconductor layer is etched by switching to conditions for performing the Bosch method and generating the first plasma.

FIG. 12 is a cross-sectional view schematically showing the substrate after the opening forming process according to this embodiment. The protective film 40 and the wiring layer 12 in the divided region 102 are removed, and the semiconductor layer 11 is exposed through the opening.

(4) Substrate Etching Step The first substrate exposed from the opening is exposed to the first plasma to etch the first substrate.
By exposing the opening formed in the previous step to the first plasma, the first substrate is etched in the dividing region and the first substrate is divided. The DAF does not have to be etched in this step.

FIG. 13 is a cross-sectional view schematically showing the laminate after the substrate etching step according to this embodiment. The semiconductor layer 11 in the division region 102 is removed and the DAF 30 is exposed through the opening.

The conditions for generating the first plasma are set according to the material of the semiconductor layer and the like. The semiconductor layer is plasma etched, for example by the Bosch process. In the Bosch process, semiconductor layers are etched perpendicular to the depth direction. When the semiconductor layer contains Si, the Bosch process digs into the semiconductor layer in the depth direction by sequentially repeating a deposition step, a deposited film etching step, and a Si etching step.

In the deposition step, for example, while supplying C ₄ F ₈ as a process gas at 150 sccm to 500 sccm, the pressure in the vacuum chamber is adjusted to 15 Pa to 25 Pa, and the input power from the first high frequency power supply to the first electrode is increased. The treatment is carried out under the conditions of 1500 W to 5000 W, 0 W to 50 W of input power from the second high-frequency power source to the second electrode, and 2 to 15 seconds of processing time.

In the deposited film etching step, for example, while supplying SF ₆ as a process gas at 20 sccm0 to 800 sccm, the pressure in the vacuum chamber is adjusted to 5 Pa to 15 Pa, and the input power from the first high frequency power supply to the first electrode is reduced. The treatment is performed under the conditions of 1500 W to 5000 W, 300 W to 1000 W of input power from the second high-frequency power source to the second electrode, and 2 to 10 seconds of processing.

In the Si etching step, for example, while supplying SF ₆ as a process gas at 200 sccm to 800 sccm, the pressure in the vacuum chamber is adjusted to 5 Pa to 25 Pa, and the input power from the first high frequency power supply to the first electrode is 1500 W. 5000 W, the input power from the second high-frequency power supply to the second electrode is 50 W to 500 W, and the treatment is performed for 5 to 20 seconds.

By repeating the deposition step, the deposited film etching step, and the Si etching step under the above conditions, the semiconductor layer containing Si is etched perpendicularly to the depth direction at a rate of 10 μm/minute to 20 μm/minute. obtain.

(5) Resin Etching Step By removing the first substrate, grooves are formed in the laminate. The DAF (resin layer) is exposed from the bottom of the groove. By exposing the exposed DAF to a second plasma, the DAF is etched to produce device chips with the DAF. The element chips are obtained while being held by the holding sheet.

FIG. 14 is a cross-sectional view schematically showing the laminate (element chip) after the resin etching process according to this embodiment. A plurality of element chips 200 are formed by removing the DAF 30 in the divided area 102 .

The plasma processing apparatus used in the substrate etching process and the resin etching process may be the same or different. Both etching steps may be performed sequentially if the same plasma processing apparatus is used.

A second plasma is generated by a process gas containing carbon oxide gas. As a result, carbon derived from carbon ions and radicals adheres to the first surface side surface of the protective film. As a result, the etching rate of the protective film is lowered compared to the case without carbon.

On the other hand, almost no carbon ions or radicals can reach the DAF exposed from the bottom of the groove formed by the substrate etching process, and the surface of the DAF (that is, the bottom of the groove) and the side surface of the groove are covered with the protective film. Only a small amount of carbon is deposited than is deposited. Carbon adhering to the surface of the DAF is removed together with the DAF in this step. On the other hand, the carbon deposited on the side surfaces of the grooves is not removed during the resin etching process due to the nature of plasma etching. This suppresses side etching during the resin etching process. The carbon adhering to the side surfaces of the groove may remain after the resin etching step.

The process gas further includes a fluorine-containing gas. This enhances the effect of removing DAF.
Specifically, for example, a mixed gas of CO ₂ , O ₂ and SF ₆ as a process gas is supplied to the vacuum chamber at 20 sccm or more and 1000 sccm or less. At this time, the ratio of CO ₂ to the entire mixed gas may be 20% by volume or more and 80% by volume or less. The ratio of O ₂ to the entire mixed gas may be 20% by volume or more and 80% by volume or less. The ratio of SF ₆ to the entire mixed gas may be 10% by volume or more and 50% by volume or less.

Other conditions for generating the second plasma are appropriately set according to the thickness and composition of the DAF.
For example, the pressure in the vacuum chamber may be 0.4 Pa or more and 20 Pa or less. The power supplied from the first high-frequency power supply to the first electrode may be 200 W or more and 4800 W or less. Furthermore, high frequency power of 50 W or more and 1000 W or less may be applied to the second electrode to apply a bias voltage to the stage on which the first substrate is placed.

A lower stage temperature is desirable. For example, the surface temperature of the stage is preferably 15° C. or lower, more preferably 0° C. or lower. By lowering the temperature of the first substrate by lowering the temperature of the stage, carbon tends to adhere to the sidewalls of the grooves, and the etching rate of the resin layer with respect to the etching rate of the protective film (resin layer selectivity) can be increased. can.

After the laminate is singulated, ashing may be performed in a plasma processing apparatus. As a result, the protective film and carbon adhering to the side surfaces of the grooves are removed.

For ashing, for example, a mixed gas of CF ₄ and O ₂ (flow rate ratio CF ₄ :O ₂ =1:10) is supplied as an ashing gas at 150 sccm to 300 sccm while adjusting the pressure in the vacuum chamber to 5 Pa to 15 Pa. Then, the power applied from the first high frequency power source to the first electrode is 1500 W to 5000 W, and the power applied from the second high frequency power source to the second electrode is 0 W to 300 W. The power applied to the second electrode in the ashing process is preferably set to be smaller than the power applied to the second electrode in the plasma dicing process.

If the protective film is water-soluble, the protective film may be removed by washing with water instead of ashing.

After the plasma dicing process, the element chips are removed from the holding sheet.
For example, the element chip is pushed up together with the holding sheet from the non-adhesive side of the holding sheet with a push-up pin. As a result, at least part of the element chip is lifted from the holding sheet. After that, the pick-up device removes the element chip from the holding sheet.

[Second embodiment]
A manufacturing method corresponding to the flow shown in FIG. 4 will be described below with reference to the drawings as appropriate.
This embodiment is the same as the first embodiment except that the target of etching in the resin etching step is the adhesive layer.

(1) Preparing Step The preparing step includes bonding the first substrate to the second substrate via the adhesive layer. The adhesive layer is formed, for example, by applying an adhesive, which is the material of the adhesive layer, to a predetermined position on the second substrate.
The steps after the protective film forming step are performed in the same manner as in the first embodiment except that the DAF is replaced with an adhesive layer.

FIG. 15 is a cross-sectional view schematically showing a laminate prepared by the preparation process according to this embodiment. The first substrate 10 is adhered to the second substrate 70 via the adhesive layer 80 .

According to the element chip manufacturing method of the present invention, since desired plasma dicing is performed, the method is useful as a method for manufacturing element chips from various laminates including a resin layer and a substrate.

10: First Substrate 10X: First Surface 10Y: Second Surface 101: Element Region 102: Division Region 11: Semiconductor Layer 12: Wiring Layer 14: Second Insulating Film 20: Transport Carrier 21: Frame 21a: Notch 21b: Corner cut 22: Holding sheet 22X: Adhesive surface 22Y: Non-adhesive surface 30: Die attach film (DAF)
40: Protective film 50: Carbon 70: Second substrate 80: Adhesive layer 100: Plasma processing apparatus 103: Vacuum chamber 103a: Gas introduction port 103b: Exhaust port 108: Dielectric member 109: First electrode 110A: First high-frequency power supply 110B: second high-frequency power supply 111: stage 112: process gas source 113: ashing gas source 114: decompression mechanism 115: electrode layer 116: metal layer 117: base 118: outer peripheral portion 119: ESC electrode 120: third 2 Electrodes 121: Lifting Rod 122: Support Part 123A: First Lifting Mechanism 123B: Second Lifting Mechanism 124: Cover 124W: Window 125: Refrigerant Circulation Device 126: DC Power Supply 127: Refrigerant Flow Path 128: Control Device 129: Peripheral ring 200: Element chip

Claims (3)

a first substrate having a first surface and a second surface opposite to the first surface; A preparation step of preparing a laminate comprising a resin layer arranged in
a protective film forming step of covering the first surface with a protective film;
an opening forming step of removing at least the protective film in the divided region to form an opening;
a substrate etching step of exposing the first substrate exposed from the opening to a first plasma to etch the first substrate;
After the substrate etching step, the resin layer exposed at the bottom of the groove formed by etching the first substrate is exposed to a second plasma to etch the resin layer,
In the laminated body subjected to the resin etching step, the height from the second surface to the outer surface of the protective film in the element region is at least twice the width of the groove,
The second plasma is generated by a process gas containing a carbon oxide gas , a fluorine-containing gas, and an oxygen gas ,
A method for manufacturing an element chip , wherein the carbon oxide gas accounts for 20% by volume or more of the process gas . The resin layer is a die attach film,
2. The method of manufacturing an element chip according to claim 1, wherein said preparing step includes a step of attaching said first substrate to a holding sheet fixed to a frame via said die attach film. The resin layer is an adhesive layer,
2. The method of manufacturing an element chip according to claim 1, wherein said preparing step includes a step of adhering said first substrate to a second substrate via said adhesive layer.

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