JP7264037B2 - power conversion system - Google Patents

Description

TECHNICAL FIELD The present invention relates to a power conversion system, and more particularly to a technique for outputting an AC voltage having a desired frequency and amplitude to a load via a power converter such as an inverter.

For example, a power conversion system that converts an input three-phase AC voltage into a DC voltage with a rectifier (AC-DC converter) and outputs the DC voltage as an AC voltage with a desired frequency and amplitude from a power conversion unit is being studied. It has been.

In such a power conversion system, a PWM (Pulse Width Modulation) method that averagely expresses a target voltage in one cycle of a carrier signal may be applied to the output of a power conversion unit (for example, a power converter such as an inverter). many. Of these PWM methods, the one in which the frequency of the carrier signal (triangular wave carrier, etc.) is asynchronous with the output frequency (hereinafter simply referred to as the asynchronous PWM method) can keep the switching frequency constant and is stable even in the low frequency region. It is said to have the advantage of being easy to control.

In addition, modulation methods other than the asynchronous PWM method may be applied with the goal of optimizing the output voltage, and one example is the fixed pulse pattern method. In this fixed pulse pattern method, an optimum pulse pattern for an evaluation index is preliminarily derived and tabulated, and switching is performed in synchronization with the voltage phase according to the table.

The fixed pulse pattern system is said to be able to reduce the number of switching times without increasing harmonics. However, since the switching timing is controlled by considering only the voltage phase, for example, when used at a low frequency, the interval between switching is too wide, and sufficient control stability cannot be obtained. There is a risk. In addition, the stability may decrease at low modulation ratios where the pulse becomes thin. In either case, there is a possibility that controllability can be improved by outputting a large number of extremely small pulses in one cycle of the fundamental wave. It becomes difficult to derive a reasonable solution, and the table size for storing the pulse pattern information may become large.

For this reason, a configuration in which the two modulation methods are appropriately switched and applied, that is, in the case of, for example, a low frequency or a low modulation rate, an asynchronous PWM method using triangular wave comparison is applied, and in other cases, a fixed pulse pattern Consideration has begun to be given to a switching configuration to which the method is applied.

Under such a switching configuration, a pulse modulation method (asynchronous PWM method) is applied based on a desired switching frequency or switching modulation rate (hereinafter collectively referred to simply as switching conditions) set appropriately in advance as a switching reference. , fixed pulse pattern system), and if a current shock occurs during the switching, there is a risk that the safety of driving will be impaired. Therefore, attempts have been made to appropriately switch the pulse modulation method using a switching configuration such as that shown in Patent Documents 1 and 2, for example.

Japanese Patent Laid-Open No. 2002-200000 discloses that a current impact is likely to occur if the switching frequency changes significantly before and after switching, and that switching design is performed to avoid this. In the synchronous PWM method (corresponding to the fixed pulse pattern method) of Patent Document 1, the switching frequency is estimated from the number of pulses in the pulse pattern of each modulation rate and the frequency at which the pulse pattern is used. Therefore, in the synchronous PWM method of Patent Document 1, it is disclosed that the switching conditions are set so that the switching frequency is approximately the same as that of the asynchronous PWM method and the advantages of the synchronous PWM method are sufficiently obtained. .

Patent Literature 2 discloses switching in a voltage phase in which a current shock is less likely to occur. In addition, it is also disclosed that a current shock may occur due to a sudden change in the switching frequency before and after switching, so that the carrier signal frequency in the asynchronous PWM method is temporarily increased so that the switching frequencies are uniform before and after the switching. It is

JP 2017-204918 A JP-A-2017-5810

In the switching configurations as shown in Patent Documents 1 and 2, for example, when applied to a multi-level power converter (for example, a serial multiplex inverter in FIG. 1 which will be described later), the following problems are conceivable.

For example, before and after switching between the asynchronous PWM method and the fixed pulse pattern method, even if the phase voltage level is the same, there is a possibility that the specification of the voltage level of the cell of the multi-level power converter is not qualified (that is, the gate signal is not qualified). may not exist). If the voltage level specification is not appropriate, a large number of switching will be performed at the moment of the switching, which may lead to an increase in current impulse due to switching ripples and an increase in switching loss due to unnecessary switching. be.

For this reason, when switching between the asynchronous PWM method and the fixed pulse pattern method, it is desirable to specify the cell, that is, to manage all the output gate signals so as not to cause sudden changes in the gate signals. be

It can be said that this is a problem that applies not only to multi-level power converters, but also to all power converters that have a degree of freedom in designating gate signals for voltage outputs.

The present invention has been made in view of the technical problems as described above, and provides a technique for suppressing the occurrence of a current shock in a switching configuration and facilitating the output of a desired AC voltage to a load. to do.

A power conversion system according to the present invention can contribute to solving the above-described problems. One aspect of the power conversion system is that the voltage level for generating the gate signal of the power converter is determined by comparing the amplitudes of the voltage command and the carrier signal. It has a first modulation unit by an asynchronous PWM method for outputting a command, and a table storing a pulse pattern in which a voltage level command corresponding to a voltage phase is determined at each modulation rate, and inputs a modulation rate command and a control phase. Accordingly, switching is performed to output either a second modulating section based on a fixed pulse pattern system for outputting a voltage level command for generating the gate signal, or the voltage level commands of the first and second modulating sections. and a signal generating section for generating the gate signal based on the voltage level command input from the switching output section.

In the above aspect, a switching frequency and a switching modulation rate, which serve as references for switching the switching output section, are set in advance. It may be characterized in that it further comprises a switching determination unit that determines switching of the output unit, and the switching output unit outputs one of the voltage level commands based on the switching determination result of the switching determination unit. .

Further, when the frequency command exceeds the switching frequency and the modulation rate command exceeds the switching modulation rate, the switching determination section causes the switching output section to output the voltage level command of the second modulation section. and if the frequency command is equal to or less than the switching frequency or the modulation rate command is equal to or less than the switching modulation rate, the switching output section determines to output the voltage level command for the first modulation section. But it's okay.

Further, the switching frequency fc0, fc1 and the switching modulation rate dc0, dc1 are set so as to satisfy the following expression (1) in the switching determination unit, and based on the previous value of the switching determination result, the current switching output unit It is determined which of the first and second modulation sections is adopted, and if it is determined that the first modulation section is adopted in the current switching output section, the switching frequency fc0 and the switching modulation rate dc0 are determined. is applied, and when the frequency command exceeds the switching frequency fc0 and the modulation rate command exceeds the switching modulation rate dc0, the switching output unit determines to output the voltage level command of the second modulation unit If the frequency command is equal to or lower than the switching frequency fc0 or the modulation rate command is equal to or lower than the switching modulation rate dc0, the switching output section determines to output the voltage level command for the first modulation section, and the current switching output section , the switching frequency fc1 and the switching modulation rate dc1 are applied, the frequency command exceeds the switching frequency fc1, and the modulation rate command exceeds the switching modulation rate dc1. If it exceeds, the switching output unit determines to output the voltage level command of the second modulation unit, and if the frequency command is below the switching frequency fc1 or the modulation rate command is below the switching modulation rate dc1 , the switching output unit determines to output the voltage level command of the first modulating unit.

fc0 > fc1
dc0>dc1 (1)
Further, the switching frequency and the switching modulation rate of the switching determination section can be changed and set respectively. When the switching frequency fluctuates beyond an arbitrary frequency threshold, It may be characterized in that it varies in inverse proportion to the switching frequency, and is constant when the switching frequency varies below an arbitrary frequency threshold.

Further, the switching determination unit may be characterized by being set so as to satisfy the following formula (2).

_fcarrier =N·f (2)
In equation (2), f is the switching frequency, f _carrier is the carrier frequency of the carrier signal, and N is the number of pulses in one cycle of the fundamental wave near the switching boundary where the second modulation section switches to the first modulation section.

Also, the switching determination unit may be characterized by being set so as to satisfy the following formula (3).

θfp=θpwm+2πfref·t ₁ (3)
In equation (3), the phase of the voltage command in the first modulating section is θpwm, the control phase in the second modulating section is θfp, the frequency command is fref, and the output voltage of the second modulating section is used as a reference. Let t ₁ be the delay time of the output voltage of one modulation unit.

Moreover, t ₁ in the formula (3) may be characterized by satisfying the following formula (4).

Also, the power converter may be characterized by being a multi-level power converter with four or more levels.

As described above, according to the present invention, it is possible to suppress the occurrence of a current shock in the switching configuration and to easily output a desired AC voltage to the load.

FIG. 2 is a main circuit configuration diagram of a series multiple inverter showing an application example of the power conversion system according to the present embodiment; FIG. 2 is a control configuration diagram showing an example of a power conversion system 30; 4 is a flowchart showing a switching determination configuration of a switching determination unit 71 according to the first embodiment; FIG. 4 is a frequency-modulation factor characteristic diagram showing a switching design in the flowchart of FIG. 3; Simulation waveform diagrams when the device 10 is driven by applying the conventional configuration and the first embodiment to the power conversion system 30 (the waveform in (A) is the waveform when the conventional configuration is applied as a comparative example, and the waveform in (B) is when Example 1 is applied). 8 is a flowchart showing a switching determination configuration of a switching determination unit 71 according to the second embodiment; FIG. 7 is a frequency-modulation factor characteristic diagram showing a switching design in the flowchart of FIG. 6; FIG. 11 is a frequency-modulation factor characteristic diagram showing a switching design in the case of the switching determination configuration of the switching determination unit 71 according to the third embodiment;

The power conversion system of the embodiment of the present invention has a control configuration ( hereinafter simply referred to as a conventional configuration) is completely different.

That is, the power conversion system according to the present embodiment includes an asynchronous PWM modulation unit (hereinafter simply referred to as a first modulation unit) and a fixed pulse pattern modulation unit (hereinafter simply referred to as a second modulation unit). characterized by comprising a switching output section that is switched to output one of the voltage level commands, and a signal generating section that generates a gate signal based on the voltage level command input from the switching output section. and

In the output of the switching output unit, for example, the switching determination result of the switching determination unit in which the switching frequency and the switching modulation rate, which are the reference for switching of the switching output unit, are set in advance (for example, the frequency command and the modulation rate command are the switching frequency, It is possible to switch as appropriate based on the switching determination result obtained by comparison with the switching modulation rate.

In the case of a configuration different from this embodiment, for example, a conventional configuration, when applied to a converter such as the configuration of FIG. The gate signal can change abruptly, causing current shocks and unnecessary switching losses. In other words, in the conventional configuration, there is a possibility that a general power converter cannot cope with the problem as desired.

The original purpose of the modulation method is to adequately represent a continuous output voltage with a discrete output voltage. That is, the purposes of the asynchronous PWM method and the fixed pulse pattern method can be achieved by specifying the voltage level. Therefore, it can be seen that there is no particular problem even if the calculations of the asynchronous PWM method and the fixed pulse pattern method are performed separately from the designation of the gate signal.

On the other hand, in the power conversion system of this embodiment, only the voltage level is determined in the first and second modulation sections. In the subsequent stage of the switching output section, a signal generation section common to the first and second modulation sections (common to the asynchronous PWM method and the fixed pulse pattern method) generates a signal based on the voltage level of one of the first and second modulation sections. It is a configuration in which gate signal generation control can be executed by

Therefore, even if the asynchronous PWM method and the fixed pulse pattern method are switched in the preceding stage (upstream) of the gate signal generation control, it is possible to suppress unnecessary changes in the gate signal. That is, it is possible to suppress the occurrence of a current shock in the switching configuration, and to facilitate the output of a desired AC voltage to the load.

The power conversion system of the present embodiment is configured to be able to output either one of the voltage level commands by the asynchronous PWM method and the fixed pulse pattern method to the signal generation unit based on the switching determination result of the switching determination unit as described above. Appropriately apply technical common sense in various fields (for example, power conversion field, asynchronous PWM method field, fixed pulse pattern method field, motor field, etc.), and design by referring to prior art documents etc. as necessary Modifications are possible, an example of which is shown below.

In addition, in the explanation shown below, detailed explanation shall be appropriately omitted by, for example, applying the same reference numerals to overlapping contents.

<<Application example of the power conversion system according to the present embodiment>>
A device 10 in FIG. 1 shows a main circuit configuration of a series multiple inverter to which a power conversion system according to the present embodiment (a power conversion system 30 in FIG. 2 to be described later) can be applied. Note that the device 10 in FIG. 1 is an application example, and the power conversion system according to the present embodiment can be appropriately applied even to series multiple inverters having other configurations. Also, in FIG. 1, the number of cell stages of the serial multiple inverter is N [stages].

A device 10 shown in FIG. 1 mainly includes an input power supply 1 , a transformer 2 , and a power conversion section (series multiple inverter) 3 . In the power converter 3, N (N≧2) cells U ₁ to U _N , V ₁ to V _N , and W ₁ to W _N are connected in series for each phase.

Each of the cells U ₁ to U _N , V ₁ to V _N , and W ₁ to W _N includes a rectifier circuit 13 in which diodes are bridge-connected, a DC link section 14 having a capacitor C, and an inverter section in which switching elements are bridge-connected. 15 and .

The rectifier circuit 13 side of each cell U ₁ to U _N , V ₁ to V _N , and W ₁ to W _N is connected to the transformer 2, and the inverter 15 side is connected in series for each phase. Cells U ₁ , V ₁ and W ₁ of each phase are connected to each other. Also, the cells U _N , V _N , and W _N of each phase are connected to a load (motor, LR load, etc.) 4 . Note that, as shown in FIG. 1, the phase voltage of the U phase is _VU .

With the configuration as shown in FIG. 1, the phase voltage V _U obtained by multiplexing the cell outputs is applied to the load 4 . In this configuration, when V _U is set to +2 level, for example, two cells in the U phase are set to +1 level output and the others are set to 0 level output. In general, there is no restriction on how to select two cells. For example, U ₁ and U ₂ may be set to +1 level, and U ₁ and U ₃ may be set to +1 level.

<<Example of power conversion system control configuration>>
FIG. 2 shows an example of the control configuration of the power conversion system 30 according to the present embodiment. , current control, and information about the command voltage is output.

In the power conversion system 30, the upper controller 5 is involved in control existing upstream of the signal generator 8, which will be described later. In this host control unit 5, a command value (speed command, etc.) cmd given from an operation panel (not shown) and a detected current idet on the output side of the power conversion unit 3 are input, and predetermined speed control and current control are performed. , and outputs information about the command voltage to the first and second modulating sections 61 and 62 on the downstream side of the host control section 5 .

The first modulation section 61 is based on an asynchronous PWM method, and is configured to output a voltage level command for generating a gate signal for the power conversion section 3 by comparing the amplitudes of the command voltage and the carrier signal. . As a result, the first modulating section 61 requires a voltage command (three-phase voltage command Vuvw ^* in FIG. 2) for comparison with the carrier signal (triangular wave carrier signal in FIG. 2).

The second modulating section 62 is based on a fixed pulse pattern system, and has a table storing pulse patterns in which a voltage level command corresponding to a voltage phase is determined at each modulation factor. It is configured to output a voltage level command for generating the gate signal according to the input of the control phase. As a result, the second modulation section 62 requires a modulation rate command and a control phase.

Considering the first and second modulating sections 61 and 62 as described above, ^the host control section 5 of FIG. It has a configuration that can be output as An integrator 51 that integrates the frequency command fref is interposed between the host controller 5 and the second modulator 62 in FIG. As a result, the frequency command fref input to the integrator 51 is integrated to become the control phase θfp of the fixed pulse pattern, which is input to the second modulation section 62 .

The first modulation section 61 compares the triangular wave carrier signal and Vuvw ^* , which are not necessarily synchronized with the output voltage, and determines the voltage level command Lpwm by the asynchronous PWM method based on the magnitude relationship between the two.

The second modulating section 62 determines the voltage level command Lfp by the fixed pulse pattern method by referring to the table and comparing the table value and the control phase. It is assumed that the table to be used stores pre-created pulse pattern information, and that the output voltage level is determined according to the modulation rate and phase information.

Both the voltage level commands Lpwm and Lfp determined by the first and second modulating sections 61 and 62 are input to the switching output section 7 . The switching output unit 7 selects one of the input voltage level commands Lpwm and Lfp (that is, the asynchronous PWM method and the fixed pulse pattern method) based on the switching determination result Sel of the switching determination unit 71, which will be described later. One of the voltage level commands is selected), and the selected one is output to the signal generation unit 8 as the voltage level command L ^* .

The switching determination section 71 is preset with a switching frequency fc and a switching modulation rate dc that serve as references for switching the output of the switching output section 7 . The switching determination unit 71 compares the frequency command fref and the modulation rate command dref input from the host control unit 5 with the switching frequency fc and the switching rate modulation rate dc respectively, and the switching output unit 7 outputs each voltage level command Lpwm. , Lfp to be output as the voltage level command L ^* . Then, the switching determination result Sel based on the determination is output to the switching output unit 7 .

The signal generation unit 8 generates a gate signal g for driving the power conversion unit 3 based on the voltage level command L ^* input from the switching output unit 7 . Then, the power converter 3 is driven by the generated gate signal g, and a voltage corresponding to the gate signal g is applied to the load 4 .

The power conversion system 30 in FIG. 2 shows a typical system configuration example of power conversion using the asynchronous PWM method and the fixed pulse pattern method, and the application target of the present embodiment is not limited to this. . For example, a configuration using an asynchronous PWM method and a fixed pulse pattern method in converter control that regenerates the power source, a configuration that detects the motor phase and uses it for control, a single-phase configuration, and the like may be used.

What is important is that each modulation method (the first and second modulation units 61 and 62 in FIG. 2) performs commands up to the voltage level, and then appropriately selects and outputs one of the voltage level commands (see FIG. 2). In 2, a voltage level command L ^* is output from the switching output unit 7 based on the switching determination result Sel of the switching determination unit 71, and then the power conversion unit 3 is driven with a configuration capable of executing gate signal generation control. .

According to the control configuration such as the power conversion system 30 shown above, even if the output of the switching output unit 7 is switched (even if the asynchronous PWM method and the fixed pulse pattern method are switched), unnecessary changes in the gate signal g can be suppressed. As a result, it is possible to suppress current impulses in the switching configuration, and it becomes easier to output a desired AC voltage to the load 4, for example.

<<Basic concept of the power conversion system 30>>
The basic idea of the power conversion system 30 can be said to be the following [a] to [c]. That is, [a] the first and second modulating sections 61 and 62 perform determination of the voltage level commands Lpwm and Lfp, respectively; [b] which of the first and second modulating sections 61 and 62 is to be is determined based on the frequency command fref and the modulation rate command dref (determined by the switching determination unit 71 in FIG. 2); Controlling gate signal generation common to the units 61 and 62 can be mentioned.

The first and second modulation units 61 and 62 of [a] perform calculations of the asynchronous PWM method and the fixed pulse pattern method, respectively, and output the voltage level commands Lpwm and Lfp, respectively. ] may be set so that the operation of the one that is not selected out of the first and second modulation sections 61 and 62 is not performed based on the switching determination result of the switching determination section 71 . This makes it possible to omit unnecessary calculations.

Specific modulation methods of the first and second modulation units 61 and 62 and specific block configurations of the signal generation unit 8 are not described in detail, but are not particularly limited, and known configurations may be used as appropriate. It is possible to apply

In general, there is a control method in which a gate signal is directly obtained from an asynchronous PWM modulation unit. shall determine only the level of the phase voltages. For example, in the case of a modulating section in which the configuration of the asynchronous PWM method itself cannot be changed, the gate signal may be obtained and then converted into a voltage level command L ^* in consideration of the circuit configuration so that it can be applied.

In addition, in the switching determination configuration of the switching determination unit 71, a known configuration can be appropriately applied, and examples thereof include the following Examples 1 to 4.

<<Example 1>>
The fixed pulse pattern system tends to deteriorate control stability in a low modulation rate region where the pulse is thin and a low frequency region where the switching frequency is low. In order to deal with such a tendency, switching design should be performed so that the switching conditions are such that the region where the fixed pulse pattern method is unstable is controlled by the asynchronous PWM method.

Therefore, in the switching determination configuration of the first embodiment, the frequency command fref and the modulation rate command dref input to the switching determination unit 71 are compared with the switching frequency fc and the switching modulation rate dc by the calculation shown in the flowchart of FIG. A switching design was carried out so that the judgment could be made.

In FIG. 3, first, in a modulation rate determination step S1-1, it is determined whether or not the modulation rate command dref exceeds the switching modulation rate dc. However, if it is not exceeded, the process proceeds to the selection processing step S1-4.

In the frequency determination step S1-2, it is determined whether or not the frequency command fref exceeds the switching frequency fc. The process proceeds to processing step S1-4.

The selection processing step S1-3 derives the switching determination result Sel (for example, Sel=1 in the drawing) when the second modulation unit 62 is adopted (the fixed pulse pattern method is adopted). 7, the switching determination result Sel is output to the switching output unit 7 so that the voltage level command Lfp can be output as the voltage level command L ^* .

In the selection processing step S1-4, the switching determination result Sel (for example, Sel=0 in the drawing) when the first modulation unit 61 is adopted (adopting the asynchronous PWM method) is derived. 7, the switching determination result Sel is output to the switching output unit 7 so that the voltage level command Lpwm can be output as the voltage level command L ^* .

The timing of performing the calculation according to the flowchart of FIG. 3 does not necessarily have to be synchronized with the update of the voltage command or the calculation of the modulation method. For example, if the control phase θfp is referenced and calculation is performed only at a specific voltage phase such as 0 rad, it is considered that the current shock caused by the switching of the switching output section 7 can be easily avoided. Further, the calculation may be performed in synchronization with the updating of the voltage command, and the calculation result may be adopted when the voltage phase is a specific phase.

An important point of the flowchart of FIG. 3 is that the frequency command fref and the modulation rate command dref input to the switching determination unit 71 are compared with the switching frequency fc and the switching modulation rate dc, respectively, to perform switching determination. . The order and contents of steps S1-1 to S1-4 (for example, the types of inequality signs in the figure, etc.) may be changed as appropriate.

The switching design in the flow chart of FIG. 3 can be illustrated by the frequency-modulation rate characteristic diagram of FIG. In FIG. 4 , the area X drawn with left-down diagonal lines is the case where the first modulating section 61 is adopted, and the area Y drawn with blanks is the case where the second modulating section 62 is adopted.

As shown in FIG. 4, when switching is designed so that the switching conditions (switching frequency fc, switching modulation rate dc) are constant, the boundary of switching in the switching output unit 7 (the boundary where the asynchronous PWM method and the fixed pulse pattern method are switched) ; hereinafter simply referred to as a switching boundary) is like a linear boundary line L1. Then, according to the switching determination configuration of the first embodiment, the switching output section 7 is switched with reference to the boundary line L1.

Next, FIG. 5 shows simulation waveforms when the conventional configuration and the first embodiment are applied to the power conversion system 30 and the device 10 is driven. It is assumed that the power converter 3 of the device 10 has six stages of cells. Further, the waveform in FIG. 5A is the waveform when the conventional configuration is applied as a comparative example (when the gate signal g is switched), and the waveform in FIG. 5B is the waveform when the first embodiment is applied. is the waveform of In addition, FIG. 5 shows the phase voltage at the timing of switching from the second modulating section 62 to the first modulating section 61 (from the fixed pulse pattern method to the asynchronous PWM method) and the cell voltage before the phase is multiplexed. .

In both FIGS. 5A and 5B, it can be read that the transition of the phase voltage level is almost the same. However, in FIG. 5A when the conventional configuration is applied, since the gate signal g generated by each is switched, it can be read that many cells are switching at the switching timing. As a result, it can be seen that in the case of the conventional configuration, there is concern about an increase in current impact and switching loss.

On the other hand, in FIG. 5B when the first embodiment is applied, it can be read that unnecessary switching does not occur because the gate signal generation control is common.

Therefore, by applying the switching determination configuration as in the first embodiment described above to the power conversion system 30, switching control between the asynchronous PWM method and the fixed pulse pattern method can be performed without being influenced by the configuration of the power conversion unit 3. It turns out that it can be realized.

<<Example 2>>
The frequency command fref and modulation rate command dref of the first embodiment may be values near the switching boundary (near the boundary between regions X and Y in FIG. 4) in actual operation. In this case, for example, the switching of the switching output unit 7 (switching between the asynchronous PWM method and the fixed pulse pattern method) becomes frequent, which may cause a current shock or make each control in the power conversion system 30 unstable.

Therefore, in the switching determination configuration of the second embodiment, the switching design is performed by improving the first embodiment by appropriately adding a switching condition in consideration of the hysteresis. Specifically, the frequency command fref and the modulation rate command dref input to the switching determination unit 71 are compared with the switching frequencies fc0 and fc1 and the switching modulation rates dc0 and dc1, respectively, by the calculations shown in the flowchart of FIG. Switching design was performed so that judgment can be made based on It is assumed that the switching frequencies fc0 and fc1 and the switching modulation rates dc0 and dc1 satisfy the following equation (1).

fc0 > fc1
dc0>dc1 (1)
In FIG. 6, first, in the hysteresis determination step S2-1, the switching determination result Sel (previous value; switching status of the switching output unit 7) derived in the previous switching determination is determined, and the current switching output unit 7 is determined. The switching status (which one of the first and second modulation sections 61 and 62 is adopted) is determined.

In the hysteresis determination step S2-1, if it is determined that the current switching output unit 7 employs the first modulation unit 61, the process proceeds to the modulation factor determination step S2-2. If it is determined that the 2 modulation unit 62 is employed, the process proceeds to the modulation factor determination step S2-6.

In the modulation rate determination step S2-2, it is determined whether or not the modulation rate command dref exceeds the switching modulation rate dc0. If not, the process proceeds to selection processing step S2-5.

In the frequency determination step S2-3, it is determined whether or not the frequency command fref exceeds the switching frequency fc0. The process proceeds to processing step S2-5.

The selection processing steps S2-4 and S2-5 are the same as the selection processing steps S1-3 and S1-4 in FIG. 3, respectively, and detailed description thereof will be omitted.

In the modulation rate determination step S2-6, it is determined whether or not the modulation rate command dref exceeds the switching modulation rate dc1. If not, the process proceeds to selection processing step S2-9.

In the frequency determination step S2-7, it is determined whether or not the frequency command fref exceeds the switching frequency fc1. The process proceeds to processing step S2-9.

The selection processing steps S2-8 and S2-9 are the same as the selection processing steps S1-3 and S1-4 in FIG. 3, respectively, and detailed description thereof will be omitted.

As with FIG. 3, the timing of performing the calculation according to the flowchart of FIG. 6 does not necessarily have to be synchronized with the updating of the voltage command and the calculation of the modulation method. For example, if the control phase θfp is referenced and calculation is performed only at a specific voltage phase such as 0 rad, it is considered that the current impact due to the switching of the switching output section 7 can be easily avoided. Further, the calculation may be performed in synchronization with the updating of the voltage command, and the calculation result may be adopted when the voltage phase is a specific phase.

An important point of the flowchart of FIG. 6 is that the frequency command fref and the modulation rate command dref input to the switching determination unit 71 are changed to the switching frequency fc0 and the switching modulation based on the hysteresis determination result of the hysteresis determination step S2-1. The switching determination is made by comparing with the rate dc0, or by comparing the frequency command fref and the modulation rate command dref with the switching frequency fc1 and the switching modulation rate dc1, respectively. The order and contents of steps S2-1 to S2-9 (for example, the types of inequality signs in the figure) may be changed as appropriate.

The switching design in the flow chart of FIG. 6 can be illustrated by the frequency-modulation rate characteristic diagram of FIG. In FIG. 7, a region Z drawn with slanting lines downward to the right indicates a case where hysteresis is taken into account. In addition, in FIG. 7, a boundary line L1 is also depicted for comparison reference with the first embodiment.

As shown in FIG. 7, when switching is designed so that the switching conditions (switching frequencies fc0, fc1, switching modulation rates dc0, dc1) considering hysteresis are constant, the switching boundaries are two linear boundary lines L2a. , L2b. Then, according to the switching determination configuration of the second embodiment, one of the boundary lines L2a and L2b is selected based on the determination result of the hysteresis determination step S2-1, and the switching output unit 7 is selected based on the one. will switch.

By applying the switching determination configuration such as that of the second embodiment described above to the power conversion system 30, it is possible to achieve switching design in consideration of hysteresis in addition to the same effects as those of the first embodiment. Therefore, in each control in the power conversion system 30, it is possible to improve the stability near the switching boundary (for example, improve according to the difference between dc0 and dc1 and the difference between fc0 and fc1).

<<Example 3>>
In the switching determination configurations of the first and second embodiments, the switching conditions are constant and the switching boundaries (boundary lines L1, L2a, L2b) are linear. Even if the switching conditions change as appropriate, the switching can be designed so that the desired switching determination can be performed. Moreover, the switching design disclosed in Patent Documents 1 and 2 may be appropriately applied as necessary.

Therefore, in the switching determination configuration of the third embodiment, the first and second embodiments are improved so that the switching modulation factor d varies in a curvilinear manner according to the switching frequency f (in FIG. 8 described later, the switching condition is It was designed to switch so that it changes.

In the switching design of the third embodiment, the switching modulation rate d may simply vary in all frequency ranges, but the switching modulation rate d may be constant in some frequency ranges. and

As a specific example, as shown in FIG. 8, which will be described later, when the switching frequency f fluctuates in a low frequency region (in FIG. 8, which will be described later, the switching frequency f is equal to or lower than the frequency fc2), the switching modulation rate d is constant. switching design. Further, when the switching frequency f fluctuates beyond the low frequency region, the switching design may be such that the switching modulation factor d fluctuates in inverse proportion to the switching frequency f.

In the case of such a switching design, the advantages of the fixed pulse pattern system, such as reduction of low-frequency pulsation due to synchronous driving and reduction of harmonics, should be sufficiently obtained, and control stability should not be impaired. is mentioned.

Further, in the switching design of the third embodiment, in order to prevent the switching frequency from suddenly changing before and after switching of the switching output unit 7, the switching frequency before and after switching is set so as to satisfy the following equation (2). may be aligned. In the following equation (2), the switching frequency is f, the carrier frequency of the carrier signal is f _carrier , and the vicinity of the switching boundary where the second modulation section 62 switches to the first modulation section 61 (for example, region Y Let N be the number of pulses in one cycle of the fundamental wave near the boundary line L3 in .

_fcarrier =N·f (2)
A switching design that satisfies equation (2) makes it easier to suppress the current shock. It should be noted that the formula (2) need not be strictly satisfied, nor is it always necessary to be satisfied. For example, a switching frequency f that approximately satisfies the expression (2) may be applied, and switching design may be performed so that the switching modulation factor d varies in a curvilinear manner according to the switching frequency f. In addition, switching design may be performed by appropriately adjusting f _carrier or N so as to temporarily satisfy the expression (2).

The frequency-modulation rate characteristic diagram of FIG. 8 shows the switching design of the third embodiment. The switching boundary in FIG. 8 is linear in the region where the switching frequency f is equal to or lower than the frequency fc2, and is curved in the region where the switching frequency f exceeds the frequency fc2, like the boundary line L3 in the drawing. It's becoming Then, according to the switching determination configuration of the third embodiment, the switching output section 7 is switched based on the boundary line L3 as shown in FIG.

For example, when the frequency command fref input to the switching determination unit 71 is in the low frequency range, the second modulation unit 62 is adopted (Sel=1) even if the modulation rate command dref is a high modulation rate. As a result, the advantages of the fixed pulse pattern method can be easily obtained.

In addition, in the switching design of the third embodiment, when the switching design considering the hysteresis as shown in the second embodiment is combined, the switching boundary becomes like two boundary lines L3a and L3b in FIG. 8, for example. Then, one of the boundary lines L3a and L3b is selected based on the determination result of the hysteresis determination step S2-1 of the second embodiment, and the switching output unit 7 is switched based on the selected one. .

Therefore, by applying the switching determination configuration as in the third embodiment shown above to the power conversion system 30, in addition to the same effects as in the first and second embodiments, the advantages of the fixed pulse pattern method can be utilized. It can be seen that the current impact can be suppressed more easily.

<<Example 4>>
In the first to third embodiments, no particular restrictions are imposed on the voltage level commands Lpwm and Lfp output by the first and second modulating sections 61 and 62, respectively. However, if there is a voltage phase shift between the outputs of the first and second modulating sections 61 and 62, a large current shock may occur when the switching output section 7 is switched. preferable.

Here, in the asynchronous PWM method, for example, carrier-synchronous sampling and voltage command update are performed, and after the voltage command is updated, switching is performed once within a half carrier cycle by the intersection of the triangular wave carrier and the voltage command. It is considered suitable.

In addition, in the fixed pulse pattern method, for example, it is necessary to perform switching at the timing when the control phase exceeds the table phase. It is said that a configuration that can change the voltage level command instantaneously is preferable.

Based on this tendency, in the switching determination configuration of Example 4, Examples 1 to 3 were improved, and switching design was performed so as to satisfy the following formula (3). In the following equation (3), the phase of the voltage command (the phase of Vuvw ^* ) in the first modulating section 61 is θpwm, the control phase in the second modulating section 62 is θfp, and the output voltage of the second modulating section 62 is the reference. Let t ₁ be the delay time of the output voltage of the first modulation unit 61 when .

θfp=θpwm+2πfref·t ₁ (3)
For example, in the case of the frequency command fref, if the relationship satisfies Equation (3), the voltage phases of the outputs of the first and second modulating sections 61 and 62 are the same. When the first modulating section 61 updates the voltage command in carrier synchronization and the level changes instantaneously with respect to the phase change for which the second modulating section 62 performs high-speed integration, t ₁ in equation (3) is It becomes as shown in Formula (4).

By performing respective calculations of the first and second modulating sections 61 and 62 so as to maintain the relationships of formulas (3) and (4), it is possible to suppress the voltage phase shift at the time of switching of the switching output section 7 and reduce the current impact. Suppressed switching control can be achieved. Note that the essence of the fourth embodiment is the expression (3), and the expression (4) may be corrected as appropriate so as to match the actual operational situation.

Therefore, by applying the switching determination configuration as in the fourth embodiment shown above to the power conversion system 30, in addition to the same effects as in the first to third embodiments, it becomes easier to suppress the current shock. I know.

Although the present invention has been described in detail only with respect to the specific examples described above, it is obvious to those skilled in the art that various modifications can be made within the scope of the technical idea of the present invention. It goes without saying that such changes and the like belong to the scope of claims.

DESCRIPTION OF SYMBOLS 1... Input power supply 2... Transformer 3... Power conversion part 30... Power conversion system 4... Load 5... Upper control part 51... Integrator 61... First modulation part (asynchronous PWM method)
62 Second modulation unit (fixed pulse pattern method)
7 Switch output unit 71 Switch determination unit 8 Signal generation unit

Claims (8)

a first modulating unit based on an asynchronous PWM method that outputs a voltage level command for generating a gate signal for the power conversion unit by comparing the amplitudes of the voltage command and the carrier signal;
A voltage level command for generating the gate signal according to the input of the modulation rate command and the control phase, having a table storing a pulse pattern in which a voltage level command corresponding to the voltage phase is determined for each modulation rate. A second modulation unit based on a fixed pulse pattern system that outputs
a switching output unit that is switched to output one of the voltage level commands of the first and second modulation units;
a signal generation unit that generates the gate signal based on the voltage level command input from the switching output unit;
A switching frequency and a switching modulation rate, which serve as references for switching the switching output section, are set in advance, and the switching determination of the switching output section is performed by comparing the frequency command and the modulation rate command with the switching frequency and the switching modulation rate, respectively. and a switching determination unit that performs
A power conversion system , wherein the switching output unit outputs one of the voltage level commands based on the switching determination result of the switching determination unit . The switching determination unit
If the frequency command exceeds the switching frequency and the modulation rate command exceeds the switching modulation rate, the switching output unit determines to output the voltage level command of the second modulation unit,
If the frequency command is equal to or less than the switching frequency or the modulation rate command is equal to or less than the switching modulation rate, the switching output unit determines to output the voltage level command of the first modulation unit;
The power conversion system according to claim 1 , characterized by: The switching determination unit
The switching frequencies fc0 and fc1 and the switching modulation rates dc0 and dc1 are set so as to satisfy the following formula (1),
determining which of the first and second modulation units is adopted in the current switching output unit based on the previous value of the switching determination result;
If it is determined that the current switching output unit adopts the first modulation unit,
applying a switching frequency fc0 and a switching modulation factor dc0,
If the frequency command exceeds the switching frequency fc0 and the modulation rate command exceeds the switching modulation rate dc0, the switching output unit determines to output the voltage level command of the second modulation unit,
when the frequency command is equal to or less than the switching frequency fc0 or the modulation rate command is equal to or less than the switching modulation rate dc0, the switching output unit determines to output the voltage level command of the first modulation unit;
If it is determined that the current switching output unit adopts the second modulation unit,
applying a switching frequency fc1 and a switching modulation factor dc1,
If the frequency command exceeds the switching frequency fc1 and the modulation rate command exceeds the switching modulation rate dc1, the switching output unit determines to output the voltage level command of the second modulation unit,
If the frequency command is equal to or less than the switching frequency fc1 or the modulation rate command is equal to or less than the switching modulation rate dc1, the switching output unit determines to output the voltage level command of the first modulation unit;
The power conversion system according to claim 1 , characterized by:
fc0 > fc1
dc0>dc1 (1) The switching frequency and the switching modulation rate of the switching determination unit can be varied and set,
The switching modulation factor is
if the switching frequency varies in excess of any frequency threshold, it varies inversely with the switching frequency;
constant if the switching frequency varies below an arbitrary frequency threshold,
The power conversion system according to any one of claims 1 to 3 , characterized in that: The power conversion system according to any one of claims 1 to 4 , wherein the switching determination unit is set so as to satisfy the following formula (2).
f _carrier =N·f (2)
In equation (2), f is the switching frequency, f _carrier is the carrier frequency of the carrier signal, and N is the number of pulses in one period of the fundamental wave near the switching boundary where the second modulation section switches to the first modulation section. 6. The power conversion system according to any one of claims 1 to 5 , wherein the switching determination unit is set so as to satisfy the following formula (3).
θfp=θpwm+2πfref·t ₁ (3)
In equation (3), the phase of the voltage command in the first modulating section is θpwm, the control phase in the second modulating section is θfp, the frequency command is fref, and the output voltage of the second modulating section is used as a reference. Let _t1 be the delay time of the output voltage of one modulation unit. 7. The power conversion system according to claim 6 , wherein _t1 in the formula (3) satisfies the following formula (4).

8. The power conversion system according to any one of claims 1 to 7 , wherein the power converter is a multi-level power converter having four or more levels.

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