JP7259450B2 - Three-phase rectifier and method for controlling three-phase rectifier - Google Patents

Description

The present invention relates to a three-phase rectifier and a method for controlling the three-phase rectifier.

Conventionally, three-phase AC power is input to a full-wave rectifier circuit via a switch circuit having switching elements, and while suppressing harmonics of the input current, the three-phase AC power is converted to DC power and output. A three-phase rectifier has been proposed (see Patent Document 1, for example).

Japanese Patent No. 4687824 JP 2014-168367 A

The conventional three-phase rectifier (hereinafter, also referred to as a three-phase rectifier basic circuit) is a step-down AC/DC power supply due to its operating principle. Specifically, for example, the DC voltage output from the three-phase rectifier basic circuit 1a shown in FIG. 13 described later is (3 ^1/2 )/ never exceed two. Here, the voltage value (maximum voltage value in principle) of "(3 ^1/2 )/2 of the peak value of the line voltage of the three-phase AC power" is tentatively called V3sw-max.
Therefore, when a DC voltage higher than the voltage value V3sw-max is required, it is necessary to provide a booster circuit such as a booster DC/DC converter at the output stage of the three-phase rectifier basic circuit 1a.

When a step-up DC/DC converter is provided at the output stage of the three-phase rectifier basic circuit 1a in this way, the step-up DC/DC converter increases costs and increases the size of the entire three-phase rectifier basic circuit 1a. This results in an increase in size and weight. In other words, a general booster circuit requires a coil and a capacitor, and in the case of a boost-type DC/DC converter provided in the three-phase rectifier basic circuit 1a, large components are required as the coil and the capacitor. Parts have a great influence.
The present invention has been made by focusing on a conventional unsolved problem, and is a three-phase rectifier that boosts the output of a full-wave rectifier circuit to obtain a desired output voltage. An object of the present invention is to provide a three-phase rectifier that can be made more compact and a method for manufacturing the three-phase rectifier.

In order to achieve the above object, according to one aspect of the present invention, there is provided a three-phase rectifier for converting three-phase AC power to DC power, the full-wave rectifier circuit for rectifying the three-phase AC power to DC power; A bidirectional switch circuit that turns on/off each phase input to a full-wave rectifier circuit of three-phase AC power, a switch control unit that controls the bidirectional switch circuit, and a switch unit that turns on/off at least a coil and a capacitor. and a step-up section for stepping up the output of the full-wave rectifier circuit, and a step-up control section for controlling the switch section. and a phase voltage detector for detecting the voltage of each phase of the three-phase AC power. , a switching pattern for each phase for turning on/off the bidirectional switch circuit is generated, switching of the bidirectional switch circuit is controlled by the generated switching pattern for the bidirectional switch circuit, and the boost control unit controls the switch unit. A switching pattern for on/off operation is generated, and switching of the switch is controlled by the generated switching pattern for the switch. A three-phase rectifier is provided in which the switching pattern for the directional switch circuit has a predetermined switching period, and the switching period of the switching pattern for the switch section is shorter than the switching period for the bidirectional switch circuit.

Further, according to another aspect of the present invention, a full-wave rectifier circuit that rectifies three-phase AC power into DC power, and a bidirectional switch that turns on/off input of each phase to the full-wave rectifier circuit for three-phase AC power. a switch circuit, wherein between the full-wave rectifier circuit and the load, in order from the full-wave rectifier circuit side, a switch part that operates on/off and a capacitor are connected in parallel with the load, and the full-wave rectifier circuit and the A control method for a three-phase rectifier in which a coil is connected in series between a switch section and a booster section that boosts the output of a full-wave rectifier circuit by turning the switch section on and off. and a filter mode in which the coil and the capacitor are operated as part of a filter unit that smoothes the output of the full-wave rectifier circuit by turning off the switch unit. to generate a switching pattern for each phase for turning on/off the bidirectional switch circuit based on the voltage of each phase of the three-phase AC power, and with the generated switching pattern for the bidirectional switch circuit The bidirectional switch circuit is turned on/off, a switching pattern for turning the switch part on/off is generated, and the switch part is turned on/off by the generated switching pattern for the switch part, Different from the switching pattern for the bidirectional switch circuit and the switching pattern for the switch section, the switching pattern for the bidirectional switch circuit has a predetermined switching period, and the switching period of the switching pattern for the switch section is the same as that of the bidirectional switch. A method for controlling a three-phase rectifier with a shorter than switching period for the circuit is provided.

According to one aspect of the present invention, there is provided a three-phase rectifier that can boost the output of a full-wave rectifier circuit without separately providing a coil and a capacitor for boosting, and that can achieve low cost and miniaturization. Obtainable.

1 is a schematic configuration diagram showing an example of a three-phase rectifier according to one embodiment of the present invention; FIG. FIG. 3 is a circuit diagram showing a configuration example of a switch for one phase of the bidirectional switch circuit; FIG. 4 is an explanatory diagram for explaining modes of a three-phase AC voltage; It is a circuit diagram which shows an example of a switch control part. 4A and 4B are examples of switching patterns of the bidirectional switch circuit in mode I and mode IV; 5 is an example of switching patterns of the bidirectional switch circuit in mode II and mode V; It is an example of the switching pattern of the bidirectional switch circuit in mode III and mode VI. 4 is a circuit diagram showing an example of a boost control unit; FIG. It is an example of the switching pattern of the switch part Q1. It is an example of the simulation result by the three-phase rectifier according to one embodiment of the present invention. It is an example of the simulation result by the three-phase rectifier for comparison. It is an example of the switching pattern for comparison of the switch part Q1 at the time of the simulation by the three-phase rectifier for comparison. It is a schematic block diagram which shows an example of a three-phase rectifier basic circuit. It is an example of the switching pattern of the bidirectional switch circuit in the three-phase rectifier basic circuit and the current Il flowing through the DC reactor L1. It is an example of the simulation result by a three-phase rectifier basic circuit. FIG. 4 is an explanatory diagram for explaining the operation of the three-phase rectifier according to one embodiment of the present invention; FIG. 4 is an explanatory diagram for explaining the operation of the three-phase rectifier according to one embodiment of the present invention; It is an example of each switching pattern and current Il in a three-phase rectifier for comparison. FIG. 4 is an explanatory diagram for explaining an appropriate switching pattern of the switch section Q1 in the three-phase rectifier according to one embodiment of the present invention; It is an example of the modification 1 of the switching pattern of the switch part Q1, and the electric current Il. It is a modification 2 of the switching pattern of the switch part Q1. It is an example of the simulation result by the three-phase rectifier according to the modified example 2 of the switching pattern of the switch part Q1. It is an example of the simulation result by the three-phase rectifier according to the modified example 2 of the switching pattern of the switch part Q1. It is an example of the simulation result by the three-phase rectifier according to the modified example 2 of the switching pattern of the switch part Q1. 1 is a schematic configuration diagram showing an example of a power supply circuit capable of suppressing harmonics of a three-phase AC current and increasing/decreasing an output; FIG.

Next, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic. Further, the embodiments shown below are examples of devices and methods for embodying the technical idea of the present invention. is not specific to Various modifications can be made to the technical idea of the present invention within the technical scope defined by the claims.
The three-phase rectifier according to one embodiment of the present invention is widely applied to various devices such as air conditioners, refrigerators, washing machines, cleaners, ventilation fans, motor drive devices used in these, inverter control devices for motor drive, etc. can do.

[Three-phase rectifier according to the present invention]
A three-phase rectifier according to one embodiment of the present invention includes a reactor and a capacitor that constitute a filter section for converting (smoothing) the output of a bridge diode as a full-wave rectifier circuit into a DC/DC converter. The number of reactors and capacitors is reduced, thereby reducing cost, size and weight.

In particular, in the three-phase rectifier according to one embodiment of the present invention, the output of the bridge diode is not converted to direct current, but is boosted by a booster formed by a boost DC/DC converter or the like. That is, in general, DC input is assumed when boosting is performed by a boosting unit formed by a boosting DC/DC converter. On the other hand, the applicant has proposed that even if the output of the bridge diode is not converted to direct current and is directly input to the booster section, the harmonics of the input current can be suppressed by devising the configuration of the booster section and its control method. As a result, we realized a three-phase rectifier that does not have a circuit dedicated to direct current (smoothing), which can boost the output of the bridge diode while suppressing the harmonics of the input current.

[Configuration of three-phase rectifier 1]
FIG. 1 is a configuration diagram showing an example of a three-phase rectifier 1 according to one embodiment of the present invention. The three-phase rectifier 1 converts the output of a three-phase AC power supply 2 that generates three-phase AC power of R, S, and T into DC power and supplies it to a load 3 .
The three-phase rectifier 1 includes an input reactor 11, an input capacitor 12, a bridge diode 13 as a full-wave rectifier circuit, a bidirectional switch circuit 14 that turns on/off the input to each phase of the bridge diode 13, and a diode 15. , and a boosting unit 16 . Furthermore, the three-phase rectifier 1 includes a switch control section 17 that controls the bidirectional switch circuit 14 and a boost control section 18 that controls the boost section 16 .

The input reactor 11 has three reactors Lir, Lis, and Lit corresponding to the R-phase, S-phase, and T-phase, respectively. , and T-phase wires Mr, Ms, and Mt, respectively.
The input capacitor 12 has three capacitors Cir, Cis, and Cit, and one end of each of these capacitors Cir, Cis, and Cit is connected to the electric wires Mr to Mt closer to the load 3 than the input reactor 11, and the capacitors Cir, The other ends of Cis and Cit are connected to each other.

The bridge diode 13 is formed by connecting two diodes connected in series three in parallel, and electric wires Mr to Mt are connected to respective connection points of the two diodes. The bridge diode 13 rectifies the input AC voltage and outputs the rectified voltage as a line-to-line voltage between the high voltage side line DCH and the low voltage side line DCL. A load 3 is connected between the lines DCH and DCL.
The bidirectional switch circuit 14 has three switches SWr, SWs, and SWt, and these switches SWr, SWs, and SWt are interposed between the capacitors Cir to Cit and the bridge diode 13 of the wires Mr to Mt, respectively. .

FIG. 2 is an example of a circuit diagram showing the configuration of one phase switch of the bidirectional switch circuit 14. As shown in FIG. The bidirectional switch circuit 14 shown in FIG. 2 can apply a known circuit composed of switching elements such as diodes and IGBTs (Insulated Gate Bipolar Transistors). The bidirectional switch circuit 14 is not limited to the circuit shown in FIG. 2, and any circuit having the same functional configuration as the bidirectional switch circuit 14 shown in FIG. 2 can be applied.
Returning to FIG. 1, the diode 15 is a return current diode and is connected in parallel with the bridge diode 13 between the two lines DCH and DCL on the DC voltage output side of the bridge diode 13 .

As shown in FIG. 1, the boosting unit 16 includes a DC reactor L1 inserted in the line DCH and a diode D1. Diode D1 is interposed between DC reactor L1 and load 3 on line DCH. The boosting section 16 further includes a switch section Q1 and a capacitor C1 formed of switching elements such as transistors. The switch part Q1 is connected in parallel with the load 3 between the DC reactor L1 and the diode D1, and the capacitor C1 is connected in parallel with the load 3 between the diode D1 and the load 3. A DC reactor (coil) L1 and a capacitor C1 operate as a filter section for smoothing the output of the bridge diode 13 when the switch section Q1 is in the OFF state (filter mode). Further, the DC reactor L1 and the capacitor C1 operate as part of the booster circuit when the switch section Q1 is in the ON state (boost mode). That is, in the three-phase rectifier 1, the DC reactor L1 and the capacitor C1 are used both as a smoothing coil and capacitor for smoothing the output of the bridge diode 13 and as a boosting coil and capacitor. Therefore, the number of parts can be reduced, and the size and weight of the three-phase rectifier 1 can be further reduced.

The switch control section 17 includes a switching pattern generator 21 and a drive circuit 22 .
The switching pattern generator 21 operates the switches SWr to SWt of the bidirectional switch circuit 14 based on the detected voltages Vr, Vs, and Vt of each phase of the three-phase AC power supply 2 measured by a phase voltage detector such as a voltmeter (not shown). A switching pattern for a bidirectional switch circuit is generated for controlling switching of the . The switching pattern generator 21 generates switching patterns (R-phase pulse, S-phase pulse, T-phase pulse) for the bidirectional switch circuit so as to suppress pulsation of the DC voltage and harmonics of the input current. The switching pattern generator 21 turns on the switches SWs and SWt and turns off SWr during one switching cycle (hereinafter also referred to as a three-phase SW cycle) T of the switches SWr to SWt of the bidirectional switch circuit 14. A switching pattern is generated that includes Dst, a section Drt in which the switches SWr and SWt are turned on and SWs is turned off, and a section Drs in which the switches SWr and SWs are turned on and SWt is turned off.

The switching pattern generator 21 receives the R-phase, S-phase, and T-phase voltages of the three-phase AC power supply 2 at the timing of the rise of the three-phase SW cycle T, etc., and the magnitude of each phase shown in FIG. Which of mode I to mode VI is specified according to the relationship.
Then, the switching pattern generator 21 generates a switching pattern (R-phase pulse, S-phase pulse, T-phase pulse) that provides an interval Dst, an interval Drt, and an interval Drs in the three-phase SW cycle T according to the identified mode. is repeated as long as it is in the same mode.
In other words, the switching pattern generator 21 generates, for each mode, mode I to mode VI, which are six sections in which one switching cycle of the phase voltage is divided according to the magnitude relationship of the voltage of each phase in the three-phase AC power. , the switching pattern of the bidirectional switch circuit 14 is generated.
The three-phase SW period T is variable within a predetermined range around a predetermined period (eg, 1/20 kHz=50 μsec) which is sufficiently short with respect to the power supply frequency (eg, 50 Hz).

FIG. 4 is a circuit diagram showing an example of the switch control section 17. As shown in FIG. Note that the switch control unit 17 is not limited to the configuration shown in FIG. As the switch control unit 17, for each mode, a switching pattern capable of providing a predetermined interval Dst to Drs in the three-phase SW cycle T can be generated. circuit can be applied.
As shown in FIG. 4, the switching pattern generator 21 includes a phase voltage discriminator 21a and a pattern generator 21b.

The phase voltage discriminator 21a calculates an R-phase voltage normalized signal a, an S-phase voltage normalized signal b, and a T-phase voltage normalized signal c in which the peak value of the input phase voltage is normalized to "1". Further, the phase voltage determination unit 21a determines the magnitude relationship of each phase voltage based on the voltage normalized signals a to c of the R phase to T phase, and based on this, the R phase to T phase, which indicates that it is an intermediate potential phase. middle potential phase pulses aMID, bMID and cMID.
The pattern generation unit 21b receives R-phase to T-phase voltage normalized signals a to c, sawtooth waves SAW1 and SAW2, and R-phase to T-phase intermediate potential phase pulses aMID to cMID. , to generate a switching pattern (R-phase pulse, S-phase pulse, T-phase pulse) for rectifying the AC output of the three-phase AC power supply 2 . The basic operation of this pattern generator 21b is equivalent to the operation of the switching pattern generator described in Patent Document 1, for example.

5 to 7 show examples of switching patterns in each mode. In each mode shown in FIG. 3, the switching pattern generated by the pattern generator 21b is the same between mode I and mode IV, mode II and mode V, and mode III and mode VI.
5 to 7, the R-phase control signal |R| is the absolute value of the R-phase voltage normalized signal a of the R-phase detection voltage Vr. The S-phase control signal |S| is the S-phase voltage normalized signal b of the S-phase detected voltage Vs. The T-phase control signal |T| is the T-phase voltage normalized signal c of the T-phase detected voltage Vt.

FIG. 5 is an example of switching patterns in Mode I and Mode IV. In FIG. 5, (a) shows the relationship between the R-phase control signal |R| and the T-phase control signal |T|, and the R-phase sawtooth wave (SAW1) and the T-phase sawtooth wave (SAW2). represents (b) represents an R-phase pulse, an S-phase pulse, and a T-phase pulse.
When the current mode is identified as mode I, the pattern generator 21b sets the R-phase control signal |R|=R, the T-phase control signal |T|=-T, and sets the R-phase control signal |R| The switching pattern shown in FIG. 5B is generated from the magnitude relationship between the control signal |T| and the sawtooth waves SAW1 and SAW2.
On the other hand, if it is specified that the current mode is mode IV, the R-phase control signal |R|=-R, the T-phase control signal |T|=T, and the R-phase control signal |R| and T-phase control signal |T and the sawtooth waves SAW1 and SAW2, the switching pattern shown in FIG. 5B is generated.

6 is an example of switching patterns in Mode II and Mode V. FIG. In FIG. 6, (a) shows the relationship between the T-phase control signal |T|, the control signal |S|+|T|-1, and the T-phase sawtooth wave (SAW2). (b) represents an R-phase pulse, an S-phase pulse, and a T-phase pulse.
When the current mode is identified as mode II, the pattern generator 21b sets the T-phase control signal |T|=T, the control signal |S|+|T|-1=ST-1, and sets the T-phase control signal |T|=T. The switching pattern shown in FIG. 6B is generated from the magnitude relationship between the signal |T|=T, the control signal |S|+|T|-1=ST-1, and the sawtooth wave SAW2.
On the other hand, when specifying that the current mode is mode V, the T-phase control signal |T|=T, the control signal |S|+|T|-1=-S+T-1, and the T-phase control signal |T|= The switching pattern shown in FIG. 6B is generated from the magnitude relationship between T, the control signal |S|+|T|-1=-S+T-1, and the sawtooth wave SAW2.

FIG. 7 is an example of switching patterns in Mode III and Mode VI. In FIG. 7, (a) shows the relationship between the R-phase control signal |R|, the control signal |R|+|S|-1, and the R-phase sawtooth wave (SAW1). (b) represents an R-phase pulse, an S-phase pulse, and a T-phase pulse.
When the pattern generator 21b specifies that the current mode is mode III, the pattern generator 21b sets the R phase control signal |R|=-R and the control signal |R|+|S|-1=-R+S-1 to perform the R phase control. The switching pattern shown in FIG. 7B is generated from the magnitude relationship between the signal |R|=-R and the control signal |R|+|S|-1=-R+S-1 and the sawtooth wave SAW1.
On the other hand, if the current mode is specified as mode VI, the R phase control signal |R|=R, the control signal |R|+|S|-1=R−S−1, and the R phase control signal |R| =R, the control signal |R|+|S|-1=RS-1, and the sawtooth wave SAW1, the switching pattern shown in FIG. 7B is generated.

As shown in FIG. 5A, the sawtooth wave SAW1 is a carrier waveform that linearly decreases from "1" to "0" in the three-phase SW cycle T. The sawtooth wave SAW2 is a carrier waveform that linearly increases from "0" to "1" in the three-phase SW period T, as shown in FIG. 5(a).
That is, as described in detail in Patent Documents 1 and 2, the switch control section 17 suppresses the pulsation of the output voltage of the bridge diode 13 and the harmonics of the input current of the three-phase rectifier 1. One switching cycle of the phase voltage is divided into six sections, mode I to mode VI, according to the magnitude relationship of the voltages of each phase R to phase T in the phase AC power, and the output voltage of the bridge diode 13 in the switching cycle T A switching pattern is generated for each mode so that the average is constant and the average of the input current of each phase in the switching cycle T is proportional to the phase voltage of each corresponding phase.

Here, the case where the switching pattern generator 21 generates the switching pattern by inputting the phase voltages of the R-phase, S-phase, and T-phase of the three-phase AC power supply 2 has been described, but the switching pattern generator 21 is not limited to this. . For example, the current phase may be detected from predetermined two phase voltages of the three-phase AC power supply 2, and a switching pattern may be generated based on the detected phase.

Returning to FIG. 1 , the drive circuit 22 turns the bidirectional switch circuit 14 on and off based on the switching pattern generated by the switching pattern generator 21 . That is, based on the switching pattern (R-phase pulse, S-phase pulse, T-phase pulse) provided with the section Dst, the section Drt, and the section Drs output from the switching pattern generator 21, the switches SWr to SWt are controlled for switching. drive signals IGBTr, IGBTs, and IGBTt for Specifically, as shown in FIG. 4, the drive circuit 22 has a driver provided corresponding to each phase. , S_IGBT, and T_IGBT, respectively, and generates and outputs drive signals IGBTr, IGBTs, and IGBTt for driving the switches SWr to SWt.

The boost control unit 18 includes a switching pattern generator 31 and a drive circuit 32 .
A switching pattern generator 31 generates a switching pattern for the switch section for controlling switching of the switch section Q1. The switching pattern for the switch section is different from the switching pattern for the bidirectional switch circuit 14 for controlling switching of the switches SWr to SWt.

Specifically, the switching pattern generator 31 generates standardized voltage signals a to c of the R-phase to T-phase, which are obtained by standardizing the detected voltages Vr, Vs, and Vt of each phase of the three-phase AC power supply 2, and a sawtooth signal. Wave SAW2, R-phase to T-phase intermediate potential phase pulses aMID to cMID, and DC voltage Voo applied to both ends of load 3 are inputted, and based on these, AC output of three-phase AC power supply 2 is boosted. Generate a switching pattern. Further, the switching pattern generator 31 generates a switching pattern of the switch section Q1 so that the DC voltage Voo applied to the load 3 becomes the DC voltage target value Voo*. At this time, in each section Dst, section Drt, and section Drs, in the same type of section (sections Dst, section Drt, and section Drs) in the same mode, the switching unit switches for a period corresponding to the length of each section. Generate a switching pattern that turns on Q1. That is, during the same mode, the interval Dst provided for each three-phase SW cycle T, the period during which the switch Q1 is turned on is a period corresponding to the length of the interval Dst. Even in the section Drt and the section Drs provided for each phase SW cycle T, the period during which the switch section Q1 is turned on is a period corresponding to the length of the section Drt and the section Drs. Further, the switching pattern generator 31 turns on the switch Q1, for example, at the timing of switching between the sections Dst to Drs of each phase, and the ON period set at a rate corresponding to the length of the section of each phase has elapsed. After that, a switching pattern for turning off the switch part Q1 is generated.
The switching period of the switch Q1 is variable within a predetermined range around a predetermined period (eg, 1/20 kHz=50 μsec) which is sufficiently short with respect to the power supply frequency (eg, 50 Hz).

The switching pattern generator 31, as shown in FIG. 8, includes an amplification factor calculator 31a, a section signal generator 31b, and a pattern generator 31c. The amplification factor calculator 31a calculates the target amplification factor D of the booster 16 from the detected value Voo of the DC voltage applied across the load 3 and the preset target value Voo* of the DC voltage applied across the load 3. calculate. The section signal generation unit 31b generates section signals RS, ST, and TR that indicate in which section of the section Dst to section Drs the three-phase AC voltage is. The pattern generation unit 31c generates an R-phase voltage normalized signal a, an S-phase voltage normalized signal b, T, which are obtained by normalizing the detected voltages Vr, Vs, and Vt of the R-phase, S-phase, and T-phase of the three-phase AC power supply 2. absolute values |a|, |b|, |c| A switching pattern for turning on/off the switch section Q1 of the booster section 16 is generated based on ST and TR.

As shown in FIG. 8, the amplification factor calculation unit 31a has a detector 401 that detects a DC voltage Voo applied to the load 3, and converts the DC voltage Voo detected by the detector 401 into a target value Voo generated by a DC power supply 402. * An adder 403 for subtracting from a corresponding reference voltage VDC, a PI controller 404 for PI control based on the output of the adder 403, and a limiter circuit 405 for limiting the output of the PI controller 404 are provided. The output of the limiter circuit 405 is output as the amplification factor D.
As shown in FIG. 8, the interval signal generator 31b receives the switching patterns (R-T phase pulses) R_IGBT-T_IGBT generated by the pattern generator 21b, generates an S-phase pulse S_IGBT, a T-phase pulse T_IGBT, and an R-phase pulse. A logical sum of R_IGBT and T-phase pulse T_IGBT, and of R-phase pulse R_IGBT and S-phase pulse S_IGBT is calculated and output as ST pulse, RT pulse, and RS pulse.

The pattern generation unit 31c standardizes the detected voltage of each phase of the three-phase AC power supply 2, normalized voltage signals a to c of the R-phase to T-phase, a sawtooth wave SAW2, and an intermediate signal of the R-phase to T-phase. The potential phase pulses aMID to cMID, the amplification factor D calculated by the amplification factor calculator 31a, and the pulse signal representing the energized section generated by the section signal generator 31b are input, and based on these, the output of the bridge diode 13 is changed. Generate a switching pattern for smoothing and boosting.
For example, as shown in FIG. 8, the pattern generating unit 31c generates a switching pattern when the S phase is the intermediate potential phase and a switching pattern when the R phase is the intermediate potential phase. It includes a generator 312 and a generator 313 that generates a switching pattern when the T phase is the intermediate potential phase. Further, the pattern generator 31c inputs the switching patterns generated by the generators 311 to 313 and outputs the logical AND of these to the drive circuit 32 as the switching pattern for the switch Q1.

The generation unit 311 generates the absolute values |a| and |c| of the R-phase voltage normalized signal a and the T-phase voltage normalized signal c, the amplification factor D calculated by the amplification factor calculation part 31a, and the interval signal RS , ST, TR, the S-phase intermediate potential phase pulse bMID detected by the switching pattern generator 21, and the sawtooth wave SAW2. Generate a switching pattern to turn on and off. As a switching pattern in the mode in which the S phase is the intermediate potential phase, the generation unit 311 generates a pulse width proportional to the length of each period of each section Dst to Drs and proportional to the amplification factor D for each section Dst to section Drs. to generate a switching pattern with

The generation unit 312 generates the absolute values |b| and |c| of the S-phase voltage normalized signal b and the T-phase voltage normalized signal c, the amplification factor D calculated by the amplification factor calculation part 31a, and the interval signal RS , ST, TR, the R-phase intermediate potential phase pulse aMID detected by the switching pattern generator 21, and the sawtooth wave SAW2. Generate a switching pattern to turn on and off. As a switching pattern in the mode in which the R phase is the intermediate potential phase, the generation unit 312 generates a pulse width proportional to the length of each period of each section Dst to Drs and proportional to the amplification factor D for each section Dst to section Drs. to generate a switching pattern with

The generation unit 313 generates the absolute values |a| and |b| of the R-phase voltage normalized signal a and the S-phase voltage normalized signal b, the amplification factor D calculated by the amplification factor calculation part 31a, and the interval signal RS , ST, TR, the T-phase intermediate potential phase pulse cMID detected by the switching pattern generator 21, and the sawtooth wave SAW2, in the mode in which the T-phase becomes the intermediate potential phase, the switch Q1 is switched. Generate a switching pattern to turn on and off. As a switching pattern in the mode in which the T phase is the intermediate potential phase, the generation unit 313 generates a pulse width proportional to the length of each period of each section Dst to Drs and proportional to the amplification factor D for each section Dst to section Drs. to generate a switching pattern with
By calculating the logical product of the switching patterns generated by the generating units 311 to 313 by the OR circuit 314, as shown in FIG. A switching pattern is generated having a pulse width proportional to the length of each Drs.

Returning to FIG. 1, the drive circuit 32 turns the switch Q1 on and off based on the switching pattern generated by the pattern generator 31c. That is, based on the switching pattern generated by the pattern generator 31c, it outputs the drive signal IGBTpwm for controlling the switching of the switch Q1. Specifically, the drive circuit 32 has a driver as shown in FIG. 8, receives a pattern signal representing a switching pattern generated by the pattern generator 31c, and generates a drive signal IGBTpwm for controlling the switch Q1. output.

[Simulation result of three-phase rectifier 1]
FIG. 10 shows simulation results of the input current (FIG. 10(a)) and the output voltage (FIG. 10(b)) when the three-phase rectifier 1 is used for simulation.
Note that in the three-phase rectifier 1 shown in FIG. I did a simulation. Also, as the input reactor 11, a reactor of 0.5 mH in which reactors Lir to Lit are connected in parallel and a resistance of 220Ω are simulated. The input capacitor 12 was set to 10 μF, the DC reactor L1 was set to 0.5 mH, and the capacitor C1 was set to 500 μF. Also, the switching frequency of the switches SWr to SWt was set to 19.2 kHz. The switch part Q1 was driven by the switching pattern shown in FIG. 9(c). 9 shows an example of a switching pattern at point p1 of mode I shown in FIG. FIG. 9(a) shows the relationship between the R-phase control signal |R| and the T-phase control signal |T|, and the R-phase sawtooth wave (SAW1) and the T-phase sawtooth wave (SAW2). . (b) represents an R-phase pulse, an S-phase pulse, and a T-phase pulse. (c) is a switching pattern of the switch section Q1.
From FIG. 10, it can be seen that the output voltage Voo is boosted to the extent that it can be regarded as equivalent to the target value Voo* of the output voltage, and the input currents Ir to It with sufficiently suppressed harmonics are obtained. .

[Effect of three-phase rectifier 1]
Thus, the three-phase rectifier 1 according to one embodiment of the present invention uses both a smoothing coil and capacitor for smoothing the output of the bridge diode 13 and a boosting coil and capacitor. Therefore, it is possible to obtain the three-phase rectifier 1 that can be made more compact in terms of size and weight. Therefore, by applying the three-phase rectifier 1 to a motor drive device, a motor drive inverter control device, or the like, it is possible to reduce the size of the motor drive device, the motor drive inverter control device, or the like. and washing machine, etc.

Further, the three-phase rectifier 1 according to one embodiment of the present invention turns on the switch Q1 according to the length of the ON time in each section Dst, Drt, and Drs during the three-phase SW cycle T. is switching to Therefore, an input current with suppressed harmonics can be obtained.
As a result, it is possible to obtain a three-phase rectifier 1 that is not only smaller in size and weight, but also has a harmonic suppression function.
Here, in the three-phase rectifier 1 according to one embodiment of the present invention, "during the three-phase SW period T, the switch section Q1 is turned on for each section Dst, Drt, and Drs according to the length of the ON time of each section. The reason why the effect of suppressing the harmonics of the input current is obtained by "switching to the ON state" will be explained.
Here, the reason why the effect of suppressing harmonics of the input current is obtained will be described with reference to the three-phase rectifier for comparison and the three-phase rectifier basic circuit 1a.

(Configuration of three-phase rectifier for comparison)
The three-phase rectifier for comparison is a rectifier having the same device configuration as the three-phase rectifier 1 according to one embodiment of the present invention. That is, the difference between the three-phase rectifier for comparison and the three-phase rectifier 1 is that the switching pattern of the switch section Q1 is different. Specifically, the three-phase rectifier for comparison is designed such that the switching frequency of the switch section Q1 is set to 21.1 kHz, for example, and the switching operation is performed at a constant cycle. Hereinafter, the switching pattern of the switch section Q1 in the three-phase rectifier for comparison will be referred to as a switching pattern for comparison. In contrast to the comparative switching pattern used in the comparative three-phase rectifier, the switching pattern of the switch Q1 in the three-phase rectifier 1 according to the embodiment of the present invention shown in FIG. 9(c) is also called a proper switching pattern.
The control method of the bidirectional switch circuit 14 in the three-phase rectifier for comparison is the same as the control method of the bidirectional switch circuit 14 in the three-phase rectifier 1, and The bidirectional switch circuit 14 is turned on and off in accordance with the switching patterns shown in FIGS.

(Simulation result of three-phase rectifier for comparison)
FIG. 11 shows simulation results of the input currents Ir to It and the output voltage Voo in the simulation using the three-phase rectifier for comparison. Note that the switch Q1 has a switching frequency of 21.1 kHz, and as shown in FIG. 12, ON/OFF operation is performed with a comparison switching pattern in which the switch Q1 is switched ON at a constant cycle once every three-phase SW cycle T. let me The simulation conditions other than the switch part Q1 were the same conditions as when the three-phase rectifier 1 was used for the simulation. In FIG. 12, (a) is an example of the switching pattern of the bidirectional switch circuit 14, and (b) is an example of the switching pattern for comparison of the switch section Q1.

In this case, as shown in FIG. 11, an output voltage Voo (FIG. 11(b)) having a voltage value equivalent to the target voltage value Voo* can be obtained. However, it can be seen that the input currents Ir to It (FIG. 11(a)) contain harmonics.
Here, in the three-phase rectifier for comparison, the fact that the harmonics of the input currents Ir to It (Fig. 11(a)) cannot be suppressed means that the block that should be responsible for the harmonic suppression function of the three-phase rectifier for comparison That is, it can be inferred that the portion corresponding to the three-phase rectifier basic circuit 1a shown in FIG. 13 cannot sufficiently suppress harmonics. In other words, the desired operation cannot be obtained simply by realizing the three-phase rectifier 1 having the device configuration shown in FIG.
Therefore, by analyzing the basic operation of the block that should be responsible for the harmonic suppression function of the comparison three-phase rectifier, and examining the differences between this basic operation and the operation of the comparison three-phase rectifier, the comparison three-phase We investigated the factors that prevent the rectifier from suppressing harmonics sufficiently. The analysis of the basic operation of the block that should have the harmonic suppression function of the three-phase rectifier for comparison was performed using the three-phase rectifier basic circuit 1a shown in FIG.

(Configuration of three-phase rectifier basic circuit 1a)
As shown in FIG. 13, this three-phase rectifier basic circuit 1a does not perform boosting in the three-phase rectifier 1, and after smoothing the output of the bridge diode 13 by a filter unit including a DC reactor L1 and a capacitor C1, 3 is a three-phase rectifier.
The three-phase rectifier basic circuit 1a shown in FIG. 13, similarly to FIG. Switching of the switches SWr to SWt is controlled according to the pattern.
That is, the control method of the bidirectional switch circuit 14 in the three-phase rectifier basic circuit 1a is the same as the control method of the bidirectional switch circuit 14 in the three-phase rectifier 1, and the R phase, S phase, The bidirectional switch circuit 14 is turned on and off according to the switching patterns shown in FIGS.

Here, the control of the three-phase rectifier basic circuit 1a includes important factors other than determining the duty ratios of the switches SWr to SWt. That is, the switching control is performed on the assumption that the current Il flowing through the DC reactor L1 is constant. The value of this constant current Il is the same value as the output current Io of the three-phase rectifier basic circuit 1a. That is, on the assumption that the current Il is constant, the switching of the switches SWr to SWt is controlled in accordance with a switching pattern having a duty ratio determined by a predetermined method. harmonics can be suppressed.
However, the assumption that the current Il is constant does not strictly hold in the three-phase rectifier basic circuit 1a.

(Operation of three-phase rectifier basic circuit 1a)
FIG. 14 shows an example of the switching pattern of the bidirectional switch circuit 14 at point p1 in Mode I of FIG. 3 in the three-phase rectifier basic circuit 1a. In FIG. 14, (a) represents the relationship between the R-phase control signal |R| and the T-phase control signal |T|, and the sawtooth wave SAW1 for the R phase and the sawtooth wave SAW2 for the T phase. (b) represents an R-phase pulse, an S-phase pulse, and a T-phase pulse. (c) is an example of the current Il flowing through the DC reactor L1 in the three-phase rectifier basic circuit 1a.

When the switches SWr to SWt are controlled according to the switching pattern shown in FIG. 14(b), as shown in FIG. The current changes like a polygonal line with a slope that changes every time. At point p1 in FIG. 3, the R phase is the maximum voltage phase, the S phase is the intermediate voltage phase, and the T phase is the minimum voltage phase. Therefore, as shown in FIG. 14(c), strictly speaking, the average currents Ist, Irt, and Irs in the sections Dst, Drt, and Drs are different. First, in the section Dst, the current Il is slightly smaller than the ideal current Io*, which is a constant output current required by the assumption that "the current Il flowing through the DC reactor L1 is constant." This is because the current Il flows in the section Dst due to the potential difference between the intermediate voltage phase (S phase) and the minimum voltage phase (T phase). In the section Drt, the current Il flows due to the potential difference between the maximum voltage phase (R phase) and the minimum voltage phase (T phase), so the current value increases. As a result, the average current Irt in the section Drt is approximately equal to the ideal current Io*. In the section Drs, the current Il flows due to the potential difference between the maximum voltage phase (R phase) and the intermediate voltage phase (S phase), so the current value slightly decreases. However, partly because the initial current value Il in the section Drs is large, the average current Irs in the section Drs is slightly larger than the ideal current Io*.

Therefore, at point p1 in FIG. 3, the R-phase input current Ir obtained by using the sum of the average currents Irt and Irs is the "input current with suppressed harmonics" that the three-phase rectifier basic circuit 1a is trying to obtain. slightly larger than the current The reason is that the average current Irt is almost equal to the ideal current Io*, but the average current Irs is slightly larger than the ideal current Io*. For the same reason, at point p1 in FIG. 3, the S-phase input current Is is approximately equal to the "harmonic-suppressed input current", and the T-phase input current It is substantially equal to the "harmonic-suppressed input current". is also slightly smaller.

As a result of the error between the average currents Ist, Irt, and Irs and the ideal current Io*, the three-phase input currents Ir to It and the "input with suppressed harmonics" required for the three-phase SW rectifier It is unavoidable that the error with the current becomes large. However, the error between the three-phase input currents Ir to It and the "input current with suppressed harmonics" can be reduced by increasing the inductance value of the DC reactor L1 or by increasing the switching frequency of the switches SWr to SWt. can do. In addition, by adjusting the error between the three-phase input currents Ir to It and the "input current with suppressed harmonics" in this way, it is possible to reduce the error to a level that does not pose a problem in practice, that is, according to various harmonic regulation standards. can be obtained.

(Simulation result of three-phase rectifier basic circuit 1a)
A simulation result of the three-phase rectifier basic circuit 1a is shown in FIG. FIG. 15(a) shows the current Il flowing through the DC reactor L1, and FIG. 15(b) shows the three-phase input currents Ir to It. As shown in FIG. 15(a), the current Il includes the above-described polygonal line error, but the waveforms of the input currents Ir to It have harmonics suppressed as shown in FIG. 15(b). , and it can be seen that the circuit operation can be obtained to the extent that there is no practical problem. The simulation of the three-phase rectifier basic circuit 1a was performed with a three-phase input voltage of 400 V and 50 Hz, an output voltage target value Vo* of approximately DC 490 V, an output power of 9.6 kW, and a load resistance of 25 Ω as the load 3. rice field. Also, as the input reactor 11, a reactor of 0.5 mH in which reactors Lir to Lit are connected in parallel and a resistance of 220Ω are simulated. Also, the input capacitor 12 was set to 10 μF, the DC reactor L1 was set to 0.5 mH, and the capacitor C1 was set to 500 μF. Also, the switching frequency of the switches SWr to SWt was set to 19.2 kHz.

(Examination of the factor that the three-phase rectifier for comparison cannot suppress the harmonic component of the input current)
(Study on harmonic components of input current in three-phase rectifier basic circuit 1a)
In the three-phase rectifier basic circuit 1a, the error that occurs because the current Il flowing through the DC reactor L1 is a current that changes in a polygonal line shape as shown in FIG. It can be reduced by increasing it or increasing the switching frequency of the switches SWr to SWt.
Here, in the three-phase rectifier basic circuit 1a shown in FIG. 13, when the output voltage (non-DC voltage) of the bridge diode 13 is Vd, the excitation or demagnetization voltage Vl of the DC reactor L1 is given by the following equation (1) can be expressed as
Vl=Vd-Vo (1)

The output voltage Vd of the bridge diode 13 and the output voltage Vo of the three-phase rectifier basic circuit 1a can be expressed by the following equation (2). Vrs, Vst, and Vrt in equation (2) are the line voltage between RS, the line voltage between ST, and the line voltage between RT, respectively. V line peak is the peak value of the line voltage Vrs, Vst, or Vrt.
Vd = Vrs or Vst or Vrt = 0 or more and less than or equal to peak between V lines Vo = peak between V lines x (3 ^1/2 /2) (when not in step-down operation) (2)

In the three-phase rectifier basic circuit 1a, as shown in FIG. 16, if the amount of change in the current Il flowing through the DC reactor L1 during ΔT is ΔIl, the amount of change ΔIl can be expressed by the following equation (3). .DELTA.T indicates the interval Dst to the interval Drs, that is, the time during which the selected energized phase continues.
ΔIl=ΔT×(Vl/Il)
=ΔT×((Vd−Vo)/Il)
Vl>0: Current Il rises. DC reactor L1 is excited.
Vl<0: Current Il is falling. DC reactor L1 is demagnetized. ……(3)

From the equations (1) and (2), the maximum and minimum values of Vl in the three-phase rectifier basic circuit 1a can be expressed by the following equation (4).
Maximum value of Vl: V line peak × (1-(3 ^1/2 /2))
Minimum value of Vl: -(3 ^1/2/2 ) x peak between V lines
=-Vo (4)
The smaller ΔIl, the smaller the error between the three-phase input currents Ir to It and the ideal current Io* (input current with suppressed harmonics). In other words, the fact that ΔIl is small means that the current Il is nearly constant, so it can be intuitively understood that the error between the current Il and the ideal current Io* is small. .

Also, as can be seen from the equation (3), the amount of change ΔIl in the current Il is proportional to ΔT and Vl and inversely proportional to Il. Since ΔT represents the period during which the selected energized phase continues, ΔT becomes shorter as the switching speed of phase selection increases, that is, as the switching frequency of the switches SWr to SWt increases.
That is, if Il or the switching frequency of the switches SWr to SWt is increased, ΔIl will be reduced, and as a result, the error between the three-phase input currents Ir, Is, and It and the "input currents with suppressed harmonics" will be reduced. can be done.
Conversely, the greater the absolute value of Vl, the greater the effect of increasing ΔIl. If it is a negative value, Il decreases (generally, it is said that DC reactor L1 is demagnetized at this time).

(Study on harmonic components of input current in three-phase rectifier for comparison)
On the other hand, in the three-phase rectifier for comparison, that is, a three-phase rectifier having the same device configuration as the three-phase rectifier 1 shown in FIG. Then, the excitation or demagnetization voltage Vl of the DC reactor L1 can be expressed by the following equation (5).
Switch Q1 is ON: Vl=Vd (L1 is always excited and current Il rises)
Switch Q1 is off: Vl=Vd-Voo (L1 is magnetized or demagnetized.)
Vd=Vrs or Vst or Vrt=0 or more and less than or equal to peak between V lines Voo>Vo=peak between V lines×(3 ^1/2/2 ) (5)

In (5) and (7) described later, Vo is the output voltage during non-step-down operation in the three-phase rectifier basic circuit 1a shown in FIG.
In the three-phase rectifier for comparison, assuming that the amount of change in current Il flowing through DC reactor L1 during ΔT' is ΔIl as shown in FIG. 17, the amount of change ΔIl can be expressed by the following equation (6). .DELTA.T' indicates the interval Dst to interval Drs in the three-phase rectifier for comparison, that is, the time during which the selected energized phase continues.
ΔIl=ΔT′×(Vl/Il)
=ΔT′×((Vd−Voo)/Il) ……(6)

From the equations (5) and (6), the maximum and minimum values of Vl in the comparative three-phase rectifier can be expressed by the following equation (7).
Maximum value of Vl: peak between V lines
Minimum value of Vl: -Voo (<-Vo) (7)
Here, since the three-phase rectifier for comparison further includes the switch section Q1 in the three-phase rectifier basic circuit 1a, it is necessary to determine ΔIl according to the ON/OFF state of the switch section Q1. As will be described later, whether the switch Q1 is on or off greatly affects ΔIl, and the input current may be distorted if the on/off state of the switch Q1 is not properly controlled. Become. In other words, the input current harmonic suppression function required for the comparison three-phase rectifier is lost.

FIG. 18 shows an example of the current Il flowing through the DC reactor L1 in the three-phase rectifier for comparison. 18 shows an example of the switching pattern of the bidirectional switch circuit 14 (FIG. 18(a)) and an example of the switching pattern for comparison of the switch section Q1 (FIG. 18(b)) at point p1 of mode I shown in FIG. ) and the current Il (FIG. 18(c)) flowing through the DC reactor L1 at that time. FIG. 18(d) shows the mode shown in FIG. The current Il at point p1 of I is shown.
As shown in FIG. 18(c), the current Il in the three-phase rectifier for comparison is compared to the current Il in the three-phase rectifier basic circuit 1a (FIG. 18(d)) at the same point p1. It can be seen that the current Il immediately before turning on is smaller than the ideal current Io*, and the current Il after the switch Q1 is switched to the on state rises rapidly and exceeds the ideal current Io*. Therefore, in the three-phase rectifier for comparison, compared to the three-phase rectifier basic circuit 1a, the average current in the section Dst and the section Drs is larger than the ideal current Io*, which is originally ideal. It can be seen that the current is smaller than the ideal current Io*.

Incidentally, in the polygonal line representing the state of change of the current Il in the three-phase rectifier for comparison shown in FIG. ), the slope of each line segment is a6 to a8 as shown in FIG. 18(d). These slopes a1 to a8 can be expressed as shown in Table 1. In the three-phase rectifier for comparison, when the DC reactor L1 is excited, the excitation voltage is charged to the capacitor C1 even when the switch section Q1 is switched to the OFF state. Therefore, as shown in Table 1, the slope a1 of the current Il in the section Dst is the same as the slope a6 in the section Dst of the three-phase rectifier basic circuit 1a, but the current Il is larger than the ideal current Io*. In addition, since the output voltage Voo of the three-phase rectifier for comparison is higher than the output voltage Vd of the bridge diode 13, even if Vd<Vrt, Voo>Vrt. Therefore, the slope a2 can take a negative value. Then, when the switch portion Q1 is turned on, the DC reactor L1 is excited, so that the slopes a3 and a4 take positive values.

Here, in the three-phase rectifier for comparison, if the switch section Q1 is driven with the switching pattern for comparison, that is, if it continues to operate at a switching frequency of 21.1 kHz, the average current in the section Dst and the section Drs is higher than the ideal current Io*. While increasing, the average current in the section Drt is smaller than the ideal current Io.
In other words, in the three-phase rectifier for comparison, the error between the input current in each energization section and the ideal current Io* caused by the ON/OFF operation of the switch Q1 is controlled so as not to be biased, or the error itself is small. need to be controlled so that If these controls are not performed, as shown in FIG. 11, in the three-phase rectifier for comparison, even if the output voltage Voo can be controlled to the same level as the target voltage Voo* (FIG. 11(b)), the input The harmonic components of the currents Ir to It are not suppressed (FIG. 11(a)), that is, the function of suppressing the harmonics of the input current does not work.

(Study on harmonic components of input current in three-phase rectifier 1)
In contrast to the three-phase rectifier basic circuit 1a and the three-phase rectifier for comparison described above, in the three-phase rectifier 1 according to one embodiment of the present invention, the three-phase SW Instead of switching the switch Q1 to the ON state once every cycle T, the switch Q1 is switched once in each section Dst to Drs of each three-phase SW cycle T, like the appropriate switching pattern shown in FIG. 19(c). Q1 switches to the ON state. The period during which the switch portion Q1 is turned on is set to be proportional to the duration of each section Dst to Drs. That is, the switch Q1 is turned on three times during the three-phase SW cycle T. As a result, the amount of change in the current Il during one three-phase SW cycle T is suppressed, and the current Il fluctuates in a range closer to the ideal current Io*. In other words, it is equivalent to having the harmonic suppression function work.
19A is an example of the switching pattern of the bidirectional switch circuit 14 at point p1 in FIG.

Here, in the switching pattern for comparison of the switch section Q1 shown in FIG. 8). In the proper switching pattern of the switch Q1 shown in FIG. 19(c), TrtQon is the period during which the switch is turned on during the Drt period, and TrtQ is the cycle of the switch Q1 during the Drt period. In this case, the on-duty DrtQ of the switch section Q1 during the Drt period can be expressed by the following equation (9). On-duty DQ (equation (8)) and on-duty DrtQ (equation (9)) during the Drt period have a relationship represented by the following equation (10). Similarly, the on-duties in the Drs section and the Dst section also match the on-duty DQ.
DQ=TQon/TQ ......(8)
DrtQ=TrtQon/TrtQ (9)
DQ=DrtQ (10)

(Effect of driving with proper switching pattern)
As described above, by configuring the three-phase rectifier having the device configuration shown in FIG. It is possible to realize a three-phase rectifier that can be obtained.
Further, in the three-phase rectifier 1 according to one embodiment of the present invention, the switch Q1 is driven with an appropriate switching pattern, and the switch Q1 is switched according to the length of the ON time of each section Dst, Drt, and Drs. Switching Q1 to the ON state. Here, as described for the three-phase rectifier for comparison, depending on the switching pattern of the switch section Q1, the harmonic suppression function of the input current may be suppressed. The part Q1 is switched. Therefore, even when the amount of change in the current Il flowing through the DC reactor L1 increases, it is possible to suppress an increase in the difference between the current Il and the ideal current Io*, and as a result, harmonics are suppressed. input current can be obtained.

Therefore, the smoothing coil and capacitor for smoothing the output of the bridge diode 13 and the boosting coil and capacitor can be used together while maintaining the harmonic suppression function. It is possible to obtain a three-phase rectifier 1 that can be made more compact in terms of points.
Further, in the three-phase rectifier 1, the switch Q1 is switched to the ON state once for each interval Dst to Drs of the switches SWr to SWt. can be easily varied. As a result, it is possible to easily suppress unevenness in the three-phase SW period T during which the switch section Q1 is turned on.

In addition, since the ON period of the switch part Q1 is set in proportion to the length of each of the sections Dst to Drs determined by the switching patterns of the switches SWr to SWt, while suppressing the imbalance of the input current occurring in each section, The output voltage Voo of the three-phase rectifier 1 can be boosted to the target value Voo*.
Further, the three-phase rectifier 1 according to one embodiment of the present invention has a device configuration equivalent to that of the three-phase rectifier basic circuit 1a shown in FIG. will perform the same operation. Therefore, the three-phase rectifier 1 can also be operated as a step-down three-phase rectifier described in Patent Document 1, for example, and the three-phase rectifier 1 capable of step-up and step-down control can be realized.

Incidentally, as with the three-phase rectifier 1, the power supply circuit 100 capable of suppressing the harmonics of the input three-phase AC current and increasing and decreasing the output is, for example, a three-phase PWM converter system as shown in FIG. A power supply circuit in which a step-down DC/DC converter 102 is connected to an input current harmonic suppression type step-up power supply 101 is exemplified.
In this power supply circuit 100, the input reactors Llr, Lls, and Llt have an inductance three to five times that of the DC reactor L1 of the three-phase rectifier 1 shown in FIG. is necessary. On the other hand, among the components of the three-phase rectifier 1, the total size and weight of the components not included in the power supply circuit 100, that is, the input reactor 11 (Lir to Lit) and the input capacitor 12 (Cir to Cit) is , about 1/5 times the total size and weight of the input reactors Llr, Lls, and Llt of the power supply circuit 100 . That is, the three-phase rectifier 1 shown in FIG. 1 is smaller and lighter than the power supply circuit 100 .

Therefore, a smaller and lighter three-phase rectifier 1 can be realized as a circuit that achieves the same function as the power supply circuit 100 .
In the above embodiment, the switching operation of the switch section Q1 is performed once for each section Dst to Drs. However, the switch section Q1 may be switched multiple times for each section. .

[Modification 1]
In the above-described embodiment, in the three-phase rectifier 1, the current Il flowing through the DC reactor L1 is increased by switching the switch Q1 to the ON state for each section Dst to Drs. Although the case of suppressing the increase and reducing the error between the current Il and the ideal current Io* has been described, the present invention is not limited to this.
For example, in each three-phase SW cycle T of the three-phase rectifier 1, the switch section Q1 may be turned on at different timings during the section of the three-phase SW cycle T.

FIG. 20 shows an example in which the ON periods of the switch Q1 during the three-phase SW period T are varied. In FIG. 20, (a) is an example of the switching pattern of switches SWr to SWt at point p1 in mode I shown in FIG. FIG. 20(b) shows an example of the switching pattern of the switch part Q1 in Modification 1, and FIG. 20(c) shows a change in the current Il when the switch part Q1 is turned on and off in the switching pattern shown in (b). indicates FIG. 20(d) shows an example of a switching pattern when the switch Q1 is turned on and off at the same timing once every three-phase SW cycle T, and FIG. 20(e) is shown in (d). An example of the state of change in the current Il flowing through the DC reactor L1 when the switch Q1 is turned on and off in a switching pattern is shown.
As described with reference to FIG. 18, when the switch Q1 is turned on and off at the same timing every three-phase SW cycle T as shown in FIG. 20(d), as shown in FIG. The current is always smaller than the ideal current Io*, and the average current in section Drs may always be larger than the ideal current Io*. That is, the input currents Ir to It contain harmonics.

On the other hand, as shown in FIG. 20(b), in a plurality of three-phase SW cycles T (cycles T1 to T4 in FIG. 20), when the switch Q1 is turned on at different times in each cycle, As shown in FIG. 20(c), in period T1, the average current in section Drt is smaller than ideal current Io*, but the average current in section Drs is larger than ideal current Io*. In cycle T2, the average current in section Drt is greater than ideal current Io*, and the average current in section Drs is also greater than ideal current Io*. Similarly, in periods T3 and T4 as well, the average current in each section is larger or smaller than the ideal current Io*. Therefore, when looking only at the section, there is a difference between the average current in each of the sections Dst, Drt, and Drs and the ideal current Io*. Approach Io*. This logic also applies to the average current for each three-phase SW cycle T. For example, the average current in cycles T2 and T3 is greater than the ideal current Io*, and the average current in cycles T1 and T4 is greater than the ideal current Io*. is also small. However, when the periods T1 to T4 are taken as one unit, the average current in the periods T1 to T4 approaches the ideal current Io*.

A short-term current error between adjacent cycles is absorbed by the input and output capacitors, and therefore has little effect on the input current.
Therefore, even if the timing for turning on/off the switch Q1 is varied for each cycle in a plurality of cycles (four cycles T1 to T4 in FIG. 20), the same effects as those of the above embodiment can be obtained. . In other words, since the average current in a plurality of cycles, for example, T1 to T4, can be brought close to the ideal current Io*, an input current with suppressed harmonics can be obtained in this case as well.
As shown in FIG. 20(b), the switching pattern of the switch section Q1 in Modification 1 is such that the pulse width of the switching section Q1 is set at a constant timing in the three-phase SW cycle T shown in FIG. 20(d). is the same as the pulse width of the switching pattern that turns on the .

When the switch Q1 is driven by the switching pattern in which the switch Q1 is turned on at a constant timing, as shown in FIG. However, the input currents Ir to It (FIG. 11(a)) contain harmonics.
Here, as shown in FIG. 20, the case where the switching pattern of the switch section Q1 is set with 4 cycles as one unit has been described, but the number of cycles is not limited to 4 cycles. The switching pattern of the switch section Q1 may be set using an arbitrary number of cycles as one unit. Further, in the six modes shown in FIG. 3, the switch Q1 may be turned on at different timings for each three-phase SW period T in the same mode.

[Modification 2]
In the above modification 1, a plurality of preset three-phase SW cycles T are used as a unit, and in these multiple cycles, the timing for turning on and off the switch unit Q1 is shifted for each cycle, and the switch unit is set in units of multiple cycles at this shifted timing. By turning Q1 on and off, the timing of turning the switch Q1 on and off is varied. On the other hand, in Modification 2, the ON/OFF control of the switch section Q1 is performed in a cycle that is a constant multiple of the three-phase SW cycle T. FIG. The switching frequency of the switch section Q1 may be set to a frequency at which an input current waveform that satisfies the harmonic standards can be obtained according to the characteristics of the three-phase rectifier 1 to be applied.

21 to 24 show the results of simulations performed using the three-phase rectifier 1 shown in FIG. 1, and the switching operation of the switch section Q1 in three different cycles.
FIG. 21 shows the switching pattern of the switch section Q1. (a) controls the switching of the switch Q1 at 1.25 times the three-phase SW period T, which is 0.8 times the switching frequency of the switches SWs to SWr. (b) controls the switching of the switch Q1 at 0.75 times the three-phase SW period T, and at 1.33 times the switching frequency of the switches SWs to SWr. (c) controls the switching of the switch Q1 at 0.625 times the three-phase SW period T, and at 1.6 times the switching frequency of the switches SWs to SWr.

FIGS. 22 to 24 show simulation results when the switching of the switch section Q1 is controlled according to the switching patterns shown in FIGS. 21(a) to (c). is the simulation result of the input current waveform, and (b) is the result of harmonic analysis of the input current waveform shown in (a). In the simulation or actual measurement for obtaining the simulation results of FIGS. 0.6 kW, and the load 3 was a load resistance of 37.5Ω. Also, as the input reactor 11, a reactor of 0.5 mH in which reactors Lir to Lit are connected in parallel and a resistance of 220Ω are simulated. Also, the input capacitor 12 was set to 10 μF, the DC reactor L1 was set to 0.5 mH, and the capacitor C1 was set to 500 μF. The switching frequency of the switches SWr to SWt is set to 19.2 kHz, and the switching frequency of the switch section Q1 is set to a predetermined multiple of 19.2 kHz (switching frequency of the switches SWr to SWt).

As shown in FIG. 21(a), if switching control is performed on the switch Q1 at a period 1.25 times the three-phase SW period T, the harmonic component does not satisfy the harmonic standard, as shown in FIG. As shown in FIG. 21(b), when switching control is performed on the switch Q1 with a period 0.8 times the three-phase SW period T, as shown in FIG. Higher frequency components are included in the nearby frequency range, and the standard is almost satisfied, but if the frequency deviates slightly, it may be out of the standard. As shown in FIG. 21(c), when switching of the switch Q1 is controlled at a period 0.625 times the three-phase SW period T, as shown in FIG. Confirmed to be satisfactory.

22 to 24, in the case of the simulated three-phase rectifier 1, the switching pattern shown in FIG. 21(b) or (c) is preferably used to control switching of the switch Q1. Recognize. That is, when the switch Q1 is switching-controlled with a cycle shorter than the three-phase SW cycle T, harmonics contained in the input current are suppressed.
In addition, the appropriate switching pattern of the switch part Q1 set in this way was changed within the range of the constants, input/output voltage, current, etc. of each part constituting the simulated three-phase rectifier 1 within the range assumed in practical use. It has been confirmed that equivalent simulation results can be obtained even in this case, that is, that the expected harmonic suppression function can be maintained.
Further, in the modified example 2, the appropriate switching pattern of the switch Q1 is set as a pattern with a frequency that is a predetermined multiple of the switching frequency of the switches SWs to SWr, so that the switching pattern of the switch Q1 can be easily set. can be done.

[Method of Setting Switching Frequency in Modification 1 and Modification 2]
An appropriate switching pattern of the switch section Q1 in Modifications 1 and 2 can be set, for example, by the following procedure.
First, as the switching pattern of the switch part Q1, a method of determining a switching pattern with a plurality of cycles as one unit shown in Modification 1, or a method of multiplying the switching frequency of the switches SWs to SWr by a constant number as shown in Modification 2. An arbitrary switching pattern is set according to the switching pattern in the method of periodically controlling the switching of the switch section Q1.

Next, perform actual measurement using the actual three-phase rectifier 1 that is actually used with the set switching pattern, or simulate a three-phase rectifier that has characteristics equivalent to the three-phase rectifier 1 that is actually used. Acquire the current waveform. Then, harmonic analysis is performed on the acquired input current waveform. Then, when it can be considered that the harmonic suppression standard required for the three-phase rectifier 1 is satisfied, the switching pattern at this time is adopted as an appropriate switching pattern. When the simulation or actual measurement is performed, the output current is measured or simulated assuming the maximum value conceivable for use. It has already been confirmed by simulation that, in the case of a switching pattern that satisfies the harmonic suppression standard with this maximum value assumed, the harmonic suppression standard is satisfied even when the output current is less than the maximum value.

Incidentally, in Modification 2, the switching frequency of the switch section Q1 is changed from 1.1 times to 1.9 times the switching frequency of the switches SWs to SWr in increments of 0.1 using a three-phase rectifier that has been actually measured or simulated. was changed and a simulation was performed. As a result, it was confirmed that a good input current waveform can be obtained when the switching frequency of the switch section Q1 is about 1.4 to 1.6 times the switching frequency of the switches SWs to SWr.

In the above-described embodiment, the switch section Q1 is switched for each section Dst to Drs in the three-phase SW cycle T, and a plurality of sections of the three-phase SW cycle T are used as units. The switching operation of the switch Q1 is performed at a different timing every time, and the switching operation of the switch Q1 is performed at a frequency that is a constant multiple of the switching frequency of the switches SWr to SWt. A case has been described in which the interval in which the amount of change increases is varied to reduce the error between the current Il and the ideal current Io*, but the present invention is not limited to this. For example, the number and timing of turning on/off the switch Q1 may be set so as to reduce the error between the current Il and the ideal current Io* based on the state of change in the current Il flowing through the DC reactor L1. Alternatively, the switching frequency of the switch section Q1 may be increased so that the effect of the switching operation of the switch section Q1 on the current Il is sufficiently reduced. In this way, the switch section Q1 may be operated so as to reduce the error between the current Il and the ideal current Io*, thereby reducing the error between the current Il and the ideal current Io*. .

Although the embodiments of the present invention have been described above, the above embodiments illustrate devices and methods for embodying the technical idea of the present invention. It does not specify the material, shape, structure, arrangement, etc. Various modifications can be made to the technical idea of the present invention within the technical scope defined by the claims.

1 three-phase rectifier 2 three-phase AC power supply 3 load 11 input reactor 12 input capacitor 13 bridge diode 14 bidirectional switch circuit 15 diode 16 booster 17 switch controller 18 booster controller 21 switching pattern generator 22 drive circuit 31 switching pattern generation Device 32 Drive circuit C1 Capacitor D1 Diode L1 DC reactor Q1 Switch part SWr to SWt Switch T Three-phase SW period

Claims (3)

A three-phase rectifier that converts three-phase AC power to DC power,
a full-wave rectifier circuit that rectifies the three-phase AC power to DC power;
a bidirectional switch circuit for turning on/off the input of each phase to the full-wave rectifier circuit of the three-phase AC power;
a switch control unit that controls the bidirectional switch circuit;
a boosting unit including at least a coil, a capacitor, and a switching unit that performs on/off operation, for boosting the output of the full-wave rectifier circuit;
a boost control unit that controls the switch unit,
The coil and the capacitor of the boosting unit also serve as a filter unit for smoothing the output of the full-wave rectifier circuit,
further comprising a phase voltage detection unit for detecting the voltage of each phase of the three-phase AC power,
The switch control unit generates a switching pattern of each phase for turning on/off the bidirectional switch circuit based on the detected voltage of each phase of the three-phase AC power detected by the phase voltage detection unit. switching-controlling the bidirectional switch circuit with the generated switching pattern for the bidirectional switch circuit;
The boost control unit generates a switching pattern for turning on/off the switch unit, controls switching of the switch unit with the generated switching pattern for the switch unit,
The switching pattern for the switch section is different from the switching pattern for the bidirectional switch circuit,
the switching pattern for the bidirectional switch circuit has a predetermined switching cycle;
A three-phase rectifier, wherein a switching period of the switching pattern for the switch section is shorter than the switching period for the bidirectional switch circuit. The coil is connected in series between the full-wave rectifier circuit and a load connected to the output side of the full-wave rectifier circuit,
the capacitor is connected in parallel with the load between the coil and the load;
2. A three-phase rectifier according to claim 1, wherein said switch section is connected in parallel with said capacitor between said coil and said capacitor. a full-wave rectifier circuit that rectifies three-phase AC power into DC power; and a bidirectional switch circuit that turns on/off input of each phase of the three-phase AC power to the full-wave rectifier circuit, wherein the full-wave Between the rectifier circuit and the load, a switch unit that operates on/off and a capacitor are connected in parallel with the load in this order from the full-wave rectifier circuit side, and between the full-wave rectifier circuit and the switch unit. A control method for a three-phase rectifier with a coil connected in series to
a step-up mode in which the coil and the capacitor are operated as part of a step-up portion for stepping up the output of the full-wave rectifier circuit by turning on/off the switch portion;
alternately repeating a filter mode in which the coil and the capacitor are operated as part of a filter unit for smoothing the output of the full-wave rectifier circuit by turning off the switch unit;
generating a switching pattern for each phase for turning on/off the bidirectional switch circuit based on the voltage of each phase of the three-phase alternating current power; turn on/off the switch circuit,
generating a switching pattern for turning on/off the switch unit, and turning the switch unit on/off using the generated switching pattern for the switch unit,
Unlike the switching pattern for the bidirectional switch circuit and the switching pattern for the switch section,
the switching pattern for the bidirectional switch circuit has a predetermined switching cycle;
A control method for a three-phase rectifier, wherein a switching cycle of the switching pattern for the switch section is shorter than the switching cycle for the bidirectional switch circuit.

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