JP7247791B2 - semiconductor equipment - Google Patents

Description

The present disclosure relates to semiconductor devices.

2. Description of the Related Art A semiconductor device is known in which a semiconductor chip is mounted on a substrate on which a circuit pattern is formed (see, for example, Patent Document 1). A semiconductor device includes a case surrounding a substrate. A resin (filler) is placed in the space surrounded by the case.

JP 2017-183656 A

The space inside the case is filled with a filler. If air bubbles are contained in the filler, there is a risk of dielectric breakdown of the semiconductor device. In such a semiconductor device, stable operation cannot be ensured, and reliability is impaired.

Therefore, it is an object to provide a semiconductor device whose reliability can be improved.

A semiconductor device according to the present disclosure includes a case having a first portion and a second portion arranged apart from the first portion in an internal space, a substrate having a circuit pattern and arranged in the case, a circuit It comprises a semiconductor chip arranged on a pattern, a filler covering the substrate and the semiconductor chip, and a partition forming a flow path from the first portion to the second portion. When the filler is supplied from the first part to the space in the case so as to reach the second part from the first part, the partition part has a higher flow rate of the filler supplied from the first part than when the flow path is not formed. Form a flow path so that the

According to the above semiconductor device, reliability can be improved.

FIG. 1 is a schematic plan view of the semiconductor device according to Embodiment 1 when viewed in the plate thickness direction of the radiator plate. FIG. 2 is a schematic perspective view of the semiconductor device shown in FIG. FIG. 3 is a schematic cross-sectional view of the semiconductor device shown in FIG. FIG. 4 is a schematic perspective view showing a jig used for manufacturing the semiconductor device shown in FIG. 1 together with the semiconductor device. FIG. 5 is a schematic perspective view showing a state in which the jig shown in FIG. 4 is attached to the semiconductor device. FIG. 6 is a schematic perspective view of a semiconductor device according to a second embodiment. FIG. 7 is a schematic perspective view showing a state in which a jig used for manufacturing the semiconductor device shown in FIG. 6 is shown together with the semiconductor device. FIG. 8 is a schematic perspective view of the semiconductor device according to the third embodiment. FIG. 9 is a schematic perspective view of the semiconductor device shown in FIG. 8, showing a lid portion included in the semiconductor device with a dashed line. FIG. 10 is a schematic plan view of a semiconductor device according to a fourth embodiment. FIG. 11 is a schematic perspective view of a semiconductor device according to Embodiment 5. FIG.

[Description of Embodiments of the Present Disclosure]
First, the embodiments of the present disclosure are listed and described. A semiconductor device according to the present disclosure includes: a case having a first portion and a second portion arranged apart from the first portion in an internal space; a substrate having a circuit pattern; A semiconductor chip arranged thereon, a filler covering the substrate and the semiconductor chip, and a partition forming a flow path from the first portion to the second portion when viewed in the plate thickness direction of the substrate. When the filler is supplied from the first part to the space in the case so as to reach the second part from the first part, the partition part has a higher flow rate of the filler supplied from the first part than when the flow path is not formed. Form a flow path so that the

When the space inside the case is filled with the filler from the outside of the case, there is a risk that surrounding air will be drawn into the case and supplied into the case. Further, for example, if the shape of the substrate on which the semiconductor chip is arranged on the circuit pattern is complicated, it becomes difficult for the filler to flow into minute portions, and air bubbles may remain. If air bubbles exist in the space filled with the filler, dielectric breakdown of the semiconductor device is likely to occur. Therefore, from the viewpoint of ensuring stable operation of the semiconductor device and improving the reliability of the semiconductor device, it is required to remove air bubbles from the space filled with the filler.

According to the semiconductor device of the present disclosure, since the partition portion is included, when the filler is supplied from the first portion to the second portion, the filler supplied from the first portion is more likely than the case where the flow path is not formed. By increasing the flow velocity of the filler, it is possible to facilitate the flow of air bubbles present in the space filled with the filler to the downstream side of the second portion. Therefore, it is possible to easily discharge air bubbles in the space filled with the filler to the outside of the case. As a result, stable operation of the semiconductor device can be ensured, and the reliability of the semiconductor device can be improved.

In the above semiconductor device, the channel may be formed to cover the entire substrate. By doing so, it is possible to cover the entire substrate with the filler while reducing the possibility that air bubbles remain.

In the above semiconductor device, the channel may be connected without branching from the first portion to the second portion. By doing so, the inlet for supplying the filler is defined as the first portion, and the area where the filler finally reaches is defined as the second portion, and the passage from the first portion to the second portion is reliably filled. The flow rate of the agent can be increased. Therefore, it is possible to further reduce the possibility that air bubbles remain.

In the above semiconductor device, the semiconductor chip may be arranged on the flow path when viewed in the thickness direction of the substrate. It is difficult for the filler to flow into the portion where the semiconductor chip is arranged, and air bubbles tend to remain. By doing so, the flow velocity in the portion where the semiconductor chip is arranged can be increased, and the possibility that the air bubbles remain can be reliably reduced.

In the above semiconductor device, the partition may be flat and arranged perpendicular to the substrate. By doing so, it is possible to reduce the possibility that a narrow portion and a wide portion are formed in the flow path in the plate thickness direction of the substrate, thereby avoiding a partial decrease in the flow velocity of the filler. be able to. Therefore, it is possible to more reliably reduce the risk of air bubbles remaining. It should be noted that the term "perpendicular" to the substrate is not limited to geometrically strictly forming an angle of 90 degrees with respect to the substrate. It is a thing.

In the above semiconductor device, the partition may be connected to the inner wall surface of the case. By doing in this way, a partition part can be formed easily.

In the above semiconductor device, the inner wall surface of the case may have a rectangular shape when viewed in the thickness direction of the substrate. The inner wall surface of the case may include a first inner wall surface, a second inner wall surface facing the first inner wall surface, and a third inner wall surface continuous with the first inner wall surface and the second inner wall surface. The semiconductor device may have a plurality of partitions. The plurality of partitions may include a flat first partition and a flat second partition. The first partition may be connected to the first inner wall surface so as to be perpendicular to the first inner wall surface. The second partition may be connected to the second inner wall surface so as to be perpendicular to the second inner wall surface. By doing so, the flow path between the first inner wall surface and the second inner wall surface can be formed by folding back, making it easy to form a flow path that increases the flow velocity of the filler. In addition, regarding the shape of a rectangle, not only those having a strictly geometrical rectangular shape, but also those in which at least some of the four corners of the rectangle are not right angles, rounded, or opposed It also includes those in which the adjacent sides are not strictly parallel to each other, and those in which the angles formed by the orthogonal sides are not strictly 90 degrees.

In the above semiconductor device, the channel may have a first region sandwiched between the first partition and the second partition when viewed in the thickness direction of the substrate. A semiconductor chip may be arranged in the first region. By doing so, it is possible to reliably increase the flow velocity in the portion where the semiconductor chip is arranged, and reduce the possibility that bubbles remain.

In the above semiconductor device, the inner wall surface of the case may have a rectangular shape when viewed in the thickness direction of the substrate. The inner wall surface of the case includes a first inner wall surface, a second inner wall surface facing the first inner wall surface, a third inner wall surface connected to the first inner wall surface and the second inner wall surface, and the first inner wall surface and the second inner wall surface. A fourth inner wall surface connected to the wall surface and opposed to the third inner wall surface may be included. The partition part is plate-shaped, the partition part is connected to the first inner wall surface, is arranged along the third inner wall surface with a gap from the third inner wall surface, and has an end connected to the first inner wall surface. a first partition region, which is a region whose length from the part to the end located on the second inner wall surface side is shorter than the distance between the first inner wall surface and the second inner wall surface; connected to the end opposite to the end connected to the wall surface, arranged along the second inner wall surface with a gap from the second inner wall surface, and extending from the end connected to the first partition region to the fourth inner wall surface; The second partition area, which is an area whose length to the end located on the wall surface side is shorter than the distance between the first partition area and the fourth inner wall surface, is connected to the first partition area of the second partition area. It is connected to the end opposite to the end, is arranged along the fourth inner wall surface with a gap from the fourth inner wall surface, and is located on the first inner wall surface side from the end connected to the second partition area. a third partition region whose length to the end is shorter than the length of the first partition region; and an end of the third partition region opposite to the end connected to the second partition region. , along the first inner wall surface with a gap from the first inner wall surface, and the length from the end connected to the third partition region to the end located on the first partition region side is the second partition region and a fourth partition region that is a region shorter than the length of . One of the first portion and the second portion may be arranged between the first partition region and the third inner wall surface. The other of the first portion and the second portion may be arranged between the second partition area and the fourth partition area.

By doing so, one of the first portion and the second portion is located near the corners of the rectangle, and the other of the first portion and the second portion is located near the center portion of the rectangle, and the filler is spirally distributed. can be filled. By doing so, it is also possible to reduce the possibility that air bubbles remain in the space filled with the filler.

[Details of the embodiment of the present disclosure]
Next, one embodiment of the semiconductor device of the present disclosure will be described with reference to the drawings. In the following drawings, the same reference numerals are given to the same or corresponding parts, and the description thereof will not be repeated.

(Embodiment 1)
A configuration of the semiconductor device according to the first embodiment of the present disclosure will be described. FIG. 1 is a schematic plan view of the semiconductor device according to Embodiment 1 when viewed in the plate thickness direction of the radiator plate. FIG. 2 is a schematic perspective view of the semiconductor device shown in FIG. FIG. 3 is a schematic cross-sectional view of the semiconductor device shown in FIG. FIG. 3 is a cross-sectional view including a semiconductor chip and taken along a plane parallel to the XZ plane. In FIG. 3, illustration of a partitioning portion, which will be described later, is omitted.

1, 2 and 3, semiconductor device 11a in the first embodiment includes heat sink 12, frame 13 arranged on heat sink 12, and a substrate placed on heat sink 12. 17a, 17b, plate-like electrodes (bus bars) 19a, 19b, 19c, 19d, terminals 18a, 18b, 18c, 18d, semiconductor chips 21a, 21b, 21c, 21d, 21e, 21f, 22a, 22b, 22c , 22d, 22e, 22f and a filler 40. Heat sink 12 and frame 13 constitute case 20 provided for semiconductor device 11a. The case 20 has a first portion 41a and a second portion 42a spaced apart from the first portion 41a in the internal space 30 . A dashed line in FIG. 1 indicates the first portion 41a. A two-dot chain line in FIG. 1 indicates the second portion 42a. The first portion 41a and the second portion 42a will be described later.

The heat sink 12 is made of metal. The heat sink 12 is made of copper, for example. The surface of the heat sink 12 may be plated with nickel. The radiator plate 12 has a rectangular shape with long sides extending in the X direction and short sides extending in the Y direction when viewed in the plate thickness direction. The substrates 17a and 17b are joined to one main surface 12a of the heat sink 12 by soldering (not shown). On the other main surface 12b of the heat sink 12, for example, heat radiating fins (not shown) that efficiently radiate heat may be attached. The plate thickness direction of the heat sink 12 and the plate thickness direction of the substrates 17a and 17b are the Z direction.

The frame 13 is made of, for example, insulating resin. The frame 13 includes a first wall portion 13a, a second wall portion 13b, a third wall portion 13c, and a fourth wall portion 13d. The first wall portion 13a and the second wall portion 13b are arranged to face each other in the direction (Y direction) corresponding to the short side of the heat sink 12 when viewed in the plate thickness direction of the heat sink 12 . The third wall portion 13 c and the fourth wall portion 13 d are arranged to face each other in the direction (X direction) corresponding to the long side of the heat sink 12 when viewed in the plate thickness direction of the heat sink 12 . The inner wall surfaces 27a, 27b, 27c, and 27d of the frame 13 forming the inner wall surfaces 27a, 27b, 27c, and 27d of the case 20 are rectangular when viewed in the plate thickness direction of the radiator plate 12. As shown in FIG. Specifically, the frame 13 includes a first inner wall surface 27a, a second inner wall surface 27b facing the first inner wall surface 27a, and a third inner wall surface 27c connected to the first inner wall surface 27a and the second inner wall surface 27b. and a fourth inner wall surface 27d connected to the first inner wall surface 27a and the second inner wall surface 27b and facing the third inner wall surface 27c. The frame 13 is arranged on one main surface 12 a of the heat sink 12 . The frame 13 is fixed to the radiator plate 12 with an adhesive, for example.

The substrate 17a has an insulating plate 14a having insulating properties and a circuit pattern 16a. The insulating plate 14a is made of ceramic, for example. The _insulating plate 14a is specifically made of AlN, SiN or _Al2O3 . The insulating plate 14a may be made of glass. The circuit pattern 16a is arranged on the insulating plate 14a. The substrate 17a has a structure in which a circuit pattern 16a is laminated on an insulating plate 14a. The circuit pattern 16a is composed of a plurality of circuit boards. In this embodiment, the circuit pattern 16a includes a first circuit board 15a, a second circuit board 15b, a third circuit board 15c, and a fourth circuit board 15d. In this embodiment, the circuit pattern 16a is copper wiring. Similarly, the substrate 17b has an insulating plate 14b having insulating properties and a circuit pattern 16b made of copper wiring. The circuit pattern 16b is arranged on the insulating plate 14b. The circuit pattern 16b includes a fifth circuit board 15e, a sixth circuit board 15f, and a seventh circuit board 15g.

The semiconductor chips 21a, 21b, 21c, 22a, 22b, 22c are arranged on the first circuit board 15a of the circuit pattern 16a. The semiconductor chips 21d, 21e, 21f, 22d, 22e and 22f are arranged on the fifth circuit board 15e of the circuit pattern 16b. The semiconductor chips 21a, 21b, 21c, 21d, 21e, 21f, 22a, 22b, 22c, 22d, 22e, 22f include wide bandgap semiconductors. Examples of wide bandgap semiconductors include compound semiconductors such as SiC and GaN. The semiconductor chips 21a, 21b, 21c, 21d, 21e, and 21f are, for example, Schottky barrier diodes (SBD). The semiconductor chips 22a, 22b, 22c, 22d, 22e, 22f are, for example, metal-oxide-semiconductor field effect transistors (MOSFETs).

Each of the electrodes 19a, 19b, 19c, and 19d is plate-shaped and made of metal. Electrodes 19a and 19b are attached to the third wall portion 13c. Electrodes 19c and 19d are attached to the fourth wall portion 13d. Each of the electrodes 19a to 19d has a bent strip shape. In this embodiment, the electrodes 19a to 19d are each formed by bending a strip-shaped copper plate, for example. The semiconductor device 11a secures electrical connection with the outside by electrodes 19a to 19d. Terminals 18a, 18b, 18c, and 18d are also provided to ensure electrical connection with the outside. The terminals 18a and 18b are attached to the fourth wall portion 13d. The terminals 18c and 18d are attached to the third wall portion 13c.

The electrodes 19a and the first circuit board 15a are connected by wires 23a. The electrode 19b and the second circuit board 15b are connected by a wire 23b. The electrode 19c and the fifth circuit board 15e are connected by a wire 23c. The electrode 19d and the fifth circuit board 15e are connected by a wire 23d. The semiconductor chip 21a and the semiconductor chip 22a are connected by a wire 24a. The semiconductor chip 21b and the semiconductor chip 22b are connected by a wire 24b. The semiconductor chip 21c and the semiconductor chip 22c are connected by a wire 24c. The semiconductor chip 21d and the semiconductor chip 22d are connected by a wire 24d. The semiconductor chip 21e and the semiconductor chip 22e are connected by a wire 24e. The semiconductor chip 21f and the semiconductor chip 22f are connected by a wire 24f. The semiconductor chip 22a and the fourth circuit board 15d are connected by a wire 25a. The semiconductor chip 22b and the fourth circuit board 15d are connected by a wire 25b. The semiconductor chip 22c and the fourth circuit board 15d are connected by a wire 25c. The semiconductor chip 22d and the sixth circuit board 15f are connected by a wire 25d. The semiconductor chip 22e and the sixth circuit board 15f are connected by a wire 25e. The semiconductor chip 22f and the sixth circuit board 15f are connected by a wire 25f.

The second circuit board 15b and the sixth circuit board 15f are connected by a wire 29a. The fourth circuit board 15d and the fifth circuit board 15e are connected by a wire 29b. Terminal 18a and third circuit board 15c are connected by wire 26a. Terminal 18b and fourth circuit board 15d are connected by wire 26b. Terminal 18c and sixth circuit board 15f are connected by wire 26c. Terminal 18d and seventh circuit board 15g are connected by wire 26d. The semiconductor chips 22a, 22b, 22c and the third circuit board 15c are connected by wires, and the semiconductor chips 22d, 22e, 22f and the seventh circuit board 15g are connected by wires. A thick aluminum wire or a ribbon wire may be used for the wire.

The semiconductor device 11a forms a flow path 43a extending from a first portion 41a indicated by a one-dot chain line in FIG. 1 to a second portion 42a indicated by a two-dot chain line in FIG. It includes a plurality of partitions 28a, 28b, 28c, 28d. The partitions 28a, 28b, 28c, and 28d form a flow path 43a when the filler 40 is supplied from the first portion 41a to the space 30 in the case 20 from the first portion 41a to the second portion 42a. The flow path 43a is formed so that the flow velocity of the filler 40 supplied from the first portion 41a is higher than in the case where the flow path 43a is not provided. A plurality of arrows in FIG. 5, which will be described later, indicate the direction in which the filler 40 flows in the flow path 43a.

Each of the partitions 28a to 28d has a flat plate shape and is arranged perpendicular to the substrates 17a and 17b. The partitions 28a to 28d are formed parallel to the YZ plane at intervals in the X direction. The partitions 28a-28d are connected to the inner wall surfaces 27a-27d of the case 20, or the inner wall surfaces 27a-27d of the frame 13 in this embodiment. Specifically, the first partition portion 28a and the third partition portion 28c are each connected to the first inner wall surface 27a so as to be perpendicular to the first inner wall surface 27a. The second partition portion 28b and the fourth partition portion 28d are each connected to the second inner wall surface 27b so as to be perpendicular to the second inner wall surface 27b. In this embodiment, the frame 13 and the partitions 28a-28d are integrated. The length of the partitions 28a to 28d in the Z direction is the same as the length of the frame 13 in the Z direction. A channel 43a formed by the partitions 28a to 28d extends over the entire space 30 in the case 20 above the substrates 17a and 17b. The channel 43a is connected without branching from the first portion 41a to the second portion 42a.

The first partition portion 28a and the second partition portion 28b are formed so as to overlap the substrate 17a when viewed in the plate thickness direction of the substrate 17a. The third partition portion 28c and the fourth partition portion 28d are formed so as to overlap the substrate 17b when viewed in the plate thickness direction of the substrate 17b. The flow path 43a has a first region 44a sandwiched between the first partition portion 28a and the second partition portion 28b when viewed in the plate thickness direction of the substrates 17a and 17b. The semiconductor chips 21a, 21b, 21c, 22a, 22b, 22c are arranged in the first region 44a. The flow path 43a has a first region 45a sandwiched between the third partition 28c and the fourth partition 28d when viewed in the plate thickness direction of the substrates 17a and 17b. The semiconductor chips 21d, 21e, 21f, 22d, 22e, and 22f are arranged in the first region 45a.

Next, a method for manufacturing the semiconductor device 11a will be briefly described. FIG. 4 is a schematic perspective view showing a jig used for manufacturing the semiconductor device 11a shown in FIG. 1 together with the semiconductor device 11a. FIG. 5 is a schematic perspective view showing a state in which the jig shown in FIG. 4 is attached to the semiconductor device 11a.

First, the configuration of the jig will be described with reference to FIGS. 4 and 5. FIG. The jig 31a includes a plate-like portion 32a and tubular portions 33a and 34a. The plate-like portion 32a has a rectangular shape when viewed in the thickness direction of the plate-like portion 32a. The jig 31a can be attached to the frame 13 by bringing one surface 35a of the plate-like portion 32a in the plate thickness direction into contact with the end surface of the frame 13 in the Z direction. One cylindrical portion 33a protrudes in the Z direction from one surface 35a and the other surface 36a in the thickness direction of the plate-like portion 32a. The cylindrical portion 33a is formed at a position near one corner of the rectangular plate portion 32a. The cylindrical portion 33a has a through-hole 37a passing through the plate-like portion 32a in the plate thickness direction. The tubular portion 34a protrudes from the other surface 36a. The cylindrical portion 34a is formed at a position close to a corner of the rectangular plate-like portion 32a that is diagonally opposite to the corner where the cylindrical portion 33a is formed. The cylindrical portion 34a has a through-hole 38a passing through the plate-like portion 32a in the plate thickness direction.

A jig 31 a having such a configuration is prepared and mounted on the frame 13 . In FIG. 5, the attached jig 31a is indicated by a dashed line. First, the jig 31a is attached so that one surface 35a of the plate-like portion 32a and the end surface of the frame 13 are in contact with each other, and the upper surface of the frame 13 is pressed. At this time, when viewed in the plate thickness direction of the substrates 17a and 17b, the portion where one tubular portion 33a is located becomes the first portion 41a, and the portion where the other tubular portion 34a is located becomes the second portion 42a. Become. Thus, the space 30 of the case 20 is covered with the jig 31a.

A filler is injected from the through hole 37a of one cylindrical portion 33a. The injected filler flows over the substrates 17a and 17b along the flow paths 43a indicated by the arrows in FIG. That is, after the filler advances in the Y direction through the flow path 43a between the inner wall surface 27c of the third wall portion 13c and the first partition portion 28a and reaches the inner wall surface 27b of the second wall portion 13b, It turns back in the Y direction and advances in the Y direction through the channel 43a formed between the first partition portion 28a and the second partition portion 28b. After reaching the inner wall surface 27a of the first wall portion 13a, it turns back in the Y direction and advances in the Y direction through the channel 43a formed between the second partition portion 28b and the third partition portion 28c. After reaching the inner wall surface 27b of the second wall portion 13b, it turns back in the Y direction and advances in the Y direction through the channel 43a formed between the third partition portion 28c and the fourth partition portion 28d. After reaching the inner wall surface 27a of the first wall portion 13a, it is folded back in the Y direction, and the flow path 43a formed between the fourth partition portion 28d and the inner wall surface 27d of the fourth wall portion 13d is opened in the Y direction. proceed to

The filler reaches the second portion 42a. In this manner, the filler fills the space 30 of the case 20 so as to cover the substrates 17a, 17b and the semiconductor chips 21a-21f, 22a-22f. Here, since the cylindrical portion 34a is provided in the second portion 42a, air bubbles in the space 30 are discharged to the outside through the through hole 38a formed in the cylindrical portion 34a. When the filler reaches the second portion 42a where the other cylindrical portion 34a is formed, the jig 31a is removed. After that, the filler is cured by heating or the like. Thus, the semiconductor device 11a according to the first embodiment is obtained.

Since the semiconductor device 11a includes the partitioning portions 28a to 28d, when the filler is supplied from the first portion 41a to the second portion 42a, the flow rate of the first portion 41a increases as compared to the case where the flow path 43a is not formed. By increasing the flow rate of the filler supplied from , it is possible to facilitate the flow of air bubbles present in the space 30 filled with the filler to the downstream side of the second portion 42a. Therefore, it is possible to easily discharge the air bubbles in the space 30 filled with the filler to the outside of the case 20 . As a result, the semiconductor device 11a can ensure stable operation and is a semiconductor device with improved reliability.

In the semiconductor device 11a, the flow path 43a is formed so as to cover the substrates 17a and 17b over the entire area. Therefore, the semiconductor device 11a is a semiconductor device capable of covering the entire substrates 17a and 17b with the filler while reducing the possibility that air bubbles remain.

In the semiconductor device 11a, the flow path 43a is connected without branching from the first portion 41a to the second portion 42a. Therefore, the inlet for supplying the filler is defined as the first portion 41a, and the region where the filler finally reaches is defined as the second portion 42a. The flow rate of the agent can be increased. Therefore, such a semiconductor device 11a is a semiconductor device capable of further reducing the possibility that air bubbles remain.

In the semiconductor device 11a, the semiconductor chips 21a to 21f and 22a to 22f are arranged on the flow path 43a when viewed in the plate thickness direction of the substrates 17a and 17b. It is difficult for the filler to flow into the portions where the semiconductor chips 21a to 21f and 22a to 22f are arranged, and air bubbles tend to remain. The semiconductor device 11a can increase the flow velocity in the portions where the semiconductor chips 21a to 21f and 22a to 22f are arranged, and can reliably reduce the possibility of air bubbles remaining.

In the semiconductor device 11a, the partitions 28a to 28d are plate-shaped and arranged perpendicular to the substrates 17a and 17b. Therefore, in the plate thickness direction of the substrates 17a and 17b, it is possible to reduce the risk of formation of a narrow portion and a wide portion in the flow path 43a, thereby avoiding partial slowing of the flow velocity of the filler. can be done. Therefore, the semiconductor device 11a is a semiconductor device that can more reliably reduce the possibility that air bubbles remain.

In the semiconductor device 11a, the partitions 28a-28d are connected to the inner wall surfaces 27a-27d of the case 20, respectively. Therefore, the semiconductor device 11a is a semiconductor device in which the partitions 28a to 28d can be easily formed.

In the semiconductor device 11a, the first partition portion 28a is connected to the first inner wall surface 27a so as to be perpendicular to the first inner wall surface 27a. The second partition portion 28b is connected to the second inner wall surface 27b so as to be perpendicular to the second inner wall surface 27b. Therefore, the flow path 43a between the first inner wall surface 27a and the second inner wall surface 27b can be formed by folding. Therefore, in the semiconductor device 11a, it is easy to form the flow path 43a for increasing the flow velocity of the filler.

(Embodiment 2)
Next, Embodiment 2, which is another embodiment, will be described. FIG. 6 is a schematic perspective view of a semiconductor device according to a second embodiment. FIG. 7 is a schematic perspective view showing a state in which a jig used for manufacturing the semiconductor device shown in FIG. 6 is shown together with the semiconductor device. The semiconductor device according to the second embodiment differs from the semiconductor device according to the first embodiment in that the wall portions to which the partition portions 28a to 28d are connected are different.

First, referring to FIG. 6, semiconductor device 11b in the second embodiment includes partitions 28e, 28f and 28g. Each of the partitions 28e to 28g has a flat plate shape and is arranged perpendicular to the substrates 17a and 17b. The partitions 28e to 28g are spaced apart in the Y direction and parallel to the XZ plane. The partitions 28e to 28g are connected to the inner wall surfaces 27a to 27d of the case 20, and to the inner wall surfaces 27a to 27d of the frame 13 in this embodiment. Specifically, the first partition portion 28e and the third partition portion 28g are each connected to the fourth inner wall surface 27d so as to be perpendicular to the fourth inner wall surface 27d. The second partition portion 28f is connected to the third inner wall surface 27c so as to be perpendicular to the third inner wall surface 27c. In this embodiment, the frame 13 and the partitions 28e to 28g are integrated. The length of the partitions 28e to 28g in the Z direction is the same as the length of the frame 13 in the Z direction.

The partitions 28e and 28g are formed so as to overlap a part of the substrate 17a and the substrate 17b, respectively, when viewed in the plate thickness direction of the substrate 17a. The partition part 28f is formed so as to partially overlap the substrate 17a and the substrate 17b when viewed in the plate thickness direction of the substrate 17a. The flow path 43b has a first region 44b sandwiched between the first partitioning portion 28e and the second partitioning portion 28f when viewed in the plate thickness direction of the substrates 17a and 17b. The semiconductor chips 21a-21f are arranged in the first region 44b. The flow path 43b has a first region 45b sandwiched between the second partition 28f and the third partition 28g when viewed in the plate thickness direction of the substrates 17a and 17b. The semiconductor chips 22a-22f are arranged in the first region 45b.

Next, a method for manufacturing the semiconductor device 11b will be briefly described. First, the configuration of the jig will be described. The jig 31b includes a plate-like portion 32b and cylindrical portions 33b and 34b. The plate-like portion 32b has a rectangular shape when viewed in the thickness direction of the plate-like portion 32b. The jig 31b can be attached to the frame 13 by bringing one surface 35a of the plate-like portion 32b in the plate thickness direction into contact with the end surface of the frame 13 in the Z direction. One cylindrical portion 33b protrudes in the Z direction from one surface 35a and the other surface 36a in the thickness direction of the plate-like portion 32b. The cylindrical portion 33b is formed at a position near one corner of the rectangular plate portion 32b. The cylindrical portion 33b has a through-hole 37b penetrating through the plate-like portion 32b in the plate thickness direction. The tubular portion 34b protrudes from the other surface 36a. The tubular portion 34b is formed at a position close to a corner adjacent to the corner where the tubular portion 33b is formed in the Y direction in the rectangular plate-shaped portion 32b. The cylindrical portion 34b has a through hole 38b that penetrates the plate-like portion 32b in the plate thickness direction.

A jig 31b having such a structure is prepared and mounted on the frame 13 to hold the upper surface of the frame 13. As shown in FIG. At this time, the portion where one tubular portion 33b is located becomes the first portion 41b, and the portion where the other tubular portion 34b is located becomes the second portion 42b. A filler is injected from the through hole 37b of one cylindrical portion 33b. The injected filler flows along the arrows in FIG. 6 on the substrates 17a and 17b. Then, the filler reaches the region where the other cylindrical portion 34b is formed. After the substrates 17a and 17b are entirely covered with the filler, the jig 31b is removed. After that, the filler is cured to obtain semiconductor device 11b according to the second embodiment.

Even in the semiconductor device 11b having such a configuration, since the partition portions 28e to 28g are included, when the filler is supplied from the first portion 41b to the second portion 42b, the flow path 43b is not formed. Also, by increasing the flow velocity of the filler supplied from the first portion 41b, it is possible to facilitate the flow of air bubbles present in the space 30 filled with the filler to the downstream side of the second portion 42b. As a result, the semiconductor device 11b can ensure stable operation and is a semiconductor device with improved reliability.

(Embodiment 3)
Next, Embodiment 3, which is still another embodiment, will be described. FIG. 8 is a schematic perspective view of the semiconductor device according to the third embodiment. FIG. 9 is a schematic perspective view of the semiconductor device shown in FIG. 8, showing a lid portion included in the semiconductor device with a dashed line. The semiconductor device of the third embodiment differs from that of the first embodiment in that the semiconductor device includes a lid.

8 and 9, semiconductor device 11c in the third embodiment includes lid portion 31c in addition to semiconductor device 11a shown in FIG. The lid portion 31c includes a plate-like portion 32c and cylindrical portions 33c and 34c. The configuration of the lid portion 31c is basically the same as that of the jig 31a shown in the above-described second embodiment, except that the cylindrical portions 33c and 34c have different lengths of protruding from the one surface 35a and the other surface 36a. is.

The cover portion 31c is prepared and attached on the frame 13 to hold the upper surface of the frame 13. As shown in FIG. At this time, the portion where one tubular portion 33c is located becomes the first portion, and the portion where the other tubular portion 34c is located becomes the second portion. A filler is injected from the through hole 37c of one cylindrical portion 33c. The injected filler flows along the arrows in FIG. 9 on the substrates 17a and 17b. Then, the filler reaches the region where the other cylindrical portion 34c is formed. At this time, for example, the arrival of the filler to the cylindrical portion 34c is detected by the filler overflowing from the through hole 38c. After that, the filler injection is stopped. Next, the filler is cured without removing the lid portion 31c to obtain the semiconductor device 11c according to the third embodiment.

The semiconductor device 11c can ensure stable operation, and is a semiconductor device with improved reliability. In the present embodiment, the semiconductor device 11c includes the lid portion 31c, so that the filler can be reliably enclosed in the space within the case 20. As shown in FIG.

(Embodiment 4)
Next, Embodiment 4, which is still another embodiment, will be described. FIG. 10 is a schematic plan view of a semiconductor device according to a fourth embodiment. The semiconductor device of the fourth embodiment differs from that of the first embodiment in the number and arrangement of partitions included in the semiconductor device.

Referring to FIG. 10, a semiconductor device 11d according to the fourth embodiment includes a first partition 28h, a second partition 28i, and a third partition 28j spaced apart in the X direction. , a fourth partition 28k, a fifth partition 28l, a sixth partition 28m, a seventh partition 28n, and an eighth partition 28o. The first partition portion 28h, the third partition portion 28j, the fifth partition portion 28l, and the seventh partition portion 28n are each connected to the first inner wall surface 27a so as to be perpendicular to the first inner wall surface 27a. ing. The second partition portion 28i, the fourth partition portion 28k, the sixth partition portion 28m, and the eighth partition portion 28o are each connected to the second inner wall surface 27b so as to be perpendicular to the second inner wall surface 27b. ing.

Semiconductor chips 21a and 22a are arranged in a first region sandwiched between the first partition portion 28h and the second partition portion 28i. The semiconductor chips 21b and 22b are arranged in a first region sandwiched between the second partitioning portion 28i and the third partitioning portion 28j. The semiconductor chips 21c and 22c are arranged in a first region sandwiched between the third partitioning portion 28j and the fourth partitioning portion 28k. Semiconductor chips 21d and 22d are arranged in a first region sandwiched between the fifth partition portion 28l and the sixth partition portion 28m. Semiconductor chips 21e and 22e are arranged in a first region sandwiched between the sixth partition portion 28m and the seventh partition portion 28n. Semiconductor chips 21f and 22f are arranged in a first region sandwiched between the seventh partition 28n and the eighth partition 28o.

The semiconductor device 11d can ensure stable operation and is a semiconductor device with improved reliability. In the present embodiment, the flow path 43d can be made narrower than the flow path 43a in the first embodiment, and the flow velocity of the filler is increased more than in the first embodiment, thereby increasing the space 30 filled with the filler. Air bubbles inside can be easily discharged to the outside of the case 20. - 特許庁As a result, the semiconductor device 11d can ensure more stable operation and is a semiconductor device with improved reliability.

(Embodiment 5)
Next, Embodiment 5, which is still another embodiment, will be described. FIG. 11 is a schematic perspective view of the semiconductor device according to the third embodiment. The semiconductor device of the fifth embodiment differs from that of the first embodiment in the shape of the partition included in the semiconductor device.

Referring to FIG. 11, semiconductor device 11e in the fifth embodiment includes a partition portion 51e. As in the first embodiment, inner wall surfaces 27a, 27b, 27c, and 27d of case 20 have a rectangular shape when viewed in the plate thickness direction of substrates 17a and 17b. The inner wall surfaces 27a to 27d of the case 20 include a first inner wall surface 27a, a second inner wall surface 27b facing the first inner wall surface 27a, and a third inner wall surface 27c connected to the first inner wall surface 27a and the second inner wall surface 27b. and a fourth inner wall surface 27d connected to the first inner wall surface 27a and the second inner wall surface 27b and facing the third inner wall surface 27c.

The partition part 51e is plate-shaped. The partition portion 51e includes a first partition area 53a, a second partition area 53b, a third partition area 53c, and a fourth partition area 53d. The first partition region 53a is connected to the first inner wall surface 27a, is arranged along the third inner wall surface 27c with a gap from the third inner wall surface 27c, and extends from the end connected to the first inner wall surface 27a to the third inner wall surface 27c. It is a region whose length to the end located on the second inner wall surface 27b side is shorter than the distance between the first inner wall surface 27a and the second inner wall surface 27b. The second partition region 53b is connected to the end of the first partition region 53a opposite to the end connected to the first inner wall surface 27a, and is separated from the second inner wall surface 27b by the second inner wall surface 27b. and the length from the end connected to the first partition region 53a to the end located on the side of the fourth inner wall surface 27d is longer than the distance between the first partition region 53a and the fourth inner wall surface 27d. It's a short area. The third partition region 53c is connected to the end of the second partition region 53b opposite to the end connected to the first partition region 53a, and is separated from the fourth inner wall surface 27d by the fourth inner wall surface 27d. , and the length from the end connected to the second partition region 53b to the end located on the first inner wall surface 27a side is shorter than the length of the first partition region 53a. The fourth partition region 53d is connected to the end of the third partition region 53c opposite to the end connected to the second partition region 53b, and is separated from the first inner wall surface 27a by the first inner wall surface 27a. , and the length from the end connected to the third partition region 53c to the end located on the side of the first partition region 53a is shorter than the length of the second partition region 53b.

In the present embodiment, the partition portion 51e includes a fifth partition region 53e, a sixth partition region 53f, a seventh partition region 53g, an eighth partition region 53h, a ninth partition region 53i, and a tenth partition region. 53j and . The fifth partition region 53e is connected to the end of the fourth partition region 53d opposite to the end connected to the third partition region 53c, and is separated from the first partition region 53a by the first partition region 53a. , and the length from the end connected to the fourth partition region 53d to the end located on the second partition region 53b side is shorter than the length of the third partition region 53c. The sixth partition region 53f is connected to the end of the fifth partition region 53e opposite to the end connected to the fourth partition region 53d, and is separated from the second partition region 53b by the second partition region 53b. , and the length from the end connected to the fifth partition region 53e to the end located on the side of the third partition region 53c is shorter than the length of the fourth partition region 53d. The seventh partition region 53g is connected to the end of the sixth partition region 53f opposite to the end connected to the fifth partition region 53e, and is separated from the third partition region 53c by the third partition region 53c. , and the length from the end connected to the sixth partition region 53f to the end located on the side of the fourth partition region 53d is shorter than the length of the fifth partition region 53e. The eighth partition region 53h is connected to the end of the seventh partition region 53g opposite to the end connected to the sixth partition region 53f, and is separated from the fourth partition region 53d by the fourth partition region 53d. , and the length from the end connected to the seventh partition region 53g to the end located on the fifth partition region 53e side is shorter than the length of the sixth partition region 53f. The ninth partition region 53i is connected to the end of the eighth partition region 53h opposite to the end connected to the seventh partition region 53g, and is separated from the fifth partition region 53e by the fifth partition region 53e. , and the length from the end connected to the eighth partition region 53h to the end located on the sixth partition region 53f side is shorter than the length of the seventh partition region 53g. The tenth partition region 53j is connected to the end of the ninth partition region 53i opposite to the end connected to the eighth partition region 53h, and is separated from the sixth partition region 53f by the sixth partition region 53f. , and the length from the end connected to the ninth partition region 53i to the end located on the seventh partition region 53g side is shorter than the length of the eighth partition region 53h.

The first portion is arranged near the corners of the rectangle, specifically between the first partition region 53a and the third inner wall surface 27c. The second portion is located near the center of the rectangle, specifically between the second partition region 53b and the fourth partition region 53d, more specifically between the eighth partition region 53h and the tenth partition region 53j. placed in between.

In Embodiment 5, a jig 31e indicated by a dashed line is attached when filling the filler. The jig 31e includes a plate-like portion 32e and cylindrical portions 33e and 34e. A through hole 37e is formed in the tubular portion 33e, and a through hole 38e is formed in the tubular portion 34e. The tubular portion 33e is formed near the corner of the plate-shaped portion 32e, and the tubular portion 34e is formed near the central portion of the plate-shaped portion 32e. The filler is supplied from the through hole 37e of the cylindrical portion 33e, and the air bubbles in the space 30 of the case 20 are discharged from the through hole 38e of the cylindrical portion 34e.

By doing so, the filler can be filled in a spiral shape with the first portion near the corners of the rectangle and the second portion near the central portion of the rectangle. By doing so, it is also possible to reduce the possibility that air bubbles remain in the space filled with the filler.

In addition, in the above embodiment, the formation of the fifth partition region 53e to the tenth partition region 53j may be omitted. In other words, the partition portion 51e may be composed of a first partition area 53a, a second partition area 53b, a third partition area 53c, and a fourth partition area 53d.

(Other embodiments)
In the above embodiment, the partition is connected to the inner wall surface of the frame included in the case. may be connected to

Further, in the above embodiment, the filler may be supplied until the excess filler flows out from the second portion, and the overflowed filler may be supplied again from the first portion. That is, the filler may be circulated and used. Further, in the above embodiment, the arrangement of the first portion and the second portion may be interchanged.

It should be understood that the embodiments disclosed this time are illustrative in all respects and are not restrictive in any aspect. The scope of the present disclosure is defined by the claims rather than the above description, and is intended to include all changes within the meaning and range of equivalents of the claims.

The semiconductor device of the present disclosure can be applied particularly advantageously when improved reliability is required.

11a, 11b, 11c, 11d, 11e semiconductor device 12 radiator plates 12a, 12b main surface 13 frames 13a, 13b, 13c, 13d walls 14a, 14b insulating plates 15a, 15b, 15c, 15d, 15e, 15f, 15g circuits Boards 16a, 16b circuit pattern,
17a, 17b substrates 18a, 18b, 18c, 18d terminals 19a, 19b, 19c, 19d terminals 20 cases 21a, 21b, 21c, 21d, 21e, 21f, 22a, 22b, 22c, 22d, 22e, 22f semiconductor chips 23a, 23b , 23c, 23d, 24a, 24b, 24c, 24d, 24e, 24f, 25a, 25b, 25c, 25d, 25e, 25f, 26a, 26b, 26c, 26d, 29a, 29b Wires 27a, 27b, 27c, 27d Inner wall surface 28a, 28b, 28c, 28d, 28e, 28f, 28g, 28h, 28i, 28j, 28k, 28l, 28m, 28n, 28o, 51e Partition section 30 Spaces 31a, 31b, 31e Jig 31c Lid section 32a, 32b, 32c , 32e Plate-like portions 33a, 33b, 33c, 33e, 34a, 34b, 34c, 34e Cylindrical portions 35a, 36a Surfaces 37a, 37b, 37c, 37e, 38a, 38b, 38c, 38e Penetration holes 40 Fillers 41a, 41b First portions 42a, 42b Second portions 43a, 43b Channels 44a, 44b, 45a, 45b First regions 53a, 53b, 53c, 53d, 53e, 53f, 53g, 53h, 53i, 53j Partition regions

Claims (9)

a case having a first portion and a second portion spaced apart from the first portion in an internal space;
a substrate having a circuit pattern and arranged in the case;
a semiconductor chip arranged on the circuit pattern;
a filler covering the substrate and the semiconductor chip;
a partition portion forming a flow path from the first portion to the second portion when viewed in the thickness direction of the substrate;
When the filler is supplied from the first portion to the space in the case so as to reach the second portion from the first portion, the partition portion is arranged to be more efficient than the case where the flow path is not formed. A semiconductor device, wherein the flow path is formed so that the flow velocity of the filler supplied from the portion increases. 2. The semiconductor device according to claim 1, wherein said flow path is formed so as to cover the entire area of said substrate. 3. The semiconductor device according to claim 1, wherein said flow path is connected without branching from said first portion to said second portion. 4. The semiconductor device according to claim 1, wherein said semiconductor chip is arranged on said flow path when viewed in the thickness direction of said substrate. 5. The semiconductor device according to any one of claims 1 to 4, wherein said partition portion has a flat plate shape and is arranged perpendicularly to said substrate. 6. The semiconductor device according to claim 1, wherein said partition is connected to an inner wall surface of said case. When viewed in the thickness direction of the substrate, the inner wall surface of the case has a rectangular shape,
The inner wall surface of the case is
a first inner wall surface;
a second inner wall surface facing the first inner wall surface;
a third inner wall surface continuous with the first inner wall surface and the second inner wall surface;
The semiconductor device includes a plurality of partitions,
The plurality of partitions are
a flat plate-shaped first partition;
and a flat second partition,
The first partition is connected to the first inner wall surface so as to be perpendicular to the first inner wall surface,
7. The semiconductor device according to claim 6, wherein said second partition is connected to said second inner wall surface so as to be perpendicular to said second inner wall surface. The flow path has a first region sandwiched between the first partition and the second partition when viewed in the thickness direction of the substrate,
8. The semiconductor device according to claim 7, wherein said semiconductor chip is arranged in said first region. Seen in the thickness direction of the substrate,
The inner wall surface of the case has a rectangular shape,
The inner wall surface of the case is
a first inner wall surface;
a second inner wall surface facing the first inner wall surface;
a third inner wall surface continuous with the first inner wall surface and the second inner wall surface;
a fourth inner wall surface continuous with the first inner wall surface and the second inner wall surface and facing the third inner wall surface;
The partition part is plate-shaped,
The partition part is connected to the first inner wall surface, is arranged along the third inner wall surface with a gap from the third inner wall surface, and is arranged from the end connected to the first inner wall surface to the second inner wall surface. a first partition region that is a region whose length to the end located on the inner wall surface side is shorter than the distance between the first inner wall surface and the second inner wall surface;
connected to the end of the first partition region opposite to the end connected to the first inner wall surface and arranged along the second inner wall surface with a gap from the second inner wall surface; A second partition area in which the length from the end connected to the first partition area to the end located on the side of the fourth inner wall surface is shorter than the distance between the first partition area and the fourth inner wall surface. and,
connected to the end of the second partition region opposite to the end connected to the first partition region and arranged along the fourth inner wall surface with a gap from the fourth inner wall surface; a third partition region, the length of which is shorter than the length of the first partition region from the end connected to the second partition region to the end located on the first inner wall surface side;
connected to the end of the third partition region opposite to the end connected to the second partition region and arranged along the first inner wall surface with a gap from the first inner wall surface; a fourth partition region that is a region whose length from the end connected to the third partition region to the end located on the side of the first partition region is shorter than the length of the second partition region;
one of the first portion and the second portion is disposed between the first partition region and the third inner wall surface;
5. The semiconductor according to claim 1, wherein the other of said first portion and said second portion is arranged between said second partition region and said fourth partition region. Device.

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