JP7238191B2 - Plasma processing method and plasma processing apparatus - Google Patents

Description

The present disclosure relates to a plasma processing method and a plasma processing apparatus.

Plasma processing apparatuses are used in the manufacture of electronic devices. A plasma processing apparatus generally includes a chamber body, a stage, and a high frequency power supply. The chamber body provides its internal space as a chamber. The chamber body is grounded. A stage is provided within the chamber and configured to support a substrate placed thereon. The stage includes a lower electrode. A radio frequency power source provides radio frequency to excite the gas in the chamber. In this plasma processing apparatus, ions are accelerated by the potential difference between the potential of the lower electrode and the potential of the plasma, and the substrate is irradiated with the accelerated ions.

In the plasma processing apparatus, a potential difference also occurs between the chamber body and the plasma. When the potential difference between the chamber main body and the plasma is large, the energy of the ions irradiated to the inner wall of the chamber main body increases, and particles are emitted from the chamber main body. Particles emitted from the chamber body contaminate the substrate placed on the stage. In order to prevent the generation of such particles, Patent Document 1 proposes a technique using an adjustment mechanism for adjusting the ground capacitance of the chamber. The adjustment mechanism described in US Pat. No. 6,200,000 is configured to adjust the area ratio of the anode and cathode facing the chamber, ie, the A/C ratio.

In addition, in the plasma processing apparatus, there is a technique of supplying a DC bias voltage to the lower electrode from the viewpoint of increasing the etching rate of the substrate by increasing the energy of ions irradiated to the substrate. For example, Patent Document 2 discloses a technique of periodically applying a DC voltage having a negative polarity to a lower electrode as a bias DC voltage. The technique of Patent Document 2 describes increasing the energy of ions irradiated onto a substrate by adjusting the duty ratio of the DC voltage to 50% or more while the frequency of the DC voltage is set to 1 MHz or more, for example. It is Here, the duty ratio is the proportion of the period during which the DC voltage is applied to the lower electrode in each cycle in which the DC voltage is applied to the lower electrode.

JP 2011-228694 A Japanese Patent No. 4714166

The present disclosure provides a technique capable of suppressing a decrease in the etching rate of the substrate and reducing the energy of ions with which the inner wall of the chamber body is irradiated.

A plasma processing method according to an aspect of the present disclosure is a plasma processing method performed in a plasma processing apparatus, the plasma processing apparatus comprising: a chamber body providing a chamber; and a lower electrode provided in the chamber body. a stage for supporting a substrate; a high-frequency power source for supplying high-frequency waves for generating plasma of the gas supplied to the chamber; a direct current power source, wherein the plasma processing method includes the steps of: supplying a high frequency power from the high frequency power source; and applying a direct current voltage having a negative polarity to the lower electrode from the one or more direct current power sources, In the step of applying the DC voltage, the DC voltage is periodically applied to the lower electrode, and a frequency defining each cycle of applying the DC voltage to the lower electrode is set to less than 1 MHz. , the ratio of the period during which the DC voltage is applied to the lower electrode in each period is adjusted.

According to the present disclosure, it is possible to suppress a decrease in the etching rate of the substrate and to reduce the energy of ions with which the inner wall of the chamber body is irradiated.

FIG. 1 is a diagram schematically showing a plasma processing apparatus according to one embodiment. FIG. 2 is a diagram showing an embodiment of the power supply system and control system of the plasma processing apparatus shown in FIG. FIG. 3 is a diagram showing circuit configurations of the DC power supply, switching unit, high-frequency filter, and matching box shown in FIG. FIG. 4 is a timing chart related to the plasma processing method of one embodiment performed using the plasma processing apparatus shown in FIG. FIG. 5 is a timing chart showing the potential of plasma. FIG. 6A is a simulation result showing an example of the relationship between the DC frequency and the energy of ions with which the substrate is irradiated. FIG. 6B is a simulation result showing an example of the relationship between the DC frequency and the energy of ions with which the substrate is irradiated. FIG. 6C is a simulation result showing an example of the relationship between the DC frequency and the energy of ions with which the substrate is irradiated. FIG. 6D is a simulation result showing an example of the relationship between the DC frequency and the energy of ions with which the substrate is irradiated. FIG. 7A is a simulation result showing an example of the relationship between the DC frequency and the energy of ions irradiated to the inner wall of the chamber body. FIG. 7B is a simulation result showing an example of the relationship between the DC frequency and the energy of ions irradiated to the inner wall of the chamber body. FIG. 7C is a simulation result showing an example of the relationship between the DC frequency and the energy of ions irradiated to the inner wall of the chamber body. FIG. 7D is a simulation result showing an example of the relationship between the DC frequency and the energy of ions irradiated to the inner wall of the chamber body. (a) and (b) of FIG. 8 are timing charts related to the plasma processing method of another embodiment. FIG. 9 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. FIG. 10 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to still another embodiment. FIG. 11 is a timing chart related to the plasma processing method of one embodiment performed using the plasma processing apparatus shown in FIG. 12 is a timing chart related to a plasma processing method of another embodiment performed using the plasma processing apparatus shown in FIG. 10. FIG. FIG. 13 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. FIG. 14 is a diagram showing a power supply system and control system of a plasma processing apparatus according to still another embodiment. FIG. 15 is a circuit diagram showing an example of a waveform adjuster. (a) of FIG. 16 is a graph showing the relationship between the duty ratio obtained in the first evaluation experiment and the etching amount of the silicon oxide film of the sample attached to the surface of the top plate on the chamber side, FIG. 16(b) is a graph showing the relationship between the duty ratio and the etching amount of the sample silicon oxide film attached to the side wall of the chamber main body, which was obtained in the first evaluation experiment. FIG. 17 is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of the sample placed on the electrostatic chuck, obtained in the first evaluation experiment. FIG. 18(a) is a graph showing the amount of etching of the silicon oxide film of the sample attached to the chamber-side surface of the top plate, obtained in each of the second evaluation experiment and the comparative experiment. (b) is a graph showing the amount of etching of the sample silicon oxide film attached to the side wall of the chamber main body, obtained in each of the second evaluation experiment and the comparative experiment. FIG. 19A is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the substrate is irradiated. FIG. 19B is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the substrate is irradiated. FIG. 19C is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the substrate is irradiated. FIG. 19D is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the substrate is irradiated. FIG. 19E is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the substrate is irradiated. FIG. 20A is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the inner wall of the chamber body is irradiated. FIG. 20B is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the inner wall of the chamber body is irradiated. FIG. 20C is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the inner wall of the chamber body is irradiated. FIG. 20D is a simulation result showing an example of the relationship between the duty ratio and the energy of ions with which the inner wall of the chamber body is irradiated. FIG. 20E is a simulation result showing an example of the relationship between the duty ratio and the energy of ions irradiated to the inner wall of the chamber body.

Various embodiments are described in detail below with reference to the drawings. In addition, suppose that the same code|symbol is attached|subjected to the part which is the same or equivalent in each drawing.

Plasma processing apparatuses are used in the manufacture of electronic devices. A plasma processing apparatus generally includes a chamber body, a stage, and a high frequency power supply. The chamber body provides its internal space as a chamber. The chamber body is grounded. A stage is provided within the chamber and configured to support a substrate placed thereon. The stage includes a lower electrode. A radio frequency power source provides radio frequency to excite the gas in the chamber. In this plasma processing apparatus, ions are accelerated by the potential difference between the potential of the lower electrode and the potential of the plasma, and the substrate is irradiated with the accelerated ions.

In the plasma processing apparatus, a potential difference also occurs between the chamber body and the plasma. When the potential difference between the chamber main body and the plasma is large, the energy of the ions irradiated to the inner wall of the chamber main body increases, and particles are emitted from the chamber main body. Particles emitted from the chamber body contaminate the substrate placed on the stage. In order to prevent the generation of such particles, Patent Document 1 proposes a technique using an adjustment mechanism for adjusting the ground capacitance of the chamber. The adjustment mechanism described in US Pat. No. 6,200,000 is configured to adjust the area ratio of the anode and cathode facing the chamber, ie, the A/C ratio.

In addition, in the plasma processing apparatus, there is a technique of supplying a DC bias voltage to the lower electrode from the viewpoint of increasing the etching rate of the substrate by increasing the energy of ions irradiated to the substrate. For example, Patent Document 2 discloses a technique of periodically applying a DC voltage having a negative polarity to a lower electrode as a bias DC voltage. The technique of Patent Document 2 describes increasing the energy of ions irradiated onto a substrate by adjusting the duty ratio of the DC voltage to 50% or more while the frequency of the DC voltage is set to 1 MHz or more, for example. It is Here, the duty ratio is the proportion of the period during which the DC voltage is applied to the lower electrode in each cycle of the DC voltage application.

By the way, in a plasma processing apparatus in which a DC voltage is periodically applied to the lower electrode, the movement of ions in the plasma decreases during a period in which the application of the DC voltage is stopped, so the potential of the plasma may increase. . As the potential of the plasma increases, the potential difference between the plasma and the chamber main body increases, and the energy of the ions irradiated to the inner wall of the chamber main body increases. Further, when the frequency of the DC voltage is set to, for example, 1 MHz or higher, the energy of the ions irradiated to the inner wall of the chamber body tends to increase together with the energy of the ions irradiated to the substrate. The higher the energy of the ions that irradiate the inner wall of the chamber body, the greater the amount of particles emitted from the chamber body, possibly promoting contamination of the substrate. Against this background, it is expected to suppress the decrease in the etching rate of the substrate and reduce the energy of the ions with which the inner wall of the chamber body is irradiated.

FIG. 1 is a diagram schematically showing a plasma processing apparatus according to one embodiment. FIG. 2 is a diagram showing an embodiment of the power supply system and control system of the plasma processing apparatus shown in FIG. A plasma processing apparatus 10 shown in FIG. 1 is a capacitively coupled plasma processing apparatus.

The plasma processing apparatus 10 has a chamber body 12 . The chamber body 12 has a substantially cylindrical shape. The chamber main body 12 provides its internal space as a chamber 12c. The chamber main body 12 is made of aluminum, for example. The chamber body 12 is connected to ground potential. A plasma-resistant film is formed on the inner wall surface of the chamber body 12, that is, the wall surface defining the chamber 12c. The membrane may be a membrane formed by an anodizing process, or a ceramic membrane such as a membrane formed from yttrium oxide. A passage 12p is formed in the side wall of the chamber main body 12. As shown in FIG. The substrate W passes through the passage 12p when the substrate W is loaded into the chamber 12c and when the substrate W is unloaded from the chamber 12c. A gate valve 12g is provided along the side wall of the chamber body 12 for opening and closing the passage 12p.

A support 15 extends upward from the bottom of the chamber body 12 in the chamber 12c. The support portion 15 has a substantially cylindrical shape and is made of an insulating material such as ceramic. A stage 16 is mounted on the support portion 15 . The stage 16 is supported by the support portion 15 . The stage 16 is configured to support the substrate W within the chamber 12c. Stage 16 includes a lower electrode 18 and an electrostatic chuck 20 . In one embodiment, stage 16 further includes electrode plate 21 . The electrode plate 21 is made of a conductive material such as aluminum and has a substantially disk shape. The lower electrode 18 is provided on the electrode plate 21 . The lower electrode 18 is made of a conductive material such as aluminum and has a substantially disk shape. Lower electrode 18 is electrically connected to electrode plate 21 .

A channel 18 f is provided in the lower electrode 18 . 18 f of flow paths are flow paths for heat exchange media. As the heat exchange medium, a liquid coolant or a coolant (for example, Freon) that cools the lower electrode 18 by vaporization is used. A heat exchange medium is supplied to the flow path 18f from a chiller unit provided outside the chamber body 12 through a pipe 23a. The heat exchange medium supplied to the flow path 18f is returned to the chiller unit via the pipe 23b. That is, the heat exchange medium is supplied to the flow path 18f so as to circulate between the flow path 18f and the chiller unit.

An electrostatic chuck 20 is provided on the lower electrode 18 . The electrostatic chuck 20 has a main body made of an insulator and a film-shaped electrode provided in the main body. A DC power supply is electrically connected to the electrodes of the electrostatic chuck 20 . When a voltage is applied to the electrodes of the electrostatic chuck 20 from the DC power supply, electrostatic attraction is generated between the substrate W placed on the electrostatic chuck 20 and the electrostatic chuck 20 . The substrate W is attracted to the electrostatic chuck 20 by the generated electrostatic attraction and held by the electrostatic chuck 20 . A focus ring FR is arranged on the peripheral edge region of the electrostatic chuck 20 . The focus ring FR has a substantially annular plate shape and is made of silicon, for example. The focus ring FR is arranged to surround the edge of the substrate W. As shown in FIG.

A gas supply line 25 is provided in the plasma processing apparatus 10 . The gas supply line 25 supplies heat transfer gas such as He gas from a gas supply mechanism between the upper surface of the electrostatic chuck 20 and the back surface (lower surface) of the substrate W. As shown in FIG.

A cylindrical portion 28 extends upward from the bottom of the chamber body 12 . The tubular portion 28 extends along the outer circumference of the support portion 15 . The cylindrical portion 28 is made of a conductive material and has a substantially cylindrical shape. The cylindrical portion 28 is connected to ground potential. An insulating portion 29 is provided on the cylindrical portion 28 . The insulating portion 29 has insulating properties and is made of, for example, quartz or ceramic. The insulating portion 29 extends along the outer circumference of the stage 16 .

The plasma processing apparatus 10 further includes an upper electrode 30. As shown in FIG. The upper electrode 30 is provided above the stage 16 . The upper electrode 30 closes the upper opening of the chamber body 12 together with the member 32 . The member 32 has insulation. The upper electrode 30 is supported above the chamber body 12 via this member 32 . When the first high-frequency power supply 61, which will be described later, is electrically connected to the lower electrode 18, the upper electrode 30 is connected to the ground potential.

Upper electrode 30 includes a top plate 34 and a support 36 . The lower surface of the top plate 34 defines the chamber 12c. The top plate 34 is provided with a plurality of gas ejection holes 34a. Each of the plurality of gas discharge holes 34a penetrates the top plate 34 in the plate thickness direction (vertical direction). The top plate 34 is made of silicon, for example, although it is not limited thereto. Alternatively, the top plate 34 may have a structure in which a plasma-resistant film is provided on the surface of an aluminum base material. The membrane may be a membrane formed by an anodizing process, or a ceramic membrane such as a membrane formed from yttrium oxide.

The support 36 is a component that detachably supports the top plate 34 . Support 36 may be formed from an electrically conductive material such as, for example, aluminum. A gas diffusion chamber 36 a is provided inside the support 36 . A plurality of gas holes 36b extend downward from the gas diffusion chamber 36a. The multiple gas holes 36b communicate with the multiple gas discharge holes 34a, respectively. The support member 36 is formed with a gas introduction port 36c for introducing gas into the gas diffusion chamber 36a, and a gas supply pipe 38 is connected to the gas introduction port 36c.

A gas source group 40 is connected to the gas supply pipe 38 via a valve group 42 and a flow controller group 44 . Gas source group 40 includes a plurality of gas sources. Valve group 42 includes a plurality of valves, and flow controller group 44 includes a plurality of flow controllers. Each of the plurality of flow controllers in the flow controller group 44 is a mass flow controller or a pressure-controlled flow controller. A plurality of gas sources in gas source group 40 are each connected to gas supply pipe 38 via a corresponding valve in valve group 42 and a corresponding flow controller in flow controller group 44 . The plasma processing apparatus 10 is capable of supplying gases from one or more gas sources selected from the plurality of gas sources in the gas source group 40 to the chamber 12c at individually adjusted flow rates.

A baffle plate 48 is provided between the cylindrical portion 28 and the side wall of the chamber body 12 . The baffle plate 48 can be configured by coating a ceramic such as yttrium oxide on an aluminum base material, for example. A large number of through holes are formed in the baffle plate 48 . An exhaust pipe 52 is connected to the bottom of the chamber body 12 below the baffle plate 48 . An exhaust device 50 is connected to the exhaust pipe 52 . The evacuation device 50 has a pressure controller such as an automatic pressure control valve and a vacuum pump such as a turbomolecular pump, and can decompress the chamber 12c.

As shown in FIGS. 1 and 2, the plasma processing apparatus 10 further includes a first high frequency power supply 61. As shown in FIG. The first high-frequency power supply 61 is a power supply that generates a first high-frequency power for generating plasma by exciting the gas in the chamber 12c. The first radio frequency has a frequency in the range of 27-100 MHz, for example a frequency of 60 MHz. The first high frequency power supply 61 is connected to the lower electrode 18 via the first matching circuit 65 of the matching box 64 and the electrode plate 21 . The first matching circuit 65 is a circuit for matching the output impedance of the first high-frequency power supply 61 and the impedance on the load side (lower electrode 18 side). Note that the first high-frequency power supply 61 may not be electrically connected to the lower electrode 18 and may be connected to the upper electrode 30 via the first matching circuit 65 .

The plasma processing apparatus 10 further includes a second high frequency power supply 62 . The second high-frequency power supply 62 is a power supply that generates a second high-frequency bias for attracting ions to the substrate W. As shown in FIG. The frequency of the second radio frequency is lower than the frequency of the first radio frequency. The frequency of the second high frequency is within the range of 400 kHz to 13.56 MHz, for example 400 kHz. The second high-frequency power supply 62 is connected to the lower electrode 18 via the second matching circuit 66 of the matching box 64 and the electrode plate 21 . The second matching circuit 66 is a circuit for matching the output impedance of the second high-frequency power supply 62 and the impedance on the load side (lower electrode 18 side).

The plasma processing apparatus 10 further comprises a DC power supply 70 and a switching unit 72 . A DC power supply 70 is a power supply that generates a negative DC voltage. A negative DC voltage is used as a bias voltage for drawing ions into the substrate W placed on the stage 16 . The DC power supply 70 is connected to the switching unit 72 . The switching unit 72 is electrically connected to the lower electrode 18 via a high frequency filter 74 . In the plasma processing apparatus 10 , either one of the DC voltage generated by the DC power supply 70 and the second high frequency power generated by the second high frequency power supply 62 is selectively supplied to the lower electrode 18 .

The plasma processing apparatus 10 further includes a controller PC. The controller PC is arranged to control the switching unit 72 . The controller PC may be configured to further control one or both of the first high frequency power supply 61 and the second high frequency power supply 62 .

In one embodiment, the plasma processing apparatus 10 may further include a main controller MC. The main controller MC is a computer including a processor, storage device, input device, display device, etc., and controls each part of the plasma processing apparatus 10 . Specifically, the main controller MC executes a control program stored in the storage device and controls each part of the plasma processing apparatus 10 based on the recipe data stored in the storage device. With such control, the plasma processing apparatus 10 executes the process specified by the recipe data.

Please refer to FIGS. 2 and 3 below. FIG. 3 is a diagram showing circuit configurations of the DC power supply, switching unit, high-frequency filter, and matching box shown in FIG. The DC power supply 70 is a variable DC power supply and generates a negative DC voltage applied to the lower electrode 18 .

The switching unit 72 is configured to stop the application of the DC voltage from the DC power supply 70 to the lower electrode 18 . In one embodiment, switching unit 72 includes a field effect transistor (FET) 72a, FET 72b, capacitor 72c, and resistive element 72d. FET 72a is, for example, an N-channel MOS FET. FET 72b is, for example, a P-channel MOS FET. The source of the FET 72a is connected to the negative pole of the DC power supply 70. FIG. One end of a capacitor 72c is connected to the negative electrode of the DC power supply 70 and the source of the FET 72a. The other end of capacitor 72c is connected to the source of FET 72b. The source of FET 72b is connected to ground. The gates of FET 72a and FET 72b are connected together. A pulse control signal from the controller PC is supplied to the node NA connected between the gate of the FET 72a and the gate of the FET 72b. The drain of FET 72a is connected to the drain of FET 72b. A node NB connected to the drain of the FET 72a and the drain of the FET 72b is connected to the high frequency filter 74 via the resistance element 72d.

The high frequency filter 74 is a filter that reduces or blocks high frequencies. In one embodiment, high frequency filter 74 includes inductor 74a and capacitor 74b. One end of the inductor 74a is connected to the resistive element 72d. One end of the capacitor 74b is connected to one end of the inductor 74a. The other end of the capacitor 74b is connected to ground. The other end of the inductor 74 a is connected to the matching box 64 .

The matching device 64 has a first matching circuit 65 and a second matching circuit 66 . In one embodiment, the first matching circuit 65 has variable capacitors 65a and 65b, and the second matching circuit 66 has variable capacitors 66a and 66b. One end of the variable capacitor 65a is connected to the other end of the inductor 74a. The other end of the variable capacitor 65a is connected to one end of the first high frequency power supply 61 and the variable capacitor 65b. The other end of the variable capacitor 65b is connected to the ground. One end of the variable capacitor 66a is connected to the other end of the inductor 74a. The other end of the variable capacitor 66a is connected to one end of the second high frequency power supply 62 and the variable capacitor 66b. The other end of the variable capacitor 66b is connected to ground. One end of the variable capacitor 65 a and one end of the variable capacitor 66 a are connected to the terminal 64 a of the matching box 64 . A terminal 64 a of the matcher 64 is connected to the lower electrode 18 via the electrode plate 21 .

Control by the main controller MC and the controller PC will be described below. The following description refers to FIGS. 2 and 4. FIG. FIG. 4 is a timing chart related to the plasma processing method of one embodiment performed using the plasma processing apparatus shown in FIG. In FIG. 4, the horizontal axis indicates time. In FIG. 4, the vertical axis indicates the power of the first high frequency, the DC voltage applied from the DC power supply 70 to the lower electrode 18, and the control signal output by the controller PC. In FIG. 4, the high level of the power of the first high frequency indicates that the first high frequency is supplied to generate plasma, and the power of the first high frequency is low. This indicates that the supply of the first high frequency is stopped. In FIG. 4, a DC voltage at a low level indicates that a negative DC voltage is applied from the DC power supply 70 to the lower electrode 18, and a DC voltage of 0V indicates a DC voltage of 0V. This indicates that no DC voltage is applied from the power supply 70 to the lower electrode 18 .

The main controller MC designates the power and frequency of the first high frequency to the first high frequency power supply 61 . In one embodiment, the main controller MC designates the timing to start supplying the first high-frequency power and the timing to stop supplying the first high-frequency power to the first high-frequency power supply 61 . During the period in which the first high-frequency power is supplied by the first high-frequency power supply 61, plasma is generated in the gas within the chamber. That is, during this period, the step S1 of supplying high frequency power from the high frequency power supply is performed in order to generate plasma. In addition, in the example of FIG. 4, the first high frequency is continuously supplied during execution of the plasma processing method of one embodiment.

The main control unit MC designates the frequency (hereinafter referred to as “DC frequency”) that defines each period in which the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 and the duty ratio to the controller PC. do. The duty ratio is the ratio of the period (“T1” in FIG. 4) during which the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 in each cycle (“PDC” in FIG. 4). . The DC frequency is set below 1 MHz. For example, the DC frequency is set within the range of 50-800 kHz. The duty ratio is adjusted with the DC frequency set below 1 MHz. For example, the duty ratio is adjusted to 50% or less, more preferably 35% or less.

The controller PC generates a control signal according to the DC frequency and duty ratio specified by the main controller MC. The control signal generated by the controller PC can be a pulse signal. In one example, as shown in FIG. 4, the control signal generated by the controller PC has a high level during time period T1 and a low level during time period T2. The period T2 is a period excluding the period T1 within one cycle PDC. Alternatively, the control signal generated by the controller PC may have a low level during the period T1 and a high level during the period T2.

In one embodiment, the control signal generated by controller PC is provided to node NA of switching unit 72 . Upon application of the control signal, switching unit 72 connects DC power supply 70 and node NB to each other so that a negative DC voltage from DC power supply 70 is applied to lower electrode 18 in period T1. On the other hand, the switching unit 72 cuts off the connection between the DC power supply 70 and the node NB so that the negative DC voltage from the DC power supply 70 is not applied to the lower electrode 18 during the period T2. As a result, as shown in FIG. 4, the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 during the period T1, and the negative DC voltage from the DC power supply 70 is applied to the lower electrode 18 during the period T2. is stopped. That is, in the plasma processing method of one embodiment, the step S2 of periodically applying a negative DC voltage from the DC power supply 70 to the lower electrode 18 is performed.

Here, the relationship between the duty ratio and the plasma potential will be described with reference to FIGS. 5(a) and 5(b). (a) and (b) of FIG. 5 are timing charts showing the potential of the plasma. During the period T1, a negative DC voltage is applied to the lower electrode 18 from the DC power supply 70, so positive ions in the plasma move toward the substrate W. As shown in FIG. Therefore, as shown in FIGS. 5(a) and 5(b), the plasma potential is low during the period T1. On the other hand, during the period T2, since the application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 is stopped, the movement of positive ions decreases and mainly the electrons in the plasma move. Therefore, the potential of the plasma becomes high during the period T2.

In the timing chart shown in (a) of FIG. 5, the duty ratio is smaller than in the timing chart shown in (b) of FIG. If the plasma generation conditions are the same, the total amount of positive ions and the total amount of electrons in the plasma do not depend on the duty ratio. That is, the ratio between the area A1 and the area A2 shown in FIG. 5(a) is the same as the ratio between the area A1 and the area A2 shown in FIG. 5(b). Therefore, the smaller the duty ratio, the smaller the plasma potential PV in the period T2.

The etching rate of the substrate W is less dependent on the duty ratio, that is, the ratio of the period T1 during which the negative DC voltage is applied to the lower electrode 18 in each period PDC. On the other hand, when the duty ratio is adjusted to a relatively small value, particularly when the duty ratio is adjusted to 50% or less, the plasma potential becomes small, and the etching rate of the chamber main body 12 is greatly reduced.

Next, with reference to FIGS. 6A to 6D and 7A to 7D, the relationship between the DC frequency, the energy of ions irradiated onto the substrate W, and the energy of ions irradiated onto the inner wall of the chamber body 12 is shown. explain. 6A to 6D are simulation results showing an example of the relationship between the DC frequency and the energy of ions with which the substrate W is irradiated. 7A to 7D are simulation results showing an example of the relationship between the DC frequency and the energy of ions irradiated to the inner wall of the chamber body 12. FIG. 6A to 6D are obtained by simulating the energy distribution (IED: Ion Energy Distribution) of ions irradiated to the substrate W by setting the DC frequency to 200 kHz, 400 kHz, 800 kHz and 1.6 MHz, respectively. This is the result. 7A to 7D show the results obtained by simulating the energy distribution (IED) of ions irradiated to the inner wall of the chamber body 12 by setting the DC frequency to 200 kHz, 400 kHz, 800 kHz and 1.6 MHz, respectively. is. Other simulation conditions are the duty ratio of the negative DC voltage to the lower electrode 18: 40%, the voltage value of the negative DC voltage to the lower electrode 18: -450 V, the pressure in the chamber 12c: 30 mTorr (4. 00 Pa), processing gas supplied to the chamber 12c: Ar gas: first high frequency: 100 MHz, 500 W continuous wave was used.

As shown in FIGS. 6A to 6C, when the DC frequency is 800 kHz or less, the energy distribution of the ions irradiated onto the substrate W has a low-energy side peak and a high-energy side peak. Further, as shown in FIGS. 7A to 7C, when the DC frequency is 800 kHz or less, the energy distribution of the ions irradiated to the inner wall of the chamber body 12 has a low-energy side peak and a high-energy side peak. That is, when the DC frequency is 800 kHz or less, the ions follow the DC voltage periodically applied to the lower electrode 18 .

On the other hand, as shown in FIG. 6D, when the DC frequency is 1.6 MHz, in the energy distribution of the ions irradiated onto the substrate W, the low energy side peak and the high energy side peak do not appear. Further, as shown in FIG. 7D, when the DC frequency is 1.6 MHz, the energy distribution of the ions irradiated to the inner wall of the chamber main body 12 does not show a low-energy side peak and a high-energy side peak. That is, when the DC frequency is 1.6 MHz, the ions do not follow the DC voltage periodically applied to the lower electrode 18 .

The inventors of the present application have extensively studied based on the simulation results of FIGS. 6A to 6D and FIGS. 7A to 7D. As a result, the following events were confirmed.
• The ions follow a DC voltage periodically applied to the lower electrode 18 when the DC frequency is set to less than 1 MHz, preferably in the range of 50-800 kHz.
- Under the condition that the ions follow the DC voltage periodically applied to the lower electrode 18, the dependence of the etching rate of the substrate W on the duty ratio of the DC voltage is small. On the other hand, when the duty ratio is adjusted to a relatively small value, particularly when the duty ratio is adjusted to 50% or less, the potential of the plasma decreases as described with reference to FIG. Therefore, the etching rate of the chamber body 12 is greatly reduced.
• When the DC frequency is set to 1 MHz or higher, the ions do not follow the DC voltage periodically applied to the lower electrode 18 .
・In a situation where the ions do not follow the DC voltage periodically applied to the lower electrode 18, the energy of the ions irradiated to the inner wall of the chamber body 12 tends to increase together with the energy of the ions irradiated to the substrate. be.

Therefore, in the plasma processing apparatus 10 of one embodiment, when the DC voltage is periodically applied to the lower electrode 18, the duty ratio is adjusted to 50% or less while the DC frequency is set to less than 1 MHz. This makes it possible to suppress the decrease in the etching rate of the substrate W and reduce the energy of ions with which the inner wall of the chamber body 12 is irradiated. As a result, generation of particles from the chamber body 12 is suppressed. When the duty ratio is 35% or less, the energy of the ions with which the inner wall of the chamber body 12 is irradiated can be further reduced.

Another embodiment will be described below. (a) and (b) of FIG. 8 are timing charts related to the plasma processing method of another embodiment. In each of FIGS. 8(a) and 8(b), the horizontal axis indicates time. In each of (a) and (b) of FIG. 8 , the vertical axis indicates the power of the first high frequency and the DC voltage applied from the DC power supply 70 to the lower electrode 18 . In each of FIGS. 8(a) and 8(b), the fact that the power of the first high frequency is at a high level indicates that the first high frequency is being supplied for plasma generation. there is Also, in each of FIGS. 8A and 8B, the fact that the power of the first high frequency is at a low level indicates that the supply of the first high frequency is stopped. In addition, in each of FIGS. 8A and 8B, the fact that the DC voltage is at a low level indicates that a negative DC voltage is being applied from the DC power supply 70 to the lower electrode 18. ing. In each of FIGS. 8A and 8B, the fact that the DC voltage is 0 V indicates that the DC voltage is not applied from the DC power supply 70 to the lower electrode 18 .

In the embodiment shown in FIG. 8A, a negative DC voltage is periodically applied to the lower electrode 18 from a DC power source 70, and the first high frequency is periodically applied to generate plasma. supplied to In the embodiment shown in FIG. 8A, the application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 and the supply of the first high frequency are synchronized. That is, during a period T1 during which the DC voltage from the DC power supply 70 is applied to the lower electrode 18, the first high frequency is supplied, and during a period T2 during which the DC voltage application from the DC power supply 70 to the lower electrode 18 is stopped, The supply of the first high frequency is stopped.

In the embodiment shown in FIG. 8B, a negative DC voltage is periodically applied to the lower electrode 18 from a DC power source 70, and the first high frequency is periodically applied to generate plasma. supplied to In the embodiment shown in FIG. 8B, the phase of the supply of the first high-frequency wave is reversed with respect to the phase of application of the negative DC voltage from the DC power supply 70 to the lower electrode 18 . That is, the supply of the first high-frequency wave is stopped during the period T1 during which the DC voltage from the DC power supply 70 is applied to the lower electrode 18, and the application of the DC voltage from the DC power supply 70 to the lower electrode 18 is stopped during the period T2. is supplied with a first radio frequency.

In the embodiment shown in (a) of FIG. 8 and the embodiment shown in (b) of FIG. The first high-frequency power supply 61 starts supplying the first high-frequency power at the rising (or falling) timing of the control signal from the controller PC, and starts supplying the first high-frequency power at the falling (or rising) timing of the control signal from the controller PC. stop the high frequency supply. In the embodiment shown in (a) of FIG. 8 and the embodiment shown in (b) of FIG. 8, unintended generation of high frequencies due to intermodulation distortion can be suppressed.

Hereinafter, plasma processing apparatuses according to some other embodiments will be described. FIG. 9 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. As shown in FIG. 9, a plasma processing apparatus 10A according to another embodiment differs from the plasma processing apparatus 10 in that a first high frequency power source 61 includes a controller PC. That is, the controller PC is a part of the first high-frequency power supply 61 in the plasma processing apparatus 10A. On the other hand, in the plasma processing apparatus 10 , the controller PC is separate from the first high frequency power supply 61 and the second high frequency power supply 62 . In the plasma processing apparatus 10A, the controller PC is part of the first high frequency power supply 61, so the control signal (pulse signal) from the controller PC is not sent to the first high frequency power supply 61. FIG.

FIG. 10 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to still another embodiment. The plasma processing apparatus 10B shown in FIG. 10 includes a plurality of DC power sources 701 and 702 and a plurality of switching units 721 and 722. Each of the plurality of DC power sources 701 and 702 is a power source similar to the DC power source 70 and configured to generate a negative DC voltage applied to the lower electrode 18 . Each of the switching units 721 and 722 has the same configuration as the switching unit 72 . The DC power supply 701 is connected to the switching unit 721 . As with the switching unit 72 , the switching unit 721 is configured to be able to stop the application of the DC voltage from the DC power supply 701 to the lower electrode 18 . The DC power supply 702 is connected to the switching unit 722 . Similar to the switching unit 72 , the switching unit 722 is configured to be able to stop the application of the DC voltage from the DC power supply 702 to the lower electrode 18 .

FIG. 11 is a timing chart related to the plasma processing method of one embodiment performed using the plasma processing apparatus shown in FIG. In FIG. 11, the horizontal axis indicates time. In FIG. 11 , the vertical axis indicates the combined DC voltage, DC voltage of DC power supply 701 and DC voltage of DC power supply 702 . The DC voltage of DC power supply 701 indicates the DC voltage applied from DC power supply 701 to lower electrode 18 , and the DC voltage of DC power supply 702 indicates the DC voltage applied from DC power supply 702 to lower electrode 18 . The synthesized DC voltage is applied to the lower electrode 18 within each period PDC. As shown in FIG. 11, in the plasma processing apparatus 10B, the DC voltage applied to the lower electrode 18 within each period PDC is formed by a plurality of DC voltages sequentially output from a plurality of DC power supplies 701 and 702. . That is, in the plasma processing apparatus 10B, the DC voltage applied to the lower electrode 18 within each period PDC is generated by temporally synthesizing a plurality of DC voltages sequentially output from the plurality of DC power sources 701 and 702. . According to this plasma processing apparatus 10B, the load on each of the plurality of DC power supplies 701 and 702 is reduced.

In the plasma processing apparatus 10B that executes the plasma processing method shown in FIG. 11, the controller PC supplies the first control signal to the switching unit 721. In FIG. The first control signal has a high level (or low level) during the period when the DC voltage from the DC power supply 701 is applied to the lower electrode 18, and the period during which the DC voltage from the DC power supply 701 is not applied to the lower electrode 18. has a low level (or high level) in The controller PC also supplies a second control signal to the switching unit 722 . The second control signal has a high level (or low level) during the period when the DC voltage from the DC power supply 702 is applied to the lower electrode 18, and the period during which the DC voltage from the DC power supply 702 is not applied to the lower electrode 18. has a low level (or high level) in That is, control signals (pulse signals) having different phases are supplied to a plurality of switching units 721 and 722 connected to a plurality of DC power supplies.

12 is a timing chart related to a plasma processing method of another embodiment performed using the plasma processing apparatus shown in FIG. 10. FIG. In FIG. 12, the horizontal axis indicates time. In FIG. 12 , the vertical axis indicates the synthesized DC voltage, DC voltage of DC power supply 701 and DC voltage of DC power supply 702 . The DC voltage of DC power supply 701 indicates the DC voltage applied from DC power supply 701 to lower electrode 18 , and the DC voltage of DC power supply 702 indicates the DC voltage applied from DC power supply 702 to lower electrode 18 . The synthesized DC voltage is applied to the lower electrode 18 within each period. As shown in FIG. 12, in the plasma processing apparatus 10B, the DC voltages applied to the lower electrode 18 within the adjacent periods PDC1 and PDC2 are sequentially output from a plurality of DC power sources 701 and 702 and are out of phase by 90 degrees. formed by a plurality of DC voltages. That is, in the plasma processing apparatus 10B, the DC voltages applied to the lower electrode 18 within the adjacent periods PDC1 and PDC2 are a plurality of DC voltages that are sequentially output from the plurality of DC power sources 701 and 702 and that are out of phase with each other by 90 degrees. is generated by the temporal synthesis of The frequency of the DC voltage generated by temporally synthesizing the plurality of DC voltages sequentially output from the plurality of DC power sources 701 and 702 and having a phase difference of 90 degrees is output from each of the plurality of DC power sources 701 and 702. It is twice the frequency of the DC voltage.

In the plasma processing apparatus 10B that executes the plasma processing method shown in FIG. 12, the controller PC supplies the third control signal to the switching unit 721. The third control signal has a high level (or low level) during the period when the DC voltage from the DC power supply 701 is applied to the lower electrode 18, and the period during which the DC voltage from the DC power supply 701 is not applied to the lower electrode 18. has a low level (or high level) in The controller PC also supplies a fourth control signal to the switching unit 722 . The fourth control signal has a high level (or low level) during the period when the DC voltage from the DC power supply 702 is applied to the lower electrode 18, and the period during which the DC voltage from the DC power supply 702 is not applied to the lower electrode 18. has a low level (or high level) in Also, the phase of the fourth control signal is 90 degrees out of phase with respect to the phase of the third control signal. That is, a plurality of switching units 721 and 722 connected to a plurality of DC power sources 701 and 702 are supplied with control signals (pulse signals) with a phase difference of 90 degrees. Further, the frequency of the third control signal and the frequency of the fourth control signal are generated by temporally synthesizing a plurality of DC voltages sequentially output from the plurality of DC power sources 701 and 702 and having a phase difference of 90 degrees. It is 1/2 times the frequency of the DC voltage. According to this plasma processing apparatus 10B, the frequency of the control signal (pulse signal) supplied to each of the plurality of switching units 721 and 722 connected to the plurality of DC power supplies 701 and 702 can be lowered. As a result, according to the plasma processing apparatus 10B, the heat generation accompanying control of each of the plurality of switching units 721 and 722 can be suppressed.

FIG. 13 is a diagram showing a power supply system and a control system of a plasma processing apparatus according to another embodiment. As shown in FIG. 13, a plasma processing apparatus 10C according to another embodiment differs from the plasma processing apparatus 10B in that the DC power supply 702 is omitted. In the plasma processing apparatus 10C, the DC power supply 701 is connected to switching units 721 and 722 .

FIG. 14 is a diagram showing a power supply system and control system of a plasma processing apparatus according to still another embodiment. A plasma processing apparatus 10D shown in FIG. 14 differs from the plasma processing apparatus 10 in that a waveform adjuster 76 is further provided. A waveform adjuster 76 is connected between the switching unit 72 and the high frequency filter 74 . The waveform adjuster 76 adjusts the waveform of the DC power output from the DC power supply 70 via the switching unit 72, that is, the DC voltage waveform alternately having a negative polarity value and a value of 0V. Specifically, the waveform adjuster 76 adjusts the waveform of the DC voltage applied to the lower electrode 18 so that the waveform of the DC voltage has a substantially triangular shape. Waveform adjuster 76 is, for example, an integrating circuit.

FIG. 15 is a circuit diagram showing an example of the waveform adjuster 76. As shown in FIG. The waveform adjuster 76 shown in FIG. 15 is configured as an integration circuit and has a resistive element 76a and a capacitor 76b. One end of the resistance element 76 a is connected to the resistance element 72 d of the switching unit 72 , and the other end of the resistance element 76 a is connected to the high frequency filter 74 . One end of the capacitor 76b is connected to the other end of the resistance element 76a. The other end of the capacitor 76b is connected to ground. In the waveform adjuster 76 shown in FIG. 15, the rise and fall of the DC voltage output from the switching unit 72 are delayed according to the time constant determined by the resistance value of the resistance element 76a and the capacitance value of the capacitor 76b. occurs. Therefore, according to the waveform adjuster 76 shown in FIG. 15, it is possible to apply a voltage having a pseudo triangular waveform to the lower electrode 18 . According to the plasma processing apparatus 10</b>D having such a waveform adjuster 76 , it is possible to adjust the energy of ions with which the inner wall of the chamber body 12 is irradiated.

Various embodiments have been described above, but various modifications can be configured without being limited to the above-described embodiments. For example, the plasma processing apparatuses of the various embodiments described above may not have the second high-frequency power supply 62 . That is, the plasma processing apparatuses of the various embodiments described above may have a single high frequency power supply.

Further, in the various embodiments described above, the switching unit switches between the application of the negative DC voltage from the DC power supply to the lower electrode 18 and the stoppage thereof, but the DC power supply itself outputs a negative DC voltage. and its output stop, no switching unit is required.

Further, in the various embodiments described above, the frequency that defines each cycle of applying the DC voltage to the lower electrode 18, that is, the case where the DC frequency is set to a constant value of less than 1 MHz has been described as an example. The DC frequency may be decreased over time. As a result, even if the depth of the hole or groove formed by plasma etching the substrate is deep, it is possible to suppress the straightness of the ions from deteriorating in the hole or groove. As a result, deterioration of etching characteristics can be suppressed.

In addition, the characteristic configurations of the various embodiments described above can be used in arbitrary combinations. Furthermore, although the plasma processing apparatuses according to the various embodiments described above are capacitively coupled plasma processing apparatuses, the plasma processing apparatus in the modification may be an inductively coupled plasma processing apparatus.

It should be noted that when the duty ratio is high, the energy of the ions irradiated to the chamber main body 12 increases. Therefore, by setting the duty ratio to a high value, for example, by setting the duty ratio to a value greater than 50%, it is possible to clean the inner wall of the chamber body 12 .

Evaluation experiments conducted on the plasma processing method using the plasma processing apparatus 10 will be described below.

(First evaluation experiment)
In the first evaluation experiment, a sample having a silicon oxide film was attached to each of the chamber 12c side surface of the top plate 34 of the plasma processing apparatus 10 and the side wall of the chamber body 12, and a silicon oxide film was placed on the electrostatic chuck 20. A sample having an oxide film was mounted. Then, in the first evaluation experiment, plasma processing was performed under the following conditions. In the first evaluation experiment, the duty ratio of the negative DC voltage periodically applied to the lower electrode 18 was used as a variable parameter.

<Conditions of plasma treatment in the first evaluation experiment>
・Pressure in chamber 12c: 20 mTorr (2.66 Pa)
・Flow rate of gas supplied to chamber 12c C4F8 gas: 24 sccm
O2 gas: 16 sccm
Ar gas: 150 sccm
・First high frequency: 100 MHz, 500 W continuous wave ・Negative DC voltage for lower electrode 18 Voltage value: -3000 V
Frequency (DC frequency): 200kHz
・Processing time: 60 seconds

In the first evaluation experiment, the etching amount (film thickness reduction amount) of the silicon oxide film of the sample attached to the chamber 12c side surface of the top plate 34 was measured. Also, in the first evaluation experiment, the etching amount (film thickness reduction amount) of the sample silicon oxide film attached to the side wall of the chamber body 12 was measured. In the first evaluation experiment, the etching amount (film thickness reduction amount) of the silicon oxide film of the sample placed on the electrostatic chuck 20 was measured. FIG. 16A is a graph showing the relationship between the duty ratio obtained in the first evaluation experiment and the etching amount of the sample silicon oxide film attached to the surface of the top plate 34 on the chamber 12c side. be. FIG. 16(b) is a graph showing the relationship between the duty ratio and the etching amount of the sample silicon oxide film attached to the side wall of the chamber body 12, which was obtained in the first evaluation experiment. FIG. 17 is a graph showing the relationship between the duty ratio and the etching amount of the silicon oxide film of the sample placed on the electrostatic chuck 20, obtained in the first evaluation experiment.

As shown in FIG. 17, the dependence of the etching amount of the silicon oxide film of the sample placed on the electrostatic chuck 20 on the duty ratio was small. Further, as shown in FIGS. 16A and 16B, when the duty ratio is 35% or less, the sample silicon oxide film attached to the surface of the top plate 34 on the chamber 12c side was considerably small. Also, as shown in FIGS. 16A and 16B, when the duty ratio is 35% or less, the etching amount of the sample silicon oxide film attached to the side wall of the chamber body 12 is , was considerably smaller. Therefore, the first evaluation experiment confirmed that the etching rate of the substrate is less dependent on the duty ratio occupied by the period during which the negative DC voltage is applied to the lower electrode 18 in each period PDC. Further, when the duty ratio is small, particularly when the duty ratio is 35% or less, the etching rate of the chamber body 12 is greatly reduced, that is, the energy of the ions irradiated to the inner wall of the chamber body 12 is decreased. It was confirmed. From the graphs of FIGS. 16(a) and 16(b), if the duty ratio is 50% or less, it is estimated that the energy of the ions irradiated to the inner wall of the chamber main body 12 is considerably reduced. be.

(Second evaluation experiment)
In the second evaluation experiment, a sample having a silicon oxide film was attached to each of the chamber 12c side surface of the top plate 34 of the plasma processing apparatus 10 and the side wall of the chamber main body 12, and a silicon oxide film was attached on the electrostatic chuck 20. A sample having an oxide film was mounted. Then, in the second evaluation experiment, plasma processing was performed under the following conditions.

<Conditions of plasma treatment in the second evaluation experiment>
・Pressure in chamber 12c: 20 mTorr (2.66 Pa)
・Flow rate of gas supplied to chamber 12c C4F8 gas: 24 sccm
O2 gas: 16 sccm
Ar gas: 150 sccm
・First high frequency: 100 MHz, 500 W continuous wave ・Negative DC voltage for lower electrode 18 Voltage value: -3000 V
Frequency (DC frequency): 200kHz
Duty ratio: 35%
・Processing time: 60 seconds

In a comparative experiment, a sample having a silicon oxide film was attached to each of the chamber 12c side surface of the top plate 34 of the plasma processing apparatus 10 and the side wall of the chamber main body 12, and a silicon oxide film was placed on the electrostatic chuck 20. A sample with membrane was mounted. In a comparative experiment, plasma processing was performed under the following conditions. Note that the second high-frequency condition in the comparative experiment was such that the etching amount (thickness reduction in film thickness) of the silicon oxide film of the sample placed on the electrostatic chuck 20 was the same as the plasma processing in the second evaluation experiment and the comparative experiment. It was set so as to be substantially the same as the plasma treatment.

<Conditions of plasma treatment in comparative experiment>
・Pressure in chamber 12c: 20 mTorr (2.66 Pa)
・Flow rate of gas supplied to chamber 12c C4F8 gas: 24 sccm
O2 gas: 16 sccm
Ar gas: 150 sccm
・First high frequency: 100 MHz, 500 W continuous wave ・Second high frequency: 400 kHz, 2500 W continuous wave ・Processing time: 60 seconds

In each of the second evaluation experiment and the comparative experiment, the etching amount (film thickness reduction amount) of the silicon oxide film of the sample attached to the chamber 12c side surface of the top plate 34 was measured. Also, in each of the second evaluation experiment and the comparative experiment, the etching amount (film thickness reduction amount) of the silicon oxide film of the sample attached to the side wall of the chamber main body 12 was measured. FIG. 18(a) is a graph showing the amount of etching of the silicon oxide film of the sample attached to the surface of the top plate 34 on the chamber 12c side, obtained in the second evaluation experiment and the comparative experiment. (b) of FIG. 18 is a graph showing the etching amount of the silicon oxide film of the sample attached to the side wall of the chamber main body 12, obtained in each of the second evaluation experiment and the comparative experiment. In the graph of FIG. 18(a), the horizontal axis indicates the radial distance from the center of the chamber 12c to the measurement position in the sample attached to the surface of the top plate 34 on the chamber 12c side. In the graph of FIG. 18(a), the vertical axis indicates the amount of etching of the sample silicon oxide film attached to the surface of the top plate 34 on the chamber 12c side. In the graph of FIG. 18(b), the horizontal axis indicates the vertical distance of the measurement position in the sample attached to the side wall of the chamber 12c from the surface of the top plate 34 on the chamber 12c side. In the graph of (b) of FIG. 18 , the vertical axis indicates the amount of etching of the sample silicon oxide film attached to the side wall of the chamber body 12 .

As shown in FIGS. 18(a) and 18(b), in the second evaluation experiment using the negative DC voltage, the chamber 12c side of the top plate 34 was higher than the comparative experiment using the second high frequency. The etching amount of the silicon oxide film of the sample attached to the surface of the sample was small. Further, as shown in FIGS. 18A and 18B, compared to the comparative experiment using the second high frequency, in the second evaluation experiment using the negative DC voltage, the side wall of the chamber main body 12 The etching amount of the silicon oxide film of the sample attached to the substrate was considerably small. Therefore, by periodically applying a negative DC voltage to the lower electrode 18, the following effects were confirmed. That is, it is possible to greatly reduce the energy of the ions irradiated to the wall surface of the chamber main body 12 and the wall surface of the upper electrode 30 while suppressing the decrease in the energy of the ions irradiated to the substrate on the electrostatic chuck 20 . was confirmed.

Evaluation simulations performed for the plasma processing method using the plasma processing apparatus 10 will be described below.

(Evaluation simulation)
In the evaluation simulation, the energy distribution (IED) of ions with which the substrate W is irradiated and the energy distribution (IED) of ions with which the inner wall of the chamber body 12 is irradiated were simulated under the following conditions. In the evaluation simulation, the duty ratio of the negative DC voltage periodically applied to the lower electrode 18 was used as a variable parameter with the DC frequency set to 200 kHz, which is less than 1 MHz.

<Conditions for evaluation simulation>
・Pressure in chamber 12c: 30 mTorr (4.00 Pa)
・Processing gas supplied to the chamber 12c: Ar gas ・First high frequency wave: 100 MHz, 500 W continuous wave ・Negative DC voltage for the lower electrode 18 Voltage value: -450 V
Frequency (DC frequency): 200kHz

19A to 19E are simulation results showing an example of the relationship between the duty ratio and the energy of ions with which the substrate W is irradiated. 20A to 20E are simulation results showing an example of the relationship between the duty ratio and the energy of ions irradiated to the inner wall of the chamber body 12. FIG.

As shown in FIGS. 19A to 19E, the maximum value of the energy of the ions irradiated to the substrate W was maintained at about 270 eV, which is within the predetermined allowable specification range, regardless of the change in duty ratio. Further, as shown in FIGS. 20A to 20E, when the duty ratio is 50% or less, the maximum value of the energy of the ions irradiated to the inner wall of the chamber main body 12 is within the range of the predetermined allowable specifications. It was reduced to about 60 eV or less. Therefore, in the evaluation simulation, it was confirmed that the dependence of the etching rate of the substrate W on the duty ratio of the DC voltage is relatively small when the DC frequency is set to 200 kHz, which is less than 1 MHz. Further, when the DC frequency is set to 200 kHz, which is less than 1 MHz, and the duty ratio is adjusted to 50% or less, the energy of the ions irradiated to the inner wall of the chamber main body 12 is within a predetermined allowable specification range. It was confirmed that it was lowered to the inside.

10, 10A to 10D plasma processing apparatus 12 chamber body 12c chamber 16 stage 18 lower electrode 61 first high frequency power supply 70, 701, 702 DC power supply 72, 721, 722 switching unit PC controller MC main control section

Claims (14)

a chamber body providing a chamber;
a stage provided in the chamber body, including a lower electrode, and supporting a substrate;
a high-frequency power supply that supplies high-frequency waves for exciting the gas supplied to the chamber;
one or more DC power sources for generating a DC voltage having a negative polarity applied to the lower electrode to attract ions to the inner wall of the chamber body;
a switching unit configured to stop application of the DC voltage to the lower electrode;
a controller configured to control the switching unit;
with
The controller periodically applies only a negative DC voltage from the one or more DC power sources to the lower electrode, and the frequency defining each cycle of applying the DC voltage is set to be less than 1 MHz. state, the plasma processing apparatus controlling the switching unit to adjust the ratio of the period during which the DC voltage is applied to the lower electrode in each of the cycles. 2. The plasma according to claim 1, wherein in the step of applying only the DC voltage, the controller controls the switching unit so as to increase the energy of ions irradiated to the inner wall of the chamber body by adjusting the ratio. processing equipment. 3. The plasma processing apparatus according to claim 1, wherein said controller controls said switching unit to adjust said percentage to a value greater than 50%. A plurality of DC power sources are provided as the one or more DC power sources,
2. The controller controls the switching unit so that the DC voltage applied to the lower electrode in each cycle is formed by a plurality of DC voltages sequentially output from the plurality of DC power supplies. 4. The plasma processing apparatus according to any one of 1 to 3. The controller controls the high-frequency power supply so that the high-frequency power is supplied during a period in which the DC voltage is applied, and the high-frequency power supply is stopped in a period in which the DC voltage is not applied. 5. The plasma processing apparatus according to any one of 2 to 4. The controller controls the high-frequency power supply such that the supply of the high-frequency power is stopped during a period in which the DC voltage is applied, and the high-frequency power supply is supplied in a period in which the DC voltage is stopped. 5. The plasma processing apparatus according to any one of 2 to 4. The plasma processing apparatus according to any one of claims 1 to 6, wherein said high frequency has a frequency within a range of 27-100 MHz. A cleaning method performed in a plasma processing apparatus, comprising:
The plasma processing apparatus is
a chamber body providing a chamber;
a stage provided in the chamber body, including a lower electrode, and supporting a substrate;
a high-frequency power supply that supplies high-frequency waves for generating plasma of the gas supplied to the chamber;
one or more DC power sources for generating a DC voltage having a negative polarity applied to the lower electrode to attract ions to the inner wall of the chamber body;
with
The cleaning method is
a step of supplying a high frequency from the high frequency power source;
applying only a DC voltage having a negative polarity from the one or more DC power sources to the lower electrode;
including
In the step of applying only the DC voltage, only the DC voltage is periodically applied to the lower electrode, and a frequency defining each period in which the DC voltage is applied to the lower electrode is set to be less than 1 MHz. the cleaning method, wherein a ratio of a period during which the DC voltage is applied to the lower electrode in each period is adjusted. 9. The cleaning method according to claim 8, wherein in the step of applying only the DC voltage, energy of ions irradiated to the inner wall of the chamber main body is increased by adjusting the ratio. 10. A cleaning method according to claim 8 or 9, wherein said percentage is adjusted to a value greater than 50%. The plasma processing apparatus includes a plurality of DC power sources as the one or more DC power sources,
11. The DC voltage applied to the lower electrode in each period is formed by a plurality of DC voltages sequentially output from the plurality of DC power supplies. cleaning method. 12. The cleaning device according to any one of claims 8 to 11, wherein the high-frequency wave is supplied during the period in which the DC voltage is applied, and the supply of the high-frequency wave is stopped in the period during which the DC voltage is not applied. Method. 12. The cleaning device according to any one of claims 8 to 11, wherein the supply of the high-frequency wave is stopped during the period during which the DC voltage is applied, and the high-frequency wave is supplied during the period during which the DC voltage is stopped being applied. Method. A cleaning method according to any one of claims 8 to 13, wherein said high frequency has a frequency within the range of 27 to 100 MHz.

Images