JP7226414B2 - Light emitting device, optical device and information processing device - Google Patents

Description

The present invention relates to a light emitting device, an optical device and an information processing device.

Patent Document 1 discloses a light source, a light diffusion member that has a plurality of lenses arranged adjacent to each other on a predetermined plane, diffuses light emitted from the light source, and light diffused by the light diffusion member. and an imaging device for receiving reflected light reflected by an object, and a plurality of lenses are arranged so that the period of interference fringes in diffused light is three pixels or less.

JP 2018-54769 A

By the way, wiring such as bonding wires may be provided not only on one side surface of the light emitting element array but also on a plurality of side surfaces, such as when it is desired to reduce the inductance of the circuit that drives the light emitting element array. Also, a plurality of circuit elements such as a light receiving element and a temperature detecting element may be arranged close to the side surface of the light emitting element array.
In such a case, a plurality of circuit elements are separately arranged on the wiring substrate on the side of the driving element that drives the light emitting element array and on the wiring substrate on the side opposite to the driving element with the light emitting element array interposed therebetween. A configuration in which wiring such as a bonding wire is provided on the side surface is conceivable.
However, when a circuit element is arranged between the light emitting element array and the driving element, the route of the wiring pattern connecting the light emitting element array and the driving element is restricted, which may increase the inductance of the circuit.

The present invention provides a light-emitting device or the like having a structure in which a drive element and a light-emitting element array are easily brought closer to each other than a configuration in which a circuit element is provided on the drive element side of the light-emitting element array.

According to the first aspect of the present invention, the wiring substrate, the first and second side surfaces facing each other, and the third side surfaces facing each other connecting the first and second side surfaces. and a fourth side surface, the light emitting element array provided on the wiring substrate; a driving element provided on the wiring substrate on the first side surface side for driving the light emitting element array; a first circuit element and a second circuit element provided along the second side surface at a position of the wiring substrate farther from the driving element than the second side surface; and the third side surface. and a wiring member provided on the fourth side surface and extending from the upper surface electrode of the light emitting element array toward the outside of the light emitting element array, between the first side surface and the driving element. is a light-emitting device that is not provided with other circuit elements.
The invention according to claim 2 is the light emitting device according to claim 1, wherein at least one of the first circuit element and the second circuit element is a light receiving element for receiving light emitted from the light emitting element array. is.
The invention according to claim 3 is the light-emitting device according to claim 1, wherein at least one of the first circuit element and the second circuit element is a temperature detection element for detecting the temperature of the light-emitting element array. be.
A fourth aspect of the invention is directed to any one of the first to third aspects, wherein at least one of the first circuit element and the second circuit element is a capacitor that supplies a current to the light emitting element array. The light emitting device described.
According to a fifth aspect of the invention, between the second side surface and the first circuit element and the second circuit element, a 5. The light-emitting device according to any one of claims 1 to 4, wherein no wiring member extending toward is provided.
According to a sixth aspect of the invention, the first circuit element and the second circuit element each have a plurality of terminals, and the first circuit element is more likely to be connected to the third circuit element than the second circuit element. Wirings arranged on the side surface and connected to each of the plurality of terminals of the first circuit element are drawn out to the third side, and the second circuit element is located farther from the first circuit element. is arranged on the fourth side surface side, and wirings connected to the plurality of terminals of the second circuit element are led out to the fourth side surface side. 1. The light-emitting device according to item 1.
The invention according to claim 7 is any one of claims 1 to 6, wherein a light diffusing member for diffusing light emitted from the light emitting element array toward the outside is provided on an emission path of the light emitting element array. 1. The light-emitting device according to claim 1.
According to an eighth aspect of the invention, at least one of the first circuit element and the second circuit element is a light receiving element for receiving light emitted from the light emitting element array, and the light diffusing member is a flat surface. 8. The light-emitting device according to claim 7, which is provided at a position overlapping with the light-emitting element array and the light-receiving element when viewed.
The invention according to claim 9 is the light-emitting device according to any one of claims 1 to 8, wherein the light-emitting element array has a plurality of light-emitting elements connected in parallel.
The invention according to claim 10 is a light emitting device according to any one of claims 1 to 9; and a portion, wherein the light receiving portion outputs a signal corresponding to the time from when the light is emitted from the light emitting element array to when the light is received by the light receiving portion.
The invention according to claim 11 is directed to the optical device according to claim 10, and the reflected light emitted from the light emitting element array provided in the optical device, reflected by the object to be measured, and received by the light receiving unit provided in the optical device. and a shape identifying unit that identifies the three-dimensional shape of the object to be measured based on the information processing apparatus.
The invention according to claim 12 is the information processing apparatus according to claim 11, further comprising an authentication processing unit that performs authentication processing regarding use of the device based on the result of identification by the shape identification unit.

According to the first aspect of the invention, it is easier to bring the driving element and the light emitting element array closer to each other than the configuration in which the circuit element is provided on the driving element side of the light emitting element array.
According to the second aspect of the invention, in the configuration in which the light-emitting element array has light-receiving elements for receiving light emitted from the light-emitting element array, it is easy to bring the driving element and the light-emitting element array close to each other.
According to the third aspect of the invention, in the configuration having the temperature detection element for detecting the temperature of the light emitting element array, the driving element and the light emitting element array can be easily brought close to each other.
According to the fourth aspect of the invention, in the configuration having the capacitor that supplies current to the light emitting element array, it is easy to bring the driving element and the light emitting element array close to each other.
According to the invention of claim 5, compared with the case where wiring members are provided between the second side surface and the first circuit element and between the second side surface and the second circuit element In addition, it is easy to arrange the circuit elements close to the light emitting element array.
According to the sixth aspect of the invention, compared to the case where the wiring to which the first circuit element is connected and the wiring to which the second circuit element is connected are led out to the same side, the two circuit elements are connected to the light emitting element. Easy to place close to the array.
According to the seventh aspect of the invention, the light emitted from the light emitting element array irradiates a wider range than the configuration without the light diffusing member.
According to the eighth aspect of the present invention, the light emitted from the light emitting element array and reflected by the light diffusion member is received by the light receiving element as compared with the case where the light emitting element array and the light receiving element are not provided at a position overlapping the light emitting element array. increase in quantity.
According to the ninth aspect of the invention, compared to a configuration in which the light emitting elements are individually driven, light with a higher intensity is emitted.
According to the tenth aspect of the invention, an optical device capable of three-dimensional measurement is provided.
According to the eleventh aspect of the invention, an information processing apparatus capable of measuring a three-dimensional shape is provided.
According to the twelfth aspect of the invention, an information processing apparatus equipped with authentication processing based on a three-dimensional shape is provided.

It is a figure which shows an example of an information processing apparatus. It is a block diagram explaining the structure of an information processing apparatus. 2 is a plan view of a light emitting element array; FIG. It is a figure explaining the cross-sectional structure of one VCSEL in a light emitting element array. It is a figure explaining an example of a light-diffusion member. (a) is a plan view, and (b) is a sectional view taken along line VB-VB of (a). FIG. 4 is a diagram showing an example of an equivalent circuit that drives a light emitting element array by low-side driving; It is a figure explaining the light-emitting device to which this Embodiment is applied. (a) is a plan view, (b) is a sectional view taken along line VIIB-VIIB in (a), and (c) is a sectional view taken along line VIIC-VIIC in (a). FIG. 3 is a diagram illustrating wiring patterns provided on a wiring substrate and a base material in a light emitting device to which the present embodiment is applied; (a) is the front surface of the wiring board, (b) is the front surface of the substrate, and (c) is the rear surface of the substrate. It is a top view explaining the light-emitting device shown for comparison. (a) is a plan view, (b) is a sectional view taken along line IXB-IXB of (a), and (c) is a sectional view taken along line IXC-IXC of (a). FIG. 3 is a diagram illustrating wiring patterns provided on a wiring substrate and a base material in a light emitting device shown for comparison; (a) is the front surface of the wiring board, (b) is the front surface of the substrate, and (c) is the rear surface of the substrate.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
An information processing device identifies whether or not a user who has accessed the information processing device is permitted to access, and only when the user who is permitted access is authenticated, is the device itself. In many cases, the use of information processing equipment is permitted. Traditionally, methods have been used to authenticate users by means of passwords, fingerprints, irises, and the like. Recently, there is a demand for an authentication method with even higher security. As this method, authentication is performed using a three-dimensional image such as the shape of the user's face.
Here, the information processing apparatus is described as being a portable information processing terminal as an example, and is described as authenticating a user by recognizing the shape of a face captured as a three-dimensional image. Note that the information processing apparatus can be applied to an information processing apparatus such as a personal computer (PC) other than the portable information processing terminal.
Furthermore, the configurations, functions, methods, and the like described in the present embodiment can also be applied to recognition of a three-dimensional shape as an object to be measured other than face shape recognition. That is, it may be applied to recognition of shapes of objects other than faces. Moreover, the distance to the object to be measured does not matter.

(Information processing device 1)
FIG. 1 is a diagram showing an example of an information processing device 1. As shown in FIG. As described above, the information processing device 1 is a portable information processing terminal as an example.
The information processing device 1 includes a user interface section (hereinafter referred to as a UI section) 2 and an optical device 3 that acquires a three-dimensional image. The UI unit 2 is configured by, for example, integrating a display device for displaying information to a user and an input device for inputting an instruction for information processing by a user's operation. A display device is, for example, a liquid crystal display or an organic EL display, and an input device is, for example, a touch panel.

The optical device 3 includes a light emitting device 4 and a three-dimensional sensor (hereinafter referred to as a 3D sensor) 5 . The light emitting device 4 irradiates light toward an object to be measured for acquiring a three-dimensional image, which is a face in the example described here. The 3D sensor 5 acquires the light emitted by the light emitting device 4 and reflected back from the face. Here, it is assumed that a three-dimensional image of the face is acquired based on the so-called ToF (Time of Flight) method, which uses the time of flight of light. In the following description, the face is referred to as an object to be measured even when a three-dimensional image of the face is acquired. A three-dimensional image may be obtained by using an object other than the face as the object to be measured. Acquiring a three-dimensional image is sometimes referred to as 3D sensing. The 3D sensor 5 is an example of a light receiving section.

The information processing apparatus 1 is configured as a computer including a CPU, ROM, RAM, and the like. The ROM includes non-volatile rewritable memory such as flash memory. Then, the programs and constants stored in the ROM are expanded in the RAM and executed by the CPU, thereby causing the information processing apparatus 1 to operate and various information processing to be performed.

FIG. 2 is a block diagram for explaining the configuration of the information processing device 1. As shown in FIG.
The information processing device 1 includes the optical device 3, the optical device control section 8, and the system control section 9 described above. The optical device control section 8 controls the optical device 3 . The optical device control section 8 includes a shape specifying section 81 . The system control unit 9 controls the entire information processing apparatus 1 as a system. The system control unit 9 also includes an authentication processing unit 91 . The system control unit 9 is connected to the UI unit 2, a speaker 92, a two-dimensional camera (referred to as a 2D camera in FIG. 2) 93, and the like.
They will be described in order below.

The light-emitting device 4 included in the optical device 3 includes a wiring substrate 10, a base material 100, a light-emitting element array 20, a light diffusion member 30, and a light-receiving element for light amount monitoring (referred to as PD in FIG. 2 and below). 40 , a temperature detection element (referred to as TD in FIG. 2 and below) 45 , a driving section 50 , a holding section 60 and a capacitor 70 . Furthermore, the light emitting device 4 includes passive elements such as the resistance element 6 and the capacitor 7 in order to operate the driving section 50 . The driving unit 50 includes driving elements for driving the light emitting element array 20 as described later. Therefore, in the figure, it is described as a driving section (driving element). Although two capacitors 70 are illustrated, the number may be one or more than two. Furthermore, each of the resistive element 6 and the capacitor 7 may be plural. Here, the capacitor 70, the 3D sensor 5, the resistance element 6, the capacitor 7, and the like other than the light emitting element array 20, PD 40, TD 45, and drive unit 50 may be referred to as circuit components without being distinguished from each other.

Light emitting element array 20 , PD 40 and TD 45 are provided on substrate 100 . The base material 100 is composed of an electrically insulating member. Base material 100 , drive unit 50 , capacitor 70 , resistor element 6 and capacitor 7 are provided on wiring board 10 . That is, the light emitting element array 20, PD 40 and TD 45 are provided on the wiring board 10 with the base material 100 interposed therebetween. Here, it is assumed that the light emitting element array 20, the PD 40 and the TD 45 are provided on the wiring board 10 even if the substrate 100 is interposed therebetween. In addition, the driving unit 50 is configured by a semiconductor integrated circuit as an example.

The light emitting element array 20 is configured as an array in which a plurality of light emitting elements are arranged two-dimensionally (see FIG. 3 described later). The light emitting element is, for example, a vertical cavity surface emitting laser element VCSEL (Vertical Cavity Surface Emitting Laser). In the following description, the light emitting element is a vertical cavity surface emitting laser element VCSEL. A vertical cavity surface emitting laser element VCSEL is denoted as VCSEL. The light-emitting element array 20 emits light in a direction perpendicular to the surface of the wiring board 10 or base material 100 . When three-dimensional sensing is performed by the ToF method, the light emitting element array 20 is required to emit pulsed light (hereinafter referred to as an emitted light pulse) having a frequency of 100 MHz or more and a rise time of 1 ns or less. be done. Further, in the case of face authentication as an example, the distance at which light is emitted is approximately 10 cm to 1 m. The range to be measured as a 3D shape is about 1 m square. Note that the distance irradiated with light is referred to as a measurement distance, and the range in which the 3D shape of the object to be measured is measured is referred to as a measurement range or an irradiation range. Also, a surface virtually provided in the measurement range or the irradiation range is referred to as an irradiation surface.

The PD 40 outputs an electric signal corresponding to the amount of light received (hereinafter referred to as the amount of received light), and includes a p-type Si region that serves as an anode, an i (intrinsic) type Si region, and an n-type that serves as a cathode. The photodiode is a pin-type photodiode composed of a Si region of . An anode electrode is provided in the p-type Si region, and a cathode electrode is provided in the n-type Si region. The PD 40 is an example of a first circuit element and an example of a light receiving element.

A TD 45 is a temperature sensing element that senses the temperature of the substrate 100 . The TD 45 is, for example, a surface mount type negative temperature coefficient thermistor (NTC) or a positive temperature coefficient thermistor (PTC). A negative temperature coefficient thermistor decreases in resistance as the temperature rises, and a positive temperature coefficient thermistor increases in resistance when the temperature exceeds a certain level. Using the above characteristics of the TD 45, the temperature of the base material 100 is detected, and the temperature of the light emitting element array 20 is indirectly monitored. Therefore, the TD 45 should be arranged close to the light emitting element array 20 . A thermistor is non-polar, but some other temperature sensor elements are polar. Note that the TD45 is an example of the second circuit element.

A light diffusing member 30 is provided to cover the light emitting element array 20 and the PD 40 . That is, the light diffusing member 30 is provided at a predetermined distance from the light emitting element array 20 and the PD 40 on the substrate 100 by the holding portion 60 provided on the substrate 100 . The light diffusion member 30 covering the light emitting element array 20 and the PD 40 means that the light diffusion member 30 is provided on the light emission path of the light emitted from the light emitting element array 20, and the light emitted from the light emitting element array 20 is diffused. It means that it is provided so as to penetrate the member 30 . It refers to a state in which the light emitting element array 20 and the PD 40 overlap with the light diffusion member 30 when viewed in plan. Here, the planar view refers to the case of viewing on the xy plane in FIG. 3, FIG. 7A, etc. described later. The PD 40 is a position covered by the light diffusing member 30 so as to easily receive part of the light reflected by the light diffusing member 30 among the light emitted from the light emitting element array 20. 20. In FIG. 2 , the light diffusion member 30 is provided so as to cover the TD 45 as well, but the light diffusion member 30 may not cover the TD 45 . If the light diffusion member 30 does not cover the TD 45, the area of the expensive light diffusion member 30 can be reduced.

The holding portion 60 is provided at the edge portion of the light diffusion member 30 and holds the light diffusion member 30 . Here, the holding section 60 is provided so as to surround the light emitting element array 20, PD40 and TD45. Here, it is assumed that the outer shape of the base material 100, the outer shape of the light diffusing member 30, and the outer shape of the holding portion 60 are the same. Therefore, the outer edges of the base material 100, the light diffusing member 30, and the holding portion 60 overlap each other. The outer shape of the base material 100 may be larger than the outer shape of the light diffusion member 30 and the outer shape of the holding portion 60 .

Details of the wiring board 10, the base material 100, the light emitting element array 20, the light diffusion member 30, the driving section 50, and the holding section 60 in the light emitting device 4 will be described later.

The 3D sensor 5 comprises a plurality of light receiving cells. For example, each light-receiving cell receives a pulse-shaped reflected light (hereinafter referred to as a light-receiving pulse) from the object to be measured in response to the light pulse emitted from the light-emitting element array 20, and corresponds to the time until the light is received. Each light receiving cell is configured to accumulate an electric charge to be applied to the light receiving cell. The 3D sensor 5 is constructed as a CMOS device in which each light-receiving cell has two gates and corresponding charge storage portions. By alternately applying pulses to the two gates, the generated photoelectrons are transferred at high speed to either of the two charge storage units. Charges corresponding to the phase difference between the emitted light pulse and the received light pulse are accumulated in the two charge accumulation units. Then, the 3D sensor 5 outputs a digital value as a signal corresponding to the phase difference between the emitted light pulse and the received light pulse for each light receiving cell via the AD converter. That is, the 3D sensor 5 outputs a signal corresponding to the time from when the light is emitted from the light emitting element array 20 to when the light is received by the 3D sensor 5 . Note that the AD converter may be provided in the 3D sensor 5 or may be provided outside the 3D sensor 5 .

As described above, in the case of face authentication, the light emitting element array 20 is required to irradiate light in an irradiation range of about 1 m square at a distance of about 10 cm to about 1 m. Then, the 3D shape of the object to be measured is measured by the 3D sensor 5 receiving the reflected light from the object to be measured. For this reason, the light-emitting element array 20 is required to have a large output, efficiently dissipate heat generated by the light-emitting element array 20 , and be required to suppress overheating of the light-emitting element array 20 .

A shape specifying unit 81 of the optical device control unit 8 acquires a digital value obtained for each light receiving cell from the 3D sensor 5, and calculates the distance to the object to be measured for each light receiving cell. Then, the 3D shape of the object to be measured is specified based on the calculated distance.

The authentication processing unit 91 of the system control unit 9 determines whether the 3D shape of the object to be measured, which is the specified result specified by the shape specifying unit 81, is a 3D shape stored in advance in a ROM or the like. Perform authentication processing. Note that the authentication processing regarding the use of the information processing device 1 is, for example, a processing of whether or not to permit the use of the information processing device 1 which is the own device. For example, when it is determined that the 3D shape of the face, which is the object to be measured, matches the face shape stored in a storage member such as a ROM, the information processing apparatus 1 including various applications provided by the information processing apparatus 1 is allowed to use.
The shape identification unit 81 and the authentication processing unit 91 described above are configured by a program, for example. Alternatively, it may be configured by an integrated circuit such as ASIC or FPGA. Furthermore, it may be composed of software such as a program and an integrated circuit such as an ASIC.

Although the optical device 3 , the optical device control section 8 and the system control section 9 are shown separately in FIG. 2 , the system control section 9 may include the optical device control section 8 . Also, the optical device controller 8 may be included in the optical device 3 . Furthermore, the optical device 3, the optical device controller 8 and the system controller 9 may be integrated.

Next, before describing the light emitting device 4, the light emitting element array 20, the light diffusing member 30, and the circuit for driving the light emitting element array 20, which constitute the light emitting device 4, will be described. A circuit for driving the light emitting element array 20 includes the driving section 50, the capacitor 70, the PD40 and the TD45.

(Configuration of light-emitting element array 20)
FIG. 3 is a plan view of the light emitting element array 20. FIG. The light-emitting element array 20 has a rectangular planar shape when viewed from above, and is configured by arranging a plurality of VCSELs in a two-dimensional array. The right direction of the paper is defined as the x direction, and the upper direction of the paper is defined as the y direction. A direction perpendicular to the x-direction and the y-direction in a counterclockwise direction is defined as the z-direction. Note that the x, y, and z directions in each drawing are common. The front surface refers to the surface on the +z direction side, and the back surface refers to the surface on the -z direction side. The same is true for other cases. Note that the plurality of VCSELs need not necessarily be arranged at the intersections of the grid as shown in FIG. For example, other arrangements such as arranging at the vertices of a plurality of adjacent triangles may be used.

In the VCSEL, an active region that becomes a light emitting region is provided between a lower multilayer reflector and an upper multilayer reflector that are stacked on a semiconductor substrate 200 (see FIG. 4, which will be described later). It is a light-emitting element that emits laser light in the +z direction. This makes it easy to form a two-dimensional array. The number of VCSELs included in the light emitting element array 20 is, for example, 100 to 1000. A plurality of VCSELs are connected in parallel and driven in parallel. The number of VCSELs described above is an example, and the number of VCSELs in the light-emitting element array 20 may be set according to the measurement distance and measurement range.

An anode electrode 218 (see FIG. 4 described later) common to a plurality of VCSELs is provided on the surface of the light emitting element array 20 . A cathode electrode 214 is provided on the back surface of the light emitting element array 20 (see FIG. 4 described later). That is, multiple VCSELs are connected in parallel. By driving a plurality of VCSELs connected in parallel, light having a high intensity is simultaneously emitted and applied to the object to be measured, compared to the case where the VCSELs are driven individually.

Here, the +x direction side of the light emitting element array 20 having a square planar shape is the side 21A, the −x direction side is the side 21B, the +y direction side is the side 22A, and the −y direction side is the side. 22B. Side 21A and side 21B face each other. The side surfaces 22A and 22B connect the side surfaces 21A and 21B and face each other. Here, the side surface 21A is an example of a first side surface, the side surface 21B is an example of a second side surface, the side surface 22A is an example of a third side surface, and the side surface 22B is an example of a fourth side surface.

(Structure of VCSEL)
FIG. 4 is a diagram illustrating the cross-sectional structure of one VCSEL in the light-emitting element array 20. As shown in FIG. This VCSEL is a VCSEL with a λ resonator structure. The upward direction of the paper is defined as the z direction.

The VCSEL has an n-type Distributed Bragg Reflector (DBR) 202 in which AlGaAs layers with different Al compositions are alternately stacked on a semiconductor substrate 200 such as n-type GaAs, an upper spacer layer and a lower An active region 206 including a quantum well layer sandwiched between spacer layers and a p-type top distributed Black type reflector 208 in which AlGaAs layers with different Al compositions are alternately laminated are laminated in this order. In the following, the distributed black reflector will be referred to as DBR.

The n-type lower DBR 202 is a laminated body in which an Al _0.9 Ga _0.1 As layer and a GaAs layer are paired, and the thickness of each layer is λ/4n _r (where λ is the oscillation wavelength and n _r is the refractive index of the medium). , which are alternately stacked in 40 cycles. The carrier concentration after doping with silicon, which is an n-type impurity, is, for example, 3×10 ¹⁸ cm ⁻³ .

The active region 206 is constructed by stacking a lower spacer layer, a quantum well active layer, and an upper spacer layer. For example, the lower _spacer layer is an undoped _Al0.6Ga0.4As layer, the quantum well active layer is an undoped InGaAs quantum well layer and an undoped GaAs barrier layer, and the upper spacer layer is an _{undoped Al0.6Ga0.4} . It is an As layer.

The p-type upper DBR 208 is a laminated body in which a p-type Al _0.9 Ga _0.1 As layer and a GaAs layer are paired, each layer has a thickness of λ/4n _r , and these layers are alternately laminated for 29 cycles. . The carrier concentration after doping with p-type impurity carbon is, for example, 3×10 ¹⁸ cm ⁻³ . Preferably, a contact layer made of p-type GaAs is formed on the uppermost layer of the upper DBR 208, and a current confinement layer 210 of p-type AlAs is formed on the lowermost layer of the upper DBR 208 or inside it.

A cylindrical mesa M is formed on the semiconductor substrate 200 by etching the semiconductor layers laminated from the upper DBR 208 to the lower DBR 202 . As a result, the current confinement layer 210 is exposed on the side surface of the mesa M. As shown in FIG. Through the oxidation process, the current confinement layer 210 is formed with an oxidized region 210A oxidized from the side surface of the mesa M and a conductive region 210B surrounded by the oxidized region 210A. In the oxidation step, the AlAs layer is oxidized at a faster rate than the AlGaAs layer, and the oxidized region 210A is oxidized from the side surface of the mesa M toward the inside at a substantially constant rate. It has a shape reflecting the outer shape of the mesa M, that is, a circular shape, and its center substantially coincides with the axial direction of the mesa M indicated by the dashed line. In this embodiment, the mesa M has a columnar structure.

On the uppermost layer of the mesa M, a metallic ring-shaped p-side electrode 212 is formed by laminating Ti/Au or the like. The p-side electrode 212 makes ohmic contact with a contact layer provided on the upper DBR 208 . The surface of the upper DBR 208 inside the annular p-side electrode 212 serves as a light emission port 212A through which laser light is emitted to the outside. That is, in the VCSEL, light is emitted in a direction perpendicular to the semiconductor substrate 200, and the axial direction of the mesa M becomes the optical axis. Furthermore, a cathode electrode 214 is formed as an n-side electrode on the back surface of the semiconductor substrate 200 . The surface of the upper DBR 208 inside the p-side electrode 212 is the light exit surface. That is, the optical axis direction of the VCSEL is the light emission direction.

An insulating layer 216 is provided so as to cover the surface of the mesa M except for a portion to which an anode electrode (an anode electrode 218 described later) of the p-side electrode 212 is connected and the light exit port 212A. An anode electrode 218 is provided so as to be in ohmic contact with the p-side electrode 212 except for the light exit port 212A. Note that the anode electrode 218 is commonly provided for a plurality of VCSELs. In other words, the p-side electrodes 212 of the plurality of VCSELs forming the light-emitting element array 20 are connected in parallel by the anode electrodes 218 . Note that the anode electrode 218 is an example of a top electrode of the light emitting element array.

Note that the VCSEL may oscillate in a single transverse mode or in multiple transverse modes. As an example, the optical power of one VCSEL is 4mW to 8mW. Therefore, when the light emitting element array 20 is composed of, for example, 500 VCSELs, the light output of the light emitting element array 20 is 2W to 4W. In such a high-output light-emitting element array 20, heat generation from the light-emitting element array 20 is large.

(Structure of Light Diffusion Member 30)
FIG. 5 is a diagram illustrating an example of the light diffusion member 30. As shown in FIG. FIG. 5(a) is a plan view, and FIG. 5(b) is a sectional view taken along line VB--VB of FIG. 5(a). In FIG. 5A, the right direction of the paper is defined as the x direction, and the upper direction of the paper is defined as the y direction. A direction perpendicular to the x-direction and the y-direction in a counterclockwise direction is defined as the z-direction. Therefore, in FIG. 5B, the right direction of the paper surface is the x direction, and the upper direction of the paper surface is the z direction.

As shown in FIG. 5B, the light diffusing member 30 includes a glass substrate 31 whose both surfaces are parallel and flat, and a resin material provided on the back surface of the glass substrate 31 and having unevenness for diffusing light. a layer 32; The light diffusing member 30 further expands the spread angle of light incident from the VCSELs of the light emitting element array 20 and emits the light. In other words, the unevenness formed on the resin layer 32 of the light diffusing member 30 refracts or scatters the light, making the divergence angle β of the emitted light larger than the divergence angle α of the incident light. That is, as shown in FIG. 5B, the divergence angle β of light transmitted through the light diffusion member 30 and emitted from the light diffusion member 30 is larger than the divergence angle α of light emitted from the VCSEL (α <β). Therefore, when the light diffusion member 30 is used, the area of the irradiated surface irradiated with the light emitted from the light emitting element array 20 is enlarged compared to the case where the light diffusion member 30 is not used. Also, the light density on the irradiated surface decreases. The light density means irradiance, and the spread angles α and β are the full width at half maximum (FWHM).

The light diffusing member 30 has, for example, a rectangular planar shape, a width W _x in the x direction and a vertical width W _y in the y direction of 1 mm to 10 mm, and a thickness t _d in the z direction of 0.1 mm to 1 mm. be. If the light diffusing member 30 has the size and shape as described above, a light diffusing member suitable for face authentication of a portable information processing terminal and relatively short-distance measurement up to several meters is provided. be done. The planar shape of the light diffusing member 30 may be other shapes such as a polygon or a circle.

(Circuit for Driving Light Emitting Element Array 20)
If it is desired to drive the light emitting element array 20 at a higher speed, low side driving is preferable. Low-side driving refers to a configuration in which a driving element such as a MOS transistor is positioned downstream of a current path with respect to a driving target such as a VCSEL. Conversely, a configuration in which the drive element is positioned on the upstream side is called high-side drive.

FIG. 6 is a diagram showing an example of an equivalent circuit for driving the light-emitting element array 20 by low-side driving. In FIG. 6, the VCSEL of the light emitting element array 20, the drive unit 50, the capacitor 70, the power supply 82, the PD 40, the light amount detection resistance element 41 for detecting the current flowing through the PD 40, the TD 45, and the current flowing through the TD 45 and a temperature detecting resistance element 46 for detecting the temperature. Note that the capacitor 70 is connected in parallel with the power supply 82 .
The power supply 82 is provided in the optical device control section 8 shown in FIG. A power supply 82 generates a DC voltage having a power supply potential on the + side and a ground potential on the - side. A power supply potential is supplied to the power supply line 83 and a ground potential is supplied to the ground line 84 .

The light emitting element array 20 is configured by connecting a plurality of VCSELs in parallel as described above. An anode electrode 218 (see FIG. 4) of the VCSEL is connected to the power line 83 .
The drive unit 50 includes an n-channel MOS transistor 51 and a signal generation circuit 52 that turns the MOS transistor 51 on and off. The drain of the MOS transistor 51 is connected to the cathode electrode 214 (see FIG. 4) of the VCSEL. The source of MOS transistor 51 is connected to ground line 84 . The gate of MOS transistor 51 is connected to signal generation circuit 52 . That is, the VCSEL and the MOS transistor 51 of the driving section 50 are connected in series between the power line 83 and the ground line 84 . Under the control of the optical device control section 8, the signal generating circuit 52 generates an "H level" signal for turning on the MOS transistor 51 and an "L level" signal for turning off the MOS transistor 51. FIG.

The capacitor 70 has one terminal connected to the power line 83 and the other terminal connected to the ground line 84 . That is, capacitor 70 is connected in parallel with power supply 82 . When there are multiple capacitors 70, the multiple capacitors 70 are connected in parallel. Note that the capacitor 70 is, for example, an electrolytic capacitor or a ceramic capacitor.

The PD 40 has a cathode electrode connected to the power supply line 83 and an anode electrode connected to one terminal of the resistance element 41 for light amount detection. The other terminal of the light quantity detection resistive element 41 is connected to the ground line 84 . In other words, the PD 40 and the light intensity detecting resistance element 41 are connected in series between the power line 83 and the ground line 84 . An output terminal 42 , which is a connection point between the PD 40 and the resistance element 41 for light amount detection, is connected to the optical device control section 8 .

The temperature detection resistance element 46 has one terminal connected to the power supply line 83 and the other terminal connected to one electrode of the TD 45 . The other electrode of TD 45 is connected to ground line 84 . That is, the temperature detection resistance element 46 and the TD 45 are connected in series between the power line 83 and the ground line 84 . An output terminal 47 , which is a connection point between the temperature detection resistance element 46 and the TD 45 , is connected to the optical device control section 8 .

Next, a method for driving the light-emitting element array 20, which is low-side driving, will be described.
First, it is assumed that the signal generated by the signal generating circuit 52 in the driving section 50 is at "L level". In this case, MOS transistor 51 is off. In other words, no current flows between the source and drain of the MOS transistor 51 . Therefore, no current flows through the series-connected VCSELs either. VCSELs are non-emissive.

At this time, capacitor 70 is charged by power supply 82 . That is, one terminal of the capacitor 70 connected to the power supply line 83 becomes the power supply potential, and the other terminal connected to the ground line 84 becomes the ground potential. Capacitor 70 accumulates charge determined by capacity, power supply voltage (=power supply potential-ground potential), and time.

Next, when the signal generated by the signal generation circuit 52 in the driving section 50 becomes "H level", the MOS transistor 51 is turned on from the off state. Then, the charge accumulated in the capacitor 70 is discharged, current flows through the series-connected MOS transistor 51 and the VCSEL, and the VCSEL emits light.

Then, when the signal generated by the signal generation circuit 52 in the driving section 50 becomes "L level", the MOS transistor 51 shifts from the ON state to the OFF state. This causes the VCSEL to stop emitting light. Then, the power supply 82 resumes accumulating charges in the capacitor 70 .

As described above, the MOS transistor 51 is repeatedly turned on and off each time the signal output from the signal generating circuit 52 transitions between the "L level" and the "H level". Light emission is repeated. That is, an optical pulse is emitted from the VCSEL. The repetition of turning on and off of the MOS transistor 51 is sometimes called switching. Here, the current path to the light emitting element array 20 composed of the light emitting element array 20, the MOS transistor 51, the capacitor 70, etc. as shown in the equivalent circuit of FIG. write.
Here, the MOS transistor 51 is an example of a drive element that drives the light emitting element array 20. FIG. The drive element may be a field effect transistor or a bipolar transistor other than the MOS transistor. In other words, the driving section 50 is configured including a driving element. Therefore, the drive unit 50 may be referred to as a drive element here.

Although the charge (current) may be directly supplied from the power supply 82 to the VCSEL without providing the capacitor 70, the charge is accumulated in the capacitor 70 and accumulated when the MOS transistor 51 transitions from off to on. By discharging the electric charge and rapidly supplying the current to the VCSEL, the rise time of the light emission of the VCSEL is shortened.

The PD 40 is connected in the opposite direction between the power supply line 83 and the ground line 84 via the light amount detection resistive element 41 . Therefore, current does not flow when light is not applied. As described above, when the PD 40 receives part of the light emitted from the VCSEL and reflected by the light diffusing member 30, a current corresponding to the amount of received light flows through the PD 40. FIG. Therefore, the current flowing through the PD 40 is measured as the voltage of the output terminal 42, and the optical output of the light emitting element array 20 is detected. Therefore, based on the amount of light received by the PD 40, the optical device control unit 8 controls the light output of the light emitting element array 20 to a predetermined light output. For example, when the optical output of the light emitting element array 20 is smaller than the predetermined optical output, the optical device control section 8 raises the power supply potential of the power supply 82 to increase the amount of charge accumulated in the capacitor 70. , increases the current through the VCSEL. On the other hand, when the optical output of the light emitting element array 20 is greater than the predetermined optical output, the power supply potential of the power supply 82 is lowered to reduce the amount of charge accumulated in the capacitor 70, thereby reducing the current flowing through the VCSEL. Let Thus, the light output of the light emitting element array 20 is controlled.

Also, when the amount of light received by the PD 40 is extremely low, the light diffusing member 30 may come off or break, and the light emitted from the light emitting element array 20 may be directly irradiated to the outside. In such a case, the optical device control section 8 suppresses the light output of the light emitting element array 20 . For example, the emission of light from the light emitting element array 20, that is, the irradiation of light to the object to be measured is stopped.

As described above, the PD 40 is provided to detect the light output of the light emitting element array 20. FIG. Therefore, the farther the PD 40 is placed from the light-emitting element array 20, the smaller the amount of light received, and the lower the light output detection sensitivity of the light-emitting element array 20 becomes. Therefore, the PD 40 is preferably arranged near the light emitting element array 20 .

The TD 45 is connected in series with the temperature detection resistance element 46 between the power line 83 and the ground line 84 . Therefore, the output terminal 47 becomes a voltage obtained by dividing the power supply voltage (=power supply potential-ground potential) by the temperature detecting resistance element 46 and the TD45. If the TD 45 is, for example, a negative temperature coefficient thermistor (NTC), the resistance value decreases as the temperature of the base material 100 rises, as described above. Then, the voltage of the output terminal 47 decreases as the temperature of the substrate 100 increases. The optical device control section 8 detects the temperature of the substrate 100 , that is, the light emitting element array 20 from the voltage of the output terminal 47 . If the temperature of the light-emitting element array 20 exceeds a predetermined allowable temperature, the operation of the light-emitting element array 20 may become unstable or the light-emitting element array 20 may be destroyed. Therefore, when the optical device control section 8 detects that the temperature of the light emitting element array 20 exceeds the allowable temperature from the voltage of the output terminal 47, it controls the driving section 50 to suppress the current flowing through the light emitting element array 20. or cut off the current flowing through the light emitting element array 20 . Thus, overheating of the light emitting element array 20 is suppressed.

As described above, the TD 45 is provided to detect the temperature of the light emitting element array 20. FIG. Therefore, the farther the TD 45 is placed from the light-emitting element array 20, the smaller the change in the temperature of the TD 45, and the lower the temperature detection sensitivity of the light-emitting element array 20 becomes. Therefore, the TD 45 is preferably arranged near the light emitting element array 20 .

In other words, the PD 40 and TD 45 are examples of circuit elements that should be arranged close to the light emitting element array 20 .

(Light emitting device 4)
Next, the light emitting device 4 will be described in detail.
FIG. 7 is a diagram illustrating a light emitting device 4 to which this embodiment is applied. 7(a) is a plan view, FIG. 7(b) is a cross-sectional view taken along line VIIB-VIIB of FIG. 7(a), and FIG. 7(c) is taken along line VIIC-VIIC of FIG. 7(a). is a cross-sectional view of. Here, in FIG. 7A, the right direction of the paper is defined as the x direction, and the upper direction of the paper is defined as the y direction. A direction perpendicular to the x-direction and the y-direction in a counterclockwise direction is defined as the z-direction. Therefore, in FIGS. 7B and 7C, the right direction on the paper surface is the x direction, and the upward direction on the paper surface is the z direction. The same applies to similar drawings shown below.

As shown in FIGS. 7B and 7C, the light-emitting device 4 has a base material 100 and a drive unit 50 provided on a wiring substrate 10 . A light-emitting element array 20, a PD 40, a TD 45, and a holding portion 60 are provided on the substrate 100. FIG. A light diffusion member 30 is provided on the holding portion 60 . Then, as shown in FIG. 7A, the light emitting element array 20, PD 40 and TD 45 are covered with the light diffusion member 30. As shown in FIG. Therefore, the PD 40 receives part of the light reflected by the back surface of the light diffusion member 30 among the light emitted from the light emitting element array 20 . Note that the holding portion 60 may be provided on the wiring board 10 .

As shown in FIG. 7A, in the light emitting device 4, the PDs 40 and TDs 45, the light emitting element array 20, and the driving section 50 are linearly arranged in the x direction. That is, the drive section 50 including the MOS transistor 51 (see FIG. 6) as a drive element is provided on the side surface 21A of the light emitting element array 20, and the PD 40 and TD 45 are provided on the side surface 21B of the light emitting element array 20. there is The PD 40 and the TD 45 are arranged side by side along the side surface 21B. That is, the PD 40 and the TD 45 are arranged side by side in the y-direction on the side surface 21B side of the light emitting element array 20 in the order of TD 45 and PD 40 .

By arranging in this way, the distance D1 from the end of the light emitting element array 20 on the side of the driving unit 50, that is, the side surface 21A shown in FIG. , is shorter than the distance D2 in a comparative example described later (see FIG. 9A described later). Furthermore, the cathode wiring pattern 12 for light emitting element array (see FIG. 8A described later) connecting the cathode electrode 214 of the light emitting element array 20 and the drain of the MOS transistor 51 of the driving section 50 (see FIG. 6) is x It is provided linearly in the direction. Therefore, when the distance D1 from the end portion of the light emitting element array 20 on the side of the driving section 50 to the driving section 50 is short, the length of the cathode wiring pattern 12 for the light emitting element array in the x direction becomes short. As a result, the inductance of the circuit that drives the light emitting element array 20 is reduced, and the light emitting element array 20 can be turned on and off at high speed.

Before describing the cross-sectional views of the light emitting device 4 shown in FIGS. 7B and 7C, wiring patterns provided on the wiring substrate 10 and the base material 100 will be described in detail.
FIG. 8 is a diagram illustrating wiring patterns provided on the wiring board 10 and the base material 100 in the light emitting device 4 to which the present embodiment is applied. 8A shows the front surface of the wiring board 10, FIG. 8B shows the front surface of the substrate 100, and FIG. 8C shows the back surface of the substrate 100. FIG.

The wiring board 10 is, for example, a three-layer multilayer board. In other words, the wiring board 10 has a first conductive layer, a second conductive layer, and a third conductive layer from the surface side on which the base material 100 and the drive unit 50 are mounted. Furthermore, an insulating layer is provided between the first conductive layer and the second conductive layer and between the second conductive layer and the third conductive layer. For example, the third conductive layer is the power line 83 and the second conductive layer is the ground line 84 .

The first conductive layer, the second conductive layer, and the third conductive layer are made of a conductive material such as a metal such as copper (Cu) or silver (Ag) or a conductive paste containing these metals. The insulating layer is made of, for example, epoxy resin, ceramic, or the like.

8A shows the wiring pattern of the first conductive layer of the wiring board 10, but does not show the wiring pattern of the second conductive layer as the ground line 84 and the third conductive layer as the power supply line 83. FIG. The second conductive layer and the third conductive layer are solid films except for the portions where vias used for connecting with the wiring pattern formed by the first conductive layer are provided.
As shown in FIG. 8(a), the first conductive layer forms a part of the current path to the light emitting element array 20, the light emitting element array anode wiring patterns 11-1 and 11-2, and the light emitting element array cathode. Wiring pattern 12, PD anode wiring pattern 13 forming part of the current path to PD 40, PD cathode wiring pattern 14, TD anode wiring pattern 15 forming part of the current path to TD 45, TD cathode A wiring pattern 16 is formed. When the anode wiring patterns 11-1 and 11-2 for the light-emitting element array, the cathode wiring pattern 12 for the light-emitting element array, and the like are not distinguished from each other, they are referred to as wiring patterns or wiring. The same is true for other cases.

By configuring the wiring board 10 as a multi-layer board, the power line 83 as the third conductive layer, and the ground line 84 as the second conductive layer, fluctuations in the power supply potential and the ground potential are easily suppressed. The wiring pattern formed in the first conductive layer and the second conductive layer or the third conductive layer are electrically connected through vias. A via is, for example, a conductive portion formed by embedding a conductive material in a hole provided through the wiring board 10 in the thickness direction.

Here, the anode wiring patterns 11 - 1 and 11 - 2 for the light emitting element array are wirings connected to the anode electrodes 218 of the light emitting element array 20 via the wiring patterns provided on the base material 100 . In the light emitting element array cathode wiring pattern 12, the cathode electrode 214 of the light emitting element array 20 and the drain of the MOS transistor 51, which is an example of the driving element of the driving section 50, are connected via a wiring pattern provided on the base material 100. wiring.
The PD anode wiring pattern 13 is wiring connected to the anode electrode of the PD 40 via the wiring pattern provided on the base material 100 . The PD cathode wiring pattern 14 is wiring connected to the cathode electrode of the PD 40 via the wiring pattern provided on the base material 100 . The anode electrode and cathode electrode of the PD 40 are terminals of the PD 40 .
The TD anode wiring pattern 15 is a wiring to which one terminal of the TD 45 (the + side terminal if it has polarity) is connected via the wiring pattern provided on the base material 100 . The TD cathode wiring pattern 16 is a wiring to which the other terminal of the TD 45 (the negative terminal if it has polarity) is connected via the wiring pattern provided on the base material 100 .
Furthermore, the first conductive layer forms a wiring pattern to which circuit components such as the capacitor 70, the resistance element 6, and the capacitor 7 are connected. Illustration of these wiring patterns is omitted.

The light-emitting element array cathode wiring pattern 12 has a rectangular planar shape. The light emitting element array anode wiring patterns 11-1 and 11-2 are arranged on the ±y direction sides of the light emitting element array cathode wiring pattern 12 so as to sandwich the light emitting element array cathode wiring pattern 12 from the ±y directions and face each other. are located adjacent to each other.

The PD anode wiring pattern 13 and the PD cathode wiring pattern 14 are provided on the -x direction side of the light emitting element array anode wiring patterns 11-1 and 11-2 and the light emitting element array cathode wiring pattern 12, respectively. The PD anode wiring pattern 13 is provided on the +y direction side, and the PD cathode wiring pattern 14 is provided in an L shape bent from the central portion of the wiring substrate 10 toward the +y direction side. That is, the wiring connected to the anode electrode and the cathode electrode of the PD 40 is led out to the side surface 22A of the light emitting element array 20. As shown in FIG.

The TD anode wiring pattern 15 and the PD cathode wiring pattern 16 are provided on the -x direction side of the light emitting element array anode wiring patterns 11-1 and 11-2 and the light emitting element array cathode wiring pattern 12, respectively. The TD anode wiring pattern 15 is provided on the -y direction side, and the TD cathode wiring pattern 16 is provided in an inverted L shape bent from the central portion of the wiring board 10 to the -y direction side. . In other words, the wiring connected to the two terminals of the TD 45 is led out to the side surface 22B of the light emitting element array 20 .

The base material 100 is made of an electrically insulating material. Since the light-emitting element array 20 is provided on the substrate 100 , it is preferable that the substrate 100 is made of a heat-dissipating member having electrical insulation and higher thermal conductivity than the wiring substrate 10 . Ceramics such as silicon nitride and aluminum nitride are examples of electrically insulating heat radiation members. If the base material 100 is made of a heat dissipating member, the heat generated by the light emitting element array 20 is conducted to the holding part 60 and the light diffusion member 30 via the base material 100 and is easily dissipated, thereby improving the heat dissipation efficiency. do.

Anode wiring patterns 111-1F and 111-2F for light emitting element array, cathode wiring pattern 112F for light emitting element array, anode wiring pattern 113F for PD, and cathode wiring for PD are provided on the surface of the substrate 100 shown in FIG. 8B. A pattern 114F, a TD anode wiring pattern 115F, and a TD cathode wiring pattern 116F are formed. Except for the light emitting element array cathode wiring pattern 112F, the light emitting element array anode wiring patterns 111-1F and 111-2F, the PD anode wiring pattern 113F, the PD cathode wiring pattern 114F, the TD anode wiring pattern 115F, and the TD The cathode wiring pattern 116F includes the light emitting element array anode wiring patterns 11-1 and 11-2, the PD anode wiring pattern 13, the PD cathode wiring pattern 14, It has the same planar shape as the TD anode wiring pattern 15 and the TD cathode wiring pattern 16, respectively. The light emitting element array cathode wiring pattern 112</b>F is shorter in the x direction than the light emitting element array cathode wiring pattern 12 of the wiring substrate 10 . This is because the substrate 100 does not cover a portion of the cathode wiring pattern 12 for the light emitting element array on the +x direction side.

Anode wiring patterns 111-1B and 111-2B for light emitting element array, cathode wiring pattern 112B for light emitting element array, anode wiring pattern 113B for PD, and cathode wiring for PD are provided on the back surface of the substrate 100 shown in FIG. 8(c). A pattern 114B, a TD anode wiring pattern 115B, and a TD cathode wiring pattern 116B are formed. The planar shapes of these wiring patterns are the anode wiring patterns 111-1F and 111-2F for the light emitting element array and the cathode wiring patterns 112F and PD for the light emitting element array formed on the surface of the substrate shown in FIG. The anode wiring pattern 113F for PD, the cathode wiring pattern 114F for PD, the anode wiring pattern 115F for TD, and the cathode wiring pattern 116F for TD are mirror-inverted.

Then, the light emitting element array anode wiring patterns 111-1F and 111-2F, the light emitting element array cathode wiring pattern 112F, the PD anode wiring pattern 113F, and the PD cathode wiring patterns 114F and TD formed on the surface of the base material 100. Anode wiring pattern 115F for TD, cathode wiring pattern 116F for TD, anode wiring patterns 111-1B and 111-2B for light emitting element array formed on the back surface of base material 100, cathode wiring pattern 112B for light emitting element array, anode for PD The wiring pattern 113B, the cathode wiring pattern 114B for PD, the anode wiring pattern 115B for TD, and the cathode wiring pattern 116B for TD are conductive paths in which wiring patterns having the same number penetrate through the substrate 100 in the thickness direction. It is electrically connected through a certain via. As shown in FIGS. 7B and 7C, vias are indicated by adding "V" to the wiring pattern number. For example, as shown in FIG. 7B, the light-emitting element array anode wiring pattern 111-2F provided on the front surface and the light-emitting element array anode wiring pattern 111-2B provided on the back surface are connected via vias 111-2V. connected with By connecting a set of wiring patterns using a plurality of vias, the inductance of the circuit is reduced.

Then, as shown in FIG. 7A, the light emitting element array 20, the PD 40 and the TD 45 are mounted on the substrate 100. As shown in FIG.
First, the cathode electrode 214 (see FIG. 4) of the light emitting element array 20 is bonded onto the cathode wiring pattern 112F for the light emitting element array of the substrate 100 with a conductive adhesive or the like. The anode electrode 218 (see FIG. 4) of the light emitting element array 20 and the anode wiring patterns 111-1F and 111-2F for the light emitting element array are connected by bonding wires 23A and 23B.
Then, the cathode electrode of the PD 40 is adhered to the PD cathode wiring pattern 114F of the substrate 100 with a conductive adhesive, and the anode electrode of the PD 40 is connected to the PD anode wiring pattern 113F of the substrate 100 by the bonding wire 23C. . Furthermore, one terminal of the TD 45 (+ side terminal if there is polarity) is connected to the TD anode wiring pattern 115F of the substrate 100 with a conductive adhesive or solder, and the other terminal of the TD 45 (if there is polarity) - side terminal) is connected to the TD cathode wiring pattern 116F of the substrate 100 with a conductive adhesive or solder.

Then, the base material 100 is mounted on the wiring substrate 10 at the place surrounded by the dashed line in FIG. 8(a). As a result, the anode wiring patterns 11-1 and 11-2 for the light emitting element array of the wiring board 10 and the anode wiring patterns 111-1B and 111-2B for the light emitting element array of the substrate 100 are connected, and the wiring board 10 emits light. The element array cathode wiring pattern 12 and the light emitting element array cathode wiring pattern 112B of the substrate 100 are connected. Similarly, the PD anode wiring pattern 13 of the wiring substrate 10 and the PD anode wiring pattern 113B of the substrate 100 are connected, and the PD cathode wiring pattern 14 of the wiring substrate 10 and the PD cathode wiring pattern 114B of the substrate 100 are connected. is connected. Further, the TD anode wiring pattern 15 of the wiring board 10 and the TD anode wiring pattern 115B of the base material 100 are connected, and the TD cathode wiring pattern 16 of the wiring board 10 and the TD cathode wiring pattern 116B of the base material 100 are connected. is connected. These connections are made, for example, with a conductive adhesive.

As can be seen from FIG. 8( a ), a portion of the cathode wiring pattern 12 for light emitting element array on the +x direction side is not covered with the base material 100 . Accordingly, the drive unit 50 is mounted so as to be connected to the portion of the light-emitting element array cathode wiring pattern 12 that is not covered with the base material 100 of the wiring substrate 10 .
Thus, the light emitting device 4 shown in FIGS. 7(a), (b), and (c) is constructed.

7A, the light-emitting element array 20 is arranged on the light-emitting element array cathode wiring pattern 112F of the substrate 100, so that the cathode electrode 214 (see FIG. 4) of the light-emitting element array 20 is formed. ) and the light emitting element array cathode wiring pattern 112F are connected. Then, the anode electrode 218 (see FIG. 4) of the light emitting element array 20 and the anode wiring pattern 111-1F for the light emitting element array of the substrate 100 are connected by the bonding wire 23A on the side surface 22A side of the light emitting element array 20, and light is emitted. The anode electrode 218 (see FIG. 4) of the element array 20 and the anode wiring pattern 111-2F for the light emitting element array of the substrate 100 are connected on the side surface 22B of the light emitting element array 20 with the bonding wire 23B. The anode wiring pattern for the light emitting element array is not provided on the sides 21A and 21B of the light emitting element array 20 . In other words, no bonding wires for connecting the anode electrode 218 and the anode wiring pattern for the light emitting element array are provided on the sides 21A and 21B of the light emitting element array 20 . Therefore, the driving unit 50 can be arranged close to the light emitting element array 20, and the PD 40 and TD 45, which are examples of circuit elements to be arranged close to the light emitting element array 20, can be arranged close to the light emitting element array 20. . Here, bonding wires such as the bonding wires 23A and 23B are examples of wiring members that extend from the upper surface electrodes of the light emitting element array 20 toward the outside of the light emitting element array 20 .

Then, as shown in the cross-sectional view taken along the line VIIB--VIIB shifted in the -y direction from the center in the y direction of the wiring board 10 in FIG. 111-2F is connected to the light emitting element array anode wiring pattern 111-2B on the back surface of the substrate 100 via vias 111-2V, and the light emitting element array anode wiring pattern 111-2B is connected to the light emitting element array anode wiring pattern 111-2B on the wiring board 10. It is connected to the anode wiring pattern 11-2. The same applies to the light emitting element array anode wiring pattern 111-1F, the light emitting element array anode wiring pattern 111-1B, and the light emitting element array anode wiring pattern 11-1.
Further, as shown in the sectional view taken along line VIIC--VIIC in the central portion of the wiring board 10 in the y direction in FIG. It is connected to the light emitting element array cathode wiring pattern 112B on the back surface through vias 112V, and the light emitting element array cathode wiring pattern 112B is connected to the light emitting element array cathode wiring pattern 12 of the wiring substrate 10. FIG. The light-emitting element array cathode wiring pattern 12 is connected to the driving section 50 .

The anode wiring patterns 11 - 1 and 11 - 2 for the light emitting element array are connected to one terminal of the capacitor 70 . A capacitor 70 may be provided for each of the light emitting element array anode wiring patterns 11-1 and 11-2.

As shown in the cross-sectional view of FIG. 7B, the TD cathode wiring pattern 116F on the front surface of the base material 100 is connected to the TD cathode wiring pattern 116B on the back surface of the base material 100 via vias 116V. The wiring pattern 116B is connected to the TD cathode wiring pattern 16 of the wiring board 10 .
Similarly, the TD anode wiring pattern 115F on the front surface of the base material 100 is connected to the TD anode wiring pattern 115B on the back surface of the base material 100 via vias 115V, and the TD anode wiring pattern 115B is connected to the TD anode wiring pattern 115B on the wiring substrate 10. It is connected to the anode wiring pattern 15 .
The wiring pattern for connecting the PD 40 is the same, so the description is omitted.

In the light-emitting device 4 of the present embodiment, the driving section 50 including the driving elements is arranged close to the side surface 21A of the light-emitting element array 20 . Further, the PD 40 and TD 45 are arranged close to the light emitting element array 20 by arranging the PD 40 and TD 45 to be arranged close to the light emitting element array 20 in parallel on the side surface 21B of the light emitting element array 20 . A light-emitting device 4' shown for comparison to which this embodiment is not applied will be described below.

(Comparative light emitting device 4')
FIG. 9 is a plan view illustrating a light emitting device 4' shown for comparison. 9(a) is a plan view, FIG. 9(b) is a cross-sectional view along line IXB-IXB of FIG. 9(a), and FIG. 9(c) is line IXC-IXC of FIG. 9(a). is a cross-sectional view of. In the light-emitting device 4', members having the same functions as those of the light-emitting device 4 are assigned the same reference numerals as those of the light-emitting device 4, and description thereof is omitted.

In the light emitting device 4 ′, the PD 40 is provided between the light emitting element array 20 and the driving section 50 on the substrate 100 . That is, in the light emitting device 4', the PD 40 and the TD 45, which are to be arranged close to the light emitting element array 20, are arranged with the light emitting element array 20 interposed therebetween. That is, the PD 40 is arranged close to the side surface 21A of the light emitting element array 20, and the TD 45 is arranged close to the side surface 21B of the light emitting element array 20. FIG. Therefore, the distance D2 between the side surface 21A of the light emitting element array 20 and the end portion of the driving section 50 including the driving elements on the light emitting element array 20 side is larger than the distance D1 of the light emitting device 4 . As a result, the inductance of the circuit that drives the light emitting element array 20 increases, making it difficult to turn on and off the light emitting element array 20 at high speed.

FIG. 10 is a diagram illustrating wiring patterns provided on the wiring board 10 and the base material 100 in the light emitting device 4' shown for comparison. 10A shows the front surface of the wiring board 10, FIG. 10B shows the front surface of the substrate 100, and FIG.
As shown in FIG. 10A, the PD anode wiring pattern 13 and the PD cathode wiring pattern 14 are provided so as to face each other in the ±y direction with the light emitting element array cathode wiring pattern 12 interposed therebetween. That is, the wirings connected to the anode electrode and the cathode electrode of the PD 40 are pulled out along the side surface 21A of the light emitting element array 20 in opposite directions. Similarly, the TD anode wiring pattern 15 and the PD cathode wiring pattern 16 are provided so as to face each other in the ±y direction. In other words, the wirings connected to the anode electrode and the cathode electrode of the TD 45 are led out along the side surface 21B of the light emitting element array 20 in directions opposite to each other.

As shown in FIG. 10(a), in the light-emitting device 4', the planar shape of the light-emitting element array cathode wiring pattern 12 is designed to suppress an increase in the inductance of the circuit that drives the light-emitting element array 20. It is rectangular, and the cathode electrode 214 of the light emitting element array 20 and the drain of the MOS transistor 51 of the driving section 50 are connected in a straight line. For this purpose, the cathode wiring pattern 12 for the light emitting element array and the cathode wiring pattern 114F for the PD are three-dimensionally crossed with an electrically insulating member interposed therebetween.
Therefore, as shown in FIGS. 10B and 10C, the y-direction length of the PD cathode wiring pattern 114B corresponding to the PD cathode wiring pattern 114F is - It is shortened in the y direction. Therefore, when the base material 100 is mounted on the portion indicated by the dashed line of the wiring board 10, the PD cathode wiring pattern 114B is prevented from coming into contact with the light emitting element array cathode wiring pattern 12 and causing a short circuit.

As described above, in the light-emitting device 4' of the comparative example, the cathode wiring pattern 12 for the light-emitting element array is square in order to suppress an increase in the inductance of the circuit that drives the light-emitting element array 20. If an attempt is made to connect the cathode electrode 214 of 20 and the drive unit 50 in a straight line, the wiring will be crossed over. In other words, an electrically insulating substrate 100 is used.

On the other hand, in the light emitting device 4 to which the present embodiment is applied, as can be seen from FIGS. It is not necessary to provide wiring crossing the element array cathode wiring pattern 12 . Therefore, although the substrate 100 is used in FIGS. 7 and 8, the substrate 100 may not be used. That is, the light emitting element array 20, the PD 40 and the TD 45 may be mounted on the wiring board 10 shown in FIG. 8A without the base material 100 interposed therebetween. In this case, the wiring board 10 may be an electrically insulating heat radiation member.

As described above, in the light emitting device 4 to which the present embodiment is applied, the driving section 50 including the driving elements is arranged close to the side surface 21A of the light emitting element array 20 . The PDs 40 and TDs 45 to be arranged close to the light-emitting element array 20 are arranged side by side along the side surface 21B on the side surface 21B of the light-emitting element array 20 . By doing so, the light-emitting element array 20 and the driving section 50 including the driving elements can be easily brought close to each other.

In this embodiment, the light intensity monitoring light receiving element (PD40) is described as an example of the first circuit element, and the temperature detection element (TD45) is described as an example of the second circuit element. Alternatively, other circuit elements such as the capacitor 70 that supplies current to the light emitting element array 20 may be arranged as the second circuit elements.

Although the light diffusing member 30 is used in the present embodiment, instead of the light diffusing member 30, a light-transmitting member such as a transparent base material such as a protective cover, a condenser lens, or a microlens array may be used. You may apply to the structure which has optical members, such as.

DESCRIPTION OF SYMBOLS 1... Information processing apparatus 2... User interface (UI) part 3... Optical apparatus 4, 4'... Light-emitting device 5... 3D sensor 6... Resistance element 7, 70... Capacitor 8... Optical apparatus control part , 9... System control unit 10... Wiring board 11-1, 11-2, 111-1F, 111-2F, 111-1B, 111-2B... Anode wiring pattern for light emitting element array 12, 112F, 112B... Cathode wiring patterns for light emitting element array 13, 113F, 113B... Anode wiring patterns for PD, 14, 114F, 114B... Cathode wiring patterns for PD, 15, 115F, 115B... Anode wiring patterns for TD, 16, 116F, 116B... Cathode wiring pattern for TD 20 Light-emitting element array 21A, 21B, 22A, 22B Side surface 23A, 23B, 23C Bonding wire 30 Light diffusion member 40 Photodetector for light quantity monitoring (PD) 45 Temperature detection element (TD) 50 Drive section 51 MOS transistor 52 Signal generation circuit 60 Holding section 81 Shape identification section 82 Power supply 83 Power supply line 84 Ground line 91 ... authentication processing unit 100 ... base material 200 ... semiconductor substrate 202 ... lower DBR 206 ... active region 208 ... upper DBR 210 ... current constriction layer 210A ... oxidized region 210B ... conductive region 214 ... cathode electrode , 218 Anode electrode M Mesa VCSEL Vertical cavity surface emitting laser element

Claims (12)

a wiring board;
The wiring board has a first side surface and a second side surface facing each other, and a third side surface and a fourth side surface facing each other connecting the first side surface and the second side surface, and connecting the first side surface and the second side surface. a light emitting element array provided thereon;
a driving element provided on the wiring substrate on the first side surface side for driving the light emitting element array;
a first circuit element and a second circuit element provided along the second side surface at a position of the wiring board farther from the driving element than the second side surface;
wiring members provided on the third side surface and the fourth side surface and extending from the upper surface electrode of the light emitting element array toward the outside of the light emitting element array;
A light-emitting device in which no other circuit element is provided between the first side surface and the driving element. 2. The light emitting device according to claim 1, wherein at least one of said first circuit element and said second circuit element is a light receiving element for receiving light emitted from said light emitting element array. 2. The light emitting device according to claim 1, wherein at least one of said first circuit element and said second circuit element is a temperature sensing element that senses the temperature of said light emitting element array. 4. The light emitting device according to claim 1, wherein at least one of said first circuit element and said second circuit element is a capacitor that supplies current to said light emitting element array. Between the second side surface and the first circuit element and the second circuit element, a wiring member extending from the upper surface electrode of the light emitting element array toward the outside of the light emitting element array is provided. The light-emitting device according to any one of claims 1 to 4. each of the first circuit element and the second circuit element has a plurality of terminals;
The first circuit element is arranged closer to the third side than the second circuit element, and wiring connected to each of the plurality of terminals of the first circuit element is located on the third side. pulled out to the side,
The second circuit element is arranged closer to the fourth side than the first circuit element, and wiring connected to each of the plurality of terminals of the second circuit element is located on the fourth side. 6. The light-emitting device according to claim 1, wherein the light-emitting device is pulled out to the side. 7. The light emitting device according to any one of claims 1 to 6, wherein a light diffusing member that diffuses light emitted from the light emitting element array toward the outside is provided on an emission path of the light emitting element array. at least one of the first circuit element and the second circuit element is a light receiving element that receives light emitted from the light emitting element array;
8. The light-emitting device according to claim 7, wherein the light diffusing member is provided at a position overlapping with the light-emitting element array and the light-receiving element in plan view. 9. The light-emitting device according to claim 1, wherein said light-emitting element array has a plurality of light-emitting elements connected in parallel. a light emitting device according to any one of claims 1 to 9;
a light-receiving unit that receives reflected light emitted from a light-emitting element array included in the light-emitting device and reflected by an object to be measured;
The optical device, wherein the light receiving section outputs a signal corresponding to the time from when the light is emitted from the light emitting element array to when the light is received by the light receiving section. an optical device according to claim 10;
a shape identifying unit that identifies the three-dimensional shape of the object to be measured based on the reflected light emitted from the light emitting element array provided in the optical device, reflected by the object to be measured, and received by the light receiving unit provided in the optical device;
Information processing device. an authentication processing unit that performs authentication processing regarding the use of the device based on the identification result of the shape identification unit;
The information processing apparatus according to claim 11, comprising:

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