JP7216575B2 - Encoding device and decoding device - Google Patents

Description

The present invention relates to an encoding device and a decoding device.

Patent Document 1 describes a digital RoF technology in which the functions of a cellular radio base station are divided into a signal processing section and a radio section, and a radio transmission signal is transmitted as a digital signal between them via an optical fiber. there is In digital RoF, the signal for radio transmission created by the signal processing unit or the baseband signal of the in-phase (I) channel and the quadrature (Q) channel of the radio transmission signal received by the radio unit is sampled and converted into a discrete time signal. and convert the sample values into an optical signal for transmission. In Patent Document 1, the amount of data to be transmitted is reduced by changing the sampling frequency and transmitting/stopping sample values according to the status of wireless band allocation to wireless terminals.

Patent Literature 2 describes a method of losslessly compressing and transmitting an IQ signal using MPEG-4 ALS as a method of compressing and transmitting sample value data to be transmitted.

Patent Document 3 describes a technique for compressing an IQ signal using spatial and temporal correlation of the IQ signal. The IQ signal is transformed into a feature component signal by linear transformation such as Karhunen-Loeve Transform (Karhunen-Loeve Transform), FFT (Fast Fourier Transform), DCT (Discrete Cosine Transform), etc., and important feature component signals are extracted and transformed. By performing quantization according to the relative importance of component signals, the amount of data in the IQ signal is reduced.

WO2014/061552 WO2016/185820 Special Table No. 2014-513461

The technology described in Patent Literature 1 can change the sampling frequency according to the status of wireless band allocation and transmit/transmit sample values in applications such as signals for wireless transmission of digital broadcasting, where the status of wireless band allocation does not change much. Stop control is not in effect.

Also, as described in Patent Document 2, when sample values are compressed using lossless compression, the length of the coded bit string is not constant, so the bit rate of the coded data fluctuates. In order to prevent unexpected quality deterioration due to a temporary increase in bit rate, a communication network with a bandwidth greater than the expected upper limit of the bit rate is required, which is inefficient.

Also, in a transmission system for wireless transmission signals using a communication network, compression of sample values enables reduction of communication line costs. In encoding processing for compression, generally, the smaller the distortion and the smaller the average bit rate after compression, the better.

If the bit rate after compression exceeds the maximum bit rate of the communication network being used, even temporarily, an increase in delay or packet loss may occur. This phenomenon causes unexpected quality deterioration. Therefore, in order to maintain the quality of radio transmission signals, it is important to be able to control the bit rate of compressed data so that it does not exceed the designed bit rate.

Also, as described in Patent Document 3, according to a method that uses both linear transformation and irreversible compression, the amount of data is kept within a certain range by adjusting the size of the quantization unit (quantization step). be able to. However, the Karhunen-Loeve transform, FFT, and DCT require a large amount of calculation processing, a large-scale circuit, and a large delay. Also, in transform coding, it is necessary to transmit quantization step width information for each individual coefficient after transform, which increases the complexity of the device and increases the bit rate by the amount of this information. be.

Therefore, the present invention provides an encoding device and a decoding device that reduce the circuit scale and delay by suppressing the amount of calculation processing while increasing the utilization efficiency of the communication line by maintaining a constant bit rate after encoding. intended to provide

An encoding device according to a first aspect is an encoding device that encodes a sample value forming part of a discrete-time signal into an encoded bit string having a constant length, wherein the sample value is a positive/negative code. and a division unit that divides into an upper bit portion and a lower bit portion, a variable length encoding unit that outputs a code by performing a variable length encoding process on the upper bit portion, and the positive/negative code and the code and a rounding unit that, when the total length of the lower bit part exceeds the fixed length, rounds the lower bit part so that the total length becomes the fixed length. and a combining unit configured to combine the positive/negative code, the code, and the low-order bit part to output the encoded bit string.

A decoding device according to a second aspect is a decoding device that decodes a sample value forming a part of a discrete-time signal from an encoded bit string having a constant length, wherein the code included in the encoded bit string a variable-length code decoding unit that decodes a high-order bit part that constitutes a part of the sample value; and a positive/negative code and a low-order bit part that are included in the encoded bit string based on the decoding result of the high-order bit part. The gist of the invention is that it comprises an extraction unit, and a combination unit that outputs the sample value by combining the positive/negative sign, the high-order bit part, and the low-order bit part.

According to the present invention, an encoding device and a decoding device are provided in which circuit scale and delay are reduced by suppressing the amount of calculation processing while increasing the utilization efficiency of communication lines by maintaining a constant bit rate after encoding. can provide.

It is a figure which shows the system configuration|structure which concerns on embodiment. FIG. 2 is a diagram showing an example of sample value distribution when an OFDM signal of terrestrial digital broadcasting is sampled; It is a figure which shows the structure of the encoding apparatus which concerns on embodiment. It is a figure which shows the operation example of the division|segmentation part which concerns on embodiment. It is a figure which shows the operation example of the variable-length coding part which concerns on embodiment. Occurrence of the value of the amplitude part when the value of the amplitude part obtained by dividing the signal having the occurrence probability as shown in FIG. It is a figure which shows the example of a probability. It is a figure which shows the example of an encoding apparatus which concerns on embodiment of operation. FIG. 4 is a diagram showing an example of the number of samples (NS) to be encoded at one time and the number of codes according to the embodiment; An example of bit reduction effect calculated from digital terrestrial broadcasting signals is shown. FIG. 10 is a diagram showing an example of an assignment table of amplitude part codes and fraction part lengths under conditions of W=8, R=2, and NS=2; FIG. 10 is a diagram showing an example of encoding a sample value every two samples; FIG. 4 is a diagram showing an observation example of the frequency distribution of the amplitude parts of the I component and the Q component of terrestrial digital broadcasting; FIG. 10 is a diagram showing an example of encoding every 4 samples or every 2 samples; FIG. 4 is a diagram showing a specific example of a coded bit string according to the embodiment; FIG. 4 is a diagram showing a specific example of a coded bit string according to the embodiment; It is a figure which shows the structure of the decoding apparatus which concerns on embodiment. It is a figure which shows an example of the effect of the encoding which concerns on embodiment.

Embodiments will be described with reference to the drawings. In the description of the drawings, the same or similar parts are denoted by the same or similar reference numerals.

(System configuration)
First, the system configuration according to this embodiment will be described. FIG. 1 is a diagram showing a system configuration according to this embodiment.

As shown in FIG. 1, the system according to this embodiment has a transmitter 1 and a receiver 2 . A transmitting device 1 transmits data to a receiving device 2 via a communication channel on a communication network.

For example, the transmitting device 1 is provided in a broadcasting facility (master station) for digital broadcasting, and the receiving device 2 is provided in a relay facility that relays digital broadcast waves from the broadcasting facility. In this case, the transmitting device 1 and the receiving device 2 provide a backup communication line between the broadcasting facility and the relay facility.

A signal for radio transmission is input to the transmitting device 1 from a modulating device 1030T provided in broadcasting equipment. Modulation device 1030T generates a radio transmission signal (IF signal) having a center frequency of intermediate frequency and outputs the radio transmission signal to transmission device 1 .

Transmission device 1 has AD conversion section 104 , filter section 105 , encoding device 106 , framing section 107 , and communication interface (IF) 108 .

AD conversion section 104 converts the IF signal input from modulation device 1030 T into a digital signal and outputs this digital signal to filter section 105 .

Filter section 105 removes unnecessary components and noise contained in the digital signal input from AD conversion section 104 , and outputs a sample value of the discrete-time signal to encoding apparatus 106 .

Filter section 105 may have a function of combining filtering and downsampling to reduce the number of sample values, or performing quadrature demodulation of the IF signal to obtain in-phase (I) and quadrature (Q) components of the baseband. may be provided with a function of efficiently reducing sample values by performing down-sampling after conversion to .

Encoding device 106 encodes a predetermined number of sample values input from filter section 105 into a bit string of a certain length, and outputs the encoded bit string to framing section 107 . Details of the encoding device 106 will be described later.

Framing section 107 stores the encoded bit string input from encoding device 106 in a communication frame, and outputs this communication frame to communication interface 108 .

Communication interface 108 outputs the communication frame input from framing section 107 to a communication path.

The receiving device 2 has a communication interface 208 , a deframing section 207 , a decoding device 206 , a filtering section 205 and a DA converting section 204 .

The communication interface 208 receives a communication frame from the transmission device 1 via the communication path and outputs the received communication frame to the deframing unit 207 .

The deframing unit 207 extracts an encoded bit string from the communication frame input from the communication interface 208 and outputs this encoded bit string to the decoding device 206 .

Decoding device 206 decodes the sample values of the discrete-time signal from the encoded bit string input from deframing section 207 and outputs the decoded sample values to filter section 205 . Details of the decoding device 206 will be described later.

Filter section 205 converts the sample values of the discrete-time signal input from decoding device 206 into a signal suitable for DA conversion, and outputs the signal to DA conversion section 204 . For example, the filter unit 205 performs upsampling and filtering so that the sampling frequency is suitable for DA conversion.

The DA conversion unit 204 converts the signal input from the filter unit 205 into an IF band analog signal, and outputs this analog signal to the outside.

Note that when the IF signal has been converted into an I component and a Q component by filter section 105, receiving apparatus 2 separates the I component and the Q component of the sample value output from decoding apparatus 206, The IF signal may be generated by the DA converter 204 after modulation. Alternatively, a quadrature modulator and two DA converters 204 may be further provided, and the quadrature modulator may be performed after the I component and the Q component are each converted into analog signals by the two DA converters 204 .

The IF signal output from DA conversion section 204 of receiving device 2 is input to upconverter 2030T. Upconverter 2030T converts the center frequency of the input IF signal into a radio frequency and outputs the radio frequency to amplifier 2020T.

Amplifying device 2020T power-amplifies the output signal of up-converter 2030T and outputs it to antenna 2010T.

Antenna 2010T radiates the output signal of amplifier 2020T as radio waves.

In this embodiment, the discrete time signal transmission system 10 is configured by the encoding device 106, the framing unit 107, the communication interface 108, the communication interface 208, the deframing unit 207, and the decoding device 206. .

Discrete-time signal transmission system 10 is a system that transmits discrete-time signal samples using a channel. The discrete time signal transmission system 10 includes an encoding device 106 that encodes a predetermined number of samples of the discrete time signal into an encoded bit string of a constant length, and a sample value of the discrete time signal that is decoded from the encoded bit string. and a decoding device 206 .

(sample value)
Next, sample values according to this embodiment will be described.

The sample value is a value obtained by directly AD-converting the waveform of the signal for wireless transmission, or a value of the I component and the Q component obtained by AD-converting the IQ signal obtained by quadrature demodulation of the signal for wireless transmission.

Sample values can be expressed as real numbers in integer, fixed point, or floating point representation, but by limiting the amplitude of the signal to a certain range, it can be treated as a two's complement binary number with a certain bit width. can be done.

Therefore, in the following description, the sample value is a two's complement binary number with a bit width of W. FIG. Since the bit width is W, the amplitudes of the sample values are distributed in the range from -2^(W-1) to 2^(W-1)-1.

FIG. 2 is a diagram showing an example of sample value distribution when an OFDM (Orthogonal Frequency Division Multiplexing) signal of terrestrial digital broadcasting is sampled at W=16.

As shown in FIG. 2, in the sample values of the radio transmission signal, large-amplitude signals appear less frequently, and small-amplitude signals appear more frequently. In particular, OFDM signals tend to have a low appearance frequency of large-amplitude signals. That is, the appearance frequency of small-amplitude samples with small values of the amplitude part is high.

Also, the absolute value of the amplitude of the sampled value is distributed from 0 to 2̂(W−1). The sample value distribution is not uniform, and the appearance frequency of large-amplitude signals is low. In the present embodiment, by utilizing this bias in frequency of appearance of amplitudes, the amount of information is reduced without performing linear conversion.

(encoding device)
Next, the encoding device 106 according to this embodiment will be described.

The encoding device 106 receives a predetermined number of sample values, encodes the sample values into a bit string of a certain length, and outputs the bit string. Here, the number of input sample values is NS, and the length of a bit string obtained by encoding the NS sample values is LS bits. Since the amount of information is reduced by encoding, W×NS>LS. Here, NS, LS and W are positive integers.

FIG. 3 is a diagram showing the configuration of the encoding device 106 according to this embodiment. As shown in FIG. 3, the encoding device 106 has a dividing section 106a, a variable length encoding section 106b, a rounding processing section 106c, and a combining section 106d.

The dividing unit 106a divides each sample value into a positive/negative sign, a high-order bit part, and a low-order bit part, outputs the positive/negative code to the combining unit 106d, outputs the high-order bit part to the variable-length coding unit 106b, and outputs the low-order bit. is output to the rounding processing unit 106c.

The positive/negative sign is a 1-bit sign indicating whether the sample value is positive or negative, and corresponds to the most significant bit of the sample value.

The high-order bit part is a bit string corresponding to a predetermined number of high-order bits in the bit string obtained by removing the positive/negative sign from the sample value. Such an upper bit part is called an "amplitude part".

The lower bit part is a bit string obtained by removing the positive/negative sign and the amplitude part from the sample value. Such a lower bit part is called a "fractional part".

FIG. 4 is a diagram showing an operation example of the dividing unit 106a according to this embodiment.

As shown in FIG. 4(a), the dividing unit 106a divides the sample value represented by the two's complement representation of the bit width W into the upper 1 bit and the next R bit, and The R bits from the 1st to the (R+1)th bit are resolved into the amplitude part, and the lower (WR-1) bits are resolved into the fractional part. FIG. 4 shows an example where R=2 and W=8.

As shown in FIG. 4(b), when the sample value is negative (the positive/negative sign is "1"), the value of the amplitude part is the value obtained by bit-inverting the R bits from the 2nd bit to the R+1th bit. .

The variable-length coding unit 106b performs variable-length coding processing on the amplitude part input from the dividing unit 106a to output a code (hereinafter referred to as "amplitude part code" as appropriate).

Since the variable-length coding unit 106b performs variable-length coding only on the amplitude part, it is possible to reduce the number of codes compared to the case where the entire sample value is subjected to variable-length coding processing, thereby reducing the amount of calculation processing.

Specifically, if W-bit signals are associated one-to-one with codes, 2̂W codes are required, which increases the circuit scale. Since the amplitude part obtained by extracting the absolute value of the upper R+1 bits has R bits, the number of codes is reduced to 2̂R, which facilitates circuit fabrication. Note that the number of codes when the values of the amplitude parts of NS samples are collectively encoded is 2̂(R×NS).

Also, the variable-length coding unit 106b collectively codes a plurality of amplitude parts into one. If the number of bits R in the amplitude part is small, the degree of freedom in designing the code in the amplitude part is small, and the balance between the frequency of appearance of the amplitude and the code length becomes poor. length) increases. By combining a plurality of amplitude parts into one or several, the degree of freedom in code design increases. The average code length can be significantly reduced compared to the case where the amplitude parts are individually coded.

In particular, by assigning a single collective code to combinations with a high appearance frequency, the average length of the code in the amplitude part is shortened, the average length of the fractional part is kept long, and the quantization noise is reduced. can reduce the total amount of

Further, the variable-length coding unit 106b assigns a short code to a code for a combination of small values of amplitude parts to be collectively encoded. As a result, the average code length becomes small, the average length of the fraction part can be kept long, and the total amount of quantization noise due to rounding processing becomes small.

As for the method of assigning codes, an entropy coding technique based on the probability of occurrence of signals in the amplitude part, such as Huffman codes and arithmetic codes, can be used.

FIG. 5 is a diagram showing an operation example of the variable-length coding unit 106b according to this embodiment.

As shown in FIG. 5, the variable-length coding unit 106b combines the amplitude parts of the input predetermined number of sample values into a set of one or a predetermined number of two or more, and codes them into variable-length codes. FIG. 5 shows an example in which four amplitude parts are collectively encoded into one code, and an example in which two amplitude parts are grouped and encoded.

As shown in FIG. 5(a), the average code length can be reduced by encoding the amplitude part into one, but the number of codes increases rapidly as the number of sample values (predetermined number) input at one time increases. However, the circuit for encoding or decoding becomes complicated. As shown in FIG. 5(b), the number of codes can be greatly reduced and the circuit can be simplified by dividing the data into a predetermined number and encoding instead of encod- ing them all at once.

In this embodiment, the code is designed so that the first code to be divided and encoded does not overlap with the code to be encoded collectively. As a result, the amplitude part can be collectively encoded by one or by a fixed number of pairs of two or more. This allows the amplitude part to be encoded together while avoiding circuit complexity.

Here, the values of the amplitude part obtained by dividing the signal having the occurrence probability as shown in FIG. An example of the probability of occurrence of values is shown in FIG.

As shown in FIG. 6, it can be confirmed that there is a large bias in the occurrence probability without using linear transformation. The information amount H0 before encoding of the NS amplitude parts is NS times R bits (H0=R×NS). Since there is a large bias in the probability of occurrence, the entropy H1 of the combined amplitude part becomes H0>H1, and the amount of information decreases.

If the total length of the amplitude part code, the positive/negative code, and the fractional part obtained by the variable-length coding unit 106b exceeds a certain length, the rounding processing unit 106c reduces the total length to a certain length. The fractional part is rounded so that it becomes equal to (LS bits).

Specifically, the length of the fractional part is assigned so that the total length of the amplitude part code, positive/negative sign, and fractional part is constant. This allows the sample values to be encoded into a fixed-length bit string.

Since the rounding processing unit 106c rounds the binary bit string of the fraction part so that it has the assigned length, quantization noise is generated by the rounding processing. The power of quantization noise is proportional to 2 raised to the power of 2T (2 ^2T ), where T is the number of bits to be rounded. large noise is added to

Therefore, the rounding unit 106c allocates the sample values so that the lengths of the fractional parts are as uniform as possible. In the present embodiment, the difference (maximum value) in the length of the decimal part of each sample value is set to 1 bit or less.

The combining unit 106d combines the positive/negative code input from the dividing unit 106a, the amplitude part code input from the variable-length encoding unit 106b, and the fractional part input from the rounding processing unit 106c for encoding. Output bit string.

Since the fractional part of each sample value does not contain length information, decoding device 206 cannot extract the fractional part until it obtains the length information. Therefore, the combiner 106d arranges the amplitude part code at a specific position so that the decoding device 206 can decode the amplitude part code first. As the specific position, the head or tail of the encoded bit string, or a position away from the head or tail by a certain number of bits, or the like can be used.

The amplitude part code may be split into two or more codes. When dividing into two or more codes, the presence or absence of a continuation code is determined for each code, and the start position of the continuation code is determined.

FIG. 7 is a diagram showing an operation example of the encoding device 106 according to this embodiment. FIG. 7 shows an example where NS=4.

As shown in FIG. 7(a), the dividing unit 106a divides each of the four sample values into a positive/negative sign, an amplitude part, and a decimal part.

As shown in FIG. 7(b), the variable-length coding unit 106b puts together the amplitude parts of the four sample values and performs variable-length coding to generate one amplitude part code.

Further, as shown in FIG. 7B, the rounding processing unit 106c performs Round off decimals. Here, the rounding processing unit 106c rounds so as to remove the lower bits of the decimal part. The rounding process is equivalent to the process of subtracting the signal by the value corresponding to the deleted lower bits, and the subtracted value becomes the quantization noise.

(Specific examples of R and NS)
Next, specific examples of R and NS according to this embodiment will be described. The average code length of the coded bit string can be reduced by increasing R as the deviation of the appearance frequency of amplitude increases. Increased complexity.

FIG. 8 shows an example of the number of samples (NS) to be coded at one time and the number of codes. For example, if the upper limit of the number of codes is 1024, the combinations of NS and R that can be used are automatically determined.

It should be noted that as the number of codes increases, the code length becomes longer and the circuit scale for encoding and decoding processing becomes larger. For example, when decoding a variable-length code using a table, a high-speed memory is used to retrieve the code length and data corresponding to the code (amplitude part value, etc.) from the bit string. In bits, a memory of about 14×2̂14=229 kbits is required for code length storage, and about 10×2̂14=163 kbits of memory is required for data storage. As the number of codes and code length increases, a larger memory is required. Since the block RAM (random access memory) built into a general FPGA (field-programmable gate array) has a maximum size of about 38 kbit, handling codes exceeding 1024 is complicated by combining a large number of block RAMs. implementation is required. Therefore, the upper limit of the number of codes can be 1024 as an example.

By calculating the entropy of the signal to be actually transmitted for the narrowed combination of NS and R, the bit reduction effect for the combination of NS and R can be calculated. A combination of NS and R with a small number of codes and a high bit reduction effect is preferable.

The bit reduction effect converted to the amplitude part of one sample is a value obtained by dividing the entropy, which is the information amount of the code, from the number of bits R of the amplitude part by NS.

FIG. 9 shows an example of the bit reduction effect calculated from the terrestrial digital broadcasting signal. Since the code length cannot be shorter than 1, the entropy value was set to 1 when the entropy obtained by the calculation was 1 or less.

In this example, under the condition that the number of codes is 1024 or less, the lower limit of the bit reduction effect is −1.4 bits. Therefore, the combination of R=2, NS=2, 3, 4 or R=3, NS=1, 2, 3 is suitable in this example.

Thus, if 2 to 4 sample values of the OFDM signal are to be encoded (NS=2,3,4), the preferred values for R are 2 or 3 (R=2,3).

(Concrete example of encoding)
Next, a specific example of encoding according to this embodiment will be described.

FIG. 10 shows an example of an assignment table of the amplitude part code and the length of the fractional part under the conditions of W=8, R=2, NS=2. The value of the amplitude part of the two samples is used as a key to obtain the sign and fraction length of the line that matches this value.

In the assignment table of FIG. 10, the total length of the amplitude part code and the length of the fractional part are both constant values of 12 bits. Since positive and negative signs for the number of samples are added to the encoded bit string to be output, it can be confirmed that the number of output bits of the encoding processing unit is always 14.

FIG. 11 shows an example of encoding sample values every two samples. In this example, the sample value is an 8-bit integer represented by 2's complement, and the total 4 bits of the amplitude part of the two samples is coded into a binary bit string of 2 to 6 bits, and placed at the beginning of the output coded bit string. . A positive/negative sign 1 bit and a fraction part are multiplexed for each sample value, and a total of 14 bits is output. That is, a total of 16 bits of two 8-bit sample values are encoded into 14 bits.

For a set of sample values in which the absolute value of the amplitude part that appears infrequently is large, the code length of the amplitude part is long, the code length of the decimal part is short, and the quantization noise is large. Conversely, for a set of sample values in which the amplitude part has a small absolute value and has a high frequency of appearance, the code for the amplitude part is short and the code length for the decimal part is long, so that the quantization noise is small. Therefore, averaged quantization noise can be reduced.

Also, since the difference in the lengths of the fractional parts of the samples that are encoded together is at most 1 bit, the power difference in the quantization noise between the samples is four times or less.

FIG. 12 shows an observation example of the frequency distribution of the amplitude parts of the I and Q components of digital terrestrial broadcasting. Using this distribution, the distribution of the code length of the fractional part when the encoding of FIG. 11 is performed by combining one sample of the I component and one sample of the Q component and two samples for encoding will be described.

As shown in FIG. 11, when the amplitude parts of two samples are both "00", the length of the amplitude part code is 2 bits, and the length of the fraction part is 5 bits. is encoded as is.

As shown in FIG. 12, this combination accounts for 63.3% of the total. Also, when the amplitude part is a combination of "00" and "01", the code length is 3 bits, and the code length of the fraction part is 4 and 5 bits. This combination accounts for 31% of the total. Although the encoding of FIG. 11 reduces the amount of information by 7/8 by encoding two 8-bit signals to 14 bits, 78.8% of the signals retain 8-bit information, and 15. 5% can be encoded with 7 bits of information.

As for noise, 1-bit quantization noise is 15.5%, and the remaining 5.7% is 2-bit or less quantization noise. Thus, by using this coding, it is possible to easily estimate the total amount of noise due to coding.

FIG. 13 shows an example of encoding every 4 samples or 2 samples. However, W=8, R=2, and NS=2.

In this example, the sample value is an 8-bit integer represented by two's complement, and the total 8 bits of the amplitude part of the four samples is represented by one sign of a 4-bit to 6-bit binary bit string, or a 6-bit sign and a 4-bit sign. Encoded in two.

The first code is multiplexed at the beginning of the encoded bit string, the positive/negative sign and the decimal part of the first two samples are multiplexed, the code of the remaining two samples is multiplexed to the 14th bit, and the positive/negative code and the decimal part are multiplexed. Multiple output.

The code length and fraction length are limited so that the code length of two samples is 14 bits wide. Although such a restriction is not essential, this restriction prevents the code length of the amplitude part and the allocation of the fractional part from becoming complicated and the circuit scale from becoming large, and always places the second code at the 14th bit. making it possible.

(Specific example of encoded bit string)
As shown in FIG. 11, the sample value is encoded every two samples with parameters of W=8, R=2, NS=2, and the procedure for encoding the first two samples is described using FIG. explain in detail.

The first two input samples are _" 00011010 _" and _" 00001011 _" . First, it is divided into positive and negative signs, an amplitude part, and a fractional part. The positive and negative signs are both _" 0 _" and the amplitude part is both _" 00 _" . The fractional parts are _" 11010 _" and _" 01011 _" respectively.

Since the amplitude part is _" 00 _" and _" 00 _" , according to FIG. 10, the sign is 2 bits of _" 00 _" and the fraction part is 5 bits each. This code _" 00 _" is output first.

Next, as the positive/negative sign 1, the positive/negative sign _" 0 _" of the first sample is output, and as the fractional part 1, the 5-bit fractional part of the first sample is output as it is.

Next, the positive/negative sign _" 0 _" of the second sample is output as the positive/negative code 2, and the 5-bit fractional part of the second sample is directly output as the fractional part 2, thereby obtaining a fixed-length 14-bit bitstream. be done.

FIG. 15(a) shows an example in which the amplitude part of 4 samples is encoded with one 4-bit code. FIG. 15B shows an example in which the amplitude part of 4 samples is divided into a 6-bit code and a 4-bit code, and each two samples are encoded. FIG. 15(c) shows an example in which the amplitude part codes are arranged continuously in FIG. 15(b).

(decoding device)
Next, the decoding device 206 according to this embodiment will be described.

FIG. 16 is a diagram showing the configuration of the decoding device 206 according to this embodiment. As shown in FIG. 16, the decoding device 206 has a variable-length code decoder 206a, an extractor 206b, and a combiner 206c.

The variable-length code decoding unit 206a decodes the amplitude part from the amplitude part code included in the encoded bit string, and outputs the decoded amplitude part to the combining unit 206c. The variable-length code decoder 206a shares a table as shown in FIG. Since one amplitude part code is assigned to a combination of values of the amplitude part of each sample and a combination of lengths of the fraction part of each sample value, decoding the amplitude part code yields Information on the length of the amplitude part and the fraction part can be obtained.

The extraction unit 206b sequentially extracts the positive/negative sign and the fractional part in order based on the result of the encoding of the amplitude part code by the variable-length code decoding unit 206a, and outputs the positive/negative code and the fractional part to the combining unit 206c.

The combining unit 206c combines the amplitude part input from the variable-length code decoding unit 206a and the positive/negative sign and fractional part input from the extracting unit 206b for each sample value, thereby outputting a decoded sample value. .

The decoding device 206, if there is a continuous code, decodes the continuous code from the determined start position, obtains the amplitude part value and the fraction length of the remaining sample value, and obtains the remaining sample value. to decrypt.

The discrete signal transmission system according to this embodiment has strong resistance to errors that do not change the length of the bit string. If a bit string encoded by a variable-length code contains an error, the bit string after the error cannot be decoded. Here, in this embodiment, a predetermined number of sample values are encoded into a bit string of a constant length. Therefore, even if an error occurs in the coded bit string and the bit string after the error cannot be decoded, a new code is started at each fixed length. bitstream decoding can be resumed from .

(Example of effect of embodiment)
Next, an example of effects according to this embodiment will be described. FIG. 17 is a diagram for explaining an example of the effect according to this embodiment.

As shown in FIG. 17(a), sample values of IQ signals were created from ISDB-T terrestrial digital broadcasting signals.

FIG. 17B shows an example of the signal-to-noise ratio (SNR) when the data amount is reduced by quantization and when the data amount is reduced by the encoding device 106 and the decoding device 206 according to this embodiment. .

According to the encoding according to this embodiment, the effect of improving the signal-to-noise ratio by 5.4 dB was obtained in any case where the data amount was reduced to 5 bits, 6 bits, or 7 bits per sample value.

This improvement amount corresponds to approximately 1 bit. Therefore, according to this embodiment, the amount of data can be reduced to 1/7 in a system that conventionally required an SNR of 7 bits per sample.

(Other embodiments)
A program that causes a computer to execute each process performed by the encoding device 106 and a program that causes a computer to execute each process that the decoding device 206 performs may be provided. The program may be recorded on a computer readable medium. A computer readable medium allows the installation of the program on the computer. Here, the computer-readable medium on which the program is recorded may be a non-transitory recording medium. The non-transitory recording medium is not particularly limited, but may be, for example, a recording medium such as CD-ROM or DVD-ROM.

Also, functional units (circuits) for executing each process performed by the encoding device 106 may be integrated, and the encoding device 106 may be configured as a semiconductor integrated circuit (chipset, SoC). Similarly, functional units (circuits) for executing each process performed by the decoding device 206 may be integrated, and the decoding device 206 may be configured as a semiconductor integrated circuit (chipset, SoC).

An embodiment has been described in detail above with reference to the drawings, but the specific configuration is not limited to the one described above, and various design changes can be made without departing from the spirit of the invention. .

Reference Signs List 1: transmitting device 2: receiving device 10: discrete time signal transmission system 104: AD conversion unit 105: filter unit 106: coding unit 106a: division unit 106b: variable length coding unit 106c: rounding processing unit 106d: combining unit 107 : framing unit 108 : communication interface 204 : DA conversion unit 205 : filter unit 206 : decoding device 206a : variable length code decoding unit 206b : extraction unit 206c : coupling unit 207 : deframing unit 208 : communication interface 1030T : modulation device 2010T: Antenna 2020T: Amplifier 2030T: Upconverter

Claims (8)

An encoding device that encodes a sample value forming part of a discrete-time signal into an encoded bit string having a constant length,
a division unit that divides the sample value into a positive/negative sign, a high-order bit part, and a low-order bit part;
a variable-length coding unit that outputs a code by performing variable-length coding processing on the high-order bit part;
When the total length of the positive/negative sign, the sign, and the low-order bit part exceeds the fixed length, the low-order bit part is rounded so that the total length becomes the fixed length. A rounding processing unit that performs processing;
and a combining unit that combines the positive/negative code, the code, and the low-order bit part to output the encoded bit string. the discrete-time signal is a signal for radio transmission in a radio transmission system;
2. The encoding apparatus according to claim 1, wherein the smaller the value represented by the upper bit portion, the shorter the length of the code. When encoding a plurality of sample values forming part of the discrete-time signal into the encoded bit string having the constant length,
The dividing unit divides each of the plurality of sample values into the positive/negative sign, the upper bit portion, and the lower bit portion,
The variable-length coding unit collectively performs the variable-length coding process on a plurality of high-order bit portions corresponding to the plurality of sample values, thereby outputting one or a plurality of codes,
The rounding processing unit reduces the total length of the plurality of positive and negative signs corresponding to the plurality of sample values, the one or more signs, and the plurality of low-order bit portions corresponding to the plurality of sample values to the If the length exceeds a certain length, rounding the plurality of low-order bit parts so that the total length becomes the certain length;
3. The combination unit outputs the encoded bit string by combining the plurality of positive/negative codes, the one or more codes, and the plurality of low-order bit parts. encoding device. 4. The encoding apparatus according to claim 3, wherein a difference in length of said plurality of lower bit parts after said rounding process is 1 bit or less. A decoding device for decoding sample values forming part of a discrete-time signal from an encoded bit string having a constant length,
a variable-length code decoding unit that decodes a high-order bit portion forming part of the sample value from the code included in the encoded bit string;
an extraction unit that extracts a positive/negative sign and a low-order bit portion included in the encoded bit string based on the decoding result of the high-order bit portion;
a combining unit that outputs the sample value by combining the positive/negative code, the high-order bit part, and the low-order bit part. the discrete-time signal is a signal for radio transmission in a radio transmission system;
6. The decoding device according to claim 5, wherein the smaller the value represented by the upper bit part, the shorter the length of the code. When decoding a plurality of sample values forming part of the discrete-time signal from the encoded bit string,
The variable-length code decoding unit decodes a plurality of high-order bit parts corresponding to the plurality of sample values from one or more codes included in the encoded bit string,
The extracting unit extracts a plurality of positive/negative codes and a plurality of lower bit parts corresponding to the plurality of sample values from the encoded bit string based on the decoding results of the plurality of upper bit parts,
3. The combination unit outputs the plurality of sample values by combining the plurality of positive and negative signs, the plurality of upper bit portions and the plurality of lower bit portions for each sample value. 7. The decoding device according to 5 or 6. 8. The decoding device according to claim 7, wherein the difference in length of said plurality of lower bit parts is 1 bit or less.

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