JP7206719B2 - Distortion compensation device and distortion compensation method - Google Patents

Description

The present invention relates to a distortion compensation device and a distortion compensation method.

2. Description of the Related Art In recent years, demand for multimedia services and the like has increased the amount of information transmitted via networks. As one technique for increasing transmission capacity, a radio communication system using OFDM (Orthogonal Frequency Division Multiplexing) has been put into practical use. A radio communication system using OFDM is also called, for example, a fourth generation mobile communication system or a 4G system. 4G system standards include LTE (Long Term Evolution) and LTE-Advanced (LTE-A). In a radio communication system using OFDM, signals of various multi-level modulation schemes are superimposed on mutually orthogonal subcarriers and transmitted.

In the radio communication system, a power amplifier is used on the transmitting side for transmitting signals. The input/output characteristics of the power amplifier have linearity when the output is small, and saturate and have nonlinearity when the output increases. For example, when the power amplifier is operated at high efficiency near the saturation region, the input/output characteristics of the power amplifier have nonlinearity. This nonlinearity causes intermodulation distortion (IMD). IMD is defined as amplitude modulation-amplitude modulation (AM-AM) type distortion (ie, "amplitude distortion") and amplitude modulation-phase modulation (AM-PM) type distortion (ie, "phase distortion") be done. When IMD occurs, unwanted distortion components leak to adjacent channels, causing distortion within and outside the frequency band of the transmission signal (hereafter, within the frequency band of the transmission signal out-of-band is referred to as “out-of-band”). As a result, it causes interference.

Therefore, digital pre-distortion (DPD: Digital Pre-Distortion) can be cited as a technique for compensating for the IMD of the power amplifier. DPD is a process of superimposing a distortion compensation coefficient as a distortion component having a characteristic opposite to the nonlinear distortion characteristic of the power amplifier on the signal before being input to the power amplifier. The distortion compensation coefficient is referenced from a LUT (Look Up Table) based on the instantaneous power of the signal input to the power amplifier.

L. Ding et al, "A Robust Digital Baseband Predistorter Constructed Using Memory Polynomials," IEEE TRANSACTIONS ON COMMUNICATIONS, VOL. 52, NO. 1, pp. 159-165, January 2004. L. Ding et al, "A MEMORY POLYNOMIAL PREDISTORTER IMPLEMENTED USING TMS320C67XX," Proceedings of Texas Instruments Developer Conference, 2004. O. Hammi et al, “Digital Sub-band Filtering Predistorter Architecture for Wireless Transmitters,” IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 53, NO. 5, pp. 1643-1652, MAY 2005. Hsin-Hung Chen et al, “Joint Polynomial and Look-Up-Table Predistortion Power Amplifier Linearization,” IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-II: EXPRESS BRIEFS, VOL. 53, NO. 8, 612-616, AUGUST 2006.

However, in power amplifier IMD, there is in-band IMD resulting from memory effects, as well as in-band and out-of-band IMD based on instantaneous power. This is distortion caused by the fact that the output of the power amplifier depends not only on the value of the signal (instantaneous power) currently input to the power amplifier, but also on the value (history) of signals input to the power amplifier in the past. . Therefore, memory polynomials are sometimes employed in DPDs in order to also compensate for distortion caused by memory effects (see Non-Patent Documents 1-4). However, when memory polynomials are used in the DPD, the amount of computation required for compensating for distortion becomes enormous, resulting in increased power consumption due to signal processing such as computation.

The technology disclosed in the present application suppresses an increase in power consumption due to signal processing when compensating for distortion.

In one aspect, a distortion compensation device includes a filter section, a first signal conversion section, an oversampling section, a distortion compensation section, a power amplifier, and a control section. The filter unit receives as input a plurality of subcarrier signals assigned to each frequency with respect to a transmission signal, and superimposes a plurality of filter coefficients on each of the plurality of subcarrier signals. The first signal transforming section transforms a plurality of subcarrier signals on which a plurality of filter coefficients are respectively superimposed, from a frequency domain to a time domain. The oversampling unit oversamples the signal converted into the time domain and outputs the result as an input signal. The distortion compensator superimposes the distortion compensation coefficient on the input signal and outputs it as an output signal. The power amplifier amplifies and outputs an output signal. The control unit uses an error signal generation unit that generates a plurality of error signals from differences between an input signal or a plurality of subcarrier signals and a feedback signal from the power amplifier, and a plurality of error signals and a plurality of subcarrier signals. a filter coefficient generator that generates a plurality of filter coefficients according to an arithmetic expression, outputs the plurality of filter coefficients to the filter unit , and uses an arithmetic expression using an input signal and a total value of a plurality of error signals A distortion compensation coefficient is generated and output to the distortion compensator .

In one aspect, it is possible to suppress an increase in power consumption due to signal processing when compensating for distortion.

FIG. 1 is a block diagram illustrating an example of the configuration of a transmission device according to the first embodiment; FIG. 2 is a diagram illustrating an example of the configuration of a subband FIR filter of the distortion compensation device according to the first embodiment; 3 is a diagram illustrating an example of a configuration of a subband FIR filter of the distortion compensation device according to the first embodiment; FIG. 4 is a diagram illustrating an example of a configuration of a control unit of the distortion compensation device according to the first embodiment; FIG. FIG. 5 is a flowchart illustrating an example of processing (distortion compensation method) of the distortion compensation device according to the first embodiment. FIG. 6 is a diagram illustrating an example of a configuration of a control unit of a distortion compensator according to a second embodiment; FIG. 7 is a diagram illustrating an example of a configuration of a control unit of a distortion compensator according to the third embodiment; FIG. 8 is a diagram showing an example of grouped subcarrier signals in the distortion compensation apparatus according to the fifth embodiment. FIG. 9 is a diagram showing an example of grouped subcarrier signals in the distortion compensation apparatus according to the fifth embodiment. FIG. 10 is a diagram illustrating an example of the configuration of a subband FIR filter of the distortion compensation device according to the fifth embodiment. FIG. 11 is a diagram showing an example of a QPSK constellation. FIG. 12 is a diagram showing an example of a 16QAM constellation. FIG. 13 is a diagram illustrating an example of LUT addresses according to the sixth embodiment. FIG. 14 is a diagram illustrating an example of a configuration of a subband FIR filter of a distortion compensation device according to the sixth embodiment; FIG. 15 is a diagram illustrating an example of the configuration of a subband FIR filter of the distortion compensation device according to the seventh embodiment. FIG. 16 is a diagram showing amplitudes of symbols modulated by 16QAM. FIG. 17 is a diagram illustrating an example of an LUT according to the seventh embodiment; FIG. 18 is a diagram illustrating an example of a hardware configuration of a transmission device; FIG. 19 is a block diagram showing an example of the configuration of a transmission device in the reference example.

Exemplary embodiments of the distortion compensating device and the distortion compensating method disclosed in the present application will be described in detail below with reference to the drawings. It should be noted that the following examples do not limit the technology disclosed.

Here, before describing the distortion compensating device according to the present embodiment, the distortion compensating device according to the reference example will be described.

[Reference example]
FIG. 19 is a block diagram showing an example of the configuration of the transmission device 300 in the reference example. Transmitter 300 includes a distortion compensator that compensates for IMD occurring in a transmitted signal.

As shown in FIG. 19 , transmitting apparatus 300 has inverse Fourier transform (IFFT: Inverse Fast Fourier Transform) section 301 and oversampling section 302 . Furthermore, the transmitter 300 has a digital predistortion (DPD) section 303 using a memory polynomial. The DPD unit 303 using the memory polynomial is hereinafter referred to as "MP DPD unit 303".

Further, the transmitter 300 includes a digital-to-analog converter (DAC) 304, an up-converter 305, a high-power amplifier (HPA) 306, a directional coupler 307, a down-converter 308, an analog-to-digital converter (ADC) 309, and a control It has a part 310 .

IFFT section 301 inputs the mapped transmission signal (vector) d. The transmission signal d is a digital signal and a signal assigned to N subcarriers with different frequencies (hereinafter referred to as "subcarrier signal"). Here, N subcarrier signals d are described as subcarrier signals d ₀ to d _N−1 .

IFFT section 301 performs IFFT on modulation symbols of N subcarrier signals d ₀ to d _N−1 . As a result, the symbols of the N subcarrier signals are converted from modulated symbols in the frequency domain to valid symbols in the time domain. IFFT section 301 outputs the signal subjected to IFFT to oversampling section 302 as an OFDM signal.

Oversampling section 302 receives the OFDM signal output from IFFT section 301 and oversamples the input OFDM signal with a coefficient L (for example, L=4). Oversampling section 302 outputs the oversampled OFDM signal to MP DPD section 303 and control section 310 as input signal x(n).

Here, the input signal x(n) is represented by Equation (1). In formula (1), j represents an imaginary unit. Δf is the subcarrier spacing and represents 1/NT. NT represents the symbol length.

The MP DPD unit 303 receives the input signal x(n) output from the oversampling unit 302, and performs DPD using a memory polynomial on the input signal x(n). 1-4).

Specifically, MP DPD section 303 receives distortion compensation coefficient a _kq output from control section 310 . MP DPD section 303 then superimposes (multiplies) input signal x(n) by distortion compensation coefficient a _kq . The distortion compensation coefficient a _kq corresponds to a distortion component having characteristics opposite to the nonlinear distortion characteristics of the HPA 306 . MP DPD section 303 outputs input signal x(n) superimposed with distortion compensation coefficient a _kq to DAC 304 as output signal z(n).

Here, the output signal z(n) is represented by Equation (2). In Equation (2), a _kq is the distortion compensation coefficient described above. K is the highest order of nonlinear distortion to be assumed, and Q represents the depth of memory (in the direction of the time axis). In DPD using a memory polynomial, for example, Q=2 and K=5 (Non-Patent Document 1).

Further, when the equation (2) is expanded, the output signal z(n) is represented by the equation (3).

DAC 304 receives output signal z(n), which is a digital signal output from MP DPD section 303 . DAC 304 converts the input output signal z(n) into an analog signal and outputs the analog signal to upconverter 305 .

Upconverter 305 receives the signal output from DAC 304 . The up-converter 305 converts the input signal into a radio frequency (RF) signal by up-converting it, and outputs the radio frequency (RF) signal to the HPA 306 .

HPA 306 amplifies the power of the signal output from upconverter 305 and outputs it to directional coupler 307 . Here, intermodulation distortion (IMD) occurs in HPA 306, but MP DPD section 303 (Q=2) superimposes distortion compensation coefficient a _kq on input signal x(n) after oversampling. . Therefore, the signal output from the HPA 306 is a signal in which the in-band and out-of-band IMD based on the instantaneous power and the in-band IMD caused by the memory effect are compensated.

Directional coupler 307 outputs the signal output from HPA 306 to the antenna. The antenna transmits the signal output from directional coupler 307 . Also, directional coupler 307 distributes the signal output from HPA 306 and outputs it to down converter 308 .

Down converter 308 receives the signal output from directional coupler 307 . The down-converter 308 down-converts the input signal and outputs it to the ADC 309 .

ADC 309 inputs the signal output from down converter 308 . ADC 309 converts the input signal into a digital signal and outputs it to control section 310 as feedback signal y(n).

Control section 310 receives input signal x(n) output from oversampling section 302 and receives feedback signal y(n) output from ADC 309 . The control unit 310 calculates the difference between the input signal x(n) and the feedback signal y(n) and generates an error signal ε(n).

Here, the error signal ε(n) is represented by Equation (4).

Control section 310 calculates distortion compensation coefficient a _kq so that error signal ε(n) is minimized by adaptive signal processing using an LMS (Least Mean Square) algorithm or the like. Control section 310 outputs the calculated distortion compensation coefficient a _kq to MP DPD section 303 .

Here, the distortion compensation coefficient a _kq is represented by Equation (5). (5), * is the complex conjugate and μ _k is a step-size parameter used to control the trade-off between convergence speed and residual error of the algorithm.

Thus, MP DPD section 303 and control section 310 compensate for IMD occurring in the transmission signal of transmission device 300 . That is, the distortion compensation device in the reference example includes at least MP DPD section 303 and control section 310 . Here, the IMD of a power amplifier such as the HPA 306 has in-band IMD resulting from memory effects, as well as in-band and out-of-band IMD based on instantaneous power. This is distortion caused by the fact that the output of the power amplifier depends not only on the value of the signal (instantaneous power) currently input to the power amplifier, but also on the value (history) of signals input to the power amplifier in the past. . Therefore, in order to compensate for the distortion caused by the memory effect, a memory polynomial may be employed in the DPD as in the distortion compensator in the reference example. However, when memory polynomials are used in the DPD, the amount of computation required for compensating for distortion becomes enormous, resulting in increased power consumption due to signal processing such as computation.

Therefore, in the distortion compensation apparatus according to the present embodiment, focusing on the fact that the IMD in the band is imbalanced between the high frequency side and the low frequency side, a weight is superimposed on the transmission signal for each frequency. For example, a subband finite impulse response (FIR) filter, which will be described later, inputs a plurality of subcarrier signals assigned for each frequency to a transmission signal, and superimposes filter coefficients as weights on the plurality of subcarrier signals. do. This can in turn compensate for in-band IMD resulting from memory effects.

Further, in the distortion compensator according to the present embodiment, a sub-band FIR filter, which will be described later, compensates for in-band IMD caused by a memory effect, thereby reducing the amount of computation when compensating for distortion. As a result, in the distortion compensator according to the present embodiment, compared with the distortion compensator in the reference example, that is, compared with the case where the memory polynomial is adopted in the DPD, power consumption due to signal processing such as calculation can be reduced. It is possible.

Further, in the distortion compensation apparatus according to the present embodiment, a memoryless (that is, memory effectless) DPD section described later superimposes the distortion compensation coefficient a _kq on the input signal x(n), thereby Compensate for in-band and out-of-band IMD. As a result, the distortion compensator according to the present embodiment can maintain the same level of error vector magnitude (EVM) and adjacent channel leakage ratio (ACLR) as those of the distortion compensator of the reference example.

FIG. 1 is a block diagram showing an example of the configuration of a transmission device 100 according to the first embodiment.

As shown in FIG. 1 , transmitting apparatus 100 has subband FIR filter 101 , IFFT section 102 , oversampling section 103 , and CFR (Crest Factor Reduction) section 104 . Subband FIR filter 101 is an example of a "filter section." The IFFT section 102 is an example of a "first signal conversion section".

Furthermore, the transmitting device 100 has a memoryless DPD section 105 . The memoryless DPD section 105 performs normal DPD that does not compensate for memory effects. The memoryless DPD unit 105 is hereinafter referred to as "ML DPD unit 105". The ML DPD section 105 is an example of a "distortion compensation section".

Furthermore, transmitting apparatus 100 has DAC 106 , upconverter 107 , HPA 108 , directional coupler 109 , downconverter 110 , ADC 111 and control section 112 . This transmitter 100 includes a distortion compensator that compensates for IMD occurring in a transmission signal. That is, transmitting apparatus 100 comprises a distortion compensation apparatus including at least subband FIR filter 101, ML DPD section 105 and control section 112. FIG.

A subband FIR filter 101 receives a mapped transmit signal (vector) d. The mapped transmission signal d is a digital signal and a signal assigned to N subcarriers with different frequencies (hereinafter referred to as "subcarrier signals"). Here, N subcarrier signals d are described as subcarrier signals d ₀ to d _N−1 , and the k-th subcarrier signal d is described as subcarrier signal d _k .

Subband FIR filter 101 also receives N filter coefficients w as weights output from control section 112 . Here, the N filter coefficients w are denoted as filter coefficients w ₀ to w _N−1 , and the k-th filter coefficient w is denoted as filter coefficient w _k .

Subband FIR filter 101 superimposes (multiplies) N subcarrier signals d ₀ to d _N−1 by N filter coefficients w ₀ to w _N−1 , respectively.

2 and 3 are diagrams showing an example of the configuration of the subband FIR filter 101 of the distortion compensator according to the first embodiment.

Subband FIR filter 101 has a one-tap configuration as shown in FIG. In this case, subband FIR filter 101 has N multipliers 120 . For example, the k-th multiplier 120 of the N multipliers 120 outputs the k-th subcarrier signal d _k of the N subcarrier signals d ₀ to d _N−1 and N filter coefficients Input the k-th filter coefficient w _k among w ₀ to w _N−1 . The kth multiplier 120 then multiplies the _kth subcarrier signal dk by the _kth filter coefficient wk.

Alternatively, subband FIR filter 101 may be an m-tap configuration as shown in FIG. In this case, subband FIR filter 101 has m-tap multipliers 121 , (m−1) delay units 122 , and (m−1) adders 123 . The m-tap multipliers 121 are provided in parallel from the 0th to the (m-1)th. The (m−1) delay units 122 are connected in series to delay the signal by a time τ. The outputs of the (m-1) delay devices 122 are connected to the inputs of the first to (m-1)th multipliers 121 of the m-tap multipliers 121, respectively. The (m-1) adders 123 are connected in series. The k-th subcarrier signal d _k is multiplied by filter coefficients w _{k (0)} to w _{k (m−1)} as filter coefficient w _k by m multipliers 121, and outputs of m multipliers 121 are synthesized by (m−1) adders 123 .

In FIG. 1, subband FIR filter 101 outputs to IFFT section 102 N subcarrier signals d ₀ to d _N−1 on which N filter coefficients w ₀ to w _N−1 are respectively superimposed.

IFFT section 102 receives the N subcarrier signals output from subband FIR filter 101 . IFFT section 102 performs IFFT on modulation symbols of N subcarrier signals. As a result, the symbols of the N subcarrier signals are converted from modulated symbols in the frequency domain to valid symbols in the time domain. IFFT section 102 outputs the signal subjected to IFFT to oversampling section 103 as an OFDM signal.

Oversampling section 103 receives the OFDM signal output from IFFT section 102 and oversamples the input OFDM signal with coefficient L. FIG. Oversampling section 103 outputs the oversampled OFDM signal as input signal x(n) to ML DPD section 105 and control section 112 via CFR section 104 . By passing the input signal x(n) through the CFR section 104, the peak power of the input signal x(n) is suppressed by clipping or the like.

ML DPD section 105 receives input signal x(n) output from oversampling section 103 via CFR section 104, and superimposes distortion compensation coefficient _ak on input signal x(n).

Specifically, ML DPD section 105 receives distortion compensation coefficient a _k output from control section 112 . ML DPD section 105 then superimposes (multiplies) input signal x(n) by distortion compensation coefficient a _k . The distortion compensation coefficient a _k corresponds to a distortion component having characteristics opposite to the nonlinear distortion characteristics of the HPA 108 . ML DPD section 105 outputs input signal x(n) superimposed with distortion compensation coefficient a _k to DAC 106 as output signal z(n).

Here, in the memoryless DPD, Q in the above equation (2) is 0 (Q=0), so in this embodiment, the distortion compensation coefficient a _kq in the above equations (2) and (3) is set to The distortion compensation coefficient _ak is described.

DAC 106 receives output signal z(n), which is a digital signal output from ML DPD section 105 . DAC 106 converts the input output signal z(n) into an analog signal and outputs the analog signal to upconverter 107 .

Upconverter 107 receives the signal output from DAC 106 . The up-converter 107 converts the input signal into a radio frequency (RF) signal by up-converting it, and outputs the radio frequency (RF) signal to the HPA 108 .

HPA 108 amplifies the power of the signal output from upconverter 107 and outputs it to directional coupler 109 . Here, although intermodulation distortion (IMD) occurs in HPA 108, subband FIR filter 101 applies N filter coefficients w ₀ to w _N−1 to N subcarrier signals d ₀ to d _N−1 , respectively. are superimposed. Thus, the resulting signal output from HPA 108 is a signal that is compensated for in-band IMD resulting from memory effects. Also, the ML DPD section 105 (Q=0) superimposes the distortion compensation coefficient a _k on the oversampled input signal x(n). Therefore, the signal output from the HPA 108 is a signal compensated for in-band and out-of-band IMD based on instantaneous power.

Directional coupler 109 outputs the signal output from HPA 108 to an antenna. The antenna transmits the signal output from directional coupler 109 . Also, directional coupler 109 distributes the signal output from HPA 108 and outputs it to down converter 110 .

Down converter 110 receives the signal output from directional coupler 109 . The down-converter 110 down-converts the input signal and outputs it to the ADC 111 .

ADC 111 inputs the signal output from down converter 110 . ADC 111 converts the input signal into a digital signal and outputs it to control section 112 as feedback signal y(n).

The control unit 112 receives the input signal x(n) output from the CFR unit 104 . Also, the control unit 112 receives the feedback signal y(n) output from the ADC 111 . The control unit 112 calculates the difference between the input signal x(n) and the feedback signal y(n) using the above equation (4), and generates the error signal ε(n). Then, the control unit 112 calculates the distortion compensation coefficient _ak using the above equation (5) so that the error signal ε(n) is minimized by adaptive signal processing using the LMS algorithm or the like. Control section 112 outputs the calculated distortion compensation coefficient a _k to ML DPD section 105 .

Here, in the memoryless DPD, since Q in the above equation (2) is 0 (Q=0), in the present embodiment, the distortion compensation coefficient a _kq in the above equation (5) is replaced by the distortion compensation coefficient a be described as _k .

Also, the control unit 112 inputs the mapped transmission signal (vector) d. As described above, the transmission signal d is the subcarrier signals d ₀ to d _N−1 assigned to N subcarriers with different frequencies. Then, control section ₁₁₂ uses _{computational} expressions (equations (6) and (7 )) to generate N filter coefficients w ₀ to w _N−1 .

The control unit 112 generates N filter coefficients w ₀ to w _N−1 using the configuration shown in FIG. 4, for example.

FIG. 4 is a diagram illustrating an example of the configuration of the control unit 112 of the distortion compensation device according to the first embodiment. As shown in FIG. 4 , the control unit 112 has a Fourier transform (FFT: Fast Fourier Transform) unit 131 , an error signal generation unit 132 , and a filter coefficient generation unit 133 . The FFT section 131 is an example of a "second signal conversion section".

FFT section 131 receives feedback signal y(n) output from ADC 111 . FFT section 131 transforms feedback signal ^y ( ⁿ ) from the time domain to the frequency domain, and outputs signals d _{̂ 0} to _{̂ N−1} transformed into the frequency domain to error signal generating section 132 .

The error signal generator 132 receives N subcarrier signals d ₀ to d _N−1 as the transmission signal d. Also, the error signal generator 132 inputs the signals ^d ₀ to ^d _{̂ N−1} output from the FFT unit 131 . This error signal generator 132 has N subtractors. The N subtractors calculate differences between the N subcarrier signals d ₀ to d _N−1 and the signals d̂ ₀ to d̂ _N−1 , and ^produce N error signals ε ₀ ( ⁿ ) to Output as ε _N−1 (n).

Here, the k-th error signal ε _k (n) among the N error signals ε ₀ (n) to ε _N−1 (n) is represented by Equation (6).

Filter coefficient generator 133 receives N subcarrier signals d ₀ to d _N−1 as transmission signal d. The filter coefficient generator 133 also receives the N error signals ε ₀ (n) to ε _N−1 (n) output from the error signal generator 132 . _{Filter coefficient} generation section ₁₃₃ generates _N Generate filter coefficients w ₀ to w _N−1 . Filter coefficient generation section 133 outputs the generated N filter coefficients w ₀ to w _N−1 to subband FIR filter 101 .

Here, the k-th filter coefficient w _k among the N filter coefficients w ₀ to w _N−1 is represented by Equation (7). In equation (7), * is the complex conjugate and μ _k is a step-size parameter used to control the trade-off between convergence speed and residual error of the algorithm.

FIG. 5 is a flowchart illustrating an example of processing (distortion compensation method) of the distortion compensation device according to the first embodiment.

First, FIR filter processing (step S101) is performed. In this process, subband FIR filter 101 inputs N subcarrier signals d ₀ to d _N−1 allocated for each frequency to transmission signal d, and N subcarrier signals d ₀ to d _N− 1 is superimposed with N filter coefficients w ₀ to w _N−1 .

Next, IFFT processing (step S102) is performed. In this process, IFFT section 102 transforms N subcarrier signals d ₀ to d _N−1 superimposed with N filter coefficients w ₀ to w _N−1 from the frequency domain to the time domain.

Next, an oversampling process (step S103) is performed. In this process, oversampling section 103 performs oversampling on the signal converted into the time domain, and outputs the input signal x(n) to ML DPD section 105 and control section 112 via CFR section 104. Output.

Next, DPD processing (step S104) is performed. In this process, the ML DPD section 105 superimposes the distortion compensation coefficient _ak on the input signal x(n) and outputs the result to the DAC 106 as the output signal z(n).

Next, an amplified output process (step S105) is performed. In this process, DAC 106 converts output signal z(n) to an analog signal and outputs it to HPA 108 via upconverter 107 . HPA 108 amplifies the power of the signal output from upconverter 107 and outputs the amplified signal. Directional coupler 109 outputs the signal output from HPA 108 to the antenna and also to ADC 111 via down converter 110 . ADC 111 converts the signal output from down converter 110 into a digital signal, and outputs the digital signal to control section 112 as feedback signal y(n).

Next, coefficient generation processing (step S106) is performed. In this process, the control unit 112 uses an arithmetic expression using the N subcarrier signals d ₀ to d _N−1 and the feedback signal y(n) (see the above expressions (6) and (7)). generates N filter coefficients w ₀ to w _N−1 and outputs them to the subband FIR filter 101 . The control unit 112 generates the distortion compensation coefficient _ak according to the arithmetic expression using the input signal x(n) and the feedback signal y(n) (see the above equations (4) and (5)). −L Output to DPD section 105 .

As described above, in the distortion compensation apparatus according to the first embodiment, the subband FIR filter 101 receives the N subcarrier signals d ₀ to d _N−1 assigned for each frequency with respect to the transmission signal d. , N subcarrier signals d ₀ to d _N− 1 are superimposed with filter coefficients w ₀ to w _N−1 , respectively. This can in turn compensate for in-band IMD resulting from memory effects.

Further, in the distortion compensation apparatus according to the first embodiment, the subband FIR filter 101 compensates for IMD within the band caused by the memory effect, thereby reducing the amount of computation when compensating for distortion. As a result, in the distortion compensation device according to the first embodiment, power consumption due to signal processing such as calculation can be reduced as compared with the distortion compensation device 300 in the reference example, that is, compared with the case where memory polynomials are used in the DPD. can be done.

Further, in the distortion compensation apparatus according to the first embodiment, the ML DPD section 105 superimposes the distortion compensation coefficient _ak on the input signal x(n) after oversampling, so that the in-band and Compensate for out-of-band IMD. As a result, the distortion compensator according to the first embodiment can maintain the same level of EVM and ACLR as those of the distortion compensator of the reference example.

In the distortion compensator according to the first embodiment, the controller 112 generates N filter coefficients w ₀ to w _N−1 with the configuration shown in FIG. 4, but the present invention is not limited to this. For example, in the distortion compensation device according to the second embodiment, the control unit 112 may generate N filter coefficients w ₀ to w _N−1 with the following configuration. In Example 2, the same reference numerals are given to the same parts as in Example 1, and the description thereof is omitted.

FIG. 6 is a diagram showing an example of the configuration of the control unit 112 of the distortion compensation device according to the second embodiment. As shown in FIG. 6, the control unit 112 has a bandpass filter (BPF) 134 and a decimation unit 135 in addition to the configuration shown in FIG. The BPF 134 is an example of a "bandwidth limiter".

The BPF 134 inputs the feedback signal y(n) output from the ADC 111 . The BPF 134 passes signals in a specific frequency band and attenuates signals in other frequency bands with respect to the feedback signal y(n).

The decimation unit 135 thins out the feedback signal y(n) that has passed through the BPF 134 . Then, decimation section 135 outputs the thinned feedback signal y(n) to FFT section 131 .

The FFT section 131 receives the feedback signal y(n) output from the decimation section 135 . FFT section 131 transforms feedback signal ^y ( ⁿ ) from the time domain to the frequency domain, and outputs signals d _{̂ 0} to _{̂ N−1} transformed into the frequency domain to error signal generating section 132 . The error signal generation unit 132 calculates the difference between the N subcarrier signals d ₀ to d _N−1 as the transmission signal d and the signals d ^{^} ₀ to d ^{^} _N−1 output from the FFT unit 131. , are output as N error signals ε ₀ (n) to ε _N−1 (n). Filter coefficient generating section 133 generates N subcarrier signals d ₀ to d _N−1 which are transmission signal d, and N error signals ε ₀ (n) to ε _N− output from error signal generating section 132 . ₁ (n) and N filter coefficients w ₀ to w _N−1 are generated by the arithmetic expression (formula (7) above). Filter coefficient generation section 133 outputs the generated N filter coefficients w ₀ to w _N−1 to subband FIR filter 101 .

If the signal remains oversampled, the sampling frequency will be higher and the magnitude of subsequent signal processing will be greater than without oversampling. Therefore, the feedback signal y(n) that has passed through the BPF 134 is thinned. Thereby, the control unit 112 shown in FIG. 6 can reduce the size of the FFT unit 131 with respect to the configuration of FIG.

In the distortion compensation apparatuses according to the first and second embodiments, the controller 112 generates N filter coefficients w ₀ to w _N−1 by the configurations shown in FIGS. 4 and 6, but the present invention is not limited to this. For example, in the distortion compensation device according to the third embodiment, the controller 112 may generate N filter coefficients w ₀ to w _N−1 with the following configuration. In Example 3, the same parts as those in Examples 1 and 2 are denoted by the same reference numerals, and descriptions thereof are omitted.

FIG. 7 is a diagram illustrating an example of the configuration of the control unit 112 of the distortion compensation device according to the third embodiment. As shown in FIG. 7 , the control section 112 has an error signal generation section 141 , an FFT section 142 and a filter coefficient generation section 143 . The FFT section 142 is an example of a "second signal conversion section".

The error signal generator 141 receives the input signal x(n) output from the oversampling unit 103 . Also, the error signal generator 141 inputs the feedback signal y(n) output from the ADC 111 . This error signal generator 141 is a subtractor. The error signal generator 141 calculates the difference between the input signal x(n) and the feedback signal y(n) and outputs it as an error signal ε.

The FFT unit 142 inputs the error signal ε output from the error signal generation unit 141 . Then, the FFT unit 142 transforms the error signal ε from the time domain to the frequency domain, and generates filter coefficients using the N signals ε ₀ (n) to ε _N−1 (n) transformed into the frequency domain as error signals. Output to the unit 143 .

Filter coefficient generator 143 receives N subcarrier signals d ₀ to d _N−1 as transmission signal d. The filter coefficient generator 143 also receives the N error signals ε ₀ (n) to ε _N−1 (n) output from the FFT unit 142 . The filter _coefficient generation unit ₁₄₃ uses _an arithmetic expression (the above _- described expression ( 7)) to generate N filter coefficients w ₀ to w _N−1 . Filter coefficient generator 143 outputs the generated N filter coefficients w ₀ to w _N−1 to subband FIR filter 101 .

In the distortion compensation devices according to Examples 1 to 3, the control unit 112 calculates the , distortion compensation coefficients a _k are generated, but the present invention is not limited to this. For example, in the distortion compensation device according to the fourth embodiment, the control unit 112 uses the N error signals ε ₀ (n) to ε _N−1 (n) shown in the first to third embodiments to obtain the distortion compensation coefficient a _k may be generated. In Example 4, the same reference numerals are assigned to the same parts as in Examples 1 to 3, and the description thereof is omitted.

In this case, the control unit 112 generates N error signals ε ₀ (n) to ε _N−1 (n) generated by the error signal generation unit 132 (FIGS. 4 and 6) or the FFT unit 142 (FIG. 7). is generated as the error signal ε(n).

Here, the error signal ε(n) is represented by Equation (8) instead of Equation (4) above.

Then, the control unit 112 calculates the distortion compensation coefficient _ak using the above equation (5) so that the error signal ε(n) is minimized by adaptive signal processing using the LMS algorithm or the like.

In the distortion compensation apparatuses according to Examples 1 to 4, the subband FIR filter 101 has N multipliers 120 if it has a 1-tap configuration, for example. In this case, the greater the number N of multipliers 120, the greater the number of signals that supply the N filter coefficients w ₀ to w _N−1 from the control unit 112 to the N multipliers 120. The circuit scale of FIR filter 101 increases. A method for reducing the circuit scale of the subband FIR filter 101 will be described for the distortion compensation apparatus according to the fifth embodiment.

First, in the distortion compensation apparatus according to the fifth embodiment, the number of filter coefficients is reduced in order to reduce the circuit scale of subband FIR filter 101 .

8 and 9 are diagrams showing examples of grouped subcarrier signals in the distortion compensator according to the fifth embodiment. 8 and 9, the horizontal axis represents the frequency f and the number N of subcarriers. The vertical axis represents subcarrier signals.

Typically, each subcarrier, ie each subcarrier signal d ₀ to d _N−1 , is assigned a unique filter coefficient. However, the frequency spacing between subcarriers (subcarrier spacing) is relatively small. For example, the subcarrier spacing in LTE signals is 15 kHz. Therefore, it can be assumed that the weights of adjacent subcarriers are correlated and that adjacent subcarriers can be assigned the same value of filter coefficients.

Therefore, in the distortion compensation apparatus according to the fifth embodiment, as shown in FIG. 8, N subcarriers, that is, N subcarrier signals d ₀ to d _N−1 are generated for each X adjacent subcarriers. divided into M groups. In this case, N, X and M are integers satisfying M=N/X. Then, the distortion compensation apparatus according to the fifth embodiment generates M filter coefficients w[0] to w[M−1] set to the same value for each of X adjacent subcarriers in each of the M groups. do.

For example, if the LTE signal is a 20 MHz signal, N, X and M are 1200, 150 and 8, respectively, as shown in FIG. That is, 1200 subcarrier signals d ₀ to d _N−1 are divided into 8 groups of 150 adjacent subcarriers. In this case, eight filter coefficients w[0] to w[7] set to the same value are generated for every 150 adjacent subcarriers in each group.

Therefore, it is assumed that the control unit 112 has the configuration shown in the first and second embodiments. In this case, the error signal generation unit 132 uses an arithmetic expression using the above M, the subcarrier signals d _k of M groups, and the signal d ^{^} _k transformed into the frequency domain by the FFT unit 131 for each M groups, Generate M error signals ε _k (n).

Here, the M error signals ε _k (n) are represented by Equation (9). In equation (9), the error signal ε _k (n) has the same weight (same value) for each X adjacent subcarriers (subcarrier indices from -X/2 to X/2).

The filter _coefficient generation unit 133 generates the N filter _coefficients w ₀ to w _N-1 to generate M filter coefficients w[0] to w[M-1]. Filter coefficient generation section 133 outputs the generated M filter coefficients w[0] to w[M−1] to subband FIR filter 101 .

Subband FIR filter 101 inputs N subcarrier signals d ₀ to d _N−1 assigned for each frequency with respect to transmission signal d. The N subcarrier signals d ₀ to d _N−1 are divided into M groups of X adjacent subcarriers. Subband FIR filter 101 also receives M filter coefficients w[0] to w[M−1] output from control section 112 . Subband FIR filter 101 then superimposes (multiplies) M groups of subcarrier signals _dk by M filter coefficients w[0] to w[M−1].

FIG. 10 is a diagram showing an example of the configuration of the subband FIR filter 101 of the distortion compensation device according to the fifth embodiment. As shown in FIG. 10, when X=2, subband FIR filter 101 superimposes (multiplies) subcarrier signals d _k−1 , d _k , and d _k+1 in the group by filter coefficient w _k of the same value. do.

As described above, in the distortion compensation apparatus according to the fifth embodiment, by reducing the number of filter coefficients from N to M, the number of filter coefficients can be reduced by X times. For example, since the number of filter coefficients is reduced from 1200 to 8, the number of filter coefficients is reduced by a factor of 150. Therefore, in the distortion compensation device according to the fifth embodiment, the circuit scale of the subband FIR filter 101 can be reduced.

In the distortion compensator according to the sixth embodiment, the circuit scale of the subband FIR filter 101 is further reduced by replacing the multiplier 120 of each group in the subband FIR filter 101 shown in the fifth embodiment with an LUT.

The transmission signal _d , ie the subcarrier signal dk, has an amplitude. Its amplitude value depends on the modulation. A subcarrier signal d _k for QPSK (Quadrature Phase Shift Keying) modulation and a subcarrier signal d _k for 16QAM (Quadrature Amplitude Modulation) modulation are shown in FIGS. 11 and 12, respectively.

FIG. 11 is a diagram showing an example of a QPSK constellation. In FIG. 11, the horizontal axis is the I component of the subcarrier signal _dk , and the vertical axis is the Q component of the subcarrier signal _dk . As shown in FIG. 11, in QPSK modulation, a total of four possible combinations of subcarrier signals d _k are obtained by d _k ={I, Q}={±1,±1}.

FIG. 12 is a diagram showing an example of a 16QAM constellation. In FIG. 12, the horizontal axis is the I component of the subcarrier signal _dk , and the vertical axis is the Q component of the subcarrier signal _dk . As shown in FIG. 12, in 16QAM modulation, subcarrier signals d _k are d _k ={I, Q}={±3,±3}, and a total of 16 combinations are possible.

Therefore, in the distortion compensation apparatus according to the sixth embodiment, all combinations (4 in QPSK modulation, 16 in 16QAM modulation) are calculated in advance for each multiplication product of M groups, and then subcarrier signals d _k .

For example, let w[Mx] be the filter coefficients of 150 adjacent subcarriers (X=150) in each group Mx, and assume subcarrier signal dk for QPSK modulation as transmission signal _d . In this case, the multiplication product _dk ·w[Mx] can be represented by the following four multiplication products.
P ₁ =d _k ·w={+1, +1}·w
P ₂ =d _k ·w={+1,−1}·w
P ₃ =d _k ·w={−1,+1}·w
P ₄ =d _k ·w={−1,−1}·w

The multiplication product _dkw [Mx] of the 150 subcarriers in group Mx is obtained using _four pre _- computed signals P ₌ {P1, P2 _, P3, P4} It is selectable by the carrier signal _dk . Four signals P can be written to the LUT. In this case, the address Addr of the LUT can be calculated by the following formula.
Addr=((2·I+Q)+3)/2

FIG. 13 is a diagram illustrating an example of LUT addresses according to the sixth embodiment. According to the above equation, when the transmission signal _d , that is, the I component and the Q component of the subcarrier signal dk are -1 and -1, respectively, the address Addr of the LUT is "0". Similarly, when the I component and the Q component are -1 and +1, respectively, the address Addr of the LUT is "1". When the I component and the Q component are +1 and -1, respectively, the address Addr of the LUT is "2". When the I component and the Q component are +1 and +1, respectively, the address Addr of the LUT is "3".

Therefore, in the distortion compensation device according to the sixth embodiment, the multiplier 120 of each group Mx in the subband FIR filter 101 can be replaced with an LUT. The number of multiplications per group Mx is 4 for QPSK modulation, 16 for 16QAM modulation, and 64 for 64QAM modulation.

FIG. 14 is a diagram showing an example of the configuration of the subband FIR filter 101 of the distortion compensation device according to the sixth embodiment. Subband FIR filter 101 has M LUTs 150 . Each of the M LUTs 150 is mapped with the multiplication product _dk ·w[Mx] in each group Mx.

Here, in each group Mx, when a new filter coefficient w[Mx] is obtained, the contents of the LUT 150 are updated.

Therefore, it is assumed that the control unit 112 has the configuration shown in the first and second embodiments. In this case, the error signal generation unit ¹³² _calculates an _arithmetic expression (described above (9)) generates M error signals ε _k (n).

Filter _coefficient generator 133 generates M filter _coefficients w[Mx ] is generated. The filter coefficient generator 133 stores the generated M filter coefficients w[Mx] in the M LUTs 150 of the subband FIR filter 101, respectively. Thereby, the contents of the LUT 150 are updated.

Subband FIR filter 101 refers to M tables 150 updated by control section 112, and superimposes (multiplies) M groups of subcarrier signals _dk by M filter coefficients w[Mx].

As described above, the distortion compensation apparatus according to the sixth embodiment can further reduce the circuit scale of the subband FIR filter 101 by replacing the multiplier 120 of each group in the subband FIR filter 101 with an LUT.

In the distortion compensation apparatuses according to the first to fifth embodiments, subband FIR filter 101 assigns filter coefficients w ₀ to w _N to N subcarrier signals d ₀ to d _N−1 , respectively, regardless of the amplitude of the subcarrier signals. _{Although -1} is superimposed, it is not limited to this. In the distortion compensation apparatus according to the seventh embodiment, subband FIR filter 101 applies filter coefficients w _{0, i} to w corresponding to the amplitude of each subcarrier signal to N subcarrier signals d ₀ to d _N−1 . _N−1,i are superimposed.

FIG. 15 is a diagram showing an example of the configuration of the subband FIR filter 101 of the distortion compensation device according to the seventh embodiment. In FIG. 15, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals, and descriptions thereof are omitted.

In Example 7, subband FIR filter 101 has LUT 160 . The LUT 160 stores the filter coefficients _{wk ,i} in association with the amplitude of the subcarrier signal dk. Then, when N subcarrier signals d ₀ to d _N−1 are input to subband FIR filter 101, LUT 160 calculates filter coefficients w _0,i to w _N−1,i corresponding to the respective amplitudes. Output to the corresponding multiplier 120 .

When the modulation method of the subcarrier signal _dk is BPSK (Binary Phase Shift Keying) or QPSK, the amplitude of the subcarrier signal _dk is unchanged, but a modulation method with a large number of modulation values such as 16QAM and 64QAM is used. If used, the amplitudes of the subcarrier signals _dk are not always the same.

Specifically, for example, as shown in FIG. 16, when the modulation scheme is 16QAM, there are three amplitudes of symbols obtained by modulation: | _dk | ₀ , | _dk | ₁ , and | _dk | ₂ . . Similarly, if the modulation scheme is 64QAM, for example, there are 10 symbol amplitudes obtained by modulation. Thus, depending on the modulation scheme, the amplitude of the subcarrier signal _dk changes, so the LUT 160 stores filter coefficients corresponding to each amplitude.

FIG. 17 is a diagram showing an example of the LUT 160. As shown in FIG. FIG. 17 shows an example of the LUT 160 when the modulation scheme of the subcarrier signal _dk is 16QAM. As described above, when the modulation scheme is 16QAM, there are three amplitudes of symbols obtained by modulation, so _three different _amplitudes |d _k | ₀ , | _{d k} | are associated with filter coefficients w _k,0 , w _k,1 , and w _k,2 respectively. LUT 160 then outputs to multiplier 120 a filter coefficient corresponding to the amplitude of input subcarrier signal _dk .

Further, the control unit 112 according to the seventh embodiment generates filter coefficients w _0,i to W _N-1,i corresponding to the amplitudes of the input subcarrier signals d ₀ to d _N−1 , and subcarrier The amplitudes of the signals d ₀ to d _N−1 are associated with each other and stored in the LUT 160 . The method by which the control unit 112 generates the filter coefficients w _0,i to W _N−1,i is the same as in the first to sixth embodiments.

As described above, the distortion compensation apparatus according to the seventh embodiment stores a filter coefficient for each amplitude of a subcarrier signal, and superimposes a filter coefficient corresponding to the amplitude of the subcarrier signal on the subcarrier signal. Therefore, distortion compensation can be performed according to the characteristics of subcarrier signals, and distortion compensation performance can be improved when a modulation scheme with a large modulation multilevel number is used. That is, EVM and ACLR can be improved when modulation schemes such as 16QAM, 64QAM or 256QAM are used.

[Other embodiments]
Each component of each part illustrated in this embodiment does not necessarily need to be physically configured as illustrated. In other words, the specific form of distribution and integration of each part is not limited to the one shown in the figure, and all or part of it can be functionally or physically distributed and integrated in arbitrary units according to various loads and usage conditions. can be configured as

Furthermore, the various processes performed by each device are executed in whole or in part on a CPU (Central Processing Unit) (or a microcomputer such as an MPU (Micro Processing Unit) or MCU (Micro Controller Unit)). You may make it Also, various processes may be executed in whole or in arbitrary part on a program analyzed and executed by a CPU (or a microcomputer such as an MPU or MCU) or on hardware based on wired logic.

A transmission device equipped with the distortion compensation device of this embodiment can be realized by, for example, the following hardware configuration.

FIG. 18 is a diagram illustrating an example of a hardware configuration of a transmission device including a distortion compensator. As shown in FIG. 18 , transmitting device 200 has processor 201 , memory 202 , and analog circuit 203 . Examples of the processor 201 include a CPU, DSP (Digital Signal Processor), FPGA (Field Programmable Gate Array), and the like. Examples of the memory 202 include RAM (Random Access Memory) such as SDRAM (Synchronous Dynamic Random Access Memory), ROM (Read Only Memory), and flash memory.

Various types of processing performed by the transmitting device 100 of the embodiment may be realized by causing a processor to execute a program stored in various types of memory such as a non-volatile storage medium. That is, a program corresponding to each process executed by the digital processing unit of transmitting device 100 may be recorded in memory 202 and each program may be executed by processor 201 . The digital processing section of the transmission device 100 includes, for example, a subband FIR filter 101, an IFFT section 102, an oversampling section 103, a CFR section 104, an ML DPD section 105, and a control section 112. In this case, DAC 106 , upconverter 107 , HPA 108 , directional coupler 109 , downconverter 110 and ADC 111 of transmitting device 100 are implemented by analog circuit 203 .

Although the various processes performed by the transmission device 100 of the embodiment are assumed to be performed by the processor 201 here, the present invention is not limited to this and may be performed by a plurality of processors.

100 transmitter 101 subband FIR filter 102 IFFT unit 103 oversampling unit 104 CFR unit 105 ML DPD unit 106 DAC
107 Up converter 108 HPA
109 directional coupler 110 down converter 111 ADC
112 control unit 120 multiplier 121 multiplier 122 delay unit 123 adder 131 FFT unit 132 error signal generation unit 133 filter coefficient generation unit 134 BPF
135 decimation unit 141 error signal generation unit 142 FFT unit 143 filter coefficient generation unit 150 LUT
160 LUTs
200 transmitter 201 processor 202 memory 203 analog circuit 300 transmitter 301 IFFT unit 302 oversampling unit 303 MP DPD unit 304 DAC
305 Upconverter 306 HPA
307 directional coupler 308 down converter 309 ADC
310 control unit

Claims (9)

a filter unit that inputs a plurality of subcarrier signals assigned to each frequency with respect to a transmission signal, and superimposes a plurality of filter coefficients on each of the plurality of subcarrier signals;
a first signal transforming unit that transforms the plurality of subcarrier signals on which the plurality of filter coefficients are respectively superimposed, from the frequency domain to the time domain, and outputs the signal as an input signal;
a distortion compensator that superimposes a distortion compensation coefficient on the input signal and outputs it as an output signal;
a power amplifier that amplifies and outputs the output signal;
an error signal generating unit configured to generate a plurality of error signals as differences between the input signal or the plurality of subcarrier signals and a feedback signal from the power amplifier ; and the plurality of error signals and the plurality of subcarrier signals . a filter coefficient generation unit that generates the plurality of filter coefficients according to the arithmetic expression used, outputs the plurality of filter coefficients to the filter unit, and outputs the total value of the input signal and the plurality of error signals a control unit that generates the distortion compensation coefficient by an arithmetic expression using and outputs it to the distortion compensation unit ;
A distortion compensator comprising: The control unit
further comprising a second signal transforming unit that transforms the feedback signal from the time domain to the frequency domain;
The error signal generation unit generates differences between the plurality of subcarrier signals and the signals transformed into the frequency domain as the plurality of error signals , respectively.
2. The distortion compensator according to claim 1, wherein: The control unit
a band limiter that passes a signal in a specific frequency band with respect to the feedback signal;
a decimation unit that thins the feedback signal that has passed through the band limiting unit and outputs the thinned feedback signal to the second signal conversion unit;
3. The distortion compensating device according to claim 2, wherein: The error signal generator generates an error signal indicating a difference between the input signal and the feedback signal,
The control unit
further comprising a second signal transforming unit transforming the error signal from the time domain to the frequency domain to generate a plurality of error signals
2. The distortion compensator according to claim 1, wherein: further comprising a suppression unit that suppresses peak power of the input signal;
The control unit generates the distortion compensation coefficient by an arithmetic expression using the input signal whose peak power is suppressed by the suppressing unit and the total value of the plurality of error signals.
2. The distortion compensator according to claim 1 , wherein: N subcarrier signals, which are the plurality of subcarrier signals, are divided into M groups for each X adjacent subcarriers (N, X, M are integers satisfying M=N/X),
The control unit
generating M error signals set to the same value for each of the X adjacent subcarriers in each group as the plurality of error signals by an arithmetic expression using M;
generating M filter coefficients as the plurality of filter coefficients by an arithmetic expression using the M error signals and the M groups of subcarrier signals;
The filter unit superimposes the M filter coefficients on each of the M groups of subcarrier signals.
6. The distortion compensation device according to any one of claims 1 to 5 , characterized in that: The filter section is
M tables with mapped multiplication products within each group;
has
The control unit stores the M filter coefficients in the M tables,
The filter unit refers to the M tables updated by the control unit, and superimposes the M filter coefficients on each of the M groups of subcarrier signals.
7. The distortion compensator according to claim 6 , wherein: The filter section is
a storage unit that stores filter coefficients corresponding to amplitudes of subcarrier signals and outputs the stored filter coefficients corresponding to amplitudes of the plurality of subcarrier signals;
2. The distortion compensator according to claim 1, wherein filter coefficients outputted from said storage unit are respectively superimposed on said plurality of subcarrier signals. inputting a plurality of subcarrier signals assigned for each frequency to a transmission signal into a filter mechanism, superimposing a plurality of filter coefficients on each of the plurality of subcarrier signals ;
transforming the plurality of subcarrier signals on which the plurality of filter coefficients are respectively superimposed, from the frequency domain to the time domain;
oversampling the signal converted to the time domain and outputting it as an input signal;
causing the distortion compensating mechanism to superimpose a distortion compensating coefficient on the input signal and output the result as an output signal to a power amplifier;
an error signal generating unit configured to generate a plurality of error signals as differences between the input signal or the plurality of subcarrier signals and a feedback signal from the power amplifier ; and the plurality of error signals and the plurality of subcarrier signals . Generate the plurality of filter coefficients by the arithmetic expression used,
outputting the plurality of filter coefficients to the filter mechanism, generating the distortion compensation coefficient by an arithmetic expression using the input signal and the sum of the plurality of error signals, and outputting the distortion compensation coefficient to the distortion compensation mechanism ;
A distortion compensation method characterized by performing processing.

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