JP7192707B2 - Semiconductor manufacturing equipment - Google Patents

Description

The present invention relates to a semiconductor manufacturing apparatus, and more particularly to a semiconductor manufacturing apparatus in which a stage on which a wafer to be processed is placed does not have a mechanism for fixing and holding the wafer.

In a semiconductor manufacturing apparatus, a fork is inserted into the rear surface of a wafer to transport the wafer and place it on the upper surface of a stage in the processing apparatus. The state and weight of the back surface of the wafer differ depending on the product. If the frictional resistance of the back surface of the wafer is low and the weight is light, the wafer may shift position or slide sideways on the stage. In order to prevent this, there is known a semiconductor manufacturing apparatus in which a plurality of grooves are provided on the upper surface of the stage and a plurality of ventilation holes are provided in the grooves so as to penetrate the stage (see, for example, Patent Document 1).

JP-A-2002-57209

In a conventional semiconductor manufacturing apparatus, many grooves are formed on the entire upper surface of the stage in order to release gas existing between the lower surface of the wafer and the upper surface of the stage. Since there is no contact between the wafer and the stage in the groove portion, the temperature control performance is degraded and the in-plane temperature distribution of the wafer varies. As a result, problems such as abnormal film quality of the thin film formed on the wafer have arisen.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a semiconductor manufacturing apparatus capable of improving the positional accuracy of a wafer placed on a stage while preventing in-plane temperature variations of the wafer. It is.

A semiconductor manufacturing apparatus according to the present invention includes a fork for lifting and conveying a wafer, and a stage on which the wafer is placed. and a plurality of gas release holes communicating with the fork accommodating grooves provided at different positions.

In the present invention, the gas present between the lower surface of the wafer and the upper surface of the stage when the wafer is placed on the stage can be released through the gas release groove and the fork housing groove. As a result, it is possible to suppress the positional deviation and lateral slip of the wafer, so that the positional accuracy of the wafer placed on the stage can be improved. In addition, by using the fork housing groove originally provided for placing the wafer on the stage and the gas release groove communicating with it for gas discharge, there is no need to form many grooves on the upper surface of the stage as in the conventional case. good. Therefore, since the temperature adjustment performance does not deteriorate so much, it is possible to prevent in-plane temperature variations of the wafer.

1 is a top view showing a semiconductor manufacturing apparatus according to Embodiment 1; FIG. FIG. 4 is a cross-sectional view showing how deposition is performed with the wafer correctly placed on the stage; FIG. 4 is a cross-sectional view showing how deposition is performed in a state where the position of the wafer is displaced; 2 is a top view showing the stage of the semiconductor manufacturing apparatus according to Embodiment 1; FIG. FIG. 5 is a perspective sectional view along I-II of FIG. 4; FIG. 11 is a top view showing a stage of a semiconductor manufacturing apparatus according to Embodiment 2; 7 is a cross-sectional view along III-IV of FIG. 6; FIG. FIG. 11 is a top view showing a stage of a semiconductor manufacturing apparatus according to a modification of Embodiment 2; FIG. 9 is a cross-sectional view along V-VI in FIG. 8;

A semiconductor manufacturing apparatus according to an embodiment will be described with reference to the drawings. The same reference numerals are given to the same or corresponding components, and repetition of description may be omitted.

Embodiment 1.
FIG. 1 is a top view showing a semiconductor manufacturing apparatus according to Embodiment 1. FIG. This semiconductor manufacturing apparatus 100 is a CVD (Chemical Vapor Deposition) apparatus for forming a thin film on a wafer. The semiconductor manufacturing apparatus 100 includes a transfer robot 1 having an arm structure, a load-lock chamber 2, a loader 3 provided in the load-lock chamber 2, a plurality of forks 5 attached to a rotating shaft, and a chamber constituting a processing chamber. 6. It has a stage 7 in a chamber 6 on which a plurality of wafers 4 can be mounted. The semiconductor manufacturing apparatus 100 is not limited to this, and may be any semiconductor manufacturing apparatus that positions a wafer by its own weight. The semiconductor manufacturing equipment 100 may be that of a laboratory, laboratory, or mass production plant.

A transfer robot 1 takes out a wafer 4 from a loader 3 in a load lock chamber 2 . The transfer robot 1 then carries the wafer 4 over the forks 5 in the chamber 6 . After that, the fork 5 is lifted to lift the wafer 4 , and in this state, the stage 7 in the chamber 6 is rotated above the processing area 8 , and the fork 5 is lowered to place the wafer 4 on the stage 7 . A plurality of processing areas 8 are provided along the outer circumference of a large circular stage 7 . The stage 7 does not have functions for fixing and holding the wafer 4, such as suction holes for vacuum suction, positioning pins, and seats.

FIG. 2 is a cross-sectional view showing how deposition is performed with the wafer correctly placed on the stage. A voltage is applied between the stage 7 and the upper electrode 9 to generate a plasma 10 between them within the chamber 6 . By arranging the wafer 4 in the processing area 8 immediately below the upper electrode 9 in the chamber 6 , the film can be uniformly formed on the surface of the wafer 4 . FIG. 3 is a cross-sectional view showing how deposition is performed in a state where the position of the wafer is shifted. Deposition anomalies occur when the wafer 4 is displaced from the processing region 8 directly below the upper electrode 9 .

4 is a top view showing a stage of the semiconductor manufacturing apparatus according to Embodiment 1. FIG. 5 is a perspective cross-sectional view along I-II of FIG. 4. FIG. The stage 7 is made of aluminum, for example. Two fork housing grooves 11 into which the forks 5 are inserted and two gas release grooves 12 provided at different positions from the fork housing grooves 11 and communicating with the fork housing grooves 11 are provided on the upper surface of the stage 7. . The two fork receiving grooves 11 extend from the outside of the processing area 8 toward the center and are arranged parallel to each other. In this example, the gas release grooves 12 are arranged between two fork housing grooves 11 and perpendicular to the fork housing grooves 11 in parallel with each other. The gas release groove 12 has a concave-convex structure consisting of a concave portion having a triangular cross section and a convex portion provided adjacent to the concave portion and protruding from the flat surface of the stage 7 . The gas release groove 12 is narrower in width than the fork housing groove 11, and has a shallow depth of 30 to 50 μm in terms of height difference of the uneven structure.

When the wafer 4 is placed on the stage 7 , the gas 13 existing between the lower surface of the wafer 4 and the upper surface of the stage 7 can be released into the fork accommodation groove 11 through the gas release groove 12 . In addition, the gas release groove 12 has an uneven structure, thereby increasing the frictional force. As a result, the lateral slip of the wafer 4 can be suppressed, so that the positional accuracy of the wafer 4 placed on the stage 7 can be improved regardless of the state of the back surface of the wafer 4, the weight of the wafer, and the state of the stage. can be done.

Further, by using the fork housing groove 11 originally provided for placing the wafer 4 on the stage 7 and the gas release groove 12 communicating with it for discharging the gas 13, many grooves can be formed on the upper surface of the stage 7 as in the conventional art. need not be formed. Therefore, since the temperature adjustment performance does not deteriorate so much, in-plane temperature variation of the wafer 4 can be prevented. As a result, the in-plane uniformity of film formation on the wafer 4 is stabilized.

Further, by providing the gas release groove 12 at a position different from the fork accommodation groove 11, gas release can be performed in a region other than the fork accommodation groove 11 as well. Therefore, the side slip of the wafer 4 can be suppressed by instantaneously degassing the in-plane of the wafer 4 . In order to prevent deterioration in temperature control performance, it is preferable to make the width of the gas vent groove 12 narrower than the width of the fork housing groove 11 . As for the arrangement of the gas release groove 12, it is not necessary to arrange it orthogonally to the fork accommodation groove 11, and the angle, shape, and arrangement may be such that the frictional force increases according to the lateral sliding direction of the wafer 4. FIG. Moreover, it is not necessary to connect both ends of the gas release groove 12 to the fork housing groove 11 , and at least one end thereof should be connected to the fork housing groove 11 .

Embodiment 2.
FIG. 6 is a top view showing stages of the semiconductor manufacturing apparatus according to the second embodiment. FIG. 7 is a cross-sectional view along III-IV of FIG. A plurality of gas vent holes 14 are provided on the upper surface of the stage 7 . The gas release hole 14 is provided at a position different from the fork accommodation groove 11 and communicates with the fork accommodation groove 11 . Here, the gas release hole 14 is provided on an extension line of the fork housing groove 11 .

When the wafer 4 is placed on the stage 7 , the gas 13 existing between the lower surface of the wafer 4 and the upper surface of the stage 7 can be released through the gas vent hole 14 and the fork accommodating groove 11 . As a result, the lateral slip of the wafer 4 can be suppressed, so that the positional accuracy of the wafer 4 placed on the stage 7 can be improved regardless of the state of the back surface of the wafer 4, the weight of the wafer, and the state of the stage. can be done.

Further, by using the fork housing groove 11 originally provided for placing the wafer 4 on the stage 7 and the gas release hole 14 communicating with the fork housing groove 11 for discharging the gas 13, many grooves can be formed on the upper surface of the stage 7 as in the conventional art. need not be formed. Therefore, since the temperature adjustment performance does not deteriorate so much, in-plane temperature variation of the wafer 4 can be prevented. As a result, the in-plane uniformity of film formation on the wafer 4 is stabilized.

A rough surface structure region 15 is provided around the fork housing groove 11 on the upper surface of the stage 7 by rough finishing. As a result, the wafer 4 is less likely to slide sideways on the stage 7 because the frictional resistance is greater than in the case of mirror finishing. As for the specific surface roughness of the rough surface structure region 15, it is preferable to set the maximum height Rmax to 50a in view of the relationship between the gas venting effect, the side slip prevention, and the variation in the in-plane temperature distribution.

FIG. 8 is a top view showing stages of a semiconductor manufacturing apparatus according to a modification of the second embodiment. 9 is a cross-sectional view along V-VI in FIG. 8. FIG. A vent hole 14 and a roughened area 15 are provided around the fork receiving groove 11 . As described above, the gas release hole 14 may be provided anywhere on the upper surface of the wafer 4 as long as it can be processed. Further, by providing the gas release hole 14 at a position different from the fork accommodation groove 11, gas release can be performed in a region other than the fork accommodation groove 11 as well. Therefore, the side slip of the wafer 4 can be suppressed by instantaneously degassing the in-plane of the wafer 4 .

4 Wafer 5 Fork 7 Stage 11 Fork Receiving Groove 12 Degassing Groove 14 Degassing Hole 15 Rough Surface Structure Area

Claims (2)

a fork for lifting and transferring the wafer;
A stage on which the wafer is placed on the upper surface,
The upper surface of the stage is provided with a fork housing groove into which the fork is placed, and a plurality of gas release holes provided at positions different from the fork housing groove and communicating with the fork housing groove. Semiconductor manufacturing equipment. 2. The semiconductor manufacturing apparatus according to claim 1 , wherein said upper surface of said stage is provided with a rough surface structure region.

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