JP7180043B2 - Digital verification support device and digital verification support program - Google Patents

Description

The present invention relates to a digital verification support device and a digital verification support program.

In digital verification, an input file called a vector is created for RTL (Register Transfer Level) to be verified, and it is confirmed whether the RTL operates normally. Normally, vectors are created manually based on human thinking. In order to check whether appropriate processing is performed for interrupt events that occur asynchronously in the electronic circuit or system to be verified, a method using interrupts called interrupt verification is adopted for vectors once created. be able to.

For example, interrupt verification in memory products is divided into an abnormal system and a functional system due to the nature of asynchronous interrupts.

Furthermore, current interrupt verification is performed by a combination of two types of verification methods, normal interrupt and high resolution interrupt. These two types of interrupts have the characteristics shown in Table 2 below, and are used in accordance with these characteristics. "sim time" in Table 2 is the simulation time.

In recent years, the number of interrupts to be verified has increased explosively due to the complexity of circuits in memory products and the feedback from past failures, and the simulation time has also increased dramatically. As a result, for the first flash memory equipped with the AIPR function (Asynchronous Independent Plane Read), the total number of interrupts (number of vectors) for all interrupt types due to high-resolution interrupts is in the hundreds of thousands. In addition, the FFh interrupt (Table 1), which has the largest number of interrupts, has a very large value together with the number of interrupts and the verification time, and the time required for one regulation is 340 hours (more than 2 weeks) on the premise of 50 parallel licenses.

Originally, the LSI design drawing was printed on magnetic tape and the data was shipped to the LSI manufacturing department. However, due to the long simulation time, we can only confirm the results of the verification performed on the circuit two weeks before the tape-out. As for the flash memory verification policy, the high-resolution interrupt during that period was abandoned, and only follow-up verification after tape-out was performed. If a fatal defect is found in the follow-up verification, it will be refined (improvement of the mask), so it is necessary to improve verification efficiency or launch a new verification method while maintaining quality (number of interrupts).

In order to solve the above problem, the current interrupt verification method will be examined here. Interrupt verification in a certain type of flash memory is called a two-step DB type, and uses a method of performing sampling and interrupts in two steps, as shown in FIG.

Step 1: Sampling
All vectors are pre-flowed and unique state change points are registered in a common database. The contents are the vector name and the occurrence time of the change point (simulation time), which are also the targets of the interrupt verification. Normally, there are many cases where a plurality of interrupt points are registered in one vector, and some vectors have a maximum of 7000 or more interrupt points.

Step 2: Interrupt
Determine the conditions for sending vectors from the registration information in the database. Specifically, the vector that matches the vector name is executed, and an interrupt event is generated when the interrupt time comes. One vector is generated for one interrupt point.

As a result of examining the above process, it was found that the same execution contents were included in a plurality of interrupt vectors created from one vector, as shown in FIGS. The vector before the interrupt point (Fig. 1: vectorx_1, Fig. 2: v1) is always included in the vector after the interrupt point (Fig. 1: vectorx_2, Fig. 2: v2), which is also included in the vector after 1: vectorx_3, FIG. 2: v3), which is also included in the subsequent vector (FIG. 1: vectorx_4, FIG. 2: v4).

In this way, it is considered that the regulation time is lengthened because a plurality of vectors are running through simulations that wastefully overlap. If overlapping simulations can be shared and made into a single pass, a significant time reduction can be expected.

The simulator is equipped with a snapshot, which is a support function that saves the intermediate state of the simulation in a temporary library and restores from that state. This function eliminates the need to return to the beginning of each of a plurality of interrupt vectors and execute processing, thereby realizing a reduction in time.

Performing state restoration in the event of an interrupt is disclosed in US Pat. Moreover, in Patent Document 2, a snapshot, which is a copy of the register memory, is transferred as part of the emulation data, and together with other emulation data and the CPU clock, it is possible to perfectly imitate the instructions of the target CPU in the emulation device. is disclosed.

US Pat. No. 5,300,005 discloses that snapshot solving techniques can be used to obtain initial condition signals and input signals for simulation. In Patent Document 4, the state value change storage means 2 creates signal change point information 5 when the signal state value changes, and when there is a request to return the simulation time, the state value change means 3 stores It is disclosed that the signal is returned to the state value before the change by tracing back the change point information 5 of the signal that was previously changed. As a result, the logic verification can be restarted from the middle without redoing the logic verification from the first input pattern, and the verification time can be shortened.

JP-A-7-160537 Japanese translation of PCT publication No. 2008-544340 Japanese Patent No. 5432126 JP-A-5-151305

As described above, it can be seen that it has been known to perform state restoration or use snapshot state restoration to reduce time. However, it is clear that if there are many interrupt points, moreover, a large number of snapshot locations will not necessarily save time as it will take time to collect and save the state information. An object of the present invention is to provide a digital verification support apparatus that enables appropriate processing by giving interrupt position information and optimum snapshot position information required for processing to a simulator that performs digital verification. .

A digital verification support apparatus according to an embodiment includes an interrupt position detecting means for detecting an interrupt position in a vector given to a simulator that performs digital verification, and a snapshot based on the interrupt position detected by the interrupt position detecting means. and snapshot location determination means for determining a predetermined number of optimal snapshot locations to be performed, wherein said simulator is provided with snapshots at said optimal snapshot locations that said simulator uses to restore the current state. snapshot information acquiring and holding means for acquiring and holding information; Upon completion, the vector processing means executes a series of processes up to restoration based on the snapshot information of the optimal snapshot position corresponding to the interrupt position, and proceeds from the optimal snapshot position to the execution of the vector. It is characterized by providing interrupt position information and optimum snapshot position information required for the processing of the snapshot information acquiring and holding means and the vector processing means.

Explanatory drawing which shows the process of the interrupt verification method called 2 step DB type|mold. Explanatory drawing which shows the process of the conventional interrupt verification method. 1 is a configuration diagram showing the configuration of a digital verification system using a digital verification support device according to a first embodiment of the present invention; FIG. FIG. 2 is a configuration diagram showing the configuration of a digital verification system configured to process a plurality of vectors in parallel; 4 is a flowchart showing processing operations by a digital verification system using the digital verification support device according to the first embodiment of the present invention; FIG. 5 is a diagram showing a process of creating an interrupt processing instruction including a snapshot by a processing operation of the digital verification system using the digital verification support device according to the first embodiment of the present invention; FIG. 7 is a diagram showing the flow of processing when a vector is executed by the instruction shown in FIG. 6; FIG. 4 is a diagram showing the processing time when an interrupt processing instruction including a snapshot is executed by the digital verification system using the digital verification support device according to the first embodiment of the present invention; FIG. 4 is a diagram showing the relationship between the interrupt position and the snapshot position when the digital verification support device according to the first embodiment of the present invention uses the exhaustive method; FIG. 4 is a diagram showing the relationship between interrupt positions and snapshot positions when the digital verification support device according to the embodiment of the present invention uses the X equality method; The figure which shows the problem at the time of using X equality method. The figure which shows the problem at the time of using X equality method. FIG. 4 is a diagram showing the relationship between interrupt positions and snapshot positions when the digital verification support device according to the embodiment of the present invention uses the Y equality method; The figure which shows the problem at the time of using Y equality method. FIG. 5 is a diagram showing the relationship between the interrupt position and the snapshot position when the digital verification support device according to the embodiment of the present invention uses the tilt method; The figure which shows the problem at the time of using the inclination method. FIG. 4 is a diagram showing the relationship between the interrupt position and the first snapshot position when the digital verification support device according to the embodiment of the present invention uses the area method; FIG. 5 is a diagram showing the relationship between the interrupt position and the second snapshot position when the digital verification support device according to the embodiment of the present invention uses the area method; FIG. 10 is a diagram showing the relationship between the interrupt position and the third snapshot position when the digital verification support device according to the embodiment of the present invention uses the area method; FIG. 10 is a diagram showing the relationship between the interrupt position and the M-th snapshot position when the digital verification support device according to the embodiment of the present invention uses the area method;

A digital verification support device and a digital verification support program according to embodiments of the present invention will be described below with reference to the accompanying drawings. In each figure, the same components are denoted by the same reference numerals, and overlapping descriptions are omitted. FIG. 3 shows the configuration of a digital verification system using the digital verification support device according to the first embodiment. This embodiment comprises a simulator 100, which is a digital verification device, and a digital verification support device 200 according to the first embodiment. Simulator 100 is provided with vectors by vector file 130 . A log is created as the vectors are executed by the simulator 100 .

Although FIG. 3 shows that one vector is executed by one simulator 100, the simulator 100 actually includes a plurality of digital verification devices 1-1, 1-2, . . . , 1-N, from the vector file 130, the vector 2-1 is the digital verification device 1-1, the vector 2-2 is the digital verification device 1-2, . is given to the digital verification device 1-N and executed.

As a result, logs 3-1, 3-2, . . . , 3-N are obtained. The logs 3-1, 3-2, . . . , 3-N describe state changes of the state machine. Logs 3-1, 3-2, . The interrupt position detecting means 210 detects the time of state change and the unique internal state as the interrupt position. The reason for detecting a unique internal state as an interrupt position is to prevent duplicate interrupts from the same internal state. The interrupt position information detected in vectors 2-1, 2-2, . . . , 2-N as described above is stored in interrupt position database 230. FIG.

Digital verification support device 200 is provided with snapshot position determination means 220 . The snapshot position determining means 220 determines a predetermined number of optimal snapshot positions at which snapshots should be executed based on the interrupt positions detected by the interrupt position detecting means 210 .

The simulator 100 is provided with a snapshot information acquisition/holding means 110 and a vector processing means 120 . The snapshot information acquiring/holding means 110 acquires and holds snapshot information used by the simulator 100 for restoring the current state at the optimal snapshot position determined by the snapshot position determining means 220 . The vector processing means 120 executes the vector from the beginning and, when reaching an unprocessed interrupt position, executes interrupt processing corresponding to the interrupt position. A series of processes up to restoration are executed based on the snapshot information of the optimum snapshot position corresponding to , and the vector is executed from the optimum snapshot position. In this process, the process proceeds as shown in FIG.

In the digital verification support apparatus 200 having the above configuration, processing is performed according to the flowchart shown in FIG. First, logs are collected by executing all vectors, and a process of detecting an interrupt position by finding a state change point from the log is performed (S11). As a result, as shown in the interrupt information IPI in FIG. 6, vector 1, vector 2, . ) is obtained. Note that the unit of the interrupt position and the snapshot position is not particularly limited, but msec or nsec can be used here.

The interrupt positions in the next vector are fetched and a predetermined number of optimal snapshot positions are obtained (S12). Preferably, the optimal snapshot location is essentially before each interrupt location and does not overlap the previous interrupt location. The example of FIG. 6 shows that 10000, 10500, 20000, 30000, .

Then, in calculating the optimal snapshot location, two interrupt positions 10000 and 9000 before the interrupt position 10500 are determined, two interrupt positions 20000 and 19000 before the interrupt position 30000 are determined, . , and so on, the optimal snapshot position SS-V1 of vector 1 is determined by the method of setting the snapshot positions before the predetermined number of interrupt positions. Next, using the interrupt position information and the snapshot position information, snapshot, interrupt, interrupt processing and interrupt termination, return to the snapshot position, state recovery processing at the snapshot position, and further vector processing continuation are performed. As shown in FIG. 6, an instruction SS-INT by tcl is created (S13). Instruction SS-INT in FIG. 6 describes an instruction for processing such as a snapshot in the case of interrupt processing for vector 1 .

In step S14, it is detected whether instructions have been generated for all vectors, and if NO, the process returns to step S12 to continue processing. If instructions have been created for all vectors, the process ends.

FIG. 7 shows the result of executing the instruction SS-INT by tcl shown in FIG. 6 on vector 1. FIG. As is clear from FIG. 7, when an interrupt occurs at 10000 and 10500, the return position is 9000, which is the snapshot position, and when an interrupt occurs at 20000 and 30000, the return position is snapshot 9000. is 19000, which is the position of Therefore, the time can be shortened as compared with the conventional method which returns to the initial position of the vector in any interrupt.

It is clear from the execution of the vectors employing interrupt processing using snapshots shown in FIG. Therefore, it can be seen that the fastest theoretical simulation time can be (30000+(T _int x4)), assuming that the "time required for interrupt processing" is all the same T _int . However, many simulators used as digital verification aids have some problems and limitations.

The first is that the number of snapshots may be limited. Some simulators have limits on the number of snapshots that can be taken in one vector (eg, up to 14). Therefore, there is no choice but to selectively perform a snapshot at 14 locations before the interrupt.

The second is that the number of interrupts may be limited. Depending on the simulator, there is a limit (measured value) that the return operation to the snapshot position can be performed up to a predetermined number of times (for example, 500) in one vector. .

The third is that snapshot processing takes time. It takes 75 s to create the snapshot information used to restore the current state by snapshot, 85 s for the first call, and 1 s (actual average value) for the second and subsequent calls. Increasing snapshots unnecessarily results in increased time.

The fourth is that there is a period during which snapshots cannot be placed. Since there is a phenomenon in which stored data changes (so-called "garbage") when snapshots are placed in a specific period, snapshots must be placed retroactively with a margin from the interrupt point.

In view of the above limitations, when the snapshot position determining means 220 determines a predetermined number of optimum snapshot positions at which snapshots should be performed, it is necessary to perform processing for obtaining the optimum positions. That is, it is necessary to adjust the location of snapshots according to the length of the vector and the position and number of interrupt points.

Here, let us consider how to arrange snapshots up to 14 times to maximize the simulation time. For example, as shown in FIG. 8, when the interrupt time (interrupt position) is indicated by a black circle and the snapshot position is indicated by a triangle mark pointed downward, the time required for the simulation is indicated by a bar line. . Therefore, the total total time required for simulation in this vector can be thought of as the sum of the lengths of the bars.

Looking closely at the relationship between the arrangement of snapshots and the flow of simulation in FIG. 8, the following two points can be noticed. One is that the snapshot must always be placed before the first interrupt point. For this reason, the remaining 13 points are the real subject of research regarding the arrangement of snapshots. The other is that arranging the snapshot before the part where the interrupt positions are concentrated can shorten the total total time required for the simulation.

In view of the above, the configuration of the snapshot position determining means 220 can be configured as in the first to fifth embodiments. In the previous example, the number of snapshot positions was 14, but in the following, it is assumed to be M points. In the first embodiment, a total number of selection methods are performed to select a combination of M points at different positions from N point positions that are positions immediately before each interrupt position and do not overlap with other interrupt positions. In FIG. 9, if there are interrupt positions indicated by black circles, the number between adjacent black circles is (N−1), and the position before the frontmost black circle is one, for a total of N points of snapping. There is a shot possible position. Since the number of snapshots is limited to M, M points can be selected from the above N points. An example of this point M is indicated by triangular marks 1, 2, 3, 4, . . . pointing downward in FIG.

Furthermore, the snapshot position determining means 220 selects the combination of all the M points selected by each of the above selection methods as the optimum snapshot position candidate, and selects the combination that minimizes the total time for the series of processing by the vector processing means 120. Ask for That is, the point M associated with this shortest combination is determined as the optimum snapshot position. The method of this first embodiment is called the "all-way method".

In the "all-path method", if time is given, the correct answer of the shortest path can be found with certainty. However, as the number of interrupt positions increases, the processing time increases exponentially, making operation difficult. For example, in a vector with 500 interrupts, even if the first interrupt position that always requires a snapshot and the last interrupt position that does not require a snapshot are excluded, from a total of 498 positions excluding these two points, for example 13 points will be selected to place the snapshot. In this case, the number of searches is 498 ¹³ =1.15×10 ³⁵ , which is an astronomical figure, so it can be seen that the processing will not end even after one day. Therefore, it is preferable to adopt the method according to the first embodiment when the number of interrupt positions is small.

In the second embodiment, the snapshot position determining means 220 arranges N points that are positions immediately before each interrupt position and do not overlap with other interrupt positions, within the interval equally dividing the total processing time M. do. That is, the interval obtained by dividing the time from the first interrupt position to the final interrupt position by 1/M is defined as one interval, and this equally divided position is determined as the optimum snapshot position. The width (time width) of each interval is the same, but the number of interrupt positions in each interval is different. This method is called the X equal method.

を基準に調整を行った結果となる。調整は次のルールで行う。第１のルールは、次の割込み位置の直前にスナップショット位置をずらす、というものである。また、第２のルールは、次の割込み位置までにスナップショットが２つ以上あったら、１つのみ残す、というものである。 Assuming that M is 14, this method divides the interrupt occurrence period into 14 equal parts and evenly arranges the snapshot positions (FIG. 10). Here again, the interrupt time (interrupt position) is indicated by a black circle, and the snapshot position is indicated by a downward pointed triangular mark. Specifically, when the first interrupt time is t ₀ and the last interrupt time is t _end , the snapshot time is

is the result of adjustment based on Adjustments are made according to the following rules. The first rule is to shift the snapshot position just before the next interrupt position. Also, the second rule is that if there are two or more snapshots before the next interrupt position, only one is left.

At first glance, it seems that they are arranged in a well-balanced manner, but it may not be possible to cope well with a vector in which the density of interrupt points varies greatly as shown in FIG. 11 . In addition, as shown in FIG. 12, there are two problems with the arrangement of snapshots determined by this X equality method.
Problem 1: It can get stuck between busy interrupts.
Problem 2: It may not be possible to enter a period with a large number of interrupts.
As a result, it can be seen that the amount of calculation is only one time and the processing time is short, but the accuracy is low compared to the "all-pass method".

In the next third embodiment, the snapshot position determining means 220 divides N points that are positions immediately before each interrupt position and do not overlap with other interrupt positions into 1/M points. is determined as the optimum snapshot position. That is, the N points are set to 1/M so that one section includes the same number of interrupt positions. Therefore, the width of each section is often different. This method is called the Y equal method.

Assuming that M is 14, this is a method of equally dividing the number of interrupt occurrences by 14 and evenly arranging the snapshots as shown in FIG. Placing the snapshot just before the interrupt point, which is simply dividing the number of interrupts by 14, solves problem 2 described in the X equality method, but raises another problem. Two problems shown in FIG. 14 were confirmed when the Y equality method of this embodiment was used for the pattern in which an interrupt occurs, such as the vector shown in FIG.

Problem 1: It may not enter a long period with few interrupts.
Problem 2: Easier to get between interrupts that are more dense than the X-equal method.
As a result, the amount of calculation is one time, like the X equal method, and although the accuracy is slightly improved, there is still the problem that the accuracy is poor.

In the next fourth embodiment, the snapshot position determining means 220 determines, at N points that are positions immediately before each interrupt position and do not overlap with other interrupt positions, from the point with the longest interval between adjacent points ( M-1) Find a set of neighboring points. In each (M−1) pair of adjacent points obtained as described above, the later (M−1) point is determined as the optimum snapshot position. The position of the first snapshot shall be just before the position of the first interrupt. This method is called the "tilt method".

Assuming that M is 14, this is a method in which pairs of interrupt positions with long intervals between adjacent interrupts are obtained and up to 13 are adopted in descending order. Specifically, 13 points are selected in descending order of the time difference between adjacent interrupts. As shown in Fig. 15, when the order of interrupt intervals is Δt5>Δt9>Δt15>Δt2>..., immediately before t5, t9, t15, t2 (the rear interrupt in the pair of interrupt positions in each section (just before the position).

According to this embodiment, only large intervals are selected, so it is considered that problems 1 and 2 of the Y equal method can be avoided. However, one problem still remains in the pattern in which an interrupt occurs, such as the vector shown in FIG.
Problem 1: If there is a relatively long period of time where each interval does not reach the top 13, the snapshot position may not be placed during this period.

In this embodiment, by focusing on the time difference, the problem that the snapshot position is included in the area where the interrupt positions are concentrated, which occurs in both the X equality method and the Y equality method, is solved with a small amount of calculation. However, since only the time difference is used as a parameter, there may be cases where the overall sense of balance is lacking, and this is thought to be the cause of the lack of accuracy.

In the next fifth embodiment, the snapshot position determination means 220 sets the length corresponding to all interrupt numbers to L1, the distance from the beginning of the vector to the first optimum snapshot position to _S0 , and the area Find S ₀ ×L1, the distance from the beginning of the vector to the second best snapshot location corresponds to S ₁ , the total number of interrupts minus the number of interrupts made using the first best snapshot location. L2 is the length to be taken, area (S ₁ −S ₀ )×L2 is obtained, S ₂ is the distance from the beginning of the vector to the third optimal snapshot position, and the second optimal snapshot position is obtained from all interrupt numbers. Let L3 be the length corresponding to the value obtained by subtracting the number of interrupts performed using , and obtain the area (S ₂ -S ₁ )×L3, Let S _M be the distance, LM be the length corresponding to the number of all interrupts minus the number of interrupts made using the Mth best snapshot location, and let area (S _M −S _M−1 )×LM be Then, the "area method" is performed to find each optimum snapshot position where the addition result of the above areas is maximum.

The above method will be described with reference to the drawings. In FIG. 17, processing P1 is performed from the start of the vector, the first interrupt position is at time _t0 , and the first optimum snapshot position _S0 is placed just before this time _t0 . . The line segment shown on the right side from the first optimum snapshot position _S0 indicates the simulation time until the occurrence of an interrupt, and the number of line segments indicates the number of interrupt processes. Therefore, it can be said that L1 in FIG. 17 has a length corresponding to all interrupt numbers. First, the snapshot position determining means 220 obtains the area S ₀ ×L1.

Then, once the second best snapshot location S ₁ is determined as shown in FIG. 18, the distance from the beginning of the vector to the second best snapshot location can be S ₁ -S ₀ . Also, the length corresponding to the number of interrupts performed using the second optimum snapshot position _S1 is L2 in FIG. Therefore, the snapshot position determining means 220 obtains the area (S ₁ -S ₀ )×L2.

Then, once the third optimal snapshot location S ₂ is determined as shown in FIG. 19, the distance from the beginning of the vector to the third optimal snapshot location can be S ₂ -S ₀ . Also, the length corresponding to the number of interrupts performed using the third optimum snapshot position _S2 is L3 in FIG. Therefore, the snapshot position determining means 220 obtains the area (S ₂ -S ₁ )×L3.

Areas are obtained one after another in the same manner. Then, when the Mth optimum snapshot position S _M is determined as shown in FIG. 20, the distance from the beginning of the vector to the Mth optimum snapshot position can be S _M −S ₀ . Also, the length corresponding to the number of interrupts performed using the M-th optimum snapshot position S _M is LM in FIG. Therefore, the snapshot position determining means 220 obtains the area (S _M −S _M−1 )×LM.

The snapshot position determining means 220 obtains each optimum snapshot position at which the sum of the areas obtained above is maximized. In this case, the first optimal snapshot position S ₀ is just before the first interrupt position, and since it is fixed, the area S ₀ ×L1 does not change. Since the second optimum snapshot location S ₁ can be selected from the 2nd to (N-1)th interrupt locations, the interrupt location that maximizes the area (S ₁ -S ₀ )×L2 is selected.

Since several interrupt positions can be selected for the second optimum snapshot position S ₂ as well, the interrupt position with the maximum area (S ₂ -S ₁ )×L3 is selected. The following selections are made in the same way.

The "area method" of this embodiment can also be realized by the following calculations. Assuming that there are N interrupt positions, their occurrence times are t ₀ , t ₁ , t ₂ , . . . , t _N-1 . Since we put the snapshot position just before t ₀ , let this position be S0=0 as shown in FIG. As shown in FIG. 18, select the second snapshot position among t ₁ , t ₂ , . . . , t _N-2 . For this selection, select n (1≤n≤N-2) where (t _n -t ₀ ) x (N-1-n) is the maximum value, and position this t _n at the second snap. Let the shot position be _S1 .

Next, as shown in FIG. 19, the third snapshot position is selected from t ₁ , . . . , t _S1-1 , t _{S1+1 ,} . In this selection, (t _n - t ₀ ) x (S ₁ - n) (when 1≤n≤S ₁ -1), (t _n - t _S1 ) x (N-1-n) (S ₁ +1 ≤ n ≤ N-2), and the position of this t _n is taken as the third snapshot position S ₂ . Further, here, rearrangement is performed so as to satisfy S ₀ <S ₁ <S ₂ .

Next, as shown in FIG. 20, t ₁ , . _{. .} , t _S1-1 , t _{S1 +1 ,} . Select the 4th snapshot location in the middle. In this selection, (t _n - t ₀ ) x (S ₁ - n) (when 1 ≤ n ≤ S ₁ - 1), (t _n - t _S1 ) x (S ₂ - n) (S ₁ + 1 ≤ n ≤ S ₂ -1), (t _n - t _S2 ) x (N-1-n) (when S ₂ + 1 ≤ n ≤ N-2) select n that maximizes the value, The position of this t _n is defined as the fourth snapshot position S ₃ . Further, here, rearrangement is performed so that S ₀ <S ₁ <S ₂ <S ₃ .

The same processing as above is performed up to the 14th snapshot position. In this way, 14 snapshots can be determined one by one. Also, as mentioned earlier, as described in "Part 3" in some problems and limitations that exist in many simulators, if the area is less than a certain amount, the acquisition and call time of snapshots can be shortened. Since this will overwhelm the effect and cause a counterproductive situation, the processing may be stopped before the maximum number of snapshots is reached. That is, when the maximum value is 14 times, it is not necessary to calculate up to 14 times.

When the number of snapshots is limited to 14, the advantages and disadvantages of the area method are considered. The amount of calculation is about 14×(N−2) times at maximum, which is slightly larger than the above-described X equality method and Y equality method, but the processing time is considered to be negligible. Although there is a possibility that the fastest solution will not be as perfect as the all-path method, the more interrupts there are, the closer to the fastest route the algorithm can be. All the problems of the above four methods can be solved by the area method, and another great merit is that it is possible to stop the calculation process, which was not even controversial with the other methods.

Comprehensively comparing the above five methods, as shown in Table 3, it can be seen that the area method is advantageous in terms of time reduction effect, processing time, suspension of calculation processing, and so on. It is preferable that the snapshot position determination means 220 adopts the area method because it is considered that the effect of the snapshot can be maximized.

Also, the snapshot position determining means 220 may adopt a configuration that employs all of the configurations of the above five methods, and one method may be appropriately adopted depending on the number of interrupts, the limit value of the number of snapshot positions, and the like. In this case, an instruction input means may be provided so that the operator can instruct which method to select. may be provided so that the digital verification support device automatically determines the method.

The effect was confirmed by FFh interrupt verification in flash memory using snapshots by the area method. The effect is evaluated mainly from the two viewpoints of time and quality.
Time: Table 4 shows the results of a comparison between the conventional method and the snapshot method of this embodiment separately executed under the condition that the content of the interrupt position database 230 is the same and the simulation resource environment is the same.

The total simulation time for each vector was reduced by 93.4% compared to the conventional method, and the actual measurement time for 50 parallels was reduced by approximately 92.1%. It should be noted that the calculation processing of the area method for determining the position of the snapshot could be done instantaneously, so it was considered to be negligible. As a result, the verification that had been running continuously for two weeks can now be completed in less than a day.

Quality: Looking at the execution results, it was confirmed that the types of errors (IDREAD, SVA, BOOST, MCOND, tRST, Stuck, etc.) and the number of occurrences matched compared to the conventional method. It shows no difference in verification quality.

REFERENCE SIGNS LIST 100 simulator 110 snapshot information acquisition and holding means 120 vector processing means 130 vector file 200 digital verification support device 210 interrupt position detection means 220 snapshot position determination means 230 interrupt position database

Claims (12)

an interrupt position detecting means for detecting an interrupt position in a vector given to a simulator performing digital verification;
snapshot position determination means for determining a predetermined number of optimal snapshot positions at which snapshots should be executed based on the interrupt positions detected by the interrupt position detection means, wherein:
to the simulator,
snapshot information acquiring and holding means for acquiring and holding snapshot information used by the simulator for restoring the current state at the optimum snapshot position;
When the vector is executed from the beginning and reaches an unprocessed interrupt position, when the interrupt processing corresponding to the interrupt position is executed and the interrupt processing ends, an optimum snapshot corresponding to this interrupt position is generated. vector processing means for executing a series of processes up to restoration based on the snapshot information of the position, and proceeding from the optimum snapshot position to the execution of the vector,
A digital verification support device that provides interrupt position information and optimum snapshot position information required for processing of the snapshot information acquisition and holding means and the vector processing means. The snapshot position determination means performs all the selection methods for selecting a combination of M points at different positions from N points which are positions immediately before each interrupt position and which do not overlap with other interrupt positions. , with the M points selected in each selection method as candidates for the optimum snapshot position, a combination that minimizes the total time for a series of processing by the vector processing means is obtained, and the M points associated with this shortest combination are used as the optimum snapshot position. 2. The digital verification support device according to claim 1, wherein the exhaustive method determined as . The snapshot position determination means arranges N points which are positions immediately before each interrupt position and do not overlap with other interrupt positions within an interval obtained by equally dividing the total processing time M, and determine the equally divided positions. 3. The digital verification support device according to claim 1, wherein the X equality method for determining the optimum snapshot position is executed. The snapshot position determination means determines positions obtained by dividing N points which are positions immediately before each interrupt position and which do not overlap with other interrupt positions into numbers of 1/M each, as optimum snapshot positions. 4. A digital verification support device according to any one of claims 1 to 3, wherein the method of equivalents is executed. The snapshot position determining means selects (M−1) pairs of adjacent points in order from the one with the longest interval between adjacent points at N points that are located immediately before each interrupt position and do not overlap with other interrupt positions. and performing a tilt method in each (M-1) pair of neighboring points to determine the later (M-1) points as the best snapshot locations. A digital verification support device as described. The snapshot position determining means determines the area S ₀ ×L1, where L1 is the length corresponding to all interrupt numbers, S ₀ is the distance from the beginning of the vector to the first optimum snapshot position, and Let S ₁ be the distance from the first to the second best snapshot location, L2 be the length corresponding to the number of all interrupts minus the number of interrupts made using the first best snapshot location, and let L2 be the area ( S ₁ −S ₀ )×L2, S ₂ being the distance from the beginning of the vector to the third best snapshot location, subtracting the number of interrupts made using the second best snapshot location from the total number of interrupts Let L3 be the length corresponding to the value obtained, find the area (S ₂ −S ₁ )× _L3 , . . . LM is the length corresponding to _the value obtained by subtracting the number of interrupts performed using the _M - _th optimum snapshot position from LM. 6. A digital verification support apparatus according to any one of claims 1 to 5, wherein the area method for obtaining each optimum snapshot position is executed. The computer of the digital verification support device,
Interrupt position detection means for detecting the interrupt position in the vector given to the simulator performing digital verification;
A digital verification support program functioning as snapshot position determination means for determining a predetermined number of optimum snapshot positions at which snapshots should be executed based on the interrupt positions detected by the interrupt position detection means,
included in said simulator,
snapshot information acquiring and holding means for acquiring and holding snapshot information used by the simulator for restoring the current state at the optimum snapshot position;
When the vector is executed from the beginning and reaches an unprocessed interrupt position, when the interrupt processing corresponding to the interrupt position is executed and the interrupt processing ends, an optimum snapshot corresponding to this interrupt position is generated. vector processing means for executing a series of processes up to restoration based on position snapshot information, and proceeding from the optimum snapshot position to execution of the vector, interrupt position information required for processing and optimum snapshot position; A digital verification support program characterized by providing information and. Using the computer as the snapshot position determining means, all of the selection methods for selecting a combination of M points at different positions from the positions of N points that are positions immediately before each interrupt position and do not overlap with other interrupt positions. M points selected by each selection method are used as optimum snapshot position candidates, and a combination that minimizes the total time for a series of processes by the vector processing means is obtained. 8. The digital verification support program according to claim 7, which functions to execute an exhaustive method for determining as a snapshot position. Using the computer as the snapshot position determining means, N points that are located immediately before each interrupt position and do not overlap with other interrupt positions are arranged in an interval obtained by equally dividing the total processing time M, and the equal 9. The digital verification support program according to claim 7, wherein the program functions to execute the X equality method for determining the division position as the optimum snapshot position. Using the computer as the snapshot position determination means, the positions obtained by dividing the N points that are positions immediately before each interrupt position and do not overlap with other interrupt positions into numbers of 1/M are set as optimum snapshot positions. 10. A program for supporting digital verification according to any one of claims 7 to 9, characterized in that it functions to execute the Y equality method to determine. Using the computer as the snapshot position determination means, at N points immediately preceding each interrupt position and not overlapping another interrupt position, (M-1) sets of Claims 7 to 7 characterized in that it is operable to find adjacent points and to perform a tilt method that determines the later (M-1) points in each (M-1) set of adjacent points as the best snapshot location. 11. The digital verification support program according to any one of 10. Using the computer as the snapshot position determining means, the length corresponding to all interrupt numbers is L1, the distance from the beginning of the vector to the first optimum snapshot position is _S0 , and the area _S0 x L1 is obtained. , the distance from the beginning of the vector to the second best snapshot location is S ₁ , and the length corresponding to the number of all interrupts minus the number of interrupts made using the first best snapshot location is L2. , the area (S ₁ −S ₀ )×L2, the distance from the beginning of the vector to the third optimal snapshot location is S ₂ , and the interrupt performed using the second optimal snapshot location from the total number of interrupts Let L3 be the length corresponding to the subtracted value, find the area (S ₂ −S ₁ )× _L3 , . LM is the length corresponding to the value obtained by subtracting the number of interrupts performed using the M-th optimum snapshot position from the number of interrupts, and the area (S _{M −SM −1} )×LM is obtained, and the above areas are added. 12. A program for supporting digital verification according to any one of claims 7 to 11, characterized in that it functions to execute an area method for finding each optimum snapshot position that maximizes the result.

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