JP7151403B2 - Analysis device, analysis method, and analysis program - Google Patents

Description

The present invention relates to an analysis device, an analysis method, and an analysis program.

Conventionally, in the input/output buffer design of a semiconductor integrated circuit, the package design of a semiconductor integrated circuit, and the printed circuit board design related to digital signal transmission technology, Kirchhoff's law is applied to the circuit network from the output buffer to the input buffer. A dynamic signal waveform analysis technique is known in which a transient response at an arbitrary node in a circuit network is obtained by solving a circuit equation with time as a variable formulated using .

However, the conventional dynamic signal waveform analysis technique has a problem that it takes time to analyze the digital signal waveform considering the detailed wiring shape after the completion of the design. In addition, as the number of objects to be analyzed increases, more analysis time is required, so there is no choice but to limit the analysis range, and there is a problem that exhaustive confirmation is difficult.

In addition, in the following patent document 1, in order to eliminate the process of redoing the wiring design of the printed wiring board related to the digital signal transmission technology, wiring length restrictions, connection buffer number restrictions, termination method restrictions, etc. are set at the pre-design stage. A method of making is disclosed. However, with the technique disclosed in Patent Document 1 below, it is not possible to perform digital signal waveform analysis in consideration of detailed wiring shapes after the completion of design at high speed and comprehensively.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-described problems of the prior art by enabling high-speed and exhaustive digital signal waveform analysis in consideration of detailed wiring shapes after design completion.

In order to solve the above-described problems, the analysis apparatus of the present invention provides a first input section for receiving input of an operation period and an operation pattern of an output buffer circuit, and a first input section for indicating the characteristics of the output buffer circuit and the input buffer circuit. a second input unit for receiving input of a model; a third input unit for receiving input of a second model indicating characteristics of a printed circuit board and a semiconductor package; an operation cycle and operation pattern of an output buffer circuit; and a second model, a calculator for calculating various calculated values for generating a digital signal waveform, and a digital signal for generating a digital signal waveform based on the various calculated values calculated by the calculator and a waveform generator.

According to the present invention, it is possible to perform digital signal waveform analysis in consideration of detailed wiring shapes after design is completed, at high speed and comprehensively.

It is a figure showing a schematic structure of a printed circuit board concerning a 1st embodiment of the present invention. It is a figure showing functional composition of an analysis device concerning a 1st embodiment of the present invention. 4 is a diagram showing the configuration of a digital signal waveform generated by the analysis device according to the first embodiment of the present invention; FIG. 4 is a flow chart showing the procedure of processing by the analysis device according to the first embodiment of the present invention; It is a figure for demonstrating the calculation method of the ideal amplitude amount by the analysis apparatus which concerns on 1st Embodiment of this invention. It is a figure for demonstrating the calculation method of the actual amplitude amount by the analysis apparatus which concerns on 1st Embodiment of this invention. FIG. 4 is a diagram for explaining a method of calculating a slope according to characteristics of an output buffer circuit by the analysis device according to the first embodiment of the present invention; FIG. 4 is a diagram for explaining a method of calculating a delay value inside the output buffer circuit by the analysis device according to the first embodiment of the present invention; FIG. 4 is a diagram for explaining a method of calculating a delay value of a transmission line in a semiconductor package by the analysis device according to the first embodiment of the invention; FIG. 4 is a diagram for explaining a method of calculating a fluctuation amount of a digital signal waveform by the analysis device according to the first embodiment of the present invention; FIG. 4 is a diagram for explaining a method of calculating a variation in inclination of a digital signal waveform by the analysis device according to the first embodiment of the present invention; FIG. 4 is a diagram for explaining a method of determining a digital signal waveform by the analysis device according to the first embodiment of the present invention; It is a figure which shows the functional structure of the analysis apparatus which concerns on 2nd Embodiment of this invention. FIG. 10 is a diagram for explaining a method of calculating the slope of the digital signal waveform by the analysis device according to the second embodiment of the present invention; FIG. 2 is a conceptual diagram for explaining crosstalk noise that occurs between two transmission lines; It is a figure which shows the functional structure of the analysis apparatus which concerns on 3rd Embodiment of this invention. FIG. 3 is a diagram showing an input waveform of a signal on a transmission path that is a noise source and a NEXT waveform on a transmission path that receives noise; FIG. 3 is a diagram showing an output waveform of a signal on a transmission path that is a noise source and a FEXT waveform on a transmission path that receives noise; FIG. 16 is a diagram showing an example of digital signal waveforms on the input end side and the output end side for each of SignalA and SignalB shown in FIG. 15;

[First embodiment]
A first embodiment of the present invention will be described below with reference to the drawings.

(Schematic configuration of printed circuit board 10)
FIG. 1 is a diagram showing a schematic configuration of a printed circuit board 10 according to a first embodiment of the invention. As shown in FIG. 1, a printed circuit board 10 according to the first embodiment of the present invention includes a semiconductor package 11 and a semiconductor package 15. As shown in FIG. The semiconductor package 11 includes a semiconductor integrated circuit 12 , and the semiconductor integrated circuit 12 is provided with a plurality of output buffer circuits 13 . On the other hand, the semiconductor package 15 includes a semiconductor integrated circuit 16 , and the semiconductor integrated circuit 16 is provided with a plurality of input buffer circuits 17 . Each of the plurality of output buffer circuits 13 is connected to each of the plurality of input buffer circuits 17 by transmission lines 14 formed of wiring patterns formed on the printed circuit board 10 and the semiconductor packages 11 and 15 . The transmission line 14 is a wiring pattern particularly used for high-speed digital signal transmission.

In the printed circuit board 10 configured as described above, a digital signal input to the output buffer circuit 13 of the semiconductor integrated circuit 12 on the transmission side passes through the output buffer circuit 13 and is sent from the terminal of the semiconductor integrated circuit 12 to the semiconductor package. 11. At this time, the digital signal waveform has an amplitude amount and a slope corresponding to the characteristics of the output buffer circuit 13 . The digital signal output to the semiconductor package 11 passes through the transmission line 14 and is input to the input buffer circuit 17 provided in the semiconductor integrated circuit 16 on the receiving side. The digital signal waveform input to the input buffer circuit 17 may become a waveform in which noise is superimposed due to the effects of reflected waves in the transmission line 14, crosstalk from other nearby transmission lines 14, and the like.

Here, an ideal digital signal waveform with no superimposed noise maintains a stable High voltage and Low voltage for almost the entire period of the cycle. However, due to the characteristics of the input buffer circuit 17 and the output buffer circuit (hereinafter referred to as "input/output buffer circuit") and the effects of various noises in the transmission line 14, the actual digital signal waveform may vary between high voltage period and low voltage period. may be shorter, and in some cases the amplitude may be smaller. Also, the timing at which the digital signal reaches the input buffer circuit 17 may change depending on various noises and the length of the transmission line 14 .

The analysis device 100 of the present embodiment is a device capable of performing digital signal waveform analysis in consideration of these influences in the design stage and confirming that the circuit operates normally. In particular, the analysis apparatus 100 of the present embodiment can perform digital signal waveform analysis in consideration of detailed wiring shapes after completion of design at high speed and comprehensively. This point will be specifically described below.

(Functional configuration of analysis device 100)
FIG. 2 is a diagram showing the functional configuration of the analysis device 100 according to the first embodiment of the invention. The analysis device 100 shown in FIG. 2 is a device capable of analyzing the digital signal waveform in the printed circuit board 10 shown in FIG.

As shown in FIG. 2, the analysis device 100 includes a first input section 102, a second input section 104, a third input section 106, a calculation section 108, a digital signal waveform generation section 110, and a digital signal waveform determination section 112. .

The first input unit 102 receives an input of an operation cycle and an operation data pattern of the output buffer circuit 13 as digital signal waveform analysis conditions. Note that the data that the first input unit 102 receives input may be stored in a storage unit such as a database provided in the analysis device 100, or may be stored in a database provided in an external information processing device (for example, a server or the like). etc., may be stored in a storage unit.

The second input unit 104 receives an input of an IBIS (Input/Output Buffer Information Specification) model as a first model representing the characteristics of the input/output buffer circuit. The data to be input by the second input unit 104 may be stored in a storage unit such as a database provided in the analysis device 100, or may be stored in a database provided in an external information processing device (for example, a server or the like). etc., may be stored in a storage unit.

The third input unit 106 receives an input of a sparameter (scattering parameters) model as a model representing the characteristics of the semiconductor packages 11 and 15 and the printed circuit board 10 . The data to be input by the third input unit 106 may be stored in a storage unit such as a database provided in the analysis device 100, or may be stored in a database provided in an external information processing device (for example, a server or the like). etc., may be stored in a storage unit.

Calculation unit 108 calculates the operation period and operation data pattern of output buffer circuit 13 whose input is received by first input unit 102, the IBIS model whose input is received by second input unit 104, and the IBIS model whose input is received by third input unit 106. Various calculation values for generating a digital signal waveform are calculated based on the received Spameter model.

Specifically, the calculator 108 calculates the output impedance of the output buffer circuit 13 and the digital signal waveform corresponding to the characteristics of the output buffer circuit 13 based on the characteristics of the input/output buffer circuit shown in the IBIS model. The slope, the delay value inside the output buffer circuit 13, the chip internal termination resistance value, and the input/output terminal capacitance are calculated.

Further, the calculation unit 108 calculates a delay value in the transmission line 14 and an attenuation amount in the transmission line 14 based on the characteristics of the transmission line 14 shown in the Spameter model.

The digital signal waveform generator 110 generates a digital signal waveform based on various calculated values calculated by the calculator 108 .

The digital signal waveform determination unit 112 determines whether or not each of the high voltage value, the low voltage, the high voltage period, and the low voltage period of the digital signal waveform generated by the digital signal waveform generation unit 110 is an appropriate value. judge.

Note that each function of the analysis device 100 described above is stored in, for example, various storage devices (eg, ROM (Read Only Memory), RAM (Random Access Memory), HDD (Hard Disk Drive), etc.) in the analysis device 100. A program is implemented by a CPU (Central Processing Unit) executing the program. This program may be provided in a state in which it has been installed in analysis apparatus 100 in advance, or may be provided from the outside and installed in analysis apparatus 100 . In the latter case, the program may be provided by an external storage medium (e.g., USB (Universal Serial Bus) memory, memory card, CD-ROM, etc.) and downloaded from a server on a network (e.g., Internet, etc.). may be provided by

(Structure of digital signal waveform generated by analysis device 100)
FIG. 3 is a diagram showing the configuration of a digital signal waveform generated by the analysis device 100 (digital signal waveform generation section 110) according to the first embodiment of the present invention.

In FIG. 3, a digital signal waveform 301 output from the output buffer circuit 13 has an ideal amplitude W1. Further, the digital signal waveform 301 that has passed through the transmission line 14 and reached the input buffer circuit 17 has a total delay value T1 obtained by summing the delay value inside the output buffer circuit 13 and the delay value in the transmission line 14, and an ideal delay value T1. period T2.

On the other hand, in FIG. 3, the digital signal waveform 302 that has passed through the transmission line 14 and reached the input buffer circuit 17 has a slope corresponding to the characteristics of the output buffer circuit 13. and the actual amplitude W2 divided according to the output impedance of .

Also, the digital signal waveform 303 that has passed through the transmission line 14 and reached the input buffer circuit 17 is assumed to have a delay value, a slope, and an amplitude that have varied with respect to the digital signal waveform 302 due to the amount of attenuation in the transmission line 14 . Become.

Therefore, the analysis apparatus 100 (digital signal waveform generation unit 110) of the present embodiment has the ideal amplitude W1, the actual amplitude W2, the slope corresponding to the characteristics of the output buffer circuit 13, and the output buffer circuit 13 Based on the internal delay value, the delay value in the transmission line 14, and the attenuation (amplitude fluctuation amount) in the transmission line 14, the digital signal waveform 303 affected by all these parameters can be generated. of.

(Procedure of processing by analysis device 100)
FIG. 4 is a flow chart showing the procedure of processing by the analysis device 100 according to the first embodiment of the present invention.

First, the first input unit 102 receives an input of an operation cycle and an operation data pattern of the output buffer circuit 13 as digital signal waveform analysis conditions (step S401). Next, the second input unit 104 receives the input of the IBIS model as the first model representing the characteristics of the input/output buffer circuit (step S402). Next, the third input unit 106 receives an input of a Spameter model as a model representing the characteristics of the semiconductor packages 11 and 15 and the printed circuit board 10 (step S403).

Subsequently, the calculation unit 108 calculates the operation cycle and operation data pattern of the output buffer circuit 13 whose input was received in step S401, the IBIS model whose input was received in step S402, and the Spameter model whose input was received in step S403. Based on this, various calculated values for generating a digital signal waveform are calculated (step S404).

Then, the digital signal waveform generator 110 generates a digital signal waveform based on various calculated values calculated in step S404 (step S405). Furthermore, the digital signal waveform determination unit 112 determines whether or not each of the High voltage value, Low voltage value, High voltage period, and Low voltage period of the digital signal waveform generated in step S405 is an appropriate value. (step S406). After that, the analysis device 100 ends the series of processes shown in FIG.

(How to calculate the ideal amplitude W1)
FIG. 5 is a diagram for explaining a method of calculating the ideal amplitude W1 by the analysis device 100 according to the first embodiment of the present invention. FIG. 5(a) shows the pull-down characteristics of the current versus voltage characteristics of the output buffer circuit 13 shown in the IBIS model. FIG. 5(b) shows the pull-up characteristics of the current versus voltage characteristics of the output buffer circuit 13 shown in the IBIS model.

The Low voltage Vl_ideal at the ideal amplitude W1 is a voltage corresponding to 0A of pull-down characteristics. For example, in the example shown in FIG. 5A, the voltage "0 V" corresponding to 0 A of the pull-down characteristic becomes the Low voltage Vl_ideal.

The High voltage Vh_ideal at the ideal amplitude W1 is a voltage corresponding to 0A of pull-up characteristics. For example, in the example shown in FIG. 5B, the voltage "1.35 V" corresponding to 0 A of the pull-up characteristic becomes the High voltage Vh_ideal.

Therefore, analysis device 100 (calculation unit 108) calculates the difference between Low voltage Vl_ideal (0 V) and High voltage Vh_ideal (1.35 V) as ideal amplitude W1.

(Method for calculating actual amplitude W2)
FIG. 6 is a diagram for explaining a method of calculating the actual amplitude W2 by the analysis device 100 according to the first embodiment of the present invention. FIG. 6(a) shows pull-down characteristics of the current-to-voltage characteristics of the output buffer circuit 13 and the input buffer circuit 17 shown in the IBIS model. FIG. 6(b) shows the pull-up characteristics of the current-to-voltage characteristics of the output buffer circuit 13 and the input buffer circuit 17 shown in the IBIS model. 6(a) and 6(b), the solid line indicates the current-voltage characteristic of the input buffer circuit 17. FIG. 6(a) and 6(b), the dotted line indicates the current-voltage characteristic of the output buffer circuit 13. FIG.

As shown in FIG. 6A, the voltage value at the intersection of the current versus voltage characteristic (pull-down characteristic) of the output buffer circuit 13 and the current versus voltage characteristic (pull-down characteristic) of the input buffer circuit 17 is It becomes the Low voltage Vl_real in the actual amplitude. Also, the current value at the intersection is the output current Il_real at the time of Low output in the actual amplitude. For example, in the example shown in FIG. 6A, the voltage value "0.22 V" at the intersection point is the Low voltage Vl_ideal, and the current value "-6 mA" at the intersection point is the output current Il_real.

Also, as shown in FIG. 6B, the intersection of the current versus voltage characteristic (pull-up characteristic) of the input buffer circuit 17 and the current versus voltage characteristic (pull-up characteristic) of the output buffer circuit 13 is The voltage value becomes the High voltage Vh_real in the actual amplitude. Also, the current value at the intersection is the output current Ih_real at the time of High output in the actual amplitude. For example, in the example shown in FIG. 6B, the voltage value "1.14 V" at the intersection point is the High voltage Vh_real, and the current value "6 mA" at the intersection point is the output current Ih_real.

Therefore, analysis device 100 (calculation unit 108) calculates the difference between Low voltage Vl_real (0.22 V) and High voltage Vh_real (1.14 V) as actual amplitude W2.

If a terminating resistor is provided on the transmission line 14, the voltage at the intersection obtained by superimposing the current-voltage characteristics at the terminals of the resistor on the characteristics of the output buffer circuit 13 shown in FIG. Low voltage Vl_ideal and High voltage Vh_real may be used.

(Slope calculation method according to the characteristics of the output buffer circuit 13)
FIG. 7 is a diagram for explaining a method of calculating the slope according to the characteristics of the output buffer circuit 13 by the analysis device 100 according to the first embodiment of the present invention. FIG. 7(a) shows the rising current-voltage characteristic at the output terminal of the output buffer circuit 13, which is shown in the IBIS model. FIG. 7(b) shows the current versus voltage characteristics at the output terminal of the output buffer circuit 13 at the falling edge shown in the IBIS model.

As shown in FIG. 7, the IBIS model shows the voltage versus time characteristics at the output terminal of the output buffer circuit 13 . The calculation unit 108 of the analysis device 100 can calculate the amount of voltage fluctuation in a certain period from this voltage versus time characteristic, and calculate the slope corresponding to the characteristic of the output buffer circuit 13 based on the amount of voltage fluctuation. can. Alternatively, the calculation unit 108 of the analysis device 100 derives the transition time at a certain potential difference from the voltage versus time characteristic, and calculates the slope according to the characteristics of the output buffer circuit 13 based on the transition time. can be done. For example, in the example shown in FIG. 7, the calculation unit 108 can obtain 0.55 V/100 PS at the rising edge and 0.55 V/110 PS at the trailing edge as the transition time from 20% to 80% of the amplitude. . Note that the calculation unit 108 may calculate the rising slope and the trailing slope separately, or may set the rising slope and the trailing slope to the same value. Further, when the slope of the output waveform of the output buffer circuit 13 is indicated in the IBIS model, the calculator 108 may use the slope as the calculation result.

(Calculation method of delay value inside output buffer circuit 13)
FIG. 8 is a diagram for explaining a method of calculating the delay value inside the output buffer circuit 13 by the analysis device 100 according to the first embodiment of the present invention. FIG. 8(a) shows the rising current-voltage characteristic at the output terminal of the output buffer circuit 13, which is shown in the IBIS model. FIG. 8(b) shows the current versus voltage characteristics at the output terminal of the output buffer circuit 13 at the falling edge shown in the IBIS model.

As shown in FIG. 8, the IBIS model shows the voltage versus time characteristics at the output terminal of the output buffer circuit 13 . The calculation unit 108 of the analysis device 100 can calculate the delay value inside the output buffer circuit 13 from this voltage versus time characteristic. For example, the calculation unit 108 sets the time until the potential reaches half the amplitude in this voltage versus time characteristic as the chip internal delay Tio. Note that the calculation unit 108 may calculate the delay value at the rising edge and the delay value at the trailing edge separately. good too.

The IBIS model can describe the RLC value of the transmission line 14 as a semiconductor package model. The calculator 108 can derive the delay value Tpkg[s] in the semiconductor package 11 from this RLC value using the following formula (1).

Tpkg=√LC (1)

Note that when there is a sparameter model as a semiconductor package model, the calculation unit 108 may calculate a delay value in the semiconductor package 11 by a sparameter analysis process, which will be described later.

(Method for calculating delay value of transmission line 14 in semiconductor package 11)
FIG. 9 is a diagram for explaining a method of calculating the delay value of the transmission line 14 in the semiconductor package 11 by the analysis device 100 according to the first embodiment of the present invention.

The Spameter model describes the frequency characteristics of the transmission line 14 using complex numbers. For example, the calculator 108 of the analysis device 100 can calculate a phase delay value or a group delay value as the delay value of the transmission line 14 in the semiconductor package 11 based on the frequency characteristics of the transmission line 14 .

For example, the calculation unit 108 of the analysis device 100 calculates the following formula ( 2) can be used to calculate the phase delay value Tpd[s].

Tpd=(−1/f)*(S21Phase/360) (2)

Also, for example, the calculation unit 108 of the analysis device 100 can calculate the group delay value Tgd[s] using the following formula (3).

Tgd=(−1/Δf)*(ΔS21Phase/360) (3)

Thus, the phase delay value Tpd or the group delay value Tgd derived from the Spameter model as the semiconductor package model becomes the delay value Tpkg of the transmission line 14 in the semiconductor package 11 . Calculation unit 108 of analysis apparatus 100 calculates phase delay value Tpd or group delay value Tgd as delay value Tpcb of transmission line 14 in printed circuit board 10 from a Spameter model as a printed circuit board model using a similar calculation method. can do.

(Method for calculating fluctuation amount of digital signal waveform)
FIG. 10 is a diagram for explaining a method of calculating the fluctuation amount of the digital signal waveform by the analysis device 100 according to the first embodiment of the present invention. FIG. 10(a) is a diagram for explaining a method of calculating the amplitude fluctuation amount ΔVl_line. FIG. 10(b) is a diagram for explaining a method of calculating the amplitude fluctuation amount ΔVh_line.

The amplitude of the digital signal waveform reaching the input buffer circuit 17 changes depending on the resistance value of the transmission line 14 and the current value in the transmission line 14 . For example, the calculation unit 108 of the analysis device 100 calculates the resistance value Rline [Ω] of the transmission line 14 from |S21| at 0 Hz of the Spameter model using the following formula (4). However, |S21(0)| indicates the absolute value of S21 at 0 Hz. Also, Zport indicates the port impedance of the Spameter model.

Rline=2*Zport/|S21(0)|-2*Zport (4)

Furthermore, the calculator 108 of the analysis device 100 calculates the potential difference Vline between both ends of the transmission line 14 using the following formula (5). where Iline indicates the current in the transmission line 14;

Vline=Iline*Rline
=Iline*2*Zport/|S21(0)|-2*Zport (5)

In the IBIS analysis process, the amplitude of the digital signal waveform was obtained from the current-voltage characteristics of the input/output buffer of the IBIS model. Amplitude fluctuates.

In pull-down, a potential difference Vd_line is generated between the output buffer end and the input buffer end due to the resistance value Rline of the transmission line 14, and the output current Il_real decreases to become closer to zero. When this potential difference Vd_line is equal to the potential difference Vline obtained by substituting the output current Il_real for Iline in the above equation (5), the difference between the potential at the input buffer end and the Low voltage Vl_real becomes the amplitude fluctuation amount ΔVl_line. .

Also, in the pull-up, a potential difference Vd_line is generated between the output buffer end and the input buffer end due to the resistance value Rline of the transmission line 14, and the output current Il_real decreases and becomes closer to zero. When this potential difference Vd_line is equal to the potential difference Vline obtained by substituting the output current Il_real for Iline in the above equation (5), the difference between the potential at the input buffer end and the high voltage Vh_real becomes the amplitude fluctuation amount ΔVh_line. .

(Method for Calculating Variation in Slope of Digital Signal Waveform)
FIG. 11 is a diagram for explaining a method of calculating the amount of change in the slope of the digital signal waveform by the analysis apparatus 100 according to the first embodiment of the present invention. FIG. 11 shows the frequency spectrum of an ideal square wave and a square wave with a slope. As indicated by the solid line in FIG. 11, the frequency spectrum of the ideal square wave is a straight line of −20 DB/dec in a log-log graph, and is represented by the following formula (6). However, Vpulse(f) indicates a line connecting ideal square wave spectra. Also, Fbase indicates the fundamental frequency of the rectangular wave.

On the other hand, a rectangular wave with a slope has a spectrum that becomes smaller from a certain frequency, as indicated by the dashed line in FIG. This boundary frequency is called a knee frequency, and is generally a frequency that is 3 dB lower than the spectrum of an ideal rectangular wave. Knee frequency can be simply calculated by the following formula (7). However, Fknee indicates knee frequency. Trf indicates the rise time or fall time of the rectangular wave.

Fknee=0.35/Trf (7)

A waveform output from IBIS has a slope Trf_ibis and is input to one end of the transmission line 14 . Assuming that the knee frequency of this waveform is Fknee_in, Fknee_in can be calculated using the following formula (8).

Fknee_in=0.35/Trf_ibis (8)

A waveform input to the transmission line 14 is output from the other end of the transmission line 14 while being attenuated as it propagates. The attenuation in the transmission line 14 is represented by |S21| of the Spameter model. The frequency spectrum of the waveform output from the transmission line 14 is represented by the following formula (9). |S21(f)| indicates the absolute value of S21 at frequency f.

Let Fknee_in be the knee frequency of the waveform input from the transmission line 14 . Also, let Fknee_out be the knee frequency of the waveform output from the transmission line 14 . Fknee_out is considered the frequency at which |S21(f)|=-3 dB. However, when the frequency at which |S21(f)|=-3 dB is greater than Fknee_in, Fknee_out=Fknee_in. The rise or fall time Trf_line of the waveform output from the transmission line 14 when |S21(Fspara)|=-3 dB can be calculated from the following formula (10).

(Determination method of digital signal waveform)
FIG. 12 is a diagram for explaining a method of determining a digital signal waveform by the analysis device 100 according to the first embodiment of the present invention.

In FIG. 12, does the digital signal waveform 401 that has passed through the transmission line 14 and reached the input buffer have a potential higher than the potential 402 recognized as an H signal by the digital signal waveform determination unit 112 of the analysis device 100? be judged. Further, the digital signal waveform determination unit 112 determines whether the digital signal waveform 401 has a potential lower than the potential 403 recognized as the L signal.

Furthermore, the digital signal waveform determination unit 112 determines whether the period during which the digital signal waveform 401 is recognized as an H signal is equal to or longer than a predetermined time T3. Further, the digital signal waveform 401 is determined by the digital signal waveform determination unit 112 whether the period during which it is recognized as the L signal is equal to or longer than a predetermined time T3.

Note that the potentials 402 and 403 and the time T3 may use the values input to the analysis device 100 or the values described in the IBIS model.

[Second embodiment]
Next, a second embodiment of the invention will be described. The changes from the first embodiment will be described below.

(Functional configuration of analysis device 100A)
FIG. 13 is a diagram showing the functional configuration of an analysis device 100A according to the second embodiment of the invention. The analysis apparatus 100A according to the second embodiment has the third input unit 106A instead of the third input unit 106, and the calculation unit 108A instead of the calculation unit 108. It differs from the analysis device 100 .

The third input unit 106A accepts input of physical information of the transmission path 14 instead of the Spameter model representing the characteristics of the semiconductor packages 11 and 15 and the printed circuit board 10 . Note that the data that the third input unit 106A accepts input may be stored in a storage unit such as a database provided in the analysis device 100, or may be stored in a database provided in an external information processing device (for example, a server or the like). etc., may be stored in a storage unit.

The calculation unit 108A performs physical information analysis processing based on the physical information of the transmission line 14 to calculate the delay value in the transmission line 14, the attenuation amount (amplitude fluctuation amount) in the transmission line 14, and the slope of the digital signal waveform. calculate. Thereby, the analysis device 100A can statically generate a digital signal waveform, like the analysis device 100 according to the first embodiment.

(Calculation method of delay value in transmission line 14)
The physical information of the transmission line 14 input via the third input section 106A includes the length of the transmission line 14, the width of the transmission line 14, the thickness of the transmission line 14, the conductivity of the conductor of the transmission line 14, the transmission It includes the dielectric loss tangent of the dielectric around the line 14 and the effective dielectric constant of the dielectric around the transmission line 14 .

For example, the calculation unit 108A of the analysis device 100A calculates the delay value Td[s] in the transmission line 14 according to Equation (11) below. However, _ε0 indicates the permittivity in vacuum. Also, _εr indicates the dielectric constant of the material. Also, μ ₀ indicates magnetic permeability in a vacuum. Also, _μr indicates the relative magnetic permeability of the material. Len indicates the wiring length [m].

Td=(√ε ₀ ε _r μ ₀ μ _r )*Len (11)

Note that most wiring materials have a relative magnetic permeability _μr of 1. Therefore, by substituting numerical values for _μr , _ε0 , and _μ0 and arranging the above equation (11), the following equation (12) is obtained. ) is derived.

Further, for example, the calculation unit 108A of the analysis device 100A calculates the attenuation amount (amplitude fluctuation amount) in the transmission line 14 by physical information analysis processing. At this time, the calculation unit 108A calculates the resistance value Rline [Ω] of the transmission line 14 by the following formula (13). However, Len indicates the length [m] of the transmission line 14 . Also, W indicates the width [m] of the transmission line 14 . Also, T indicates the thickness [m] of the transmission line 14 . σ indicates the conductivity of the conductor of the transmission line 14 .

Rline=Len/σWT (13)

Note that the calculation unit 108A can calculate values other than the resistance value Rline of the transmission line 14 using the same calculation method as the Spameter analysis process described in the first embodiment.

(Method for calculating slope of digital signal waveform)
FIG. 14 is a diagram for explaining a method of calculating the slope of the digital signal waveform by the analysis device 100A according to the second embodiment of the present invention. Focusing on the slopes of the digital signal waveform 501 and the digital signal waveform 502 in FIG. The slope SlewRate of the digital signal waveform 502 can be calculated by the following formula (14). However, dV indicates the voltage fluctuation amount of the IBIS output waveform. Also, dt indicates the transition time of the IBIS output waveform. Also, dt′ indicates the amount of increase in transition time in the transmission line 14 .

SlewRate=dV/(dt+dt') (14)

Note that dV and dt of the digital signal waveforms 501 and 502 can be calculated by deriving the slope in the IBIS analysis process. Also, dt' of the digital signal waveforms 501 and 502 can be calculated using a general approximation formula shown in Equation (15) below. However, dt' indicates the amount of increase in transition time [ns] in the transmission line 14. FIG. Len indicates the length [mm] of the transmission line 14 . Also, tan(δ) indicates the dielectric loss tangent of the dielectric around the transmission line 14 . Also, εr indicates the effective dielectric constant of the dielectric around the transmission line 14 .

dt′=0.01063×tan(δ)×√εr×Len (15)

For example, if the dielectric loss tangent is 0.02, the effective dielectric constant is 4.2, and the length of the transmission line is 25 [mm], then dt'≈0.1 [ns]. By substituting this dt' into the above formula (14), the slope SlewRate of the digital signal waveform 502 can be obtained.

As described above, the analysis devices 100 and 100A of each of the above-described embodiments use the IBIS model (first model ) and a Spameter model (second model) representing the characteristics of the printed circuit board 10 and the semiconductor package 11, various calculated values for generating a digital signal waveform are calculated, and based on the calculated various calculated values to generate a digital signal waveform. Thus, according to the analysis devices 100 and 100A of the above-described embodiments, it is possible to check the digital signal waveform without performing dynamic analysis. Therefore, according to the analysis apparatuses 100 and 100A of the above-described embodiments, it is possible to comprehensively perform digital signal waveform analysis in consideration of the detailed wiring shape after the completion of design at high speed.

[Third embodiment]
Next, a third embodiment of the invention will be described. The changes from the first embodiment will be described below.

The analysis devices 100 and 100A of the above-described embodiments cannot consider the influence of crosstalk noise, which is the main noise of high-speed digital signals, on digital signal waveforms with only the analysis methods described so far, resulting in optimistic analysis results. Therefore, there is a possibility that the defect may be overlooked. Therefore, the analysis device 100B according to the third embodiment adds a function of generating a digital signal waveform in consideration of the influence of crosstalk noise, as described below, to the analysis device 100 of the first embodiment. By having the configuration provided in 1, it is possible to generate a digital signal waveform with higher accuracy.

FIG. 15 is a conceptual diagram for explaining crosstalk noise that occurs between two transmission lines. In the example shown in FIG. 15, transmission line 1 and transmission line 2 each have a self-capacitance C and a self-inductance L with the return conductor 4 . Further, mutual inductance Lm and mutual capacitance Cm exist between transmission line 1 and transmission line 2 . It is generally known that the crosstalk noise waveform is determined by parameters such as these LC values, the amplitude of the input signal, and the rising or falling time Trf. In conventional IBIS analysis processing and Spameter analysis processing, there is no means for deriving the LC value of the transmission line, and crosstalk noise cannot be considered.

Therefore, the analysis apparatus 100B according to the third embodiment calculates the LC value from the sparameter of the transmission line in the sparameter analysis process. Then, in the crosstalk noise waveform creation process, the analysis apparatus 100B creates a crosstalk noise waveform using the LC value, the amplitude of the input signal, the rise or fall time, and the transmission line delay value. Furthermore, the analysis device 100B adds the crosstalk noise waveform to the digital signal waveform in the waveform synthesizing process. As a result, the analysis device 100B can generate a digital signal waveform in consideration of crosstalk noise.

(Functional configuration of analysis device 100B)
FIG. 16 is a diagram showing the functional configuration of an analysis device 100B according to the third embodiment of the invention. The analysis device 100B according to the third embodiment differs from the analysis device 100 according to the first embodiment in that it further includes an LC value calculator 114, a crosstalk noise waveform generator 116, and a waveform synthesizer 118. FIG.

The LC value calculator 114 calculates the LC value from the transmission line sparameter.

Crosstalk noise waveform generator 116 generates a crosstalk noise waveform using the LC value calculated by LC value calculator 114, the amplitude of the input signal, the rise or fall time, and the transmission line delay value. do.

The waveform synthesizing unit 118 synthesizes the crosstalk noise waveform generated by the crosstalk noise waveform generating unit 116 with the digital signal waveform generated by the digital signal waveform generating unit 110, thereby generating a digital waveform in consideration of crosstalk noise. Generate a signal waveform.

(Calculation method of LC value by LC value calculation unit 114)
A method of calculating the LC value from the sparameter of the transmission line by the LC value calculating unit 114 will be described below. First, the LC value calculator 114 derives the characteristic impedance Zc and the propagation constant γ from the sparameter by the following formulas (16) and (17). However, _Zo represents the reference impedance of the parameter, _S11 represents the reflection characteristic, and _S21 represents the insertion loss.

Next, the LC value calculator 114 derives the LC value from the characteristic impedance Zc and the propagation constant γ using the following formulas (18) and (19).

L(ω)=Im{γZ _c }/ω (18)

C(ω)=Im _{ γ/Zc}/ω (19)

(Method of Generating Crosstalk Noise Waveform by Crosstalk Noise Waveform Generation Unit 116)
FIG. 17 is a diagram showing an input waveform of a signal on a transmission path that is a noise source and a NEXT waveform on a transmission path that receives noise. FIG. 18 is a diagram showing an output waveform of a signal on a transmission path that is a noise source and a FEXT waveform on a transmission path that receives noise.

The crosstalk noise waveform changes depending on which end of the transmission line the noise source signal is input to. For example, in the example shown in FIG. 15, when a noise source signal is input to the left end of the transmission line 1, the noise waveform differs between the left end and the right end of the transmission line 2 receiving noise. Crosstalk noise appearing at the end near the input of the noise source is called NEXT (Near End XTalk), and crosstalk noise appearing at the far end is called FEXT (Far End XTalk).

In the input waveform shown in FIG. 17, Vin indicates the amplitude of the input waveform of the signal that becomes the noise source. SRin indicates the slope of the input waveform of the signal that becomes the noise source. Also, Tinit_a indicates the initial delay time of a signal that is a noise source. Trfin indicates the HL transition period of the input waveform of the signal that is the noise source. Also, UIa indicates a unit interval of a signal that is a noise source.

Further, in the output waveform shown in FIG. 18, Tdlya indicates the transmission line delay time of the signal wiring that becomes a noise source. Trfout indicates the HL transition period of the output waveform of the signal that is the noise source.

Each parameter value shown in FIG. 17 and FIG. 18 is input as analysis conditions or calculated by IBIS analysis processing or Spameter analysis processing.

In the NEXT waveform shown in FIG. 17, Vnext indicates the voltage of NEXT. SRnext1 indicates the slope of the first transition period of NEXT. SRnext2 indicates the slope of the second transition period of NEXT. Also, Tnext indicates the period of NEXT. Also, tn1 and tn2 indicate the start times of NEXT.

In the NEXT waveform shown in FIG. 18, Vfext indicates the voltage of FEXT. SRfext1 indicates the slope of the first transition period of FEXT. SRfext2 indicates the slope of the second transition period of FEXT. Also, Tfext indicates the period of FEXT. Also, tf1 and tf2 indicate the start times of FEXT. Tdlyb represents the transmission line delay time of the signal wiring receiving noise.

Crosstalk noise waveform generation section 116 calculates Vnext, SRnext1, SRnext2, Tnext, tn1, tn2, Vfext, SRfext1, SRfext2, Tfext, tf1, and tf2 in the crosstalk noise waveform generation process to generate crosstalk noise. Waveforms can be generated.

Specifically, the crosstalk noise waveform generator 116 calculates Vnext by the following formula (20). However, Vnext satisfies the following relational expression (21). Also, in the following formula (20), values calculated by the LC value calculator 114 are used for C, Cm, L, and Lm.

Further, crosstalk noise waveform generation section 116 calculates SRnext1 by the following formula (22).

SRnext1=SRin (22)

Further, the crosstalk noise waveform generator 116 calculates Tnext by the following formula (23).

Tnext=2Td (23)

Also, the crosstalk noise waveform generator 116 calculates tn1 by the following formula (24).

tn1=Tinit_a (24)

Also, the crosstalk noise waveform generator 116 calculates tn2 by the following formula (25).

tn2=Tinit_a+UIa (25)

Also, the crosstalk noise waveform generator 116 calculates Vfext by the following formula (26). However, Vfext satisfies the following relational expression (27). Also, in the following formula (26), values calculated by the LC value calculator 114 are used for C, Cm, L, and Lm.

Also, the crosstalk noise waveform generator 116 calculates Tfext by the following formula (28).

Tfext=Trfout/2 (28)

Also, the crosstalk noise waveform generator 116 calculates tf1 by the following formula (29).

tf1=Tinit_a+Tdlyb (29)

Also, the crosstalk noise waveform generator 116 calculates tf2 by the following formula (30).

tf2=Tinit_a+Tdlyb+UIa (30)

Note that Td represents a transmission line delay time in a section in which two transmission lines run in parallel. However, instead of Td, the larger of Tdlya and Tdlyb may be used to create a more pessimistic noise waveform.

Further, the crosstalk noise waveform generator 116 derives the slew rate Vin/Trf_line as SRfext1 and SRfext2 using the method of deriving the amount of tilt variation in the conventional Spameter analysis process. However, the insertion loss of the transmission line affected by noise is substituted for Trf_line. SRfext1 is obtained by inverting the slew rate of the waveform in the noise source transmission line. For Vin, a more accurate value may be used by using a method of deriving the amount of amplitude variation in the conventional Sparamter analysis process.

Similarly, the crosstalk noise waveform generation unit 116 calculates SRnext2 using the method of deriving the tilt variation amount in the conventional Spameter analysis process. However, the insertion loss of the transmission line affected by noise is doubled and substituted for the parameter S21. Also, SRnext2 is obtained by inverting the slew rate of the noise source transmission line.

Crosstalk noise waveform generation section 116 generates a crosstalk noise waveform having a FEXT waveform and a NEXT waveform using each parameter thus calculated. Waveform synthesis section 118 then synthesizes the crosstalk noise waveform generated by crosstalk noise waveform generation section 116 with the digital signal waveform generated by digital signal waveform generation section 110 . Thereby, the waveform synthesizing section 118 generates a digital signal waveform in consideration of crosstalk noise.

Note that when there are n transmission lines, one transmission line causes crosstalk noise to all other transmission lines. There are n-1 crosstalk noises per transmission line. Therefore, when there are n transmission lines, the total number of crosstalk noises is n(n-1). Therefore, a Sparamter having n transmission lines generates n(n−1) crosstalk noise waveforms.

(Specific example of method for synthesizing crosstalk noise waveform by waveform synthesizing unit 118)
FIG. 19 is a diagram showing an example of digital signal waveforms on the input end side and the output end side for SignalA and SignalB shown in FIG. 15, respectively. In FIG. 19, a solid line indicates a digital signal waveform without considering the influence of crosstalk noise. A dashed line indicates a digital signal waveform affected by crosstalk noise. Also, the inner portion of the eye pattern in the digital signal waveform affected by crosstalk noise is indicated by hatching.

As shown in FIG. 19, mutual crosstalk noise occurs between SignalA and SignalB. Therefore, SignalA is affected by crosstalk noise from SignalB. Also, SignalB is affected by crosstalk noise from SignalA.

As already described, the analysis device 100B according to the third embodiment generates a crosstalk noise waveform and synthesizes the crosstalk noise waveform into a digital signal waveform. For example, the analysis device 100B synthesizes a crosstalk noise waveform corresponding to the crosstalk noise from SignalB with respect to SignalA. Also, for example, the analysis device 100B synthesizes a crosstalk noise waveform corresponding to the crosstalk noise from SignalA to SignalB.

As a result, the analysis apparatus 100B according to the third embodiment cancels out the crosstalk noise that was actually affected by each of SignalA and SignalB, and the crosstalk noise waveform that is synthesized with the digital signal waveform. As a result, the digital signal waveform affected by the crosstalk noise can be an ideal digital signal waveform (the digital signal waveform in which the influence of crosstalk noise is not taken into account, as shown in FIG. 19).

Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to these embodiments, and various modifications or Change is possible.

Reference Signs List 10 printed circuit board 11, 15 semiconductor package 12, 16 semiconductor integrated circuit 13 output buffer circuit 14 transmission line 17 input buffer circuit 100, 100A, 100B analysis device 102 first input section 104 second input section 106, 106A third input section 108 , 108A calculator 110 digital signal waveform generator 112 digital signal waveform determiner 114 LC value calculator 116 crosstalk noise waveform generator 118 waveform synthesizer

JP-A-2002-92059

Claims (11)

An analysis device for analyzing a digital signal waveform in digital signal transmission between an output buffer circuit and an input buffer circuit provided on a semiconductor package provided on a printed circuit board,
a first input unit that receives an input of an operation period and an operation pattern of the output buffer circuit;
a second input receiving a first model input that characterizes the output buffer circuit and the input buffer circuit;
a third input unit that receives input of a second model that indicates characteristics of the printed circuit board and the semiconductor package;
a calculation unit that calculates various calculation values for generating a digital signal waveform based on the operation cycle and operation pattern of the output buffer circuit, the first model, and the second model;
a digital signal waveform generator that generates the digital signal waveform based on various calculated values calculated by the calculator ;
an LC value calculator that calculates LC values including capacitance values and inductance values in the printed circuit board and the semiconductor package based on the second model;
a crosstalk noise waveform generator that generates a crosstalk noise waveform based on the LC value calculated by the LC value calculator;
with
The crosstalk noise waveform generator generates at least one of a NEXT waveform and a FEXT waveform as the crosstalk noise waveform.
An analysis device characterized by: The analysis device according to claim 1, wherein the first model is an IBIS model. The analysis device according to claim 1 or 2, wherein the second model is a Sparameter model. The calculation unit
Calculating the amplitude amount, slope, delay value, and attenuation amount regarding the digital signal waveform as the various calculated values,
The digital signal waveform generator,
4. The digital signal waveform according to any one of claims 1 to 3, wherein the digital signal waveform is generated based on the amplitude amount, the slope, the delay value, and the attenuation amount calculated by the calculator. analysis equipment. The calculation unit
calculating the amount of amplitude based on the relationship between the current value and the voltage value at the input/output terminal with the outside of the semiconductor shown in the first model;
calculating the slope and the delay value in the output buffer circuit based on the voltage value versus time at the output terminal from the time when the signal is input to the output buffer circuit shown in the first model;
calculating the delay value in the semiconductor package and the printed circuit board based on the second model;
5. The analysis apparatus according to claim 4, wherein the attenuation amount in the semiconductor package and the printed circuit board is calculated based on the second model. The analysis apparatus according to any one of claims 1 to 5 , further comprising a digital signal waveform determination section that determines the digital signal waveform generated by the digital signal waveform generation section. The digital signal waveform determination unit
determining whether or not a period during which the digital signal waveform is at a potential higher than a potential recognized as an H signal by the input buffer circuit is equal to or longer than a predetermined time;
3. It is determined whether or not a period during which the digital signal waveform has a potential lower than a potential recognized as an L signal by the input buffer circuit is longer than or equal to a predetermined time. 7. The analysis device according to 6 . 3. The apparatus as claimed in claim 1, further comprising a waveform synthesizing section that synthesizes the crosstalk noise waveform generated by the crosstalk noise waveform generation section with the digital signal waveform generated by the digital signal waveform generation section. 8. The analysis device according to any one of 1 to 7 . The crosstalk noise waveform generator,
generating the NEXT waveform in the noise-receiving transmission line based on the input waveform in the noise source transmission line and the LC value calculated by the LC value calculation unit;
The FEXT waveform in the transmission line receiving the noise is generated based on the output waveform in the transmission line of the noise source and the LC value calculated by the LC value calculator. 9. The analysis device according to any one of 8 . An analysis method for analyzing a digital signal waveform in digital signal transmission between an output buffer circuit and an input buffer circuit provided on a semiconductor package provided on a printed circuit board,
a first input step of receiving input of an operation period and an operation pattern of the output buffer circuit;
a second input step of receiving a first model input that characterizes the output buffer circuit and the input buffer circuit;
a third input step of receiving an input of a second model representing characteristics of the printed circuit board and the semiconductor package;
a calculation step of calculating various calculated values for generating a digital signal waveform based on the operation cycle and operation pattern of the output buffer circuit, the first model, and the second model;
a digital signal waveform generation step of generating the digital signal waveform based on various calculated values calculated in the calculation step ;
an LC value calculation step of calculating LC values including capacitance values and inductance values in the printed circuit board and the semiconductor package based on the second model;
a crosstalk noise waveform generation step of generating a crosstalk noise waveform based on the LC value calculated in the LC value calculation step;
including
The crosstalk noise waveform generation step generates at least one of a NEXT waveform and a FEXT waveform as the crosstalk noise waveform.
An analysis method characterized by: An analysis program for analyzing a digital signal waveform in digital signal transmission between an output buffer circuit and an input buffer circuit provided on a semiconductor package provided on a printed circuit board,
the computer,
a first input unit that receives an input of an operation period and an operation pattern of the output buffer circuit;
a second input receiving a first model input that characterizes the output buffer circuit and the input buffer circuit;
a third input unit that receives input of a second model that indicates characteristics of the printed circuit board and the semiconductor package;
a calculation unit that calculates various calculation values for generating a digital signal waveform based on the operation cycle and operation pattern of the output buffer circuit, the first model, and the second model;
a digital signal waveform generation unit that generates the digital signal waveform based on various calculated values calculated by the calculation unit ;
an LC value calculator that calculates LC values including capacitance values and inductance values in the printed circuit board and the semiconductor package based on the second model; and
A crosstalk noise waveform generator that generates a crosstalk noise waveform based on the LC value calculated by the LC value calculator.
function as
The crosstalk noise waveform generator generates at least one of a NEXT waveform and a FEXT waveform as the crosstalk noise waveform.
program.

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