JP7106868B2 - electronic controller - Google Patents

Description

The disclosure of this specification relates to an electronic control device that employs a heterogeneous multicore.

The demand for advanced safety, such as automatic driving and automatic parking, is increasing, and more sophisticated in-vehicle electronic control units are in demand. Calculations for information input to vehicles are performed by control processors. An electronic control device employing a heterogeneous multi-core, which includes a GPGPU for each necessary function, is being used.

When adopting heterogeneous multi-core, it is necessary to determine task allocation for each core before task execution. However, it is difficult to predict the load in advance and distribute the tasks perfectly. Therefore, when there is a possibility that the first CPU cannot finish processing within a predetermined time, a method of transferring the task to the second CPU and executing (processing) it is conceivable.

Patent Document 1 discloses a microcomputer having a first CPU, a second CPU, and a first memory corresponding to the first CPU and a second memory corresponding to the second CPU, in which a data area is provided in the first memory. When the programmed task is transferred to the second memory and executed by the second CPU, the address output from the second CPU is changed so that the access to the first memory by the task becomes the access to the second memory. It has an address conversion circuit for converting. As a result, it is possible to avoid a decrease in computational performance when tasks are transferred between CPUs for load distribution.

Also, a configuration is conceivable in which software manages the processing time of each task and has a support device that determines whether or not each CPU can execute the task.

JP 2009-199414 A

However, in actual processing, even similar tasks do not take the same processing time, and the execution time may vary greatly depending on the related software architecture and hardware architecture. For this reason, means for reducing the access cycle when the memory to be accessed is changed or suppressing the decrease in throughput by monitoring the processing band are not sufficient for improving the throughput.

In addition, variations in processing time may increase processing related to task migration and memory access, and may induce an increase in power consumption related to processing.

Therefore, an object of the disclosure of this specification is to provide an electronic control device that can assign tasks more effectively in an electronic control device that employs a heterogeneous multi-core.

The disclosure of this specification employs the following technical means to achieve the above object. It should be noted that the symbols in parentheses described in the claims and this section indicate the corresponding relationship with the specific means described in the embodiment described later as one aspect, and limit the technical scope. is not.

In order to achieve the above object, the electronic control device disclosed in this specification includes a plurality of arithmetic processing units (10, 30, 50), and performs control for executing processing based on input signals and outputting output signals. a task processing time prediction unit (80) for extracting a feature quantity characterizing the task for each task in the processing executed by the control unit and learning the actual task processing time corresponding to the feature quantity; and a task processing time prediction unit, when executing a task, predicts a task processing time corresponding to the feature amount based on the feature amount associated with the task to be executed, and predicts the predicted task processing time , the process is added to a free area in which the task can be executed in the arithmetic processing unit.

According to this, since the task processing time is learned based on the feature amount, it is possible to predict the task processing time with high accuracy even for similar tasks. Since task assignment can be determined based on the task processing time predicted with high accuracy, the throughput of a microcomputer employing a heterogeneous multicore can be improved.

In addition, it is possible to efficiently allocate processing to empty areas in which processing is not being executed in the arithmetic processing unit, so that the number of memory accesses can be reduced and the processing waiting time can be reduced. Therefore, the power consumption of the electronic control device can be suppressed.

It is a figure which shows schematic structure of an electronic control unit. 3 is a block diagram showing functional blocks of an electronic control unit; FIG. 4 is a flow chart showing the operation of a control unit; 4 is a flow chart showing the operation of a task processing time prediction unit; 4 is a flow chart showing the operation of a learning data acquisition unit; 4 is a flow chart showing the operation of a machine learning unit; 8 is a flow chart showing the operation of a processing addition unit; 4 is a flow chart showing the operation of a task monitoring processing unit; 4 is a timing chart showing the operation of the electronic control unit;

A plurality of modes for carrying out the present disclosure will be described below with reference to the drawings. In each form, the same reference numerals may be given to the parts corresponding to the matters described in the preceding form, and overlapping explanations may be omitted. When only a part of the configuration is described in each form, the previously described other forms can be applied to other parts of the configuration. In addition to the combination of parts that clearly indicate that each form can be combined, if there is no particular problem with the combination, it is also possible to partially combine the forms even if it is not specified. It is possible.

(First embodiment)
First, with reference to FIGS. 1 and 2, a schematic configuration of an electronic control unit according to this embodiment will be described.

The electronic control unit 100 includes an ECU that controls objects to be controlled in the vehicle, for example, a microcomputer mounted on the engine ECU 200 or the like. do.

The input signal is, for example, various information relating to the running state of the vehicle, and the electronic control unit 100 issues an output signal for appropriate engine control based on the input information. The engine speed and throttle opening are determined based on the output signal. In another example, the input signal is, for example, an image around the vehicle, and the electronic control unit 100 analyzes the state of the parking space around the vehicle based on the input image around the vehicle and issues an output signal. . The wheel angle and vehicle speed are controlled based on the output signal, and the vehicle is parked in an appropriate position.

First, the hardware configuration of the electronic control unit 100 will be described with reference to FIG. The electronic control unit 100 includes a plurality of CPUs 10, PMUs 20, GPGPUs 30, caches 40, arithmetic units 50, and memories 60. FIG. These elements are interconnected by a bus 110 .

A CPU 10 is a central processing unit that executes a program based on an input signal and outputs an output signal. The CPU 10 reads and executes a program stored in a memory 60, which will be described later, to process an input signal and convert it into an output signal. The CPU 10 in this embodiment has a multi-core configuration including a plurality of cores having the same configuration, and the processing to be executed is distributed to the plurality of cores. As a result, an output signal can be output in a short period of time even with relatively high-load processing. The type of architecture that configures the CPU 10 is not limited, and it may have its own cache memory separate from the cache 40 described later.

The PMU 20 is a processing monitor unit, and is a part that monitors the operation status of the CPU 10 as well as the GPGPU 30 and the operation unit 50, which will be described later. The PMU 20 extracts a trace log related to processing and the time required for execution for each program counter, and stores them in a storage device such as the cache 40 or the memory 60 .

Here, the trace log is log data describing the progress of the program, and is data including information corresponding to the feature amount described in the scope of claims. Processing of one task is a collection of processing executed at one or more addresses, and the PMU 20 associates a trace log with each task. That is, the feature amount is collected for each task.

Also, the time required for execution is the time required for the process executed at the address designated by the program counter. The PMU 20 collects the time required for processing for each task in the same manner as the feature amount described above. The time thus collected corresponds to the task and corresponds to the task processing time described in the claims.

The GPGPU 30 is a general purpose graphic processing unit, and is included in the electronic control unit 100 as an example of a processor forming a heterogeneous multicore. The GPGPU 30 is a processing device optimized for image processing, and is used for processing still images or moving images as input signals. The type of architecture that configures the GPGPU 30 is not limited, and it may have its own memory separate from the memory 60 described later.

The cache 40 is a storage device, and has a function of temporarily holding part or all of programs and other data and their references between source hardware and destination hardware. The cache 40 is connected to the bus 110 to which the CPU 10, the PMU 20, and the GPGPU 30 are connected, for example, and temporarily holds data transmitted and received between each piece of hardware. The cache 40 is located in a memory hierarchy that mediates between the cache memory of the CPU 10, which is the upper level of the memory hierarchy, and the memory 60, which is the lower level.

Like the CPU 10 and the GPGPU 30, the arithmetic unit 50 executes processing on an input signal and outputs an output signal. It is a dedicated unit. The arithmetic unit 50 includes, for example, a hardware accelerator. Arithmetic unit 50 is also included in electronic control unit 100 as an example of a processor forming a heterogeneous multicore.

The memory 60 is a storage device such as a flash memory, a hard disk, a ROM such as an SSD, or a random access memory (RAM) such as a DRAM or SRAM. Memory 60 holds programs and other data. The memory 60 holds the results calculated by the CPU 10 and the GPGPU 30, the learning data to be collected, and the like. When the CPU 10 or the GPGPU 30 executes an instruction, a program is read from the memory 60 according to the requested task, and the input signal temporarily held in the memory 60 or the cache 40 is based on the read program. processed by

In this embodiment, the plurality of CPUs 10, GPGPUs 30, and arithmetic units 50 correspond to the arithmetic processing device described in the claims, and constitute a control unit.

Next, with reference to FIG. 2, functional blocks included in the electronic control unit 100 will be described. Note that each function described below may be realized by either hardware or software.

As shown in FIG. 2, the electronic control unit 100 includes a control unit 70 and a task processing time prediction unit 80 as functional blocks. The task processing time prediction unit 80 has a monitoring unit 81, a learning data acquisition unit 82, a machine learning unit 83, a processing addition unit 84, and a task monitoring processing unit 85 as internal functional blocks.

The control unit 70 is a part that executes processing based on an input signal and generates and issues an output signal. The above functions of the control unit 70 are mainly executed by the processor, and are realized by the CPU 10, the GPGPU 30, and the arithmetic unit 50. FIG. The control unit 70 executes a program based on the input signal while counting up the program counter, processes the input signal, and outputs an output signal according to the content of the program.

The task processing time prediction unit 80 monitors the processing executed by the control unit 70 for each program counter, learns the time required for task processing using a machine learning algorithm, and predicts the task processing time based on the result. . As described above, the task processing time prediction unit 80 has, as internal functional blocks, a monitoring unit 81, a learning data acquisition unit 82, a machine learning unit 83, a processing addition unit 84, and a task monitoring processing unit 85. .

The monitoring unit 81 is a unit that monitors the processing included in the task executed by the control unit 70 for each program counter. Specifically, the monitoring unit 81 acquires a trace log regarding the processing executed by the control unit 70 and measures the time required for the processing. The function of the monitoring unit 81 is mainly handled by the PMU 20 . Elements included in the trace log include, for example, the number of execution cycles (Processing cycle), the total number of instructions executed (Number of instructions), the ratio of conditional branch taken (Branch taken), and the L1D cache hit ratio (Hit ratio of Level 1 data), hit ratio of L1I cache (Hit ratio of Level 1 Instruction), hit ratio of L2D cache (Hit ratio of Level 2 data), hit ratio of L2I cache (Hit ratio of Level 2 Instruction), branch destination during conditional branch instruction Processing rate (Predictable branch speculatively executed), etc. The L1D cache, the L1I cache, the L2D cache, and the L2I cache may belong to the cache included in the cache 40, or may belong to the cache memory built in the chip constituting the CPU 10. FIG.

The trace log acquisition cycle may be set for each program counter as in the present embodiment, or may be set for each unit time, for each function, or for each task.

The monitoring unit 81 passes the trace log and task processing time to the learning data acquisition unit 82 . Here, among the items of the trace log, those that affect the task processing time are referred to as feature amounts. All of the trace log examples described above affect task processing time and are also examples of feature amounts. The feature quantity is a parameter that indicates the characteristics of the control as a whole, in which the characteristics of both hardware and software are convoluted, not only the information of the hardware alone or the information of the software alone. Therefore, if the hardware or software is changed, the value of the feature amount will also change, and it will also change depending on external factors such as noise, the environmental temperature in which the electronic control unit 100 is placed, and the input signal.

The learning data acquisition unit 82 is a part that acquires information on feature amounts and task processing times from the monitoring unit 81 and statistically organizes them as learning data. Information on the task processing time is also obtained from the task monitoring processor 85, which will be described in detail later. The learning data does not necessarily have to be stored in the memory 60 provided in the electronic control unit 100 itself. For example, the learning data may be stored in the cloud and shared with other ECUs or the like.

The machine learning unit 83 is a part that extracts a feature amount related to a predetermined task and learns by associating the task processing time of a task executed with the feature amount with the feature amount. This learning is done using machine learning algorithms. The machine learning algorithm is, for example, a statistical classification algorithm using k-approximation, SVM (support vector machine), decision tree, random forest, or the like. The machine learning unit 83 associates the feature amount (explanatory variable) input corresponding to the task to be executed with the task processing time as an objective variable.

Depending on the task, even if the feature amount is substantially the same, the task processing time may vary greatly, but the fact of variation itself is also learned. That is, it also learns whether the task processing time is substantially constant or not constant with respect to the feature amount.

The machine learning unit 83 associates the feature amount with the task processing time by a machine learning algorithm, outputs the predicted task processing time for the input feature amount, and passes it to the processing addition unit 84 .

The process addition unit 84 is a part that adds another process to a task-executable empty area in the CPU 10 or the GPGPU 30 according to the predicted task processing time. The processing adding unit 84 determines processing to be added according to the predicted task processing time, and adds the processing to a processor such as the CPU 10 or GPGPU 30 that can execute the processing.

The task monitoring processing unit 85 calculates the correct answer rate of the predicted task processing time and reflects it in the learning data, detects the variation in the task processing time for a predetermined task in the learning data, and inputs based on the predicted task processing time. This is a part that verifies whether or not another process that has been executed has actually completed the process. Here, the percentage of correct answers means, for example, a correct answer when the absolute value of the difference between the predicted task processing time and the task processing time when the task is actually executed is equal to or less than a predetermined allowable value, and the absolute value of the difference It is calculated as the ratio of the number of correct answers to the total number of correct answers and incorrect answers, when is greater than the allowable value. The task monitoring processing unit 85 acquires task processing time information from the monitoring unit 81 .

Next, a specific operation flow of the electronic control unit 100 according to this embodiment will be described with reference to FIGS. 3 to 9. FIG. 3 is a flow chart showing the operation of the control unit 70, FIGS. 4 to 8 are flow charts showing the operation of the task processing time prediction unit 80, and FIG. 9 is a timing chart relating to the execution of the control unit 70.

FIG. 3 is a diagram showing a flow in which the electronic control unit 100 issues an output signal in response to an input signal. As shown in FIG. 3, when an input signal is input to the electronic control unit 100 in step S1, the control section 70 performs processing according to the input signal as shown in step S2. The control unit 70 processes the input signal by reading a program or the like, and generates and issues an output signal as shown in step S3.

FIG. 4 is a diagram showing an overall operational flow of the task processing time prediction unit 80. As shown in FIG. In this embodiment, the task processing time prediction unit 80 executes the flow shown in FIG. and an example of making a prediction will be described. In the example shown in FIG. 9, the tasks to be learned here are the processes indicated as "TASK A", "TASK B", and "TASK C".

As shown in FIG. 4, the task processing time prediction unit 80 executes step S100. Step S100 is a step in which the learning data acquiring unit 82 acquires information on feature amounts and task processing times from the monitoring unit 81, and statistically organizes them as learning data according to the flow shown in FIG. A detailed description will be given with reference to the drawings.

As shown in FIG. 5, step S101 is executed first. Step S<b>101 is a step in which the learning data acquiring unit 82 acquires information on feature amounts and task processing time from the monitoring unit 81 . As described above, the feature amount is, for example, information contained in the trace log, and includes, for example, the number of execution cycles, cache hit rate, and the like.

Then step S102 is executed. Step S102 is a step of determining whether or not the target task to be learned has transitioned since step S102 was previously executed. If the task has transitioned, a YES determination is made in step S102, and the process proceeds to step S103.

Step S103 is a step of changing the storage area on the memory 60 for storing the feature amount and the task processing time acquired in step S101. If step S102 determines YES, the storage destination is changed so that the feature amount and the task processing time are stored in the corresponding storage area in step S103. That is, the feature amount and the task processing time are classified for each task to be executed and stored in a predetermined storage area. Therefore, if the determination in step S102 is NO, the flow proceeds without going through step S103.

After step S102 determines NO or step S103 is executed, step S104 is executed. Step S104 is a step of storing the feature amount and the task processing time in the storage area on the memory 60 set for each task. The feature amount and task processing time classified for each task in step S104 are referred to as learning data.

Learning data is obtained through step S100 including steps S101 to S104.

Next, as shown in FIG. 4, the task processing time prediction unit 80 executes step S200. Step S200 is a step in which the machine learning unit 83 associates the feature amount and the task processing time by a machine learning algorithm, and predicts the task processing time for the input feature amount. Follow the flow. A detailed description will be given with reference to the drawings.

As shown in FIG. 6, step S201 is first executed. Step S201 is a step in which the machine learning unit 83 receives learning data from the learning data acquiring unit 82, and extracts information on the feature quantity and task processing time included in the learning data for each task. Since the learning data is stored in the predetermined storage area for each task in step S100, the machine learning unit 83 acquires the learning data for the task requiring prediction of the task processing time, and calculates the feature amount and the task processing. Extract time information.

Then step S202 is executed. Step S202 is a step of selecting a feature amount that affects the task processing time. The machine learning unit 83 has a function of learning by associating the feature amount and the task processing time, and a function of giving the task processing time for the input feature amount. is the target variable. Step S202 is a step of selecting a feature amount that can be an explanatory variable from among the feature amounts. It should be noted that the function in the machine learning unit 83 is not necessarily bijective because the task processing time is not always constant even if the feature amount is the same. That is, the task processing time may vary with respect to the feature amount, and two or more task processing times that are clearly different than the variation may be learned. This is monitored by the task monitoring processor 85 .

Then step S203 is executed. Step S203 is a step of reducing dimensions by, for example, integrating feature amounts when a task includes a plurality of feature amounts. Specifically, it is an operation of synthesizing a principal component that best represents the task processing time by multivariate analysis from a large number of feature values that are correlated with the task processing time. For example, principal component analysis can be employed. By going through step S203, the amount of variables used for learning can be reduced, so the load related to learning and the load related to prediction of task processing time can be reduced.

Then step S204 is executed. Step S204 is a step of creating a task processing time, which is an objective variable, corresponding to explanatory variables synthesized by feature amounts or principal component analysis.

Then step S205 is executed. Step S205 is a step of statistically linking the extracted feature amount or the generated explanatory variable with the task processing time, which is the objective variable, based on the machine learning algorithm. Step S205 is also a step of outputting the task processing time predicted by machine learning with respect to the input feature amount. As a machine learning algorithm, for example, k-approximation method, SVM (support vector machine), decision tree, random forest, etc. can be adopted. Through step S205, the feature amount (explanatory variable) and the task processing time (objective variable) are associated with each other, and the task processing time is predicted and output with respect to the input feature amount.

Next, as shown in FIG. 4, the task processing time prediction unit 80 executes step S300. Step S300 is a step in which the process addition unit 84 adds a process to a task-executable free area in a processor such as the CPU 10 or the GPGPU 30 according to the predicted task processing time, and follows the flow shown in FIG. A detailed description will be given with reference to the drawings. Note that step S300 is a step for adding processing in response to a request to execute a task, so the flow is executed for each task.

As shown in FIG. 7, step S301 is first executed. Step S301 is a step in which the process addition unit 84 determines whether or not the correct answer rate of the predicted task processing time for a given task is higher than a given threshold.

The correct answer rate is calculated, for example, as follows. In other words, if the absolute value of the difference between the predicted task processing time and the actual task processing time is less than or equal to a predetermined allowable value, the answer is correct. answer. It is calculated as a ratio of the frequency of correct answers to the total (a+b) of the frequency of correct answers (a) and the frequency of incorrect answers (b). That is, the correct answer rate R is defined as R=a/(a+b). Since the calculation of the percentage of correct answers R is executed in step S400 responsible for monitoring learning data, the details will be described later. Note that the correct answer rate R is updated in step S400 executed after step S300, but the correct answer rate R used in step S300 refers to the latest data calculated in step S400 performed in the past. be.

In step S301, the threshold for comparison with the percentage of correct answers is set to 90%, for example. In step S301, the percentage of correct answers R associated with the task to be executed is compared with a threshold value of 90%, and if R>90%, a YES determination is made. If R≦90%, the determination is NO. If the determination in step S301 is NO, there is a possibility that even if the process is added to the free area of the processor, it will not be executed in time, so the process is not added.

When step S301 determines YES, the process proceeds to step S302. Step S302 is a step of determining whether or not the predicted task processing time is longer than or equal to a predetermined time. Although the predetermined time is set arbitrarily, it is set to 10 μs, for example, in step S302. If the predicted task processing time is shorter than 10 μs, a NO determination is made in step S302, and the process advances to step S303 to instruct a processor with free space to add "process 1". When the task processing time is predicted to be shorter than 10 μs, it can be assumed that the processor is relatively idle, so "process 1" can select relatively high-load processing. When step S302 determines YES, the process proceeds to step S304.

Step S304, like step S302, is a step of determining whether or not the predicted task processing time is equal to or longer than a predetermined time. Although the predetermined time is set arbitrarily, it is set to 20 μs, for example, in step S304. If the predicted task processing time is shorter than 20 μs, a NO determination is made in step S304, and the process advances to step S305 to instruct a processor with free space to add "processing 2". Since it can be assumed that the time available for "processing 2" is shorter than that for "processing 1", "processing 2" has a lighter load than "processing 1". When step S304 is YES determination, it progresses to step S306.

Step S306 is a step of determining whether or not the predicted task processing time is equal to or longer than a predetermined time, similar to steps S302 and S304. Although the predetermined time is set arbitrarily, it is set to 30 μs, for example, in step S306. If the predicted task processing time is shorter than 30 μs, a NO determination is made in step S306, and the process advances to step S307 to instruct a processor with free space to add "processing 3". Since it can be assumed that the time available for "processing 3" is shorter than that for "processing 2", "processing 3" has a lighter load than "processing 2". If the determination in step S306 is YES, the process adding unit 84 does not instruct addition of the process because there is a possibility that the process will not be executed in time even if the process is added to the free area of the processor.

Processing 1, processing 2, and processing 3 to be added here correspond to "ADD TASK" shown in FIG. In the above example, four stages of 0 μs-10 μs, 10 μs-20 μs, 20 μs-30 μs, and 30 μs or more were exemplified as task processing time class classifications. It can be appropriately set depending on the type.

Next, as shown in FIG. 4, the task processing time prediction unit 80 executes step S400. A step S400 calculates the correct answer rate of the predicted task processing time and reflects it in the learning data, detects the variation in the task processing time for a predetermined task in the learning data, and detects another input based on the predicted task processing time. This is the step of verifying whether the process could actually complete the process. Step S400 follows the flow shown in FIG. A detailed description will be given with reference to the drawings.

As shown in FIG. 8, step S401 is first executed. Step S401 is a step in which the task monitoring processing unit 85 compares the actual task processing time acquired from the monitoring unit 81 and the task processing time predicted by the machine learning unit 83, and verifies the difference. Specifically, when a certain task is executed, the absolute value (Δt) of the difference between the actual task processing time and the predicted task processing time is compared with a predetermined allowable value (T). do. If .DELTA.t.ltoreq.T, the difference between the predicted value and the measured value is within an allowable range, and the answer is correct. In the case of a correct answer, the process proceeds to step S402, and the correct answer rate is updated so as to increase the correct answer rate. If .DELTA.t>T, the predicted value deviates from the measured value to an unacceptable extent, resulting in an erroneous answer. In the case of an incorrect answer, the process proceeds to step S403, and the correct answer rate is updated so as to decrease the correct answer rate.

Then step S404 is executed. Step S404 is a step of outputting the actual task processing time acquired from the monitoring unit 81 and the updated percentage of correct answers to the learning data acquisition unit 82 and reflecting them in the learning data.

Then step S405 is executed. Step S405 is a step of verifying statistical variations in the task processing time (objective variable) included in the learning data. As the characteristic value representing the statistical variation, for example, dispersion or standard deviation can be used, but any characteristic value can be used arbitrarily. Here, if the variation in task processing time is greater than the predetermined allowable value, the process proceeds to step S406 to notify the user that the variation in task processing time is large.

Then step S407 is executed. Step S407 is a step of determining whether or not the end time of the added process is longer than a predetermined threshold. Here, the predetermined threshold is the time at which the task to be executed after the added process is started, and the fact that the end time of the added process is greater than the predetermined threshold means that the added process is not actually executed. It indicates that it could not be cut (state like the bottom stage shown in FIG. 9). In such a case, the process proceeds to step S408. A step S408 interrupts the additional processing by switching the program counter to the address of the task in the idle state, and proceeds to a step S409 to reset the percentage of correct answers.

On the other hand, if the end time of the added process is equal to or less than the predetermined threshold value, it means that the added process has actually been executed (the state shown in the middle part of FIG. 9), and step S407 results in NO determination and step S408. And the flow continues without going through step S409.

Next, the effects of employing the electronic control unit 100 according to this embodiment will be described.

Since the electronic control unit 100 learns the task processing time based on the feature amount, even for similar tasks, the task vacancy can be predicted with higher accuracy by using the task processing time based on the characteristic value for prediction. be able to. Since task assignment can be determined based on the task processing time predicted with high accuracy, the throughput of a microcomputer employing a heterogeneous multicore can be improved.

In addition, it is possible to efficiently allocate processing to empty areas in which processing is not being executed in the arithmetic processing unit (processor), so that the number of memory accesses can be reduced and the processing waiting time can be reduced. Therefore, the power consumption of the electronic control device can be suppressed.

In particular, in the electronic control unit 100 according to the present embodiment, dimension reduction is performed by principal component analysis on the feature amount for predicting the task processing time, so the amount of variables used for learning can be reduced. Therefore, the load related to learning and the load related to prediction of task processing time can be reduced.

Furthermore, in the electronic control unit 100 of the present embodiment, the correct answer rate is calculated for the predicted task processing time and reflected in the learning data. If the correct answer rate of the predicted task processing time is low, even if processing is added to the free space of the processor, the processing may not be completed, and the processing of adding the processing itself becomes useless processing. There is fear. On the other hand, the electronic control unit 100 adds processing to a task with a relatively high percentage of correct answers, so it is possible to improve the reliability of completion of the added processing.

Furthermore, in the electronic control unit 100 of this embodiment, the variation in the task processing time in the collected learning data is verified, and if the variation is large, the user is notified. Even if machine learning can associate feature values with task processing times, it may be difficult to estimate additional processing (rank classification) if there is a large statistical variation. The electronic control unit 100 can notify the user of this possibility.

Furthermore, in the electronic control unit 100 according to the present embodiment, when the added processing cannot be actually processed, the percentage of correct answers is reset. That is, if there is an error in the prediction of the task processing time, the correct answer rate may be unintentionally calculated to be high. Therefore, by resetting the correct answer rate, it is possible to suppress the decrease in the accuracy of the process addition. can.

(Other embodiments)
The disclosure in this specification, drawings, etc. is not limited to the illustrated embodiments. The disclosure encompasses the illustrated embodiments and variations thereon by those skilled in the art. For example, the disclosure is not limited to the combinations of parts and/or elements shown in the embodiments. The disclosure can be implemented in various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure encompasses omitting parts and/or elements of the embodiments. The disclosure encompasses permutations or combinations of parts and/or elements between one embodiment and another. The disclosed technical scope is not limited to the description of the embodiments. The disclosed technical scope is indicated by the description of the claims, and should be understood to include all changes within the meaning and range of equivalents to the description of the claims.

In the above-described embodiment, an example in which the machine learning unit 83 executes the step of reducing the dimension of the feature quantity has been described, but the reduction of the dimension is not necessarily required. However, as described above, the processing load of the electronic control unit 100 is reduced by reducing the dimensions. Also, the principal component analysis method is not limited to one method.

Also, an example has been described in which the process adding unit 84 requests that the correct answer rate be higher than a predetermined value when adding a process, but the process can be added regardless of the correct answer rate. However, as described above, it is possible to reduce the uncertainty of whether or not the added process can be completed by determining whether or not to add the process based on the percentage of correct answers.

Also, an example of resetting the percentage of correct answers when the added processing cannot be completed has been described, but the flow can be substantially continued without resetting the percentage of correct answers.

DESCRIPTION OF SYMBOLS 10... CPU, 20... PMU, 30... GPGPU, 40... Cache, 50... Operation unit, 60... Memory, 70... Control part, 80... Task processing time prediction part, 81... Monitoring part, 82... Learning data acquisition part, 83... Machine learning unit, 84... Processing addition unit, 85... Task monitoring processing unit

Claims (7)

a control unit (70) that includes a plurality of arithmetic processing units (10, 30, 50), executes processing based on an input signal, and outputs an output signal;
A task processing time prediction unit (80) that extracts a feature amount that characterizes the task for each task in the process executed by the control unit and learns the actual task processing time corresponding to the feature amount,
The task processing time prediction unit predicts the task processing time corresponding to the feature amount based on the feature amount associated with the task to be executed when executing the task,
An electronic control unit that adds processing to a task-executable free area in the arithmetic processing unit according to a predicted task processing time. a learning data acquisition unit (82) in which the task processing time prediction unit acquires the feature amount and the actual task processing time for each task and statistically records them as learning data;
a machine learning unit (83) that predicts a task processing time corresponding to a task by a predetermined machine learning algorithm based on the learning data;
2. The method according to claim 1, further comprising a processing addition unit (84) for adding processing to a task-executable free space in said arithmetic processing unit according to the task processing time predicted by said machine learning unit. electronic controller. 3. The electronic control device according to claim 2, wherein said machine learning unit performs principal component analysis of said feature quantity to reduce dimensionality. The task processing time prediction unit further has a task monitoring processing unit (85),
The task monitoring processing unit compares the task processing time predicted by the machine learning unit with the task processing time when the task is actually executed to calculate the correct answer rate of the prediction,
4. The electronic control unit according to claim 2, wherein, when the percentage of correct answers is higher than a predetermined threshold, the processing addition unit adds processing to a task-executable free space in the arithmetic processing unit. The percentage of correct answers is defined as a correct answer when the absolute value of the difference between the predicted task processing time and the task processing time when the task is actually executed is equal to or less than a predetermined allowable value, and the absolute value of the difference is the allowable value. Calculated as the ratio of the number of correct answers to the total number of correct and incorrect answers,
5. The electronic control device according to claim 4, wherein said learning data includes said calculated percentage of correct answers. The task monitoring processing unit calculates a variation in task processing time predicted by the machine learning unit for each task,
6. The electronic control unit according to claim 4, wherein a warning is issued when the variation exceeds a predetermined allowable range. The task monitoring processing unit according to any one of claims 4 to 6, wherein the task monitoring processing unit resets the correct answer rate when the time required for the processing added by the processing adding unit exceeds a predetermined allowable value. electronic controller.

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