JP7081805B2 - Information processing equipment, load module generation methods and programs, and dynamic program update systems and methods - Google Patents

Description

The present invention relates to an information processing apparatus, a load module generation method and program, and a dynamic program update system and method, and in particular, an information processing apparatus for dynamically updating a program, a load module generation method and program, and a dynamic program update system and method. Regarding dynamic program update system and method.

Patent Document 1 discloses a technique relating to a program update method in an online system or the like that requires uninterrupted service. In the program update method according to Patent Document 1, first, a function module (new load module) in which the changed code is implemented is created only for the function to be changed among a plurality of functions in the program. Then, in the program update method, the new load module is loaded into the memory and the address on the memory is determined. After that, in the program update method, a jump instruction to the start address of the new load module is written to the start address of the function to be changed in the memory in the original program.

Patent Document 2 discloses a technique relating to a program dynamic update system, which has been made to solve the problem that the memory usage increases every time a patch is applied in Patent Document 1. The system management server according to Patent Document 2 creates an update information file including the relative address of the updated function together with the updated function. Then, the embedded device reads the update information file, determines the address on the memory of the post-update function, and writes the determined address to the control migration destination in the pre-update function. At the same time, the embedded device writes a control transition instruction that refers to the control transition destination as the destination at the start address of the pre-update function. Therefore, when the program is executed, the control transfer instruction to the control transfer destination address is processed at the start address of the pre-update function, and the content of the post-update function is processed without processing the contents of the pre-update function.

Patent Document 3 discloses a technique relating to a method of managing an executable file that refers to a shared library. In the method according to Patent Document 3, a reference file (META) and a service file are created in order to modify the shared library referenced from the dynamically executable file. Here, the reference file describes the definition of the link destination when the function to be modified in the shared library is referenced from the dynamically executable file by a mathematical formula. The service file is a description of the function to be modified. Then, in this method, when the execution of the dynamically executable file is started, the reference file is loaded into the memory, the definition in the reference file is prioritized, and each function in the dynamically executable file and the function definition in the reference file are defined. Link with. If there is no function definition in the reference file, the function in the dynamically executable file and the function in the shared library are linked.

Japanese Unexamined Patent Publication No. 10-247143 Japanese Unexamined Patent Publication No. 2010-218334 Japanese Patent Publication No. 2004-530184

Here, in order to realize the technique according to Patent Document 3, when a reference file in which the definition of the link destination of the function to be modified is described by a mathematical formula is read, the mathematical formula in the reference file is analyzed and dynamically linked. An implementation that performs editing processing is required. Therefore, in Patent Document 3, it is necessary to add the analysis process of the reference file to the existing dynamic link editing process. Further, the technique according to Patent Document 2 requires implementation of an update information file creation process and an update information file analysis process, and an update information file analysis process must be added to an existing processing system. Therefore, the techniques according to Patent Documents 2 and 3 have a problem that they are difficult to introduce because additions are required to the existing processing in order to dynamically update the program.

This disclosure is made to solve such a problem, and is an information processing device, a load module generation method and a program, and a dynamic program that can easily introduce a mechanism for dynamically updating a program. The purpose is to provide an update system and method.

The information processing apparatus according to the first aspect of the present disclosure is
A reception unit that accepts input from the target module, which is an executable program that includes multiple functions to be executed on the target system.
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. A generation unit that generates a load module by combining the transfer instruction for migrating the process to the first address stored in the first address and the input target module.
Equipped with
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module as the first address in the address holding area is included.
The generator is
The transfer instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the post-update function by a second address to generate the load module.
The second address is
It is a relative address indicating the migration destination of the process in the provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.

The load module generation method according to the second aspect of the present disclosure is
Accepts the input of the target module, which is an executable program containing multiple functions to be executed on the target system.
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. The transfer instruction for migrating the process to the first address stored in the first address and the input target module are combined to generate a load module.
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
When the load module is generated, the transition instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the post-update function by a second address.
The second address is
It is a relative address indicating the migration destination of the process in the provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.

The load module generation program according to the third aspect of the present disclosure is
The process of accepting the input of the target module, which is an executable program containing multiple functions to be executed on the target system,
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. A process of combining the transfer command for migrating the process to the first address stored in the input and the input target module to generate a load module.
Let the computer run
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
In the process of generating the load module, the transition instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
The second address is
It is a relative address indicating the migration destination of the process in the provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.

The program according to the fourth aspect of the present disclosure is
The target module, which is an executable program containing multiple functions to be executed on the target system,
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system.
An address holding area for holding a first address corresponding to the updated function on the memory, and an address holding area.
This migration instruction that stores the first address held in the address holding area in a register of the target system and shifts processing to the address stored in the register, and
Are combined,
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
The transition order is
It is placed at a position separated from the start address of the update target function in the target module corresponding to the updated function by a second address.
The second address is
It is a relative address indicating the migration destination of the process in the provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.

The dynamic program update system according to the fifth aspect of the present disclosure is
Equipped with an information processing device and a target system,
The target system is
An update that includes an updated function that updates one of the plurality of functions when applying a patch to the target module, which is an executable program containing a plurality of functions, and the target module being executed in the target system. An embedded loader that loads the rear module into the memory of the target system, an address holding area for holding the first address corresponding to the updated function on the memory, and the first address held in the address holding area. The load module in which the address 1 is stored in the register of the target system and the transfer instruction for migrating the process to the address stored in the register is combined with the load module is loaded into the memory.
Execute the target module in the load module,
The transition order is
In the load module, it is arranged at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
The information processing device is
After accepting the input of the updated module,
Generate a temporary migration instruction to migrate the process using the second address as the relative address of the migration destination.
In order to generate the patch application request, the updated module and the provisional migration instruction are transferred to the target system in which the target module is running.
The built-in loader loaded in the memory
After the target system receives the updated module and the provisional migration instruction, the patch application request is detected.
The start address on the memory of the updated function when the received updated module is loaded is stored in the address holding area as the first address.
The target system is
The provisional transition instruction is inserted into the start address of the update target function on the memory.

The dynamic program update method according to the sixth aspect of the present disclosure is
In the target system
An update that includes an updated function that updates one of the plurality of functions when applying a patch to the target module, which is an executable program containing a plurality of functions, and the target module being executed in the target system. An embedded loader that loads the rear module into the memory of the target system, an address holding area for holding the first address corresponding to the updated function on the memory, and the first address held in the address holding area. The load module in which the address 1 is stored in the register of the target system and the transfer instruction for migrating the process to the address stored in the register is combined with the load module is loaded into the memory.
Execute the target module in the load module,
The transition order is
In the load module, it is arranged at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
In information processing equipment
After accepting the input of the updated module,
Generate a temporary migration instruction to migrate the process using the second address as the relative address of the migration destination.
In order to generate the patch application request, the updated module and the provisional migration instruction are transferred to the target system in which the target module is running.
In the built-in loader loaded in the memory
After the target system receives the updated module and the provisional migration instruction, the patch application request is detected.
The start address on the memory of the updated function when the received updated module is loaded is stored in the address holding area as the first address.
In the target system
The provisional transition instruction is inserted into the start address of the update target function on the memory.

The information processing apparatus according to the seventh aspect of the present disclosure is
A memory that stores a load module in which a target module, which is an executable program containing multiple functions, an embedded loader, an address holding area, and this migration instruction are combined,
A processor that executes the target module stored in the memory, and
Equipped with
The built-in loader is
When the processor applies a patch to the target module being executed, the updated module including the updated function that updates any of the plurality of functions is loaded into the memory.
The address holding area is
It is an area for holding the first address corresponding to the updated function on the memory.
The transition order is
It is an instruction to store the first address held in the address holding area in the register of the processor and shift the processing to the address stored in the register.
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
The transition order is
It is placed at a position separated from the start address of the update target function in the target module corresponding to the updated function by a second address.
The second address is
It is a relative address indicating the migration destination of the process in the provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.

The dynamic program update method according to the eighth aspect of the present disclosure is
A load module in which a target module, which is an execution-type program including a plurality of functions, an embedded loader, an address holding area, and this migration instruction are combined, is loaded into the memory of the information processing apparatus.
Execute the target module in the load module,
The built-in loader loaded in the memory
After receiving the updated module including the updated function that updated any of the plurality of functions and the temporary migration instruction, the request for patch application of the updated module to the target module is detected.
The received updated module is loaded into the memory, and the module is loaded into the memory.
The start address in the memory of the updated function is stored in the address holding area as the first address.
The processor
The provisional transition instruction is inserted into the start address of the update target function in the target module corresponding to the updated function on the memory.
The transition order is
It is an instruction to store the first address held in the address holding area in the register of the processor and shift the processing to the address stored in the register.
In the load module, it is located at a position separated from the start address of the function to be updated by a second address.
The provisional transition instruction is
It is an instruction to transfer the process by using the second address as the relative address of the transfer destination.

INDUSTRIAL APPLICABILITY According to the present disclosure, it is possible to provide an information processing apparatus, a load module generation method and a program, and a dynamic program update system and a method capable of easily introducing a mechanism for dynamically updating a program.

It is a block diagram which shows the structure of the information processing apparatus which concerns on Embodiment 1. It is a flowchart for demonstrating the flow of the load module generation method which concerns on Embodiment 1. It is a block diagram which shows the structure of the dynamic program update system which concerns on Embodiment 2. It is a sequence diagram for demonstrating the flow from generation to execution of the first load module which concerns on Embodiment 2. It is a flowchart for demonstrating the flow of the generation process of the first load module which concerns on Embodiment 2. It is a figure explaining the concept of generation and breakdown of the load module which concerns on Embodiment 2. It is a sequence diagram for demonstrating the flow from generation to application of a patch which concerns on Embodiment 2. FIG. It is a flowchart for demonstrating the flow of the patch generation process which concerns on Embodiment 2. It is a figure explaining the concept of the generation and breakdown of the patch which concerns on Embodiment 2. It is a flowchart for demonstrating the flow of the patch application process in the embedded loader which concerns on Embodiment 2. It is a figure explaining the concept of the memory contents at the time of applying a patch which concerns on Embodiment 2. FIG. It is a block diagram which shows the structure of the dynamic program update system which concerns on Embodiment 3. It is a sequence diagram for demonstrating the flow from generation to execution of the patch-applied load module which concerns on Embodiment 3. It is a flowchart for demonstrating the flow of the patch generation process and the patch-applied load module generation process which concerns on Embodiment 3. It is a block diagram which shows the structure of the information processing apparatus 3 which concerns on this Embodiment 4. It is a flowchart for demonstrating the flow of the dynamic program update method which concerns on Embodiment 4.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In each drawing, the same or corresponding elements are designated by the same reference numerals, and duplicate explanations are omitted as necessary for the sake of clarity of explanation.

<Embodiment 1>
FIG. 1 is a block diagram showing a configuration of an information processing apparatus 1 according to the first embodiment. The information processing device 1 is a computer system that generates a load module 13 including a target module 131, which is an execution-type program including a plurality of functions to be executed by the target system (not shown). Therefore, the information processing device 1 can also be called a load module generation device. The information processing device 1 may be realized by a plurality of computers. The target system may be an information processing device such as a computer server or an embedded device equipped with a processor and a memory.

The information processing device 1 includes a reception unit 11 and a generation unit 12. The reception unit 11 receives the input of the target module 131. Here, the target module 131 is a machine language object file compiled from a source file. The source file is a computer program in which the processing of software executed on the target system is implemented. The software executed on the target system may be an OS (Operating System), middleware, applications, drivers, various control programs, and the like. The source file includes a plurality of functions and is described in a procedural language such as C language, but is not limited to this. Further, the source file may be a set of a plurality of files described in units of an arbitrary number of functions. Therefore, the target module 131 may be a set of a plurality of object files. Further, the information processing apparatus 1 may generate a target module 131 by performing a source file creation process, compilation, or the like according to a user's operation.

Further, the target module 131 is stored in a storage device (not shown) inside or outside the information processing device 1. Therefore, the reception unit 11 receives the target module 131 as an input by reading the target module 131 from the storage device based on the user's instruction or the like.

The generation unit 12 generates the load module 13 by combining the embedded loader 132, which will be described later, the address holding area 133, the transition instruction 134, and the input target module 131. Here, when the embedded loader 132 applies a patch to a target module that is already being executed in the target system, the embedded loader 132 uses the updated module including the updated function that updates any of the plurality of functions of the target system. A program module that loads into memory. That is, the "target module already being executed in the target system" is a module of a version earlier than the target module 131. Therefore, the built-in loader 132 is an object file such as a function implemented in a programming language, like the target module 131. The updated function is a function program in which any of the plurality of functions included in the target module 131 is updated. The updated function is, for example, a program module in which bugs of existing functions have been fixed or specifications have been changed. Then, the updated function is provided to the target system when the patch is applied to the target module 131. The updated function may be provided, for example, as a dynamically linked library. Further, the dynamic link library may include a plurality of post-update functions.

Further, the address holding area 133 is a storage area for holding the first address corresponding to the updated function on the memory of the target system. Further, the address holding area 133 is information defining a plurality of storage areas corresponding to each of the plurality of functions included in the target module 131. Here, the address holding area 133 is a program module in which a plurality of storage areas for holding a plurality of address values as data are defined. Further, the address holding area 133 is, for example, an array of a predetermined size, a structure in which a plurality of variables are defined, and is an object file of a function, a structure, or the like implemented in the same programming language as the target module 131. ..

This transfer instruction 134 is a program in which a process of storing the first address held in the address holding area 133 in a register of the target system and transferring the process to the first address stored in the register is implemented. It is a module. Further, the transition instruction 134 is a set of a plurality of instruction groups corresponding to each of the plurality of functions included in the target module 131. The transition instruction 134 includes, for example, at least the following first instruction and second instruction for each instruction group. Here, the first instruction is an instruction to store the address value of the storage area corresponding to the designated function in the register in the address holding area 133. Further, the second instruction is a transition instruction in which the register value stored by the first instruction is designated as the transfer destination of the process. For example, the second instruction is a jump instruction using the register indirect addressing method. Therefore, the transition instruction 134 is an object file such as a function including at least the first instruction and the second instruction implemented in the same programming language as the target module 131.

Here, the above-mentioned embedded loader 132 is further implemented including the following first process. The first process is an address holding area with the start address in the memory of the updated function in the updated module loaded in the memory (while the target module 131 is running on the target system) as the first address. It is a process to be stored in 133. At this time, in the address holding area 133, the first address is stored in the storage area corresponding to the update target function in the target module corresponding to the updated function.

Further, the generation unit 12 generates the load module 13 by arranging the transition instruction 134 at a position separated from the start address of the update target function in the target module corresponding to the post-update function by the second address. Here, the second address is a relative address indicating the transfer destination of the process in the temporary transfer instruction. The temporary migration instruction is an instruction inserted at the start address of the update target function in the memory of the target system when the patch is applied. That is, the provisional transition instruction is an instruction to transfer the processing to the main transition instruction 134 corresponding to the post-update function or the update target function, and is realized by one instruction. For example, the provisional transition instruction is a jump instruction in which the relative address of the corresponding transition instruction 134 is designated as the destination.

FIG. 2 is a flowchart for explaining the flow of the load module generation method according to the first embodiment. First, the reception unit 11 receives the input of the target module 131, which is an execution-type program including a plurality of functions to be executed by the target system (S11). Next, the generation unit 12 combines the embedded loader 132, the address holding area 133, the transition instruction 134, and the target module 131 to generate the load module 13 (S12).

After that, the generated load module 13 is loaded into the memory in the target system, and the processor of the target system executes the target module 131 in the load module 13 to function as an application. Then, it is assumed that a request for patch application occurs for the updated module including the updated function in which any of the plurality of functions is updated during the execution of the target module 131. In this case, the embedded loader 132 already loaded in the memory of the target system detects the patch application request and appropriately loads the updated module into the memory. Then, the embedded loader 132 stores the start address of the updated function on the memory determined at that time in the storage area corresponding to the updated function in the address holding area 133 which is also loaded in the memory. Subsequently, the target system inserts a temporary transition instruction at the start address of the update target function in the target module 131 corresponding to the updated function. Here, the provisional transition instruction to be inserted is, as described above, an instruction to transfer the processing to the transition instruction 134 corresponding to the post-update function or the update target function. As a result, the patch has been applied.

Therefore, thereafter, when the update target function corresponding to the updated function is called during the execution of the target module 131, the temporary transfer instruction of the start address is executed and the transition to the present transfer instruction is performed. Then, by executing this transition instruction, the absolute address stored in the storage area in the address holding area 133 corresponding to the post-update function or the update target function is stored in the register, and the migration instruction addressed to the stored value of the register. Is executed, the transition to the updated function is executed, and the processing of the updated function is executed. In this way, post-patch processing is realized.

From the above, according to the present embodiment, it is possible to update the software running on the target system without the need to stop or restart the operation of the target system. At this time, since the software is updated by applying the patch to the minimum necessary function, the influence on the function not to be changed can be minimized and the test man-hours can be suppressed.

In particular, in the above-mentioned Patent Document 3, it is complicated to create a reference file that describes the logic of the link destination for each function to be updated. Moreover, the reference file is not versatile. On the other hand, in the present embodiment, the arrangement of the main migration instruction, the provisional migration instruction, and the address holding area in the load module is determined for each target module, and the processing contents of the embedded loader 132 are different among the different load modules. It is common. Therefore, the cost of creating patch data can be reduced.

In the present embodiment, the embedded loader 132, the address holding area 133, and the transition instruction 134 are combined with the target module 131, which is the software to be executed, and provided as one load module 13. Therefore, when the target module 131 is loaded and executed, the embedded loader 132 and the like in the same load module 13 are also loaded on the memory. Therefore, when a patch application request occurs during execution of the target module 131, the embedded loader 132 can detect the patch application request. Then, the built-in loader 132 can dynamically load the updated function and set the absolute address of the updated function in the memory. Then, as described above, the provisional migration instruction to this migration instruction (loaded in the same load module 13) corresponding to the post-update function is inserted into the start address of the function before update, so that the function before update is inserted. When the function is called, the process can be transferred to the updated function.

Normally, when performing dynamic patch application processing, it is necessary to perform dynamic link processing of the post-update function by an existing processing system such as an OS that processes the target load module. On the other hand, in the present embodiment, dynamic patch application processing can be realized by the embedded loader 132 or the like in the target load module. Therefore, it is not necessary to add to the existing processing system. Therefore, a mechanism for dynamically updating the program can be easily introduced.

<Embodiment 2>
The second embodiment is a concrete and improved version of the first embodiment described above.
Here, as a problem to be solved by this embodiment, other aspects will be described in addition to the above-mentioned problems. In the above-mentioned technique according to Patent Document 2, in the dynamic patch application process, the start address of the post-update function is written in the control transfer destination in the pre-update function. At the same time, a control transition instruction (jump instruction) addressed to the address value of the control transition destination is written to the start address of the pre-update function. As described above, in Patent Document 2, a jump instruction by the direct addressing method or the memory indirect addressing method is inserted into the start address of the pre-update function. Here, the address size that can be specified by direct addressing or memory indirect addressing is constrained by the architecture of the processor. For example, the upper limit of the address size that can be specified may be 128 MB. On the other hand, when the updated function to be patched is loaded into memory by dynamic link processing, it is usually allocated from the last area of memory. Therefore, it is highly possible that the absolute address in the memory of the post-update function is 128 MB or more away from the start address of the corresponding pre-update function. Therefore, the technique according to Patent Document 2 may not be applicable depending on the type of processor, and has a problem that it depends on the limitation of the architecture of the processor.

Therefore, it is conceivable to insert a jump instruction by the register indirect addressing method at the start address of the pre-update function. However, in order to realize the jump instruction by the register indirect addressing method, it is necessary to insert at least the first instruction and the second instruction as in the above-mentioned main transition instruction. Here, the first instruction is an instruction for storing the real address of the jump destination in a register, and the second instruction is a jump instruction in which the stored value of the register is designated as the jump destination. That is, it is necessary to insert (write) multiple instructions at the start address of the pre-update function. However, writing multiple instructions at the beginning of the pre-update function requires multiple clocks, which takes time. Therefore, while the writing of the plurality of instructions is being executed, there is a possibility that the other threads will be affected by the multithread processing or the like, or the other threads will be affected. Therefore, there is a large risk as a dynamic patch application process for updating software without interruption, and it is not possible to write multiple instructions at the beginning of the pre-update function.

Therefore, in the present embodiment, the jump instruction from the pre-update function to the post-update function has two stages. That is, in the first jump instruction (temporary transition instruction), a jump is made by one instruction to the relative address (of this transition instruction), and only the start address of the function to be updated is rewritten to eliminate the influence on other threads. .. Then, at the first jump destination, the jump process (this transition instruction) by register indirect addressing is executed. At this time, the distance (address size) between the start address of the function to be updated and the start address of this migration instruction corresponding to the function is within the range of the restrictions of the processor architecture, for example, 128 MB or less. Is.

That is, the size of the second address according to the present embodiment is within the upper limit of the addressing size of the processor of the target system. This makes it possible to realize dynamic patch application processing without depending on the constraints of the processor architecture.

Further, the receiving unit may further accept the input of the updated module, and the generating unit may generate the temporary transfer instruction for transferring the process to the second address. In this case, the information processing apparatus provides a transfer unit that transfers the updated module and the provisional transition command to the target system in which the target module is running in order to generate the patch application request. Further prepare. As a result, it is possible to provide a patch and a temporary migration instruction for dynamically applying a patch to the target system in which the target module is loaded and executed in the memory.

Furthermore, when the embedded loader detects a patch application request, it loads the transferred updated module into memory, acquires the absolute address in memory that is the start address of the updated function, and acquires the absolute address. It may include a process of storing the address as the first address in the address holding area. This makes it possible to streamline the processing of the embedded loader.

Further, the generation unit further generates a patch list that defines the correspondence between the update function and the provisional transition instruction, and the transfer unit transfers the patch list together with the update module and the provisional transition instruction. You should do it. Then, when the built-in loader detects the patch application request, the embedded loader may start loading the updated module into the memory based on the transferred patch list. As a result, it is possible to reliably apply the patch and the provisional migration instruction to the target module based on the patch list for the target system in which the target module is loaded in the memory and is being executed.

FIG. 3 is a block diagram showing a configuration of the dynamic program update system 1000 according to the second embodiment. In the dynamic program update system 1000, the load module generation device 100 and the target system 200 are connected to each other via the network N. Here, the network N is a communication network such as a wired or wireless communication line. The network N may be simply a wired communication cable.

The load module generation device 100 is an example of the above-mentioned information processing device 1. The load module generation device 100 includes a storage device 110, a processor 120, a memory 130, and a communication unit 140. The storage device 110 is a non-volatile storage device such as a hard disk or a flash memory. The storage device 110 stores the object module 111, the embedded loader 112, the transition instruction group 113, the address holding area group 114, the load module generation program 115, and the load module 116. The object module 111 is an example of the target module 131 described above. Further, the object module 111 may be a set of a plurality of object files corresponding to a plurality of functions.

The built-in loader 112 is an example of the above-mentioned built-in loader 132. First, the embedded loader 112 monitors the event of the patch application request generated by the OS or other programs. The embedded loader 112 includes the following processing as the first processing described above. The first process includes, first, a process of loading the updated module transferred to the target system 200 by the transfer unit 123 into the memory 230 (of the target system 200) when the patch application request is detected. Further, the first process includes a process of acquiring an absolute address on the memory 230, which is the start address of the updated function. Further, the first process includes a process of storing the acquired absolute address as the first address in the address holding area. Further, the embedded loader 112 applies a patch based on the patch list transferred to the target system 200 by the transfer unit 123 when the patch application request in the target system 200 is detected.

The transition instruction group 113 is a program module in which a plurality of JUMP functions (this transition instruction) corresponding to each of the plurality of functions included in the object module 111 are defined as a table. Each of the transition instructions in the transition instruction group 113 is an example of the above-mentioned transition instruction 134. The transition instruction group 113 can also be called a JUMP function table.

The address holding area group 114 is a program module in which a plurality of storage areas (address holding areas) corresponding to each of the plurality of functions included in the object module 111 are defined as a table. Each address holding area in the address holding area group 114 is an example of the above-mentioned address holding area 133. The address holding area group 114 can also be called an indirect JUMP table.

The load module generation program 115 is a computer program in which the patch generation process and the patch transfer process according to the present embodiment are implemented.

The load module 116 is an example of the load module 13 described above, and is a module in which the object module 111, the built-in loader 112, the transition instruction group 113, and the address holding area group 114 are combined by the generation unit 122 described later. be.

The memory 130 is a volatile storage device such as a RAM (Random Access Memory). The communication unit 140 is an interface for communicating between the load module generation device 100 and the outside including the target system 200 via the network N. For example, the communication unit 140 transmits a load module, patch data, and the like to the target system 200 via the network N in response to an instruction from the processor 120. Further, the communication unit 140 outputs various data received from the target system 200 to the processor 120 via the network N.

The processor 120 is a control device such as a CPU (Central Processing Unit) and an MPU (Micro Processing Unit). The processor 120 loads the load module generation program 115 from the storage device 110 into the memory 130 and executes it. As a result, the processor 120 realizes the functions of the reception unit 121, the generation unit 122, and the transfer unit 123.

The reception unit 121 is an example of the reception unit 11 described above, and further receives a program module (updated module) including an updated function that updates any of a plurality of functions in the object module 111. The updated module may include two or more functions in one object module, or may be a plurality of object modules.

The load module generation device 100 may create a modified source file of the function to be updated among the source files of the object module 111 according to the operation of the user. Further, the load module generation device 100 may compile the source file or the like to generate an object module of the updated function.

The generation unit 122 is an example of the above-mentioned generation unit 12. In particular, the generation unit 122 arranges the transition instruction group 113 at a position corresponding to a second address within the upper limit of the addressing size of the processor 220 of the target system 200 from the start address of the update target function in the object module 111. , Generate a load module. In addition, the generation unit 122 generates a jump patch (temporary transfer instruction) that transfers the process to the second address. Here, the temporary transition instruction is a set of jump instructions corresponding to each of the plurality of functions in the object module 111. Each jump instruction of the provisional transition instruction shifts the processing to the relative address (second address) specified by one instruction. Further, the generation unit 122 generates a patch list that defines the correspondence between the updated function and the temporary transition instruction. Since the function name of the post-update function is the same as that of the pre-update function, the patch list can be used for associating the pre-update function with the temporary migration instruction or associating the update target function with the temporary migration instruction. It is synonymous.

In order to generate a patch application request, the transfer unit 123 transfers the updated module and the temporary migration instruction to the target system 200 in which the target module in the load module 212 is running, including the updated module and the temporary migration instruction. Here, "to generate a patch application request" may include, for example, an instruction to generate a patch application request in the forwarding message. Alternatively, "to generate a patch application request" may mean that a patch application request is generated by an existing processing system in the target system 200 in accordance with the transfer message. Further, the transfer unit 123 transfers the patch list together with the updated module and the temporary migration instruction.

The target system 200 is an information processing device such as a computer server or an embedded device. The target system 200 includes a storage device 210, a processor 220, a memory 230, and a communication unit 240. The storage device 210 is a non-volatile storage device such as a hard disk or a flash memory. The storage device 210 stores the OS 211 and the load module 212. OS211 is an example of a known processing system in which dynamic link processing and the like are implemented. The load module 212 is an example of the load module 13 described above, and is a (first) load module before patch application generated by the load module generator 100.

The memory 230 is a volatile storage device such as a RAM. The communication unit 240 is an interface for communicating between the target system 200 and the outside including the load module generation device 100 via the network N. For example, the communication unit 240 outputs the load module, patch data, etc. received from the load module generation device 100 via the network N to the processor 220. Further, the communication unit 240 transmits various data to the load module generation device 100 via the network N in response to an instruction from the processor 220.

The processor 220 is a control device such as a CPU and an MPU. The processor 220 loads the OS 211 and the load module 212 from the storage device 210 into the memory 230 and executes them. As a result, the processor 220 realizes the functions of the module processing unit 221, the target application 222, and the embedded loader 223.

The module processing unit 221 is a processing system realized by the OS 211, and controls communication processing via the communication unit 240, loading of the load module 212 into the memory 230, and the like. Further, the module processing unit 221 includes a process of inserting the temporary transition instruction transferred to the target system 200 by the transfer unit 123 into the start address of the update target function in the target module corresponding to the updated function. The target application 222 is an application realized by the object module 111 in the load module 212. The built-in loader 223 is realized by the built-in loader 112 in the load module 212.

FIG. 4 is a sequence diagram for explaining a flow from generation to execution of the initial load module according to the second embodiment. Here, a case where the target module is not installed in the target system 200 will be described as an example, and the module loaded at that time will be referred to as an initial load module. However, it goes without saying that this embodiment can be applied when generating a module in a load other than the first time.

First, the load module generation device 100 generates the initial load module (S101). FIG. 5 is a flowchart for explaining the flow of the generation process of the initial load module according to the second embodiment. First, the load module generation device 100 generates the object module 111 (S111). For example, the reception unit 121 accepts the input of the program code corresponding to the application to be executed by the target system 200 in response to the user's operation, and the generation unit 122 generates the source file. Then, the generation unit 122 compiles the generated source file or the like to generate the object module 111, and stores the object module 111 in the storage device 110. The object module 111 may be generated outside the load module generation device 100, and the reception unit 121 may receive the input of the object module 111 from the outside. Further, it is assumed that the embedded loader 112, the transition instruction group 113, and the address holding area group 114 are stored in the storage device 110 in advance. However, the embedded loader 112 or the like may be generated outside the load module generation device 100, and the reception unit 121 may receive input from the embedded loader 112 or the like from the outside.

Next, the load module generation device 100 generates a load module (S112). Specifically, first, the reception unit 121 reads out the object module 111, the built-in loader 112, the transition instruction group 113, and the address holding area group 114 from the storage device 110. Then, the generation unit 122 combines the object module 111, the built-in loader 112, the transition instruction group 113, and the address holding area group 114 to generate the load module. At this time, the generation unit 122 specifies each transfer instruction in the transfer instruction group 113 corresponding to each of the plurality of functions included in the object module 111. Then, the generation unit 122 arranges the transition instruction group 113 in the load module so that the distance (relative address) on the address between each function and the corresponding transition instruction is within the upper limit of the addressing size of the processor 220. do. Then, the load module generation device 100 outputs, that is, stores the generated load module 116 in the storage device 110 (S113). Here, the generated load module 116 is referred to as an initial load module (LM).

Returning to FIG. 4, the explanation will be continued. The load module generation device 100 transfers the initial load module to the target system 200 (S102). Specifically, the transfer unit 123 reads the initial load module from the storage device 110, and transfers the initial load module to the target system 200 via the network N using the communication unit 140.

The target system 200 receives the initial load module via the network N and stores it in the storage device 210 as the load module 212. After that, the target system 200 loads the initial load module into the memory 230 (S103). For example, the module processing unit 221 may load according to an instruction to start the initial load module from the load module generation device 100 or an instruction from the user. Alternatively, the module processing unit 221 may load according to the reception of the initial load module. At this time, the module processing unit 221 reads the load module 212 from the storage device 210 and loads it into the memory 230. Then, the target system 200 executes the initial load module (S104). Specifically, the module processing unit 221 starts executing the main function in the object module 111 among the load modules 212 in the memory 230. Therefore, the processor 220 functions as the target application 222. In this way, the initial load module is generated in the load module generator 100 and executed in the target system 200. At the same time, the processor 220 executes the embedded loader 223. As a result, the embedded loader 223 starts monitoring the event of the patch application request.

FIG. 6 is a diagram illustrating the concept of generation and breakdown of the load module according to the second embodiment. First, the object modules 111a, 111b and 111c correspond to each of the three functions in the object module 111, and are, for example, an example of the object file generated in step S111. Further, the LM generation tool 1221 is an example of the generation unit 122. The object modules 111a to 111c, the built-in loader 112, the transition instruction group 113, and the address holding area group 114 are input to the LM generation tool 1221. Then, the LM generation tool 1221 combines these as described above and outputs them as the load module 116.

Here, the load modules 116 are arranged in the order of “aaa.o”, “bbb.o”, and “ccc.o” corresponding to the object modules 111a to 111c, for example. Then, "aaa.o" includes a plurality of functions "func_a1", "func_a2", and "func_a3", and indicates that they are arranged in this order. Further, in the load module 116, the built-in loader 112, the transition instruction group 113, and the address holding area group 114 are arranged after the object module 111a and the like. Here, the transition instructions 113a to 113c are included in the transition instruction group 113, and the address retention region group 114 includes the address retention regions 114a to 114c. Then, it is assumed that the function "func_a1" corresponds to the transfer instruction 113a, the function "func_a2" corresponds to the transfer instruction 113b, and the function "func_a3" corresponds to the transfer instruction 113c. Further, it is assumed that the address distance d between the function “func_a1” and the transfer instruction 113a is within the range of the architectural constraint of the processor 220, for example, 128 MB or less. Further, it is assumed that the function “func_a1” corresponds to the address holding area 114a, the function “func_a2” corresponds to the address holding area 114b, and the function “func_a3” corresponds to the address holding area 114c.

The register group 2201 is a temporary storage area in the processor 220 of the target system 200. Then, it is assumed that the register group 2201 includes a plurality of registers 2201a to 2201c corresponding to each of the functions "func_a1" to "func_a3". That is, the transition instruction 113a, the register 2201a, and the address holding area 114a correspond to each other. Similarly, the transition instruction 113b, the register 2201b, and the address holding area 114b correspond to each other. Further, the transition instruction 113c, the register 2201c, and the address holding area 114c correspond to each other. Then, for example, the first instruction of the transition instruction 113a is an instruction to store the address stored in the address holding area 114a in the register 2201a. The second instruction of the transition instruction 113a is a jump instruction with the register value (address) stored in the register 2201a as the jump destination. The same applies to the transition instructions 113b and 113c.

FIG. 7 is a sequence diagram for explaining a flow from generation to application of the patch according to the second embodiment. Here, it is assumed that some functions of the target application 222 running on the target system 200 are modified. That is, a case where a part of the function included in the object module 111 in the load module 212 is updated and the patch is applied without stopping the execution of the target application 222 will be described. Therefore, the module processing unit 221 is executing the initial load module (S120). That is, the target application 222 is being executed, and the embedded loader 223 is monitoring the event of the patch application request.

Then, the load module generation device 100 generates a patch (S121). FIG. 8 is a flowchart for explaining the flow of the patch generation process according to the second embodiment. First, the load module generation device 100 generates an object module of the updated function (S131). For example, the reception unit 121 accepts the input of the program code for updating some functions in the object module 111 in response to the user's operation, and the generation unit 122 edits the source file before the update. Generate the updated source file. Then, the generation unit 122 compiles the generated updated source file, generates an object module of the updated function, and stores the object module in the storage device 110. The object module of the updated function may be generated outside the load module generation device 100, and the reception unit 121 may accept the input of the object module of the updated function from the outside.

Next, the load module generation device 100 generates a temporary transition instruction (S132). For example, the reception unit 121 accepts the input of the code of the jump instruction specifying the relative address according to the operation of the user, and reads the object module of the updated function from the storage device 110. The generation unit 122 generates a temporary transition instruction based on the object module of the updated function and the input jump instruction code. At this time, the generation unit 122 analyzes the object module 111 and specifies the relative address of the transition instruction corresponding to the updated function. Then, the generation unit 122 generates the code of the jump instruction with the specified relative address as the jump destination as the temporary transition instruction. The provisional transition instruction shall include a plurality of jump instructions corresponding to each of the functions to be updated.

Subsequently, the load module generation device 100 collectively generates an object module of a plurality of updated functions to generate a patch DLL (Dynamic Link Library) (S133). As the DLL generation method, a known method can be applied. Then, the load module generation device 100 generates a patch list (S134). That is, the generation unit 122 generates a file that defines the correspondence between the updated function and the temporary transition instruction (jump instruction) corresponding to the function. After that, the load module generation device 100 collectively outputs the generated temporary migration instruction, patch DLL, and patch list as patch data (S135). For example, the generation unit 122 stores the patch data in the storage device 110.

FIG. 9 is a diagram illustrating the concept of patch generation and breakdown according to the second embodiment. First, the updated object module 117 is an example of the object module of the updated function generated in step S131. It is assumed that the updated object module 117 is, for example, an object module in which some functions "func_a1" and "func_a3" in the above-mentioned object module 111a have been updated in a predetermined manner. The updated object module 117 and load module 116 are input to the LM generation tool 1221. Then, the LM generation tool 1221 uses these to generate and output the temporary transition instruction 1181, the patch DLL1182, and the patch list 1183 as described above.

The temporary transition instruction 1181 includes, for example, jump instructions (object modules) “s_001.jp” and “s_003.jp”. The jump instruction "s_001.jp" is, for example, one jump instruction in which the relative address between the start address of "func_a1" in the load module 116 and the start address of the main transition instruction 113a is designated as the jump destination. Further, the jump instruction "s_003.jp" is, for example, one jump instruction in which the relative address between the start address of "func_a3" in the load module 116 and the start address of the main transition instruction 113c is specified as the jump destination. ..

The patch DLL1182 is a DLL file "aaa2.so.I" generated from the updated object module 117. The patch list 1183 shows that the target of the patch is the DLL file "aaa2.so.I", the function "func_a1" to be updated is associated with the jump instruction "s_001.jp", and the function "func_a3" to be updated. This file defines the correspondence with the jump command "s_003.jp". The format of the patch list 1183 is merely an example, and the format is not limited to this.

Returning to FIG. 7, the explanation will be continued. The load module generation device 100 transfers the generated patch data to the target system 200 (S122). Specifically, the transfer unit 123 reads the patch data from the storage device 110 and transfers the patch data to the target system 200 via the network N using the communication unit 140. At this time, the load module generation device 100 may transmit a patch application instruction together with the patch data.

The module processing unit 221 of the target system 200 receives the patch data via the network N, and stores the patch data, that is, the temporary migration instruction, the patch DLL, and the patch list in the storage device 210 (S123). After that, the module processing unit 221 generates a patch application request event (S124). For example, the module processing unit 221 may generate a patch application request event in response to a patch application instruction from the load module generation device 100 or an instruction from the user. Alternatively, the module processing unit 221 may generate a patch application request event in response to the reception of patch data.

Then, the embedded loader 223 detects the event of the patch application request and loads the patch DLL or the like (S125). FIG. 10 is a flowchart for explaining the flow of the patch application process in the embedded loader according to the second embodiment. First, as described above, the embedded loader 223 detects the event of the patch application request (S141). Next, the embedded loader 223 loads the patch DLL1182 into the memory 230 (S142). Specifically, the embedded loader 223 reads the DLL file "aaa2.so.I" from the storage device 210 and loads it into the memory 230 based on the patch list 1183. As a result, the absolute address on the memory 230 of each updated function in the patch DLL1182 is determined. Then, the embedded loader 223 acquires the absolute address of the patch DLL1182 (S143). For example, the built-in loader 223 searches for each post-update function in the memory 230 and specifies the start address of each post-update function. Then, the embedded loader 223 sets the absolute address of each function of the acquired patch DLL1182 in the area corresponding to the function to be updated in the address holding area group 114 (S144).

Returning to FIG. 7, the explanation will be continued. After that, the embedded loader 223 notifies the module processing unit 221 that the processing of step S125 is completed after step S125 (S126). The module processing unit 221 inserts the temporary migration instruction 1181 corresponding to the function to be updated into the start address of the corresponding pre-update function in response to the notification from the embedded loader 223 (S127). For example, the module processing unit 221 inserts the code of the associated temporary transition instruction into the start address of the pre-update function corresponding to the function name to be updated based on the patch list 1183. At this time, the module processing unit 221 may insert a temporary transition instruction by using, for example, the ptrace system call. The module processing unit 221 executes the function after applying the patch (S128). Specifically, the module processing unit 221 executes a jump instruction (temporary transition instruction) of the start address of the function before the update, and is in the patch DLL (after the update) via the JUMP function (this transition instruction). Execute the function.

FIG. 11 is a diagram illustrating a concept of memory contents at the time of patch application according to the second embodiment. First, it is shown that the patch DLL1182 is loaded into the memory 230 by step S142, so that the absolute addresses of the updated functions “func_a1” and “func_a3” are fixed. Here, it is shown that the absolute address on the memory 230 of the updated function “func_a1” is “0xffff ff00”, and the absolute address on the memory 230 of the updated function “func_a3” is “0xffff ffa0”. Then, it is shown by steps S143 and S144 that the absolute addresses of the updated functions "func_a1" and "func_a3" are set in the corresponding address holding areas 114a and 114c, respectively. Further, in step S127, the jump instruction "s_001.jp" to the transition instruction 113a is inserted into the start address of the pre-update function "func_a1", and the jump instruction "s_003.jp" to the transition instruction 113c is the pre-update function. Indicates that it was inserted at the start address of "func_a3".

After that, in step S128, for example, when the pre-update function "func_a1" is called, the process shifts to the transition instruction 113a by the jump instruction "s_001.jp" of the start address. Then, by executing the first instruction of the transition instruction 113a, the address “0xffff ff00” of the corresponding address holding area 114a is stored in the register 2201a. Subsequently, by executing the second instruction of the transition instruction 113a, a jump instruction with the register value "0xffff ff00" of the corresponding register 2201a as the jump destination is executed. As a result, the process shifts to the absolute address “0xffff ff00” on the memory 230. Then, the post-update function "func_a1" loaded at the absolute address "0xffff ff00" is executed (instead of the pre-update function "func_a1"). When the pre-update function "func_a3" is called, the process shifts to the absolute address "0xffff ffa0" on the memory 230 by the same process. Then, the post-update function "func_a3" loaded at the absolute address "0xffff ffa0" is executed (instead of the pre-update function "func_a3").

As described above, according to this embodiment, dynamic patch application processing can be realized without depending on the restrictions of the processor architecture.

<Embodiment 3>
The third embodiment is an improvement of the second embodiment described above. When dynamic patch application is repeated, the object module of the updated function will be accumulated in the memory. On the other hand, although the target system 200 operates without interruption in principle, the system may be restarted at any time, either periodically or irregularly. In that case, after loading the initial load module, all the patches that have been applied so far will be applied again. Therefore, the time required for the target application to become available after restarting becomes long, and the used capacity of the memory 230 may also increase. Therefore, in the present embodiment, the patched load module is generated at the time of patch creation, sent to the target system together with the patch data, and the patched load module can be loaded at the time of system restart. ..

That is, the generation unit according to the present embodiment replaces the update target function with the updated function among the generated load modules to generate the patch-applied load module. After that, the transfer unit transfers the patched load module to the target system in order to load the target system into the memory instead of the load module when the target system is restarted.

Then, the target system according to the present embodiment stores the patch-applied load module received from the load module generation device in the storage device. Then, when the target system is restarted, the patch-applied load module is loaded from the storage device to the memory in place of the load module, and the target module including the updated function in the patch-applied load module is loaded. Run.

In this way, by generating and transmitting the patched load module at the same time as the patch generation, it is possible to start the patched load module at the next startup. Therefore, it is not necessary to apply the patch again. Also, since it is generated at the same time as the patch is generated, it is possible to prevent discrepancies with the patch contents.

FIG. 12 is a block diagram showing a configuration of the dynamic program update system 1000a according to the third embodiment. In the dynamic program update system 1000a, the load module generation device 100 is replaced with the load module generation device 100a as compared with FIG. 3 described above. Here, the load module generation device 100a shows a state after the patch-applied load module generation process according to the present embodiment is executed. Therefore, the object module 111, the built-in loader 112, the transition instruction group 113, and the address holding area group 114 are omitted in the storage device 110 of the load module generation device 100a. Further, the load module generation program 115a implements the patch-applied load module generation processing according to the present embodiment in addition to the processing of the load module generation program 115 described above. Further, the load module 116, the updated object module 117, the temporary transition instruction 1181, the patch DLL1182, and the patch list 1183 are the same as those described in the above-described second embodiment. The patched load module 116a is a load module 116 in which the pre-update function corresponding to the post-update object module 117 is replaced with the post-update function.

The processor 120 loads the load module generation program 115a from the storage device 110 into the memory 130 and executes it. As a result, the processor 120 realizes the functions of the reception unit 121, the generation unit 122a, and the transfer unit 123a. The generation unit 122a replaces the pre-update function corresponding to the post-update object module 117 among the input load modules 116 with the post-update function to generate the patch-applied load module 116a. After that, the transfer unit 123a transfers the patched load module 116a to the target system 200 in order to load the target system 200 into the memory 230 instead of the load module 212 when the target system 200 is restarted.

The module processing unit 221 of the target system 200 overwrites the received patch-applied load module 116a with the load module 212 of the storage device 210. Since the other configurations are the same as those of the second embodiment described above, detailed description thereof will be omitted.

FIG. 13 is a sequence diagram for explaining a flow from generation to execution of the patch-applied load module according to the third embodiment. In the following description, the same processes as those in FIG. 7 described above are designated by the same reference numerals, and the description thereof will be omitted as appropriate.

First, the load module generation device 100a generates a patch and a patch-applied load module (S121a). FIG. 14 is a flowchart for explaining the flow of the patch generation process and the patch-applied load module generation process according to the third embodiment. Since the processes of steps S131 to S135 are the same as those in FIG. 8 described above, the description thereof will be omitted. After step S135, the load module generator 100a generates the patched load module 116a (S136). Specifically, the generation unit 122a reads the load module 116 and the updated object module 117 from the storage device 110, and among the load modules 116, the code of the pre-update function corresponding to the updated object module 117 is the code of the updated object module. Replace with 117. Then, the load module generation device 100a outputs the generated patch-applied load module 116a (S137). For example, the generation unit 122a stores the patched load module 116a in the storage device 110. It should be noted that steps S136 and S137 may be executed after step S133 and before or in parallel with steps S134 and S135.

Returning to FIG. 13, the explanation will be continued. The load module generation device 100a transfers the generated patch data and the patch-applied load module 116a to the target system 200 (S122a). Specifically, the transfer unit 123a reads the patch data and the patch-applied load module 116a from the storage device 110. Then, the transfer unit 123a transfers the patch data and the patch-applied load module 116a to the target system 200 via the network N by using the communication unit 140. At this time, the load module generation device 100a may transmit a patch application instruction and a replacement instruction for the patch-applied load module 116a.

The module processing unit 221 of the target system 200 receives the patch data and the patch-applied load module 116a via the network N, and stores the patch-applied load module 116a together with the patch data in the storage device 210 (S123a). At this time, the module processing unit 221 may overwrite and save the load module 212 by the patch-applied load module 116a. The module processing unit 221 shall save the patched load module 116a in place of the load module 212 at a place where the patched load module 116a is loaded, at least after restarting.

Then, as described above, steps S124 through S128 are executed. Then, it is assumed that the target system 200 has been restarted (S1291). After that, the module processing unit 221 loads the patched load module 116a from the storage device 210 into the memory 230 (S1292). Then, the module processing unit 221 executes the patch-applied load module 116a (S1293). Specifically, the module processing unit 221 starts executing the main function in the object module of the patched load module 116a in the memory 230. At the same time, the embedded loader 223 starts monitoring the event of the patch application request.

As described above, according to the present embodiment, it is not necessary to apply the patch again after restarting the target system, and it is possible to prevent a discrepancy with the patch contents.

<Embodiment 4>
FIG. 15 is a block diagram showing the configuration of the information processing apparatus 3 according to the fourth embodiment. The information processing device 3 is a computer system corresponding to the above-mentioned target system. The information processing device 3 may be a computer server, an embedded device, or the like.

The information processing apparatus 3 includes at least a memory 31 and a processor 32. The memory 31 is a volatile storage device such as a RAM. The memory 31 stores at least the load module 33. The load module 33 is a module in which the target module 331, the built-in loader 332, the address holding area 333, and the transition instruction 334 are combined. Since the load module 33 has the same configuration as the load module 13 described above, detailed description of each internal configuration will be omitted.

The processor 32 has the same configuration as the processor 220 described above. The processor 32 loads the load module 33 from the storage device (not shown) in the information processing device 3 into the memory 31 and executes the load module 33. As a result, the processor 32 realizes the functions of the application corresponding to the target module 331 and the embedded loader 332.

FIG. 16 is a flowchart for explaining the flow of the dynamic program update method according to the fourth embodiment. First, the processor 32 loads the load module 33 into the memory 31 (S41). Next, the processor 32 executes the target module 331 in the load module 33 (S42). At the same time, the processor 32 executes the embedded loader 332. As a result, the embedded loader 332 starts monitoring the event of the patch application request.

Then, the information processing apparatus 3 receives the temporary migration instruction and the updated module from the outside, and then the embedded loader 332 detects the patch application request (S43). Then, the embedded loader 332 loads the received updated module into the memory 31 (S44). Subsequently, the embedded loader 332 stores the start address on the memory 31 of the updated function as the first address in the address holding area 333 (S45). After that, the processor 32 inserts the received temporary transition instruction into the start address of the update target function in the target module 331 on the memory 31 (S46).

Here, the transition instruction 134 is arranged at a position separated from the start address of the update target function in the target module 331 corresponding to the update function by a second address, as in the first embodiment described above. .. Further, the provisional transfer instruction is an instruction to transfer the process by using the second address as the relative address of the transfer destination, as in the first embodiment described above. Therefore, thereafter, when the update target function corresponding to the updated function is called during the execution of the target module 131, the temporary transfer instruction of the start address is executed and the transition to the present transfer instruction is performed. Then, by executing this transition instruction, the absolute address stored in the storage area in the address holding area 133 corresponding to the post-update function or the update target function is stored in the register, and the migration instruction addressed to the stored value of the register. Is executed, the transition to the updated function is executed, and the processing of the updated function is executed. In this way, post-patch processing is realized.

Therefore, even in the fourth embodiment, the same effect as that of the first embodiment described above is obtained.

<Other embodiments>
In the above-described embodiment, the description is made as a hardware configuration, but the present invention is not limited to this. The present disclosure can also be realized by causing the CPU to execute a computer program for arbitrary processing.

In the above example, the program can be stored and supplied to the computer using various types of non-transitory computer readable medium. Non-temporary computer-readable media include various types of tangible storage media. Examples of non-temporary computer-readable media include magnetic recording media (eg, flexible disks, magnetic tapes, hard disk drives), optomagnetic recording media (eg, optomagnetic disks), CD-ROMs (Read Only Memory), CD-Rs. Includes CD-R / W, DVD (Digital Versatile Disc), semiconductor memory (eg, mask ROM, PROM (Programmable ROM), EPROM (Erasable PROM), flash ROM, RAM (Random Access Memory)). The program may also be supplied to the computer by various types of transient computer readable media. Examples of temporary computer readable media include electrical, optical, and electromagnetic waves. The temporary computer-readable medium can supply the program to the computer via a wired communication path such as an electric wire and an optical fiber, or a wireless communication path.

The present disclosure is not limited to the above embodiment, and can be appropriately modified without departing from the spirit. Further, the present disclosure may be carried out by appropriately combining the respective embodiments.

Some or all of the above embodiments may also be described, but not limited to:
(Appendix 1)
A reception unit that accepts input from the target module, which is an executable program that includes multiple functions to be executed on the target system.
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. A generation unit that generates a load module by combining the transfer instruction for migrating the process to the first address stored in the first address and the input target module.
Equipped with
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module as the first address in the address holding area is included.
The generator is
The transfer instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the post-update function by a second address to generate the load module.
The second address is
An information processing device that is a relative address indicating a migration destination of processing in a provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.
(Appendix 2)
The size of the second address is
The information processing apparatus according to Appendix 1, which is within the upper limit of the addressing size of the processor of the target system.
(Appendix 3)
The reception unit further accepts the input of the updated module,
The generator is
Generate the temporary transfer instruction to transfer the process to the second address,
The information processing device is
The following is described in Appendix 1 or 2, further comprising a transfer unit for transferring the updated module and the provisional transition instruction to the target system in which the target module is running in order to generate the patch application request. Information processing device.
(Appendix 4)
The built-in loader is
When the patch application request is detected, the process of loading the transferred updated module into the memory and the process of loading the transferred module into the memory.
The process of acquiring the absolute address in the memory, which is the start address of the function after the update,
The information processing apparatus according to Appendix 3, comprising a process of storing the acquired absolute address as the first address in the address holding area.
(Appendix 5)
The generator is
Further generate a patch list that defines the correspondence between the updated function and the provisional transition instruction.
The transfer unit transfers the patch list together with the updated module and the temporary migration instruction.
The built-in loader is
The information processing apparatus according to Appendix 3 or 4, which starts loading the updated module into the memory based on the transferred patch list when the patch application request is detected.
(Appendix 6)
The generator is
Of the generated load modules, the updated function is replaced with the updated function to generate a patched load module.
The transfer unit transfers the patched load module to the target system in order to load the load module into the memory instead of the load module when the target system is restarted. The information processing device described in the section.
(Appendix 7)
Accepts the input of the target module, which is an executable program containing multiple functions to be executed on the target system.
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. The transfer instruction for migrating the process to the first address stored in the first address and the input target module are combined to generate a load module.
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
When the load module is generated, the transition instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the post-update function by a second address.
The second address is
A method for generating a load module, which is a relative address indicating a migration destination of processing in a provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.
(Appendix 8)
The process of accepting the input of the target module, which is an executable program containing multiple functions to be executed on the target system,
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. A process of combining the transfer command for migrating the process to the first address stored in the input and the input target module to generate a load module.
Let the computer run
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
In the process of generating the load module, the transition instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
The second address is
A load module generation program that is a relative address indicating a migration destination of processing in a temporary migration instruction inserted at the start address of the update target function on the memory when the patch is applied.
(Appendix 9)
The target module, which is an executable program containing multiple functions to be executed on the target system,
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system.
An address holding area for holding a first address corresponding to the updated function on the memory, and an address holding area.
This migration instruction that stores the first address held in the address holding area in a register of the target system and shifts processing to the address stored in the register, and
Are combined,
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
The transition order is
It is placed at a position separated from the start address of the update target function in the target module corresponding to the updated function by a second address.
The second address is
A program that is a relative address indicating the migration destination of processing in the provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.
(Appendix 10)
Equipped with an information processing device and a target system,
The target system is
An update that includes an updated function that updates one of the plurality of functions when applying a patch to the target module, which is an executable program containing a plurality of functions, and the target module being executed in the target system. An embedded loader that loads the rear module into the memory of the target system, an address holding area for holding the first address corresponding to the updated function on the memory, and the first address held in the address holding area. The load module in which the address 1 is stored in the register of the target system and the transfer instruction for migrating the process to the address stored in the register is combined with the load module is loaded into the memory.
Execute the target module in the load module,
The transition order is
In the load module, it is arranged at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
The information processing device is
After accepting the input of the updated module,
Generate a temporary migration instruction to migrate the process using the second address as the relative address of the migration destination.
In order to generate the patch application request, the updated module and the provisional migration instruction are transferred to the target system in which the target module is running.
The built-in loader loaded in the memory
After the target system receives the updated module and the provisional migration instruction, the patch application request is detected.
The start address on the memory of the updated function when the received updated module is loaded is stored in the address holding area as the first address.
The target system is
A dynamic program update system that inserts the temporary migration instruction into the start address of the function to be updated on the memory.
(Appendix 11)
The information processing device is
Accepts the input of the target module
The input target module, the built-in loader, the address holding area, and the transition instruction are combined to generate the load module.
The load module is transferred to the target system, and the load module is transferred to the target system.
The target system is
The load module received from the information processing device is loaded into the memory, and the load module is loaded into the memory.
The dynamic program update system according to Appendix 10 that executes the target module in the load module.
(Appendix 12)
The size of the second address is
The dynamic program update system according to Appendix 10 or 11, wherein the addressing size of the processor of the target system is within the upper limit.
(Appendix 13)
The built-in loader is
Upon detecting the patch application request, the received updated module is loaded into the memory.
The absolute address in the memory which is the start address of the function after the update is acquired, and the absolute address is obtained.
The dynamic program update system according to any one of Supplementary note 10 to 12, wherein the acquired absolute address is stored in the address holding area as the first address.
(Appendix 14)
The information processing device is
Further generate a patch list that defines the correspondence between the updated function and the provisional transition instruction.
The patch list is transferred together with the updated module and the temporary migration instruction.
The built-in loader is
The dynamic program update system according to any one of Supplementary note 10 to 13, which starts loading the updated module into the memory based on the transferred patch list when the patch application request is detected.
(Appendix 15)
The information processing device is
Of the load modules, the update target function is replaced with the post-update function to generate a patched load module.
The patched load module is transferred together with the updated module and the temporary migration instruction.
The target system is
The patched load module received from the information processing device is stored in the storage device, and the patched load module is stored in the storage device.
At restart, the patched load module is loaded from the storage device into the memory in place of the load module.
Execute the target module including the updated function in the patched load module.
The dynamic program update system according to any one of Supplementary note 10 to 14.
(Appendix 16)
In the target system
An update that includes an updated function that updates one of the plurality of functions when applying a patch to the target module, which is an executable program containing a plurality of functions, and the target module being executed in the target system. An embedded loader that loads the rear module into the memory of the target system, an address holding area for holding the first address corresponding to the updated function on the memory, and the first address held in the address holding area. The load module in which the address 1 is stored in the register of the target system and the transfer instruction for migrating the process to the address stored in the register is combined with the load module is loaded into the memory.
Execute the target module in the load module,
The transition order is
In the load module, it is arranged at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
In information processing equipment
After accepting the input of the updated module,
Generate a temporary migration instruction to migrate the process using the second address as the relative address of the migration destination.
In order to generate the patch application request, the updated module and the provisional migration instruction are transferred to the target system in which the target module is running.
In the built-in loader loaded in the memory
After the target system receives the updated module and the provisional migration instruction, the patch application request is detected.
The start address on the memory of the updated function when the received updated module is loaded is stored in the address holding area as the first address.
In the target system
A dynamic program update method for inserting the provisional transition instruction into the start address of the update target function on the memory.
(Appendix 17)
A memory that stores a load module in which a target module, which is an executable program containing multiple functions, an embedded loader, an address holding area, and this migration instruction are combined,
A processor that executes the target module stored in the memory, and
Equipped with
The built-in loader is
When the processor applies a patch to the target module being executed, the updated module including the updated function that updates any of the plurality of functions is loaded into the memory.
The address holding area is
It is an area for holding the first address corresponding to the updated function on the memory.
The transition order is
It is an instruction to store the first address held in the address holding area in the register of the processor and shift the processing to the address stored in the register.
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
The transition order is
It is placed at a position separated from the start address of the update target function in the target module corresponding to the updated function by a second address.
The second address is
An information processing device that is a relative address indicating a migration destination of processing in a provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied.
(Appendix 18)
The processor of the information processing device
A load module in which a target module, which is an execution-type program including a plurality of functions, an embedded loader, an address holding area, and this migration instruction are combined, is loaded into the memory of the information processing apparatus.
Execute the target module in the load module,
The built-in loader loaded in the memory
After receiving the updated module including the updated function that updated any of the plurality of functions and the temporary migration instruction, the request for patch application of the updated module to the target module is detected.
The received updated module is loaded into the memory, and the module is loaded into the memory.
The start address in the memory of the updated function is stored in the address holding area as the first address.
The processor
The provisional transition instruction is inserted into the start address of the update target function in the target module corresponding to the updated function on the memory.
The transition order is
It is an instruction to store the first address held in the address holding area in the register of the processor and shift the processing to the address stored in the register.
In the load module, it is located at a position separated from the start address of the function to be updated by a second address.
The provisional transition instruction is
A dynamic program update method that is an instruction for migrating processing by using the second address as a relative address of a migration destination.

1 Information processing device 11 Reception unit 12 Generation unit 13 Load module 131 Target module 132 Embedded loader 133 Address holding area 134 Transfer instructions 1000 Dynamic program update system 1000a Dynamic program update system 100 Load module generator 100a Load module generator 110 Storage device 111 Object module 111a Object module 111b Object module 111c Object module 112 Built-in loader 113 Transition instruction group 113a JUMP function 113b JUMP function 113c JUMP function 114 Address holding area group 114a Address holding area 114b Address holding area 114c Address holding area 115 Load Module generation program 115a Load module generation program 116 Load module 116a Patched load module 117 After update Object module 1181 Temporary migration instruction 1182 Patch DLL
1183 Patch list 120 Processor 121 Reception unit 122 Generation unit 122a Generation unit 123 Transfer unit 123a Transfer unit 130 Memory 140 Communication unit N network 200 Target system 210 Storage device 211 OS
212 Load module 220 Processor 2201 Register group 2201a register 2201b register 2201c register 221 Module processing unit 222 Target application 223 Embedded loader 230 Memory 240 Communication unit 1221 LM generation tool d Address distance 3 Information processing device 31 Memory 32 Processor 33 Load module 331 Target module 332 Built-in loader 333 Address holding area 334 This migration instruction

Claims (18)

A reception unit that accepts input from the target module, which is an executable program that includes multiple functions to be executed on the target system.
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. A generation unit that generates a load module by combining the transfer instruction for migrating the process to the first address stored in the first address and the input target module.
Equipped with
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module as the first address in the address holding area is included.
The generator is
The transfer instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the post-update function by a second address to generate the load module.
The second address is
An information processing device that is a relative address indicating a migration destination of processing in a provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied. The size of the second address is
The information processing apparatus according to claim 1, wherein the addressing size of the processor of the target system is within the upper limit. The reception unit further accepts the input of the updated module,
The generator is
Generate the temporary transfer instruction to transfer the process to the second address,
The information processing device is
The invention according to claim 1 or 2, further comprising a transfer unit for transferring the updated module and the provisional transition instruction to the target system in which the target module is running in order to generate the patch application request. Information processing equipment. The built-in loader is
When the patch application request is detected, the process of loading the transferred updated module into the memory and the process of loading the transferred module into the memory.
The process of acquiring the absolute address in the memory, which is the start address of the function after the update,
The information processing apparatus according to claim 3, further comprising a process of storing the acquired absolute address as the first address in the address holding area. The generator is
Further generate a patch list that defines the correspondence between the updated function and the provisional transition instruction.
The transfer unit transfers the patch list together with the updated module and the temporary migration instruction.
The built-in loader is
The information processing apparatus according to claim 3 or 4, wherein when the request for patch application is detected, the loaded of the updated module into the memory is started based on the transferred patch list. The generator is
Of the generated load modules, the updated function is replaced with the updated function to generate a patched load module.
Any one of claims 3 to 5, wherein the transfer unit transfers the patched load module to the target system in order to load the load module into the memory instead of the load module when the target system is restarted. The information processing apparatus according to item 1. Accepts the input of the target module, which is an executable program containing multiple functions to be executed on the target system.
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. The transfer instruction for migrating the process to the first address stored in the first address and the input target module are combined to generate a load module.
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
When the load module is generated, the transition instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the post-update function by a second address.
The second address is
A method for generating a load module, which is a relative address indicating a migration destination of processing in a provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied. The process of accepting the input of the target module, which is an executable program containing multiple functions to be executed on the target system,
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system. The address holding area for holding the first address corresponding to the updated function on the memory and the first address held in the address holding area are stored in the register of the target system, and the register is stored. A process of combining the transfer command for migrating the process to the first address stored in the input and the input target module to generate a load module.
Let the computer run
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
In the process of generating the load module, the transition instruction is placed at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
The second address is
A load module generation program that is a relative address indicating a migration destination of processing in a temporary migration instruction inserted at the start address of the update target function on the memory when the patch is applied. The target module, which is an executable program containing multiple functions to be executed on the target system,
An embedded loader that loads an updated module including an updated function that updates any of the plurality of functions into the memory of the target system when applying a patch to the target module running on the target system.
An address holding area for holding a first address corresponding to the updated function on the memory, and an address holding area.
This migration instruction that stores the first address held in the address holding area in a register of the target system and shifts processing to the address stored in the register, and
Are combined,
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
The transition order is
It is placed at a position separated from the start address of the update target function in the target module corresponding to the updated function by a second address.
The second address is
A program that is a relative address indicating the migration destination of processing in the provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied. Equipped with an information processing device and a target system,
The target system is
An update that includes an updated function that updates one of the plurality of functions when applying a patch to the target module, which is an executable program containing a plurality of functions, and the target module being executed in the target system. An embedded loader that loads the rear module into the memory of the target system, an address holding area for holding the first address corresponding to the updated function on the memory, and the first address held in the address holding area. The load module in which the address 1 is stored in the register of the target system and the transfer instruction for migrating the process to the address stored in the register is combined with the load module is loaded into the memory.
Execute the target module in the load module,
The transition order is
In the load module, it is arranged at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
The information processing device is
After accepting the input of the updated module,
Generate a temporary migration instruction to migrate the process using the second address as the relative address of the migration destination.
In order to generate the patch application request, the updated module and the provisional migration instruction are transferred to the target system in which the target module is running.
The built-in loader loaded in the memory
After the target system receives the updated module and the provisional migration instruction, the patch application request is detected.
The start address on the memory of the updated function when the received updated module is loaded is stored in the address holding area as the first address.
The target system is
A dynamic program update system that inserts the temporary migration instruction into the start address of the function to be updated on the memory. The information processing device is
Accepts the input of the target module
The input target module, the built-in loader, the address holding area, and the transition instruction are combined to generate the load module.
The load module is transferred to the target system, and the load module is transferred to the target system.
The target system is
The load module received from the information processing device is loaded into the memory, and the load module is loaded into the memory.
The dynamic program update system according to claim 10, which executes the target module in the load module. The size of the second address is
The dynamic program update system according to claim 10 or 11, wherein the addressing size of the processor of the target system is within the upper limit. The built-in loader is
Upon detecting the patch application request, the received updated module is loaded into the memory.
The absolute address in the memory which is the start address of the function after the update is acquired, and the absolute address is acquired.
The dynamic program update system according to any one of claims 10 to 12, wherein the acquired absolute address is stored in the address holding area as the first address. The information processing device is
Further generate a patch list that defines the correspondence between the updated function and the provisional transition instruction.
The patch list is transferred together with the updated module and the temporary migration instruction.
The built-in loader is
The dynamic program update system according to any one of claims 10 to 13, which starts loading the updated module into the memory based on the transferred patch list when the patch application request is detected. The information processing device is
Of the load modules, the update target function is replaced with the post-update function to generate a patched load module.
The patched load module is transferred together with the updated module and the temporary migration instruction.
The target system is
The patched load module received from the information processing device is stored in the storage device, and the patched load module is stored in the storage device.
At restart, the patched load module is loaded from the storage device into the memory in place of the load module.
Execute the target module including the updated function in the patched load module.
The dynamic program update system according to any one of claims 10 to 14. In the target system
An update that includes an updated function that updates one of the plurality of functions when applying a patch to the target module, which is an executable program containing a plurality of functions, and the target module being executed in the target system. An embedded loader that loads the rear module into the memory of the target system, an address holding area for holding the first address corresponding to the updated function on the memory, and the first address held in the address holding area. The load module in which the address 1 is stored in the register of the target system and the transfer instruction for migrating the process to the address stored in the register is combined with the load module is loaded into the memory.
Execute the target module in the load module,
The transition order is
In the load module, it is arranged at a position separated from the start address of the update target function in the target module corresponding to the update function by a second address.
In information processing equipment
After accepting the input of the updated module,
Generate a temporary migration instruction to migrate the process using the second address as the relative address of the migration destination.
In order to generate the patch application request, the updated module and the provisional migration instruction are transferred to the target system in which the target module is running.
In the built-in loader loaded in the memory
After the target system receives the updated module and the provisional migration instruction, the patch application request is detected.
The start address on the memory of the updated function when the received updated module is loaded is stored in the address holding area as the first address.
In the target system
A dynamic program update method for inserting the provisional transition instruction into the start address of the update target function on the memory. A memory that stores a load module in which a target module, which is an executable program containing multiple functions, an embedded loader, an address holding area, and this migration instruction are combined,
A processor that executes the target module stored in the memory, and
Equipped with
The built-in loader is
When the processor applies a patch to the target module being executed, the updated module including the updated function that updates any of the plurality of functions is loaded into the memory.
The address holding area is
It is an area for holding the first address corresponding to the updated function on the memory.
The transition order is
It is an instruction to store the first address held in the address holding area in the register of the processor and shift the processing to the address stored in the register.
The built-in loader is
The processing including storing the start address in the memory of the post-update function in the loaded post-update module in the address holding area is included.
The transition order is
It is placed at a position separated from the start address of the update target function in the target module corresponding to the updated function by a second address.
The second address is
An information processing device that is a relative address indicating a migration destination of processing in a provisional migration instruction inserted at the start address of the update target function on the memory when the patch is applied. The processor of the information processing device
A load module in which a target module, which is an execution-type program including a plurality of functions, an embedded loader, an address holding area, and this migration instruction are combined, is loaded into the memory of the information processing apparatus.
Execute the target module in the load module,
The built-in loader loaded in the memory
After receiving the updated module including the updated function that updated any of the plurality of functions and the temporary migration instruction, the request for patch application of the updated module to the target module is detected.
The received updated module is loaded into the memory, and the module is loaded into the memory.
The start address in the memory of the updated function is stored in the address holding area as the first address.
The processor
The provisional transition instruction is inserted into the start address of the update target function in the target module corresponding to the updated function on the memory.
The transition order is
It is an instruction to store the first address held in the address holding area in the register of the processor and shift the processing to the address stored in the register.
In the load module, it is located at a position separated from the start address of the function to be updated by a second address.
The provisional transition instruction is
A dynamic program update method that is an instruction for migrating processing by using the second address as a relative address of a migration destination.

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