JP6998890B2 - セクション式冗長検査を有する制御シグナリングの符号化および復号 - Google Patents

セクション式冗長検査を有する制御シグナリングの符号化および復号 Download PDF

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JP6998890B2
JP6998890B2 JP2018561015A JP2018561015A JP6998890B2 JP 6998890 B2 JP6998890 B2 JP 6998890B2 JP 2018561015 A JP2018561015 A JP 2018561015A JP 2018561015 A JP2018561015 A JP 2018561015A JP 6998890 B2 JP6998890 B2 JP 6998890B2
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JP2019522399A5 (enExample
JP2019522399A (ja
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ジェイミー・メンジェイ・リン
ヤン・ヤン
ジョセフ・ビナミラ・ソリアガ
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クアルコム，インコーポレイテッド
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2933—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using a block and a convolutional code
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H03M13/3938—Tail-biting
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
JP2018561015A 2016-06-06 2017-05-30 セクション式冗長検査を有する制御シグナリングの符号化および復号 Active JP6998890B2 (ja)

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JP2021200048A JP7371077B2 (ja) 2016-06-06 2021-12-09 セクション式冗長検査を有する制御シグナリングの符号化および復号

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201662346291P 2016-06-06 2016-06-06
US62/346,291 2016-06-06
US15/607,161 2017-05-26
US15/607,161 US10313057B2 (en) 2016-06-01 2017-05-26 Error detection in wireless communications using sectional redundancy check information
PCT/US2017/035026 WO2017210205A1 (en) 2016-06-01 2017-05-30 Encoding and decoding of control signaling with sectional redundancy check

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JP2019522399A5 JP2019522399A5 (enExample) 2020-06-18
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JP2021200048A Active JP7371077B2 (ja) 2016-06-06 2021-12-09 セクション式冗長検査を有する制御シグナリングの符号化および復号

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CN108259121B (zh) * 2016-12-28 2019-02-01 上海朗帛通信技术有限公司 一种用于信道编码的ue、基站中的方法和设备
CN112825558B (zh) * 2019-11-20 2022-11-18 华为技术有限公司 一种编码方法、解码方法及设备
WO2025171642A1 (en) * 2024-02-18 2025-08-21 Qualcomm Incorporated General crc design for ambient iot

Citations (1)

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Publication number Priority date Publication date Assignee Title
US20020147954A1 (en) 2001-03-22 2002-10-10 Shea John M. Method and coding means for error-correction utilizing concatenated parity and turbo codes

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JPH07288479A (ja) * 1994-04-18 1995-10-31 Nec Corp 誤り訂正連接符号化方法及び装置
EP2026470A1 (en) 2007-08-17 2009-02-18 Panasonic Corporation Running cyclic redundancy check over coding segments
US8473821B2 (en) 2010-11-09 2013-06-25 Qualcomm, Incorporated Packet-level erasure protection coding in aggregated packet transmissions
CN105227189B (zh) 2015-09-24 2019-01-01 电子科技大学 分段crc辅助的极化码编译码方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020147954A1 (en) 2001-03-22 2002-10-10 Shea John M. Method and coding means for error-correction utilizing concatenated parity and turbo codes

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
MediaTek Inc.，Resolving Polar Code Memory Complexity Issue[online]，3GPP TSG-RAN WG1#86b R1-1610420，インターネット＜URL:http://www.3gpp.org/ftp/tsg_ran/WG1_RL1/TSGR1_86b/Docs/R1-1610420.zip＞，2016年10月18日

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