JP6957134B2 - Evaluation method of oxide semiconductor - Google Patents

Description

The present invention relates to, for example, insulating films, transistors and semiconductor devices. Alternatively, the present invention relates to, for example, an evaluation method for an insulating film, a transistor, and a semiconductor device. Alternatively, the present invention relates to, for example, a method for manufacturing an insulating film, a transistor, and a semiconductor device. Alternatively, the present invention relates to, for example, an insulating film, a display device, a light emitting device, a lighting device, a power storage device, a storage device, a processor, and an electronic device. Alternatively, the present invention relates to a method for manufacturing an insulating film, a display device, a liquid crystal display device, a light emitting device, a storage device, and an electronic device. Alternatively, the present invention relates to a semiconductor device, a display device, a liquid crystal display device, a light emitting device, a storage device, and a method for driving an electronic device.

One aspect of the present invention is not limited to the above technical fields. The technical field of one aspect of the invention disclosed in the present specification and the like relates to a product, a method, or a manufacturing method. Alternatively, one aspect of the invention relates to a process, machine, manufacture, or composition of matter.

In the present specification and the like, the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics. Display devices, light emitting devices, lighting devices, electro-optical devices, semiconductor circuits and electronic devices may have semiconductor devices.

Attention is being paid to a technique for constructing a transistor by using a semiconductor film on a substrate having an insulating surface. The transistor is widely applied to semiconductor devices such as integrated circuits and display devices. Silicon is known as a semiconductor film applicable to transistors.

Amorphous silicon and polycrystalline silicon are used as the silicon used for the semiconductor film of the transistor depending on the application. For example, when applied to a transistor constituting a large-scale display device, it is preferable to use amorphous silicon for which a film-forming technique for a large-area substrate has been established. On the other hand, when applied to a transistor constituting a high-performance display device in which a drive circuit is integrally formed, it is preferable to use polycrystalline silicon capable of producing a transistor having high field effect mobility. A method of forming polycrystalline silicon by heat-treating amorphous silicon at a high temperature or performing laser light treatment is known.

On the other hand, in recent years, oxide semiconductors have been used as semiconductor films for transistors. (See Patent Document 1.). Since the oxide semiconductor can be formed into a film by a sputtering method or the like, it can be used as a semiconductor of a transistor constituting a large display device. Further, since the transistor using the oxide semiconductor has high field effect mobility, it is possible to realize a high-performance display device in which a drive circuit is integrally formed. In addition, since a part of the transistor production equipment using amorphous silicon can be improved and used, there is an advantage that capital investment can be suppressed.

Further, as a method for evaluating various characteristics of an oxide semiconductor in a non-contact manner, a method of irradiating an oxide semiconductor with excitation light and microwaves and measuring the reflected wave of microwaves changed by the irradiation of the excitation light is disclosed. (See Patent Document 2). This measurement is called the microwave photoconductive attenuation method (μ-PCD: Microwave-Photo Conductive Decay). Non-Patent Document 1 shows that an amorphous oxide semiconductor has a penetration length (also referred to as penetration depth or penetration length) of excitation light having a wavelength of 349 nm of about 300 nm.

Further, Non-Patent Document 2 discloses the relationship between the spin density and the conductivity by electron spin resonance (ESR) of In-Ga-Zn oxide, which is a typical oxide semiconductor. Further, as a carrier generation source of In-Ga-Zn oxide, a defect level due to oxygen deficiency and hydrogen is shown.

Special table 11-505377 Japanese Unexamined Patent Publication No. 2014-19931

S. Yasuno, et al. : Applied Physics Letters 2011 vol. 98, 102107 Y. Nonaka, et al. : Journal of Applied Physics 2014 vol. 115, 163707

When manufacturing a transistor, it is possible to measure electrical characteristics after forming channels, sources, drains, gate electrodes, and the like. Therefore, even if there is an abnormality in the middle of the transistor manufacturing process, it takes time to feed back the result of the electrical characteristic measurement to the process control, which causes deterioration of productivity.

Further, in a transistor using an oxide semiconductor, it is important to control the carrier density of the oxide semiconductor in order to obtain good electrical characteristics.

In view of the above, one aspect of the present invention is to provide a method for evaluating the carrier density of an oxide semiconductor during the transistor manufacturing process. Alternatively, one of the issues is to suppress a negative shift of the threshold voltage of the transistor. Alternatively, one of the issues is to improve the on-current of the transistor. Alternatively, one of the tasks is to improve the electric field mobility mobility of the transistor.

Further, one aspect of the present invention is to manufacture a transistor with high productivity. Alternatively, one of the tasks is to manufacture a semiconductor device having the transistor with high productivity.

The description of these issues does not prevent the existence of other issues. It should be noted that one aspect of the present invention does not need to solve all of these problems. It should be noted that the problems other than these are naturally clarified from the description of the description, drawings, claims and the like, and the problems other than these can be extracted from the description of the description, drawings, claims and the like.

The μ-PCD measurement can measure the physical properties of oxide semiconductors in a non-contact, non-destructive manner in a short time, and the peak intensity and lifetime obtained by the μ-PCD measurement correlate with the carrier density.

By performing μ-PCD measurement during the transistor manufacturing process, the carrier density of the oxide semiconductor during the transistor manufacturing process can be evaluated. Therefore, since the electrical characteristics of the transistor can be estimated during the transistor manufacturing process, it is effective in increasing the productivity of transistor manufacturing.

One aspect of the invention disclosed herein is to prepare a sample, the sample having a substrate and an oxide semiconductor formed on the substrate, and irradiating the sample with microwaves and excitation light. This is an oxide semiconductor evaluation method in which the intensity of microwaves reflected by a sample is measured by using an attenuation method, and the carrier density of the oxide semiconductor is evaluated from the peak value of the intensity of the reflected microwaves.

In one aspect of the invention disclosed herein, the carrier density is evaluated from the correlation between the peak value of the reflection intensity of the microwave photoconductive attenuation method and the carrier density of the oxide semiconductor obtained by the Hall effect measurement. This is a semiconductor evaluation method.

One aspect of the invention disclosed in the present specification is a method for evaluating an oxide semiconductor, characterized in that the energy of the excitation light is larger than the band gap of the oxide semiconductor and smaller than the band gap of the substrate.

In one aspect of the invention disclosed herein, the sample has a first insulator formed on an oxide semiconductor, and the energy of the excitation light of the microwave photoconductive attenuation method is the first. This is an evaluation method for an oxide semiconductor, which is characterized by being smaller than the band gap of an insulator.

In one aspect of the invention disclosed herein, the sample has a second insulator formed between the substrate and the oxide semiconductor, and the energy of the excitation light of the microwave photoconductive attenuation method is the first. This is an evaluation method for an oxide semiconductor, which is characterized in that it is smaller than the band gap of the insulator of 2.

One aspect of the invention disclosed in the present specification is a method for evaluating an oxide semiconductor, characterized in that the first insulator or the second insulator has a laminated structure.

One aspect of the invention disclosed herein comprises an insulator, an oxide semiconductor, and a conductor.
The oxide semiconductor has a region in which the oxide semiconductor and the conductor overlap each other via an insulator, the band gap of the region is 3.17 eV or more and 3.58 eV or less, and the film thickness is 27.7 nm or more and 32. It is a semiconductor device characterized by having a region where the peak value of the reflection intensity of microwaves by the microwave photoconductive attenuation method of an oxide semiconductor is 1042 mV or less at 5 nm or less.

One aspect of the invention disclosed in the present specification is a semiconductor device characterized in that the region has a region in which the lifetime τ1 of the oxide semiconductor by the microwave photoconductive attenuation method is 50 nsec or more.

One aspect of the invention disclosed herein is to form an oxide semiconductor on a first substrate and a second substrate, measure the oxide semiconductor on the second substrate by a microwave photoconductive attenuation method, and micron. The energy of the excitation light of the wave light conductivity attenuation method is larger than the band gap of the oxide semiconductor and smaller than the band gap of the second substrate. This is a method for manufacturing a semiconductor device, which evaluates the carrier density of an oxide semiconductor and evaluates an oxide semiconductor.

It is possible to provide a method for evaluating the carrier density of an oxide semiconductor during the transistor manufacturing process. Alternatively, the negative shift of the threshold voltage of the transistor can be suppressed. Alternatively, the on-current of the transistor can be improved. Alternatively, the field effect mobility of the transistor can be improved.

Alternatively, the transistor can be manufactured with high productivity. Alternatively, a semiconductor device having the transistor can be manufactured with high productivity.

The description of these effects does not preclude the existence of other effects. It should be noted that one aspect of the present invention does not necessarily have to have all of these effects. It should be noted that the effects other than these are naturally clarified from the description of the description, drawings, claims, etc., and it is possible to extract the effects other than these from the description of the description, drawings, claims, etc. Is.

The schematic diagram of the μ-PCD measuring apparatus which concerns on embodiment. The schematic diagram of the μ-PCD measuring apparatus which concerns on embodiment. The figure of the attenuation curve of μ-PCD measurement which concerns on embodiment. The figure explaining the range of the atomic number ratio of the oxide semiconductor which concerns on this invention. A band diagram of a laminated structure of oxide semiconductors. Top view and sectional view of the semiconductor device according to one aspect of the present invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. The figure which shows the manufacturing method of the transistor which concerns on one aspect of this invention. Sectional drawing of the semiconductor device which concerns on one aspect of this invention. Sectional drawing of the semiconductor device which concerns on one aspect of this invention. Top view of the semiconductor wafer according to one aspect of the present invention. A flowchart and a schematic perspective view illustrating an example of a manufacturing process of electronic components. The figure which shows the electronic device which concerns on one aspect of this invention. The figure which shows the relationship between the carrier density of an oxide semiconductor, the peak value by μ-PCD measurement, sheet resistance, and Fermi level. The figure which shows the relationship between the carrier density of an oxide semiconductor, the peak value by μ-PCD measurement, and the lifetime. The figure which shows the relationship between the carrier density of an oxide semiconductor, the peak value by μ-PCD measurement, and the band gap. The figure which shows the in-plane distribution of the peak value by μ-PCD measurement. The figure which shows the in-plane distribution of the peak value by μ-PCD measurement. The figure which shows the in-plane distribution of the peak value by μ-PCD measurement. The figure which shows the in-plane distribution of the peak value by μ-PCD measurement. The figure which shows the peak value and the lifetime by μ-PCD measurement. The figure which shows the relationship between the film thickness of an oxide semiconductor, the peak value by μ-PCD measurement, and the light absorption rate. The figure which shows the relationship between the band gap of an oxide semiconductor and the peak value by μ-PCD measurement.

Hereinafter, embodiments will be described with reference to the drawings. However, it is easily understood by those skilled in the art that the embodiments can be implemented in many different embodiments, and that the embodiments and details can be variously changed without departing from the spirit and scope thereof. .. Therefore, the present invention is not construed as being limited to the description of the following embodiments.

Also, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. The drawings schematically show ideal examples, and are not limited to the shapes or values shown in the drawings.

In addition, the ordinal numbers "first", "second", and "third" used in the present specification are added to avoid confusion of the components, and are not limited numerically. I will add it.

Further, in the present specification, terms indicating the arrangement such as "above" and "below" are used for convenience in order to explain the positional relationship between the configurations with reference to the drawings. In addition, the positional relationship between the configurations changes as appropriate according to the direction in which each configuration is depicted. Therefore, it is not limited to the words and phrases explained in the specification, and can be appropriately paraphrased according to the situation.

Further, in the present specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source. Then, a channel region is provided between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode), and a current flows through the drain, the channel region and the source. Can be done. In the present specification and the like, the channel region refers to a region in which a current mainly flows.

Further, the functions of the source and the drain may be interchanged when transistors having different polarities are adopted or when the direction of the current changes in the circuit operation. Therefore, in the present specification and the like, the terms source and drain can be used interchangeably.

Further, in the present specification and the like, "electrically connected" includes a case where they are connected via "something having some kind of electrical action". Here, the "thing having some kind of electrical action" is not particularly limited as long as it enables the exchange of electric signals between the connection targets. For example, "things having some kind of electrical action" include electrodes, wirings, switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions.

Further, in the present specification and the like, when explaining the structure of the invention using drawings, reference numerals indicating the same thing may be commonly used between different drawings.

Further, in the present specification and the like, "parallel" means a state in which two straight lines are arranged at an angle of −10 ° or more and 10 ° or less. Therefore, the case of −5 ° or more and 5 ° or less is also included. Further, "substantially parallel" means a state in which two straight lines are arranged at an angle of −30 ° or more and 30 ° or less. Further, "vertical" means a state in which two straight lines are arranged at an angle of 80 ° or more and 100 ° or less. Therefore, the case of 85 ° or more and 95 ° or less is also included. Further, "substantially vertical" means a state in which two straight lines are arranged at an angle of 60 ° or more and 120 ° or less.

Further, in the present specification and the like, the term "membrane" and the term "layer" can be interchanged with each other in some cases. For example, it may be possible to change the term "conductive layer" to the term "conductive layer". Alternatively, for example, it may be possible to change the term "insulating film" to the term "insulating layer".

Even when the term "semiconductor" is used, for example, if the conductivity is sufficiently low, it may have characteristics as an "insulator". In addition, the boundary between "semiconductor" and "insulator" is ambiguous, and it may not be possible to strictly distinguish between them. Therefore, the "semiconductor" described in the present specification may be paraphrased as an "insulator". Similarly, the "insulator" described herein may be paraphrased as a "semiconductor."

(Embodiment 1)
In the present embodiment, a method for evaluating an oxide semiconductor using μ-PCD measurement, which can be used in one aspect of the present invention, will be described with reference to FIGS. 1 to 3.

<Μ-PCD measurement>
The μ-PCD measurement will be described below.

FIG. 1 is a schematic view showing an example of an apparatus for performing μ-PCD measurement. The apparatus shown in FIG. 1 is suitable for evaluating a thin film of a wide-gap semiconductor. In particular, it is suitable for evaluation of wide-gap semiconductors having a film thickness of 1 nm or more and 1 μm or less, 2 nm or more and 500 nm or less, 3 nm or more and 200 nm or less, or 5 nm or more and 100 nm or less, which are used for transistor semiconductors.

The apparatus shown in FIG. 1 includes a pulse laser oscillator 1301, a microwave oscillator 1302, a directional coupler 1303, a waveguide 1305, a mixer 1306, a signal processing apparatus 1307, and a sample stage 1311. In FIG. 1, the waveguide 1305 shows a shape in which the corner portion has a curvature, but the waveguide 1305 is not limited to this. Sample 1320 can be placed on the sample stage 1311. Sample 1320 has, for example, a substrate 1320b and an oxide semiconductor 1320a on the substrate 1320b.

A conductor is arranged on the upper surface of the sample stage 1311. The conductor may be one or more of aluminum, titanium, chromium, manganese, iron, cobalt, nickel, copper, zinc, gallium, yttrium, zirconium, molybdenum, ruthenium, silver, indium, tin, tantalum or tungsten, or the metal element thereof. A conductor containing at least one of the above and one or more of boron, nitrogen, oxygen, fluorine, silicon or phosphorus may be used in a single layer or in a laminated manner. For example, it may be an alloy or compound such as stainless steel, a conductor containing aluminum, a conductor containing copper and titanium, a conductor containing copper and manganese, a conductor containing indium, tin and oxygen, titanium and nitrogen. A conductor containing the above may be used.

The spacer 1310 may be arranged between the sample 1320 and the sample stage 1311. Spacer 1310 is an insulator containing one or more of magnesium, aluminum, silicon, gallium, germanium, yttrium, zirconium, lanthanum, neodymium, hafnium or tantalum and one or more of argon, boron, carbon, nitrogen, oxygen, fluorine, phosphorus or chlorine. The body may be used in a single layer or in layers. For example, aluminum oxide, magnesium oxide, silicon oxide, silicon nitride nitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tantalum oxide may be used. The silicon nitriding film refers to a film having a higher oxygen content than nitrogen in its composition, and the silicon nitride film refers to a film having a higher nitrogen content than oxygen in its composition.

The thickness of the spacer 1310 may be selected so that the distance between the upper surface of the oxide semiconductor 1320a and the upper surface of the sample stage 1311 is about 1/4 of the wavelength of the microwave in the substrate 1320b and the spacer 1310. .. By arranging the spacer 1310, evaluation may be possible even when the sample 1320 is arranged upside down. By arranging the sample 1320 upside down, for example, information including a large influence of the interface between the substrate 1320b and the oxide semiconductor 1320a may be obtained.

The evaluation method of the oxide semiconductor 1320a by μ-PCD measurement is shown below.

First, microwaves are radiated from the microwave oscillator 1302. The radiated microwave is particularly called a traveling wave (also called an incident wave). The traveling wave is separated into the waveguide 1305 and the phase controller 1315 via the directional coupler 1303. The traveling wave that has passed through the waveguide 1305 is incident on the sample 1320. At this time, the microwave (particularly referred to as a reflected wave) reflected by the oxide semiconductor 1320a of the sample 1320 passes through the waveguide 1305 again. The reflected wave is mixed with the traveling wave separated via the phase controller 1315 in the mixer 1306. The mixed signal is detected in the signal processor 1307.

At this time, the signal intensity detected by the signal processing device 1307 changes depending on the reflection intensity of the microwave in the oxide semiconductor 1320a. For example, the higher the carrier density of the oxide semiconductor 1320a, the higher the conductivity of the oxide semiconductor 1320a. The higher the conductivity, the higher the reflection intensity of the microwave, and the higher the intensity of the signal detected by the signal processing device 1307.

Further, the oxide semiconductor 1320a generates holes and electrons by absorbing the excitation light. That is, by irradiating the oxide semiconductor 1320a with the excitation light, the carrier density of the oxide semiconductor 1320a is increased, and the reflection intensity of the microwave is increased accordingly. The excitation light may be applied to the oxide semiconductor 1320a via the mirror 1313 and the lens 1314.

When the oxide semiconductor 1320a is continuously exposed to the excitation light for a certain period of time, the reflection intensity of the microwave takes a constant value depending on the balance between the generation of carriers by the excitation light and the disappearance of carriers due to recombination or the like. Since this value is the highest value of the microwave reflection intensity, it can be called the peak value of the microwave reflection intensity.

As the excitation light, for example, a laser beam emitted from the pulse laser oscillator 1301 can be used. It is preferable that the laser beam uses a wavelength having an energy sufficiently higher than the band gap of the oxide semiconductor 1320a. Further, in order to suppress an increase in the cost of the optical system, the wavelength of the laser beam is preferably 200 nm or more. However, a laser beam having a wavelength of less than 200 nm may be used. The light penetration length is the depth at which the light intensity is attenuated to 1 / e, and can be expressed by Equation 1.

Here, d is the penetration length of light, λ is the wavelength of light, and k is the attenuation coefficient.

For example, when excitation light having a wavelength having a wavelength sufficiently higher than the band gap of the oxide semiconductor 1320a is not used, the output of the excitation light must be increased to some extent in order to increase the detection sensitivity. Therefore, the oxide semiconductor 1320a may be altered. By using the excitation light having a wavelength having a wavelength sufficiently higher than the band gap of the oxide semiconductor 1320a, the carrier density of the oxide semiconductor 1320a can be sufficiently increased even when the output of the excitation light is reduced. Therefore, the deterioration of the oxide semiconductor 1320a as described above can be suppressed.

Further, by using the excitation light having a shallow penetration length into the oxide semiconductor 1320a, it is possible to suppress that the information of the substrate such as the substrate 1320b is reflected in the measurement result. Further, due to the interference effect, it is possible to suppress the occurrence of unevenness in the measurement result depending on the thickness of the oxide semiconductor 1320a.

When a substrate having a bandgap smaller than the energy of the excitation light in the μ-PCD measurement is used as the substrate 1320b, a large number of carriers are generated on the substrate by the excitation light irradiation. When the μ-PCD measurement of such a sample is performed, the signal derived from the substrate 1320b becomes large, and the signal derived from the oxide semiconductor 1320a may be canceled. Therefore, it is desirable to use a substrate having a bandgap larger than the energy of the excitation light, for example, glass or quartz.

Even when a film having a bandgap larger than the energy of the excitation light in the μ-PCD measurement is provided above or below the oxide semiconductor 1320a, the signal derived from the oxide semiconductor 1320a can be detected. For example, since the silicon oxide film has a larger bandgap than the excitation light and carriers are less likely to be generated, the signal derived from the silicon oxide film becomes smaller in the μ-PCD measurement, and the signal derived from the oxide semiconductor 1320a can be detected. The film provided above or below the oxide semiconductor 1320a and having a bandgap larger than the energy of the excitation light in the μ-PCD measurement may have a laminated structure.

When the irradiation of the oxide semiconductor 1320a with the excitation light is stopped, the generation of carriers is stopped and the carrier density of the oxide semiconductor 1320a is attenuated. In an oxide semiconductor, carriers generated by irradiation with excitation light are not simply attenuated exponentially, but may be attenuated slowly from the middle of the attenuation. That is, the attenuation of the carrier is composed of two components, a component that attenuates rapidly and a component that attenuates slowly. The rapidly decaying component is approximately exponential, and the slowly decaying component may tend to be non-exponential. The attenuation of the carrier density can be expressed by Equation 2 which combines an exponential model for a rapid attenuation component and an extended exponential model for a gradual attenuation component.

Here, t is the time after the irradiation of the excitation light is stopped, n (t) is the carrier density at the time t, n ₀ is the carrier density under the irradiation of the excitation light, and τ1 is the time constant of the component that rapidly attenuates. , Τ2 is the time constant of the slowly decaying component, and β is the extended exponential coefficient.

In the present specification, the time constant of the rapidly decaying component is referred to as lifetime τ1, and the time constant of the slowly decaying component is referred to as lifetime τ2.

The microwave irradiated on the oxide semiconductor 1320a is reflected by the reflection intensity of the microwave based on the conductivity determined by the carrier density of the oxide semiconductor 1320a. That is, since the carrier density of the oxide semiconductor 1320a corresponds to the reflection intensity of the microwave, the attenuation of the reflection intensity of the microwave can be expressed by Equation 3. The method of calculating the lifetime τ1 and the lifetime τ2 by μ-PCD measurement is as follows. Yasuno, et al. : Journal of Applied Physics 2012 vol. The description of 112, 053715 can be referred to.

Here, t is the time after the irradiation of the excitation light is stopped, R (t) is the reflection intensity of the microwave at time t, R ₀ is the reflection intensity of the microwave under the irradiation of the excitation light, and τ1 is promptly. The lifetime of the decaying component, τ2 is the lifetime of the slowly decaying component, and β is the extended exponential function.

An example of the attenuation curve obtained by μ-PCD measurement is shown in FIG. 3 (A). In FIG. 3A, the horizontal axis represents the time [nsec] after the irradiation of the excitation light is stopped, and the left vertical axis represents the reflection intensity [mV] of the microwave. The plot shows the measured values, the solid line shows the rapidly decaying component obtained from the fitting using Equation 3, and the dashed line shows the slowly decaying component obtained from the fitting. In this way, the carrier lifetimes τ1 and τ2 can be calculated from the attenuation curve of the obtained microwave reflection intensity.

An example in which the reflection intensity of microwaves is very low is shown in FIG. 3 (B). In FIG. 3B, the horizontal axis represents the time [nsec] after the irradiation of the excitation light is stopped, and the left vertical axis represents the reflection intensity [mV] of the microwave. As described above, in a sample having a low microwave reflection intensity, the influence of noise on the attenuation curve becomes large, and the lifetimes τ1 and τ2 may not be calculated.

In the range where the conduction band of the oxide semiconductor is not degenerated, the higher the carrier density of the oxide semiconductor, the higher the peak value of the reflection intensity obtained by μ-PCD measurement, and the longer the lifetime tends to be. Become. By acquiring the correlation between the carrier density, the peak value, and the lifetime in advance, the carrier density of the oxide semiconductor can be estimated by performing the μ-PCD measurement of any oxide semiconductor.

When an oxide semiconductor is used for a transistor, it is important to control the carrier density of the oxide semiconductor in order to obtain good electrical characteristics of the transistor. Since the carrier density of the oxide semiconductor can be estimated by performing the μ-PCD measurement, it is possible to efficiently improve the electrical characteristics of the transistor. Specifically, it is possible to suppress the negative shift of the threshold voltage, improve the on-current, or improve the field effect mobility.

Further, when the carrier density becomes higher and the conduction band degenerates, the higher the carrier density, the lower the peak value obtained by the μ-PCD measurement. Further, in the range where the conduction band of the oxide semiconductor is degenerated, the higher the carrier density, the shorter the lifetime obtained by the μ-PCD measurement. As the carrier density increases, the peak value decreases, and as shown in FIG. 3B, the influence of noise on the attenuation curve increases, making it impossible to calculate the lifetime. By using the lifetime together with the peak value, the carrier density of the oxide semiconductor can be estimated more accurately.

In the degenerate region, there are three possible causes for the peak value to decrease as the carrier density increases. The first is a decrease in mobility due to carrier-carrier scattering. The second is the decrease in carrier density under excitation light irradiation due to carrier-carrier scattering. The third is a decrease in carrier density under excitation light irradiation due to the Burstein-Mossshift effect.

First, the first and second reasons will be described. Excess carriers are generated by irradiation with excitation light, and the conductivity of the oxide semiconductor increases. The amount of change in conductivity due to excitation light irradiation can be expressed by Equation 4.

Here, Δσ is the amount of change in conductivity due to excitation light irradiation, q is the elementary charge, μ _n is the electron mobility, n _dark is the carrier density before excitation light irradiation, and n _photo is the carrier under excitation light irradiation. Indicates density.

As the carrier density increases, the mobility μ _n decreases due to carrier-carrier scattering, so it can be seen that the amount of change in conductivity due to excitation light irradiation decreases. Further, when the carrier density is high, the lifetime is shortened due to carrier-carrier scattering, and the carrier density _nphoto under excitation light irradiation is reduced, so that the amount of change in conductivity due to excitation light irradiation is small. .. Therefore, it is considered that the peak value of the μ-PCD measurement becomes small.

Next, the third reason will be explained. It is known that the optical bandgap widens as the carrier density increases and the conduction band degenerates, which is called the Bernstein-Mossshift effect. It is considered that the widening of the optical band gap reduces the carrier density excited by the excitation light irradiation and reduces the peak value of the μ-PCD measurement.

One of the methods for measuring the carrier density of an oxide semiconductor is the Hall effect measurement. However, in the Hall effect measurement, since the measurable sample size is small, if the substrate size is large, it is necessary to divide the substrate. In addition, the needle is brought into contact with the sample for measurement. Since the Hall effect measurement is fracture and contact measurement, it is not preferable to use the Hall effect measurement for process control in, for example, a transistor manufacturing process using an oxide semiconductor.

On the other hand, in the μ-PCD measurement, the carrier density of the oxide semiconductor can be evaluated in a non-contact, non-destructive, and short time during the transistor manufacturing process after the oxide semiconductor is formed.

Further, when a transistor is manufactured, the electrical characteristics cannot be measured until a channel, a source, a drain, a gate, or the like is formed. However, in the μ-PCD measurement, the carrier density of the oxide semiconductor can be evaluated in a non-contact, non-destructive, and short time during the process, and the electrical characteristics of the transistor can be estimated from the carrier density. In this way, by appropriately performing μ-PCD measurement during the process, process defects can be easily found, and the μ-PCD measurement result can be efficiently fed back to process management.

Therefore, by performing the μ-PCD measurement in the middle of the transistor manufacturing process, the abnormal process can be confirmed without a time delay, and the abnormal can be dealt with immediately. Further, by removing the abnormal sample from the transistor manufacturing process, it is possible to eliminate the waste of flowing the subsequent process. Therefore, the transistor can be efficiently manufactured with a high yield. Alternatively, the transistor can be manufactured with high productivity. Alternatively, a semiconductor device having the transistor can be efficiently manufactured with high productivity.

Further, by moving the sample stage 1311 in the X direction and the Y direction, it is possible to evaluate a plurality of locations in the plane of the oxide semiconductor 1320a. The μ-PCD measurement is non-contact, non-destructive, and can measure multiple points in the sample plane in a short time. Therefore, by performing μ-PCD measurement at a plurality of locations in the sample plane during the transistor manufacturing process, the in-plane distribution of the carrier density of the oxide semiconductor is evaluated during the process, and the electrical characteristics of the transistor are evaluated from the carrier density. The internal distribution can be inferred. Therefore, even if an abnormality occurs in the in-plane distribution of the sample, it can be quickly fed back to the process control.

The absorption rate of excitation light in the μ-PCD measurement of the oxide semiconductor differs depending on the film thickness and band gap of the oxide semiconductor. If the absorption rate of the excitation light is different, the carrier density generated in the oxide semiconductor is different, so that the peak value of the microwave reflection intensity is different depending on the film thickness and band gap of the oxide semiconductor. Prepare a sample that matches the film thickness and band gap of the oxide semiconductor used for transistor fabrication, and obtain the correlation between the carrier density by Hall effect measurement and the peak value and lifetime by μ-PCD measurement in advance. By doing so, the carrier density can be estimated more accurately.

Further, as shown in FIG. 2, a device having two waveguides, a waveguide 1305a and a waveguide 1305b, and a magic T1304 may be used. It is preferable that the waveguide 1305a and the waveguide 1305b have symmetry. Alternatively, the microwave path lengths of the waveguide 1305a and the waveguide 1305b may be the same. In FIG. 2, the waveguide 1305a and the waveguide 1305b show a shape in which the corner portion has a curvature, but the present invention is not limited to this.

Also in the case of FIG. 2, first, microwaves are radiated from the microwave oscillator 1302. The traveling wave is separated into the magic T1304 and the phaser 1315 via the directional coupler 1303. In the magic T1304, the traveling wave is divided into a waveguide 1305a and a waveguide 1305b. The traveling wave that has passed through the waveguide 1305a is incident on the sample 1320 together with the excitation light. Further, the traveling wave that has passed through the waveguide 1305b is directly incident on the sample 1320. At this time, the microwave reflected by the oxide semiconductor 1320a of the sample 1320 passes through the waveguide 1305a and the waveguide 1305b again and returns to the magic T1304. The reflected waves that have passed through the waveguide 1305a and the waveguide 1305b rejoin at the magic T1304, and the magic T1304 outputs their difference signal. Then, in the mixer 1306, it is mixed with the traveling wave separated through the phase device 1315. The mixed signal is detected in the signal processor 1307.

At this time, the reflected wave passing through the waveguide 1305b includes noise caused by the microwave oscillator 1302, disturbance due to mechanical vibration, and the like as much as the reflected wave passing through the waveguide 1305a. Therefore, by taking the difference signal, the influence of noise and the like can be reduced. Therefore, the apparatus shown in FIG. 2 can detect the change in the reflected intensity of the microwave due to the excitation light with higher sensitivity.

(Embodiment 2)
In the present embodiment, the composition of the oxide semiconductor, the structure of the oxide semiconductor, and the like that can be used in one aspect of the present invention will be described with reference to FIGS. 4 and 5.

[Oxide semiconductor]
The oxide semiconductor according to the present invention will be described below.

The oxide semiconductor preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. In addition to them, aluminum, gallium, yttrium, tin and the like are preferably contained. It may also contain one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium and the like.

Here, consider the case where the oxide semiconductor is InMZnO having indium, element M, and zinc. The element M is aluminum, gallium, yttrium, tin, or the like. Examples of elements applicable to the other element M include boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium. However, as the element M, a plurality of the above-mentioned elements may be combined in some cases.

<Structure>
Oxide semiconductors are divided into single crystal oxide semiconductors and other non-single crystal oxide semiconductors. Examples of the non-single crystal oxide semiconductor include CAAC-OS (c-axis aligned semiconductor semiconductor), polycrystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconductor), and pseudo-amorphous oxide semiconductor (a-lique). OS: atomous-like oxide semiconductor) and amorphous oxide semiconductors.

CAAC-OS has a c-axis orientation and has a distorted crystal structure in which a plurality of nanocrystals are connected in the ab plane direction. The strain refers to a region where the orientation of the lattice arrangement changes between a region in which the lattice arrangement is aligned and a region in which another lattice arrangement is aligned in the region where a plurality of nanocrystals are connected.

Although nanocrystals are basically hexagonal, they are not limited to regular hexagons and may have non-regular hexagons. Further, in the strain, it may have a lattice arrangement such as a pentagon and a heptagon. In CAAC-OS, a clear grain boundary (also referred to as grain boundary) cannot be confirmed even in the vicinity of strain. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because CAAC-OS can tolerate distortion due to the fact that the atomic arrangement is not dense in the ab plane direction and the bond distance between atoms changes due to the substitution of metal elements. Conceivable.

Further, CAAC-OS is a layered crystal in which a layer having indium and oxygen (hereinafter, In layer) and a layer having elements M, zinc, and oxygen (hereinafter, (M, Zn) layer) are laminated. It tends to have a structure (also called a layered structure). Indium and the element M can be replaced with each other, and when the element M of the (M, Zn) layer is replaced with indium, it can be expressed as the (In, M, Zn) layer. Further, when the indium of the In layer is replaced with the element M, it can be expressed as the (In, M) layer.

The nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). In addition, nc-OS does not show regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Therefore, the nc-OS may be indistinguishable from the a-like OS and the amorphous oxide semiconductor depending on the analysis method.

The a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor. The a-like OS has a void or low density region. That is, a-like OS has lower crystallinity than nc-OS and CAAC-OS.

Oxide semiconductors have various structures, and each has different characteristics. The oxide semiconductor of one aspect of the present invention may have two or more of amorphous oxide semiconductor, polycrystalline oxide semiconductor, a-like OS, nc-OS, and CAAC-OS.

<Atomic number ratio>
Next, with reference to FIGS. 4 (A), 4 (B), and 4 (C), a preferable range of atomic number ratios of indium, element M, and zinc contained in the oxide semiconductor according to the present invention will be described. .. Note that FIG. 4 (A), FIG. 4 (B), and FIG. 4 (C) do not describe the atomic number ratio of oxygen. Further, the respective terms of the atomic number ratios of indium, element M, and zinc contained in the oxide semiconductor are [In], [M], and [Zn].

In FIGS. 4 (A), 4 (B), and 4 (C), the broken line indicates the atomic number ratio of [In]: [M]: [Zn] = (1 + α) :( 1-α): 1. Line where (-1 ≤ α ≤ 1), [In]: [M]: [Zn] = (1 + α): (1-α): Line where the atomic number ratio is 2, [In]: [M] : [Zn] = (1 + α): (1-α): A line having an atomic number ratio of 3, [In]: [M]: [Zn] = (1 + α): (1-α): 4 atomic numbers It represents a line having a ratio and a line having an atomic number ratio of [In]: [M]: [Zn] = (1 + α) :( 1-α): 5.

The one-point chain line is a line having an atomic number ratio of [In]: [M]: [Zn] = 5: 1: β (β ≧ 0), [In]: [M]: [Zn] = 2: Line with an atomic number ratio of 1: β, [In]: [M]: [Zn] = 1: 1: Line with an atomic number ratio of β, [In]: [M]: [Zn] = 1: 2: Atomic number ratio of β, [In]: [M]: [Zn] = 1: 3: β atomic number ratio, and [In]: [M]: [Zn] = 1 : Represents a line having an atomic number ratio of 4: β.

Further, the atomic number ratio of [In]: [M]: [Zn] = 0: 2: 1 and its vicinity values shown in FIGS. 4 (A), 4 (B), and 4 (C). Oxide semiconductors tend to have a spinel-type crystal structure.

In addition, a plurality of phases may coexist in the oxide semiconductor (two-phase coexistence, three-phase coexistence, etc.). For example, when the atomic number ratio is in the vicinity of [In]: [M]: [Zn] = 0: 2: 1, two phases of a spinel-type crystal structure and a layered crystal structure tend to coexist. Further, when the atomic number ratio is in the vicinity of [In]: [M]: [Zn] = 1: 0: 0, two phases of a big bite-type crystal structure and a layered crystal structure tend to coexist. When a plurality of phases coexist in an oxide semiconductor, grain boundaries may be formed between different crystal structures.

The region A shown in FIG. 4A shows an example of a preferable range of atomic number ratios of indium, element M, and zinc contained in the oxide semiconductor.

By increasing the indium content of the oxide semiconductor, the carrier mobility (electron mobility) of the oxide semiconductor can be increased. Therefore, an oxide semiconductor having a high indium content has a higher carrier mobility than an oxide semiconductor having a low indium content.

On the other hand, when the content of indium and zinc in the oxide semiconductor is low, the carrier mobility is low. Therefore, when the atomic number ratio is [In]: [M]: [Zn] = 0: 1: 0 and its neighboring values (for example, region C shown in FIG. 4C), the insulating property is high. ..

Therefore, it is preferable that the oxide semiconductor of one aspect of the present invention has the atomic number ratio shown in the region A of FIG. 4A, which tends to have a layered structure having high carrier mobility and few grain boundaries. ..

In particular, in the region B shown in FIG. 4B, an excellent oxide semiconductor that easily becomes CAAC-OS and has high carrier mobility can be obtained even in the region A.

CAAC-OS is a highly crystalline oxide semiconductor. On the other hand, in CAAC-OS, since a clear crystal grain boundary cannot be confirmed, it can be said that a decrease in electron mobility due to the crystal grain boundary is unlikely to occur. Further, since the crystallinity of the oxide semiconductor may be lowered due to the mixing of impurities or the generation of defects, CAAC-OS can be said to be an oxide semiconductor having few impurities and defects (oxygen deficiency, etc.). Therefore, the oxide semiconductor having CAAC-OS has stable physical properties. Therefore, the oxide semiconductor having CAAC-OS is resistant to heat and has high reliability.

The region B includes [In]: [M]: [Zn] = 4: 2: 3 to 4.1, and values in the vicinity thereof. The neighborhood value includes, for example, [In]: [M]: [Zn] = 5: 3: 4. Further, the region B includes [In]: [M]: [Zn] = 5: 1: 6 and its neighboring values, and [In]: [M]: [Zn] = 5: 1: 7 and its vicinity. Includes neighborhood values.

The properties of oxide semiconductors are not uniquely determined by the atomic number ratio. Even if the atomic number ratio is the same, the properties of the oxide semiconductor may differ depending on the formation conditions. For example, when an oxide semiconductor is formed by a sputtering apparatus, a film having an atomic number ratio deviating from the target atomic number ratio is formed. Further, depending on the substrate temperature at the time of film formation, the [Zn] of the film may be smaller than the [Zn] of the target. Therefore, the region shown is a region showing an atomic number ratio in which the oxide semiconductor tends to have a specific characteristic, and the boundary between the region A and the region C is not strict.

[Transistor with oxide semiconductor]
Subsequently, a case where the oxide semiconductor is used for a transistor will be described.

By using the oxide semiconductor for the transistor, carrier scattering and the like at the grain boundaries can be reduced, so that a transistor with high field effect mobility can be realized. Moreover, a highly reliable transistor can be realized.

Further, it is preferable to use an oxide semiconductor having a low carrier density for the transistor. When the carrier density of the oxide semiconductor film is lowered, the impurity concentration in the oxide semiconductor film may be lowered to lower the defect level density. In the present specification and the like, a low impurity concentration and a low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic.

Further, since the oxide semiconductor film having high purity intrinsicity or substantially high purity intrinsicity has a low defect level density, the trap level density may also be low.

In addition, the charge captured at the trap level of the oxide semiconductor takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel region is formed in an oxide semiconductor having a high trap level density may have unstable electrical characteristics.

Therefore, in order to stabilize the electrical characteristics of the transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. Further, in order to reduce the impurity concentration in the oxide semiconductor, it is preferable to reduce the impurity concentration in the adjacent film. Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon and the like.

<Impurities>
Here, the influence of each impurity in the oxide semiconductor will be described.

When silicon or carbon, which is one of the Group 14 elements, is contained in the oxide semiconductor, a defect level is formed in the oxide semiconductor. Therefore, the concentration of silicon and carbon in the oxide semiconductor and the concentration of silicon and carbon near the interface with the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are 2 × 10 ¹⁸ atoms / cm ³ or less, preferably 2 × 10 ¹⁷ atoms / cm ³ or less.

Further, when the oxide semiconductor contains an alkali metal or an alkaline earth metal, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have a normally-on characteristic. Therefore, it is preferable to reduce the concentration of alkali metal or alkaline earth metal in the oxide semiconductor. Specifically, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1 × 10 ¹⁸ atoms / cm ³ or less, preferably 2 × 10 ¹⁶ atoms / cm ³ or less.

Further, in an oxide semiconductor, when nitrogen is contained, electrons as carriers are generated, the carrier density is increased, and the n-type is easily formed. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor tends to have a normally-on characteristic. Therefore, in the oxide semiconductor, nitrogen is preferably reduced as much as possible, for example, the nitrogen concentration in the oxide semiconductor is ^{less than 5 × 10 19} atoms / cm ^{3 in} SIMS, preferably 5 × 10 ¹⁸ Atoms / cm ³ or less, more preferably 1 × 10 ¹⁸ atoms / cm ³ or less, still more preferably 5 × 10 ¹⁷ atoms / cm ³ or less.

Further, hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to become water, which may form an oxygen deficiency. When hydrogen enters the oxygen deficiency, electrons that are carriers may be generated. In addition, a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have a normally-on characteristic. Therefore, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible. Specifically, in an oxide semiconductor, the hydrogen concentration obtained by SIMS ^{is less than 1 × 10 20} atoms / cm ³ , preferably less than 1 × 10 ¹⁹ atoms / cm ³ , and more preferably 5 × 10 ¹⁸ atoms / cm. ^{Less than 3} , more preferably less than 1 × 10 ¹⁸ atoms / cm ³ .

By using an oxide semiconductor in which impurities are sufficiently reduced in the channel region of the transistor, stable electrical characteristics can be imparted.

<Band diagram>
Subsequently, a case where the oxide semiconductor has a two-layer structure or a three-layer structure will be described. The laminated structure of the oxide semiconductor S1, the oxide semiconductor S2, and the oxide semiconductor S3, and the band diagram of the insulator in contact with the laminated structure, the laminated structure of the oxide semiconductor S2 and the oxide semiconductor S3, and the insulation in contact with the laminated structure. A band diagram of the body, a laminated structure of the oxide semiconductor S1 and the oxide semiconductor S2, and a band diagram of an insulator in contact with the laminated structure will be described with reference to FIG.

FIG. 5A is an example of a band diagram in the film thickness direction of a laminated structure having an insulator I1, an oxide semiconductor S1, an oxide semiconductor S2, an oxide semiconductor S3, and an insulator I2. Further, FIG. 5B is an example of a band diagram in the film thickness direction of a laminated structure having an insulator I1, an oxide semiconductor S2, an oxide semiconductor S3, and an insulator I2. Further, FIG. 5C is an example of a band diagram in the film thickness direction of a laminated structure having an insulator I1, an oxide semiconductor S1, an oxide semiconductor S2, and an insulator I2. The band diagram shows the energy level (Ec) at the lower end of the conduction band of the insulator I1, the oxide semiconductor S1, the oxide semiconductor S2, the oxide semiconductor S3, and the insulator I2 for easy understanding.

The oxide semiconductor S1 and the oxide semiconductor S3 have an energy level at the lower end of the conduction band closer to the vacuum level than the oxide semiconductor S2, and typically, the energy level at the lower end of the conduction band of the oxide semiconductor S2 and the energy level. The difference between the energy level at the lower end of the conduction band of the oxide semiconductor S1 and the oxide semiconductor S3 is preferably 0.15 eV or more, 0.5 eV or more, and 2 eV or less, or 1 eV or less. That is, the difference between the electron affinity of the oxide semiconductor S1 and the oxide semiconductor S3 and the electron affinity of the oxide semiconductor S2 is 0.15 eV or more, 0.5 eV or more, and 2 eV or less, or 1 eV or less. preferable.

As shown in FIGS. 5 (A), 5 (B), and 5 (C), the energy level at the lower end of the conduction band changes gently in the oxide semiconductor S1, the oxide semiconductor S2, and the oxide semiconductor S3. do. In other words, it can also be said to be continuously changing or continuously joining. In order to have such a band diagram, the defect level density of the mixed layer formed at the interface between the oxide semiconductor S1 and the oxide semiconductor S2 or the interface between the oxide semiconductor S2 and the oxide semiconductor S3 is lowered. It is good to do.

Specifically, the oxide semiconductor S1 and the oxide semiconductor S2, and the oxide semiconductor S2 and the oxide semiconductor S3 have a common element (main component) other than oxygen, so that the defect level density is low. Layers can be formed. For example, when the oxide semiconductor S2 is an In-Ga-Zn oxide semiconductor, In-Ga-Zn oxide semiconductor, Ga-Zn oxide semiconductor, gallium oxide or the like is used as the oxide semiconductor S1 and the oxide semiconductor S3. It is good.

At this time, the main path of the carrier is the oxide semiconductor S2. Since the defect level density at the interface between the oxide semiconductor S1 and the oxide semiconductor S2 and the interface between the oxide semiconductor S2 and the oxide semiconductor S3 can be lowered, the influence of interfacial scattering on carrier conduction is small. High on-current can be obtained.

When electrons are trapped at the trap level, the trapped electrons behave like a fixed charge, and the threshold voltage of the transistor shifts in the positive direction. By providing the oxide semiconductor S1 and the oxide semiconductor S3, the trap level can be kept away from the oxide semiconductor S2. With this configuration, it is possible to prevent the threshold voltage of the transistor from shifting in the positive direction.

The oxide semiconductor S1 and the oxide semiconductor S3 use a material having a sufficiently low conductivity as compared with the oxide semiconductor S2. At this time, the oxide semiconductor S2, the interface between the oxide semiconductor S2 and the oxide semiconductor S1, and the interface between the oxide semiconductor S2 and the oxide semiconductor S3 mainly function as a channel region. For example, for the oxide semiconductor S1 and the oxide semiconductor S3, the oxide semiconductor having the atomic number ratio shown in the region C where the insulating property is high may be used in FIG. 4C. The region C shown in FIG. 4C is [In]: [M]: [Zn] = 0: 1: 0 and its neighboring values, [In]: [M]: [Zn] = 1: It shows the atomic number ratio of 3: 2 and its neighboring values, [In]: [M]: [Zn] = 1: 3: 4, and its neighboring values.

In particular, when an oxide semiconductor having an atomic number ratio shown in region A is used for the oxide semiconductor S2, the oxide semiconductor S1 and the oxide semiconductor S3 have [M] / [In] of 1 or more, preferably 2 or more. It is preferable to use an oxide semiconductor. Further, as the oxide semiconductor S3, it is preferable to use an oxide semiconductor having [M] / ([Zn] + [In]) of 1 or more, which can obtain sufficiently high insulating properties.

<CAC-OS configuration>
In addition, a configuration of CAC (Cloud Aligned Company) -OS that can be used in one aspect of the present invention will be described.

The CAC-OS is, for example, a composition of a material in which the elements constituting the oxide semiconductor are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or a size close thereto. In the following, in the oxide semiconductor, one or more metal elements are unevenly distributed, and the region having the metal elements is 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or a size in the vicinity thereof. The state of being mixed with is also called a mosaic shape or a patch shape.

The oxide semiconductor preferably contains at least indium. In particular, it preferably contains indium and zinc. Also, in addition to them, aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium, etc. One or more selected from the above may be included.

For example, CAC-OS in In-Ga-Zn oxide (In-Ga-Zn oxide may be particularly referred to as CAC-IGZO in CAC-OS) is indium oxide (hereinafter, InO). _X1 (X1 is a real number larger than 0), or indium zinc oxide (hereinafter, In _X2 Zn _Y2 O _Z2 (X2, Y2, and Z2 are real numbers larger than 0)) and gallium. With oxide (hereinafter, GaO _X3 (X3 is a real number larger than 0)) or gallium zinc oxide (hereinafter, Ga _X4 Zn _Y4 O _Z4 (X4, Y4, and Z4 are real numbers larger than 0)) The material is separated into a mosaic-like structure, and the mosaic-like InO _X1 or In _X2 Zn _Y2 O _Z2 is uniformly distributed in the film (hereinafter, also referred to as cloud-like). be.

That is, CAC-OS is a composite oxide semiconductor having a structure in which a region _{containing GaO X3} as a main component and a region _{containing In X2} Zn _Y2 O _Z2 or InO _{X1 as a main component are mixed.} In the present specification, for example, the atomic number ratio of In to the element M in the first region is larger than the atomic number ratio of In to the element M in the second region. It is assumed that the concentration of In is higher than that of region 2.

In addition, IGZO is a common name, and may refer to one compound consisting of In, Ga, Zn, and O. As a typical example, it is represented by InGaO ₃ (ZnO) _m1 (m1 is a natural number) or In _{(1 + x0)} Ga _(1-x0) O ₃ (ZnO) _m0 (-1 ≦ x0 ≦ 1, m0 is an arbitrary number). Crystalline compounds can be mentioned.

The crystalline compound has a single crystal structure, a polycrystalline structure, or the CAAC structure described above. The CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without being oriented on the ab plane.

On the other hand, CAC-OS relates to the material composition of oxide semiconductors. CAC-OS is a region that is partially observed as nanoparticles containing Ga as a main component and nanoparticles containing In as a main component in a material composition containing In, Ga, Zn, and O. The regions observed in a shape refer to a configuration in which the regions are randomly dispersed in a mosaic shape. Therefore, in CAC-OS, the crystal structure is a secondary element.

The CAC-OS does not include a laminated structure of two or more types of films having different compositions. For example, it does not include a structure consisting of two layers, a film containing In as a main component and a film containing Ga as a main component.

In some cases, a clear boundary cannot be observed between the region containing GaO _X3 as the main component and the region _{containing In X2} Zn _Y2 O _Z2 or InO _{X1 as the main component.}

Instead of gallium, select from aluminum, ittrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium. When one or more of these are contained, CAC-OS has a region observed in the form of nanoparticles containing the metal element as a main component and a nano having In as a main component. The regions observed in the form of particles refer to a configuration in which the regions are randomly dispersed in a mosaic pattern.

The CAC-OS can be formed by a sputtering method, for example, under the condition that the substrate is not heated. When the CAC-OS is formed by the sputtering method, one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas may be used as the film forming gas. good. Further, the lower the flow rate ratio of the oxygen gas to the total flow rate of the film-forming gas at the time of film formation is preferable. For example, the flow rate ratio of the oxygen gas is preferably 0% or more and less than 30%, preferably 0% or more and 10% or less. ..

CAC-OS is characterized by the fact that no clear peak is observed when measured using the θ / 2θ scan by the Out-of-plane method, which is one of the X-ray diffraction (XRD) measurement methods. Have. That is, from the X-ray diffraction, it can be seen that the orientation of the measurement region in the ab plane direction and the c-axis direction is not observed.

Further, CAC-OS has a ring-shaped high-luminance region and a plurality of bright regions in the ring region in an electron diffraction pattern obtained by irradiating an electron beam (also referred to as a nanobeam electron beam) having a probe diameter of 1 nm. A point is observed. Therefore, from the electron diffraction pattern, it can be seen that the crystal structure of CAC-OS has an nc (nano-crystal) structure having no orientation in the planar direction and the cross-sectional direction.

Further, for example, in CAC-OS in In-Ga-Zn oxide, a region in which _{GaO X3} is a main component is obtained by EDX mapping acquired by using energy dispersive X-ray spectroscopy (EDX). And, _{it can be confirmed that the region in which In X2} Zn _Y2 O _Z2 or InO _X1 is the main component is unevenly distributed and has a mixed structure.

CAC-OS has a structure different from that of the IGZO compound in which metal elements are uniformly distributed, and has properties different from those of the IGZO compound. That is, the CAC-OS is _{a region in which GaO X3} or the like is the main component and a region in which In _X2 Zn _Y2 O _Z2 or InO _X1 is the main component are phase-separated from each other and each element is the main component. Has a mosaic-like structure.

Here, the _{region in which In X2} Zn _Y2 O _Z2 or InO _X1 is the main component is a region having higher conductivity than the region in which _{GaO X3 or the like is the main component.} That is, _{when the carrier flows through the region where In X2} Zn _Y2 O _Z2 or InO _X1 is the main component, the conductivity as an oxide semiconductor is exhibited. Therefore, a high field effect mobility (μ) can be realized by distributing the region containing _{In X2} Zn _Y2 O _Z2 or InO _{X1 as the main component in the oxide semiconductor in a cloud shape.}

On the other hand, _{the region in which GaO X3} or the like is the main component is a region having higher insulating property than the region in which _{In X2} Zn _Y2 O _Z2 or InO _{X1 is the main component.} That is, since _{the region containing GaO X3} or the like as the main component is distributed in the oxide semiconductor, the leakage current can be suppressed and a good switching operation can be realized.

Therefore, when CAC-OS is used for a semiconductor element, the insulation property caused by _{GaO X3 and the like and the conductivity caused by In X2} Zn _Y2 O _Z2 or InO _X1 act complementarily to be high. On-current (I _on ) and high field-effect mobility (μ) can be achieved.

Further, the semiconductor element using CAC-OS has high reliability. Therefore, CAC-OS is most suitable for various semiconductor devices such as displays.

In the present specification and the like, a metal oxide is a metal oxide in a broad expression. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS) and the like. For example, when a metal oxide is used for a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when the metal oxide has at least one of an amplification action, a rectifying action, and a switching action, the metal oxide can be referred to as a metal oxide semiconductor, or OS for short. Further, when the term "OS FET" is used, it can be rephrased as a transistor having a metal oxide or an oxide semiconductor.

Further, in the present specification and the like, a metal oxide having nitrogen may also be collectively referred to as a metal oxide. Further, a metal oxide having nitrogen may be referred to as a metal oxynitride.

Further, in the present specification and the like, it may be described as CAAC (c-axis aligned complementarity) and CAC (closed coordinate complementarity). CAAC represents an example of a crystal structure, and CAC represents an example of a function or a composition of a material.

Further, in the present specification and the like, the CAC-OS or CAC-metal oxide has a conductive function in a part of the material and an insulating function in a part of the material, and the material as a whole has a semiconductor function. Has the function of. When CAC-OS or CAC-metal oxide is used for the semiconductor layer of the transistor, the conductive function is the function of flowing electrons (or holes) that serve as carriers, and the insulating function is the function of flowing electrons (or holes) that serve as carriers. It is a function that does not shed. By making the conductive function and the insulating function act in a complementary manner, a switching function (on / off function) can be imparted to the CAC-OS or CAC-metal oxide. In CAC-OS or CAC-metal oxide, by separating each function, both functions can be maximized.

Further, in the present specification and the like, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. Further, in the material, the conductive region and the insulating region may be separated at the nanoparticle level. Further, the conductive region and the insulating region may be unevenly distributed in the material. In addition, the conductive region may be observed with the periphery blurred and connected in a cloud shape.

Further, in CAC-OS or CAC-metal oxide, when the conductive region and the insulating region are dispersed in the material in a size of 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 nm or less, respectively. There is.

Further, CAC-OS or CAC-metal oxide is composed of components having different band gaps. For example, CAC-OS or CAC-metal oxide is composed of a component having a wide gap due to an insulating region and a component having a narrow gap due to a conductive region. In the case of this configuration, when the carriers flow, the carriers mainly flow in the components having a narrow gap. Further, the component having a narrow gap acts complementarily to the component having a wide gap, and the carrier flows to the component having a wide gap in conjunction with the component having a narrow gap. Therefore, when the CAC-OS or CAC-metal oxide is used in the channel region of the transistor, a high current driving force, that is, a large on-current and a high field effect mobility can be obtained in the on-state of the transistor.

That is, CAC-OS or CAC-metal oxide can also be referred to as a matrix composite or a metal matrix composite.

When the purpose is to improve the on-current of the transistor or the mobility of the electric field effect of the transistor, it is preferable to increase the carrier density of the oxide semiconductor film. When increasing the carrier density of the oxide semiconductor film, the impurity concentration of the oxide semiconductor film may be slightly increased, or the defect level density of the oxide semiconductor film may be slightly increased. Alternatively, the band gap of the oxide semiconductor film may be made smaller. For example, an oxide semiconductor film having a slightly high impurity concentration or a slightly high defect level density can be regarded as substantially true in the range where the on / off ratio of the Id-Vg characteristic of the transistor can be obtained. In addition, an oxide semiconductor film having a large electron affinity and a bandgap that is associated with it, and as a result of which the density of thermally excited electrons (carriers) is increased, can be regarded as substantially genuine. When an oxide semiconductor film having a higher electron affinity is used, the threshold voltage of the transistor becomes lower.

The oxide semiconductor film having an increased carrier density is slightly n-type.

The carrier density of the substantially intrinsic oxide semiconductor film ^{is preferably 1 × 10 5} cm ^-3 or more and less than 1 × 10 ¹⁸ cm ^-3 , preferably 1 × 10 ⁷ cm ^-3 or more and 1 × 10 ¹⁷ cm ^-3 or less. more preferably, 1 × ¹⁰ 9 ^{cm -3} or more 5 × ¹⁰ 16 ^{cm -3} and more preferably less, more preferably 1 × ^{10 10 cm -3} or higher than 1 × ¹⁰ 16 ^{cm -3,} 1 × ¹⁰ 11 ^{cm -3} More preferably 1 × 10 ¹⁵ cm ^-3 or less.

The carrier density of the oxide semiconductor can be evaluated by performing the μ-PCD measurement by the method shown in the first embodiment. Among oxide semiconductors having a bandgap of 3.17 eV or more and 3.58 eV or less and a film thickness of 27.6 nm or more and 32.5 nm or less, oxide semiconductors having a peak value of 1042 mV or less and a lifetime of τ1 of 50 nsec or more are carriers. It can be estimated that the density is less than 1 × 10 ¹⁶ cm ^{-3, which is preferable.} Therefore, the transistor using the oxide semiconductor can suppress the negative shift of the threshold voltage, improve the on-current, or improve the field effect mobility.

The present embodiment is not limited to the oxide semiconductor within the band gap and film thickness range described above. The carrier density of the oxide semiconductor can be evaluated even in the oxide semiconductor outside the range of the band gap and the film thickness described above, and the oxide semiconductor can be used for the transistor.

This embodiment can be carried out in combination with at least a part thereof as appropriate with other embodiments described in the present specification.

(Embodiment 3)
In the present embodiment, one embodiment of the semiconductor device using the transistor having an oxide semiconductor, which is the same as the previous embodiment, will be described with reference to FIGS. 6 to 26.

<Configuration example of semiconductor device 1000>
6 (A) to 6 (E) are a top view and a cross-sectional view showing the semiconductor device 1000. The semiconductor device 1000 has a transistor 200 and a transistor 400. The transistor 200 and the transistor 400 formed on the substrate 310 have different configurations. For example, the transistor 400 may have a configuration in which the drain current (hereinafter, referred to as Icut) when the back gate voltage and the top gate voltage are 0 V is smaller than that of the transistor 200. The transistor 400 is used as a switching element, and the potential of the back gate of the transistor 200 can be controlled. As a result, it is possible to prevent the charge of the node connected to the back gate of the transistor 200 from disappearing by turning off the transistor 400 after setting the node connected to the back gate of the transistor 200 to a desired potential.

Here, FIG. 6A is a top view of the semiconductor device 1000. FIG. 6B corresponds to the alternate long and short dash line L1-L2 in FIG. 6A, and is a cross-sectional view of the transistor 200 and the transistor 400 in the channel length direction. Further, FIG. 6C corresponds to the alternate long and short dash line W1-W2 in FIG. 6A, and is a cross-sectional view of the transistor 200 in the channel width direction. Further, FIG. 6D is a cross-sectional view of the transistor 200 corresponding to the alternate long and short dash line W3-W4 in FIG. 6A. Further, FIG. 6E corresponds to the alternate long and short dash line W5-W6 in FIG. 6A, and is a cross-sectional view of the transistor 400 in the channel width direction.

Hereinafter, the configurations of the transistor 200 and the transistor 400 will be described with reference to FIGS. 4 (A) to 4 (E), respectively. The details of the constituent materials of the transistor 200 and the transistor 400 will be described in detail in <Constituent Materials>.

[Transistor 200]
As shown in FIGS. 6A to 6D, the transistor 200 includes an insulator 212 arranged on the substrate 310, an insulator 214 arranged on the insulator 212, and an insulator 214. On top of the conductor 205 (conductor 205a and 205b) placed on top of the conductor 205, and on top of the insulator 220, insulator 222, and insulator 224 and insulator 224 placed on top of the conductor 205. The arranged oxide semiconductor 230 (oxide semiconductor 230a, oxide semiconductor 230b, and oxide semiconductor 230c), the conductor 240a arranged on the oxide semiconductor 230b, and the conductor 240b (hereinafter, the conductor 240a). And the conductor 240b may be collectively referred to as a conductor 240), a layer 245a arranged on the conductor 240, and a layer 245b (hereinafter, a layer 245a and a layer 245b may be collectively referred to as a layer 245). ), The insulator 250 arranged on the oxide semiconductor 230c, the conductor 260 (conductor 260a, the conductor 260b, and the conductor 260c) arranged on the insulator 250, and the conductor 260c. It has a layer 270 arranged on top of the layer 270, an insulator 272 placed on top of the layer 270, and an insulator 274 placed on top of the insulator 272.

The insulator 212 and the insulator 214 can function as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the transistor 200 and the like from the lower layer. For the insulator 212 and the insulator 214, it is preferable to use an insulating material in which impurities such as water and hydrogen are difficult to permeate, and for example, aluminum oxide is preferably used. This makes it possible to prevent impurities such as hydrogen and water from diffusing from the substrate 310 into the layers above the insulator 212 and the insulator 214. The insulating material 212 and the insulator 214 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, nitric oxide molecule _(N 2 O, NO, etc. NO _2), at least one impurity such as copper atoms It is preferable that it is difficult to permeate. The same applies to the case where an insulating material in which impurities are difficult to permeate is described below.

Further, for example, it is preferable that the insulator 212 is formed by using an atomic layer deposition (ALD) method. As a result, the insulator 212 can be formed into a film with good coverage, and cracks, pinholes, and the like can be suppressed from being formed. Further, for example, it is preferable that the insulator 214 is formed into a film by a sputtering method. As a result, the film can be formed at a higher film forming speed than the insulator 212, and the film thickness can be increased more productively than the insulator 212. By laminating the insulator 212 and the insulator 214, the barrier property against impurities such as hydrogen and water can be improved. The insulator 212 may be provided under the insulator 214. Further, when the insulator 214 has a sufficient barrier property against impurities, the insulator 212 may not be provided.

Further, it is preferable to use an insulating material for the insulator 212 and the insulator 214, which is difficult for oxygen (for example, oxygen atom or oxygen molecule) to permeate. As a result, it is possible to suppress the downward diffusion of oxygen contained in the insulator 224 and the like. As a result, oxygen can be effectively supplied to the oxide semiconductor 230b.

Here, the insulator 214 and the insulator 216 are formed with openings, and the inner walls of these openings are connected to form one opening.

The conductor 205a is formed in contact with the inner walls of the openings of the insulator 214 and the insulator 216, and the conductor 205b is further formed inside. Here, the height of the upper surface of the conductor 205a and the conductor 205b can be made the same as the height of the upper surface of the insulator 216. The conductor 205 can function as one of the gate electrodes.

Here, it is preferable to use a conductive material for the conductor 205a, which is difficult for impurities such as water and hydrogen to permeate. Further, for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used, and a single layer or a laminated layer may be used. As a result, impurities such as hydrogen and water can be prevented from diffusing from the substrate 310 to the upper layer through the conductor 205. Incidentally, the conductor 205a is a hydrogen atom, a hydrogen molecule, a water molecule, an oxygen atom, an oxygen molecule, a nitrogen atom, a nitrogen molecule, nitric oxide molecule _(N 2 O, NO, etc. NO _2), or impurities such as copper atoms, It is preferable that at least one of oxygen (for example, an oxygen atom, an oxygen molecule, etc.) is difficult to permeate. The same applies to the case where a conductive material in which impurities are difficult to permeate is described below.

When a metal such as copper that easily diffuses in silicon oxide is used for the conductor 205b, copper or the like can be used as the insulator 220 by using an insulating material such as silicon nitride or silicon nitride that does not easily allow copper to permeate. It is possible to prevent impurities from diffusing above the insulator 220. At this time, it is preferable to use an insulating material in which copper does not easily permeate the conductor 205a so that impurities such as copper do not diffuse to the outside of the conductor 205a and the conductor 205b.

Further, as the insulator 222, it is preferable to use an insulating material in which impurities such as water and hydrogen and oxygen are difficult to permeate, and for example, aluminum oxide or hafnium oxide is preferably used. This makes it possible to prevent impurities such as hydrogen and water from diffusing from the substrate 310 into the layers above the insulator 212 and the insulator 214. Further, it is possible to suppress the downward diffusion of oxygen contained in the insulator 224 and the like.

The insulator 224 is preferably formed by using an insulator that releases oxygen by heating. Specifically, the amount of oxygen desorbed in terms of oxygen atoms by the thermal desorption gas analysis method (TDS: Thermal Desorption Spectroscopy) is 1.0 × 10 ¹⁸ atoms · cm ^-3 or more, preferably 3. It is preferable to use an insulator having 0 × 10 ²⁰ atoms · cm ^{-3 or more.} The oxygen released by heating is also referred to as "excess oxygen". By providing such an insulator 224 in contact with the oxide semiconductor 230, oxygen can be effectively supplied to the oxide semiconductor 230b.

Further, it is preferable that the concentration of impurities such as water, hydrogen or nitrogen oxides in the insulator 224 is reduced. ^{For example, the amount of hydrogen desorbed from the insulator 224 is 2 × 10 15 in} the range of 50 ° C. to 500 ° C. in TDS, in which the amount desorbed in terms of hydrogen molecules is converted into the area of the insulator 224. Molecules · cm ^-2 or less, preferably 1 × 10 ¹⁵ molecules · cm ^-2 or less, more preferably 5 × 10 ¹⁴ molecules · cm ^-2 or less.

The insulator 220, the insulator 222, and the insulator 224 can function as a gate insulating film.

As the oxide semiconductor 230a, for example, it is preferable to use an oxide formed in an oxygen atmosphere. Thereby, the shape of the oxide semiconductor 230a can be stabilized. The details of the configurations of the oxide semiconductor 230a to the oxide semiconductor 230c will be described later.

In order to impart stable electrical characteristics and good reliability to the transistor 200, the oxide semiconductor 230b must have high purity intrinsicity or substantially high purity intrinsicity with reduced impurities and oxygen deficiency in the oxide. Is preferable. Oxides that are of high purity or substantially high purity may also have low trap level densities due to their low defect level density.

In addition, the charge captured at the trap level of the oxide takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel region is formed in an oxide having a high trap level density may have unstable electrical characteristics and a decrease in reliability.

Therefore, in order to stabilize the electrical characteristics of the transistor and improve the reliability, it is effective to reduce the oxygen deficiency and the impurity concentration in the oxide. Further, in order to reduce the impurity concentration in the oxide, it is preferable to reduce the impurity concentration in the adjacent film.

Further, as the oxide semiconductor 230b, an oxide having a higher electron affinity than the oxide semiconductor 230a and the oxide semiconductor 230c is used. For example, the oxide semiconductor 230b has an electron affinity of 0.07 eV or more and 1.3 eV or less, preferably 0.1 eV or more and 0.7 eV or less, more preferably 0.1 eV or more and 0, as compared with the oxide semiconductor 230a and the oxide semiconductor 230c. Use oxides larger than .4 eV. The electron affinity is the difference between the vacuum level and the energy at the lower end of the conduction band.

Further, the oxide semiconductor 230b has a first region, a second region, and a third region. The third region is sandwiched between the first region and the second region in the top view. The transistor 200 has a conductor 240a in contact with the first region of the oxide semiconductor 230b. Further, the transistor 200 has a conductor 240b in contact with the second region of the oxide semiconductor 230b. The conductor 240a can function as one of the source electrode or the drain electrode, and the conductor 240b can function as the other of the source electrode or the drain electrode. Therefore, one of the first region or the second region of the oxide semiconductor 230b can function as a source region, and the other can function as a drain region. Further, the third region of the oxide semiconductor 230b can function as a channel forming region.

The amount of oxygen deficiency contained in the oxide semiconductor 230b may be evaluated by using, for example, a constant current measurement method (CPM: Constant Photocurent Measurement). By using CPM, it is possible to evaluate deep defect levels caused by oxygen deficiency in the sample. Further, the amount of hydrogen captured by the oxygen deficiency contained in the oxide semiconductor 230b may be evaluated by using, for example, electron spin resonance (ESR) analysis or the like. By using ESR, it is possible to evaluate conduction electrons caused by hydrogen captured by oxygen deficiency in a sample.

Here, it is preferable that the side surfaces of the conductor 240a and the conductor 240b on the side in contact with the oxide semiconductor 230c have a taper angle of less than 90 °. It is preferable that the angle formed by the side surface and the bottom surface of the conductor 240a and the conductor 240b on the side in contact with the oxide semiconductor 230c is 45 ° or more and 75 ° or less. By forming the conductors 240a and 240b in this way, the oxide semiconductor 230c can be formed on the stepped portion formed by the conductor 240 with good coverage. As a result, it is possible to prevent the oxide semiconductor 230c from being stepped and the oxide semiconductor 230b from coming into contact with the insulator 250 or the like.

Further, the layer 245a is formed on the conductor 240a, and the layer 245b is formed on the conductor 240b. Here, for the layer 245a and the layer 245b, it is preferable to use a material in which oxygen does not easily permeate, and for example, aluminum oxide or the like can be used. This makes it possible to prevent the surrounding excess oxygen from being consumed by the oxidation of the conductor 240a and the conductor 240b.

The oxide semiconductor 230c is formed on the layer 245a, the layer 245b, the conductor 240a, the conductor 240b, the oxide semiconductor 230b, and the oxide semiconductor 230a. Here, the oxide semiconductor 230c is in contact with the upper surface of the oxide semiconductor 230b, the side surface of the oxide semiconductor 230b in the channel width direction, the side surface of the oxide semiconductor 230a in the channel width direction, and the upper surface of the insulator 224. The oxide semiconductor 230c may have a function of supplying oxygen to the oxide semiconductor 230b. Further, by forming the insulator 250 on the oxide semiconductor 230c, it is possible to prevent impurities such as water and hydrogen from directly entering the oxide semiconductor 230b from the insulator 250. Further, for example, it is preferable to use an oxide film formed in an oxygen atmosphere. Thereby, the shape of the oxide semiconductor 230c can be stabilized.

The insulator 250 can function as a gate insulating film. Like the insulator 224, the insulator 250 is preferably formed by using an insulator that releases oxygen by heating. By providing such an insulator 250 in contact with the oxide semiconductor 230, oxygen can be effectively supplied to the oxide semiconductor 230b. Further, similarly to the insulator 224, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 250 is reduced.

It has a conductor 260a on the insulator 250, a conductor 260b on the conductor 260a, and a conductor 260c on the conductor 260b. The insulator 250 and the conductor 260 have a region that overlaps with the third region. Further, the ends of the insulator 250, the conductor 260a, the conductor 260b, and the conductor 260c are substantially the same.

One of the conductor 205 and the conductor 260 can function as a gate electrode, and the other can function as a back gate electrode. The gate electrode and the back gate electrode are arranged so as to sandwich the channel formation region of the semiconductor. The potential of the back gate electrode may be the same potential as that of the gate electrode, or may be a ground potential or an arbitrary potential. Further, the threshold voltage of the transistor can be changed by changing the potential of the back gate electrode independently without interlocking with the gate electrode.

The conductor 260a is preferably an oxide having conductivity. For example, among the In-Ga-Zn-based oxides that can be used as the oxide semiconductor 230, the metal having a high atomic number ratio of [In]: [Ga]: [Zn] = 4: 2: 3 has high conductivity. It is preferable to use those having a value from to 4.1 or its vicinity.

The conductor 260b is preferably a conductor capable of improving the conductivity of the conductor 260a by adding an impurity such as nitrogen to the conductor 260a. For example, it is preferable to use titanium nitride or the like for the conductor 260b.

Further, a layer 270 is formed on the conductor 260. Here, for the layer 270, it is preferable to use a material in which oxygen does not easily permeate, and for example, aluminum oxide or the like can be used. This makes it possible to prevent the surrounding excess oxygen from being consumed by the oxidation of the conductor 260. As described above, the layer 270 functions as a gate cap that protects the gate. The layer 270 and the oxide semiconductor 230c are stretched beyond the end of the conductor 260 and have an overlapping region at the stretched portion, and the end of the layer 270 and the end of the oxide semiconductor 230c are substantially coincident with each other. There is.

The insulator 272 is provided so as to cover the oxide semiconductor 230, the conductor 240, the layer 245, the insulator 250, the conductor 260, and the layer 270. Further, the insulator 272 is provided in contact with the side surface of the oxide semiconductor 230b and the upper surface of the insulator 224. Further, an insulator 274 is provided on the insulator 272. The insulator 272 and the insulator 274 can function as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the transistor 200 and the like from the upper layer.

Here, as the insulator 272, it is preferable to use an oxide insulator formed by a sputtering method, and for example, aluminum oxide is preferably used. By using such an insulator 272, oxygen can be added to the surfaces of the insulator 224 and the oxide semiconductor 230b in contact with the insulator 272 to create an excess oxygen state.

Further, the insulator 272 and the insulator 274 preferably have a function of getting hydrogen in the oxide semiconductor 230 and the insulator 224 and diffusing outward by performing heat treatment, for example, aluminum oxide. Is preferably used. Thereby, impurities such as water and hydrogen in the insulator 224 and the oxide semiconductor 230b can be reduced.

Further, as the insulator 272 and the insulator 274, it is preferable to use an insulating material in which impurities such as water and hydrogen are difficult to permeate, and for example, aluminum oxide is preferably used. By using such an insulator 272, it is possible to suppress the diffusion of impurities such as hydrogen and water from the upper layer of the insulator 274 to the lower layer of the insulator 272.

Further, as the insulator 274, it is preferable to use an oxide insulator formed by the ALD method, and for example, aluminum oxide is preferably used. The insulator 274 formed by the ALD method has good coverage and is a film in which the formation of cracks and pinholes is suppressed. The insulator 272 and the insulator 274 are provided on a shape having irregularities, but by using the insulator 274 formed by the ALD method, a transistor is not formed without step breaks, cracks, pinholes, or the like. 200 can be covered with insulator 274. As a result, even if a step break occurs in the insulator 272, it can be covered with the insulator 274, so that the barrier property of the laminated film of the insulator 272 and the insulator 274 against impurities such as hydrogen and water is more remarkable. Can be improved.

Further, when the insulator 272 is formed by the sputtering method and the insulator 274 is formed by the ALD method, the film thickness of the portion where the upper surface of the conductor 260c is the surface to be formed (hereinafter referred to as the first film thickness). ) And the film thickness of the oxide semiconductor 230a, the oxide semiconductor 230b, and the portion where the side surface of the conductor 240 is the surface to be formed (hereinafter referred to as the second film thickness), and the insulator 272 and the insulation. The film thickness ratio may differ depending on the body 274. In the insulator 272, the first film thickness and the second film thickness can be made to have the same size. On the other hand, in the insulator 274, the first film thickness is often larger than the second film thickness, and for example, the first film thickness may be about twice the second film thickness. ..

Further, as the insulator 272 and the insulator 274, it is preferable to use an insulating material in which oxygen does not easily permeate. As a result, it is possible to suppress the upward diffusion of oxygen contained in the insulator 224, the insulator 250 and the like.

As described above, the transistor 200 has a structure sandwiched between the insulator 274, the insulator 272, the insulator 214, and the insulator 212, so that oxygen is not diffused outward, and the insulator 224, the oxide semiconductor 230, and the like. And a large amount of oxygen can be contained in the insulator 250. Further, it is possible to prevent impurities such as hydrogen or water from being mixed from above the insulator 274 and below the insulator 212, and to reduce the impurity concentrations in the insulator 224, the oxide semiconductor 230, and the insulator 250. can.

In this way, by reducing oxygen deficiency in the oxide semiconductor 230b that functions as the semiconductor layer of the transistor 200 and reducing impurities such as hydrogen and water, the electrical characteristics of the transistor 200 are stabilized and reliability is improved. Can be made to.

An insulator 280 is provided on the insulator 274. Like the insulator 224, the insulator 280 preferably has a reduced concentration of impurities such as water or hydrogen in the film.

Further, an insulator 282 is provided on the insulator 280, and an insulator 284 is provided on the insulator 282. The insulator 282 and the insulator 284 can function as a barrier insulating film that prevents impurities such as water and hydrogen from being mixed into the transistor 200 and the like from the upper layer. As for the insulator 282 and the insulator 284, like the insulator 272 and the insulator 274, it is preferable to use an insulating material such as aluminum oxide which is difficult for impurities such as water and hydrogen and oxygen to permeate.

Like the insulator 272 and the insulator 274, the insulator 282 and the insulator 284 preferably have a property of getting hydrogen in the insulator 280 by heat treatment, and for example, aluminum oxide is used. Is preferable. By providing such an insulator 282 and an insulator 284, the concentration of impurities such as water or hydrogen in the film of the insulator 280 can be reduced.

Further, as the insulator 284, like the insulator 274, it is preferable to use an oxide insulator formed by the ALD method, and for example, aluminum oxide is preferably used. By using such an insulator 274, it is possible to suppress the diffusion of impurities such as hydrogen and water from the upper layer of the insulator 284 to the lower layer of the insulator 282.

Here, the insulator 216, the insulator 220, the insulator 222, the insulator 224, the insulator 272, the insulator 274, and the insulator 280 are formed with an opening 480 reaching the insulator 214. The insulator 282 is also formed inside the opening 480 and is in contact with the upper surface of the insulator 214. Although only a part of the opening 480 extended in the W1-W2 direction is shown in FIG. 6A, the opening 480 is formed so as to surround the transistor 200 and the transistor 400, and at least the oxide semiconductor 230. An opening 480 is formed so as to surround the outer side. Further, it is preferable that the opening 480 is closed and the region inside the opening 480 and the region outside the opening 480 are separated. In the opening 480, the upper surface of the insulator 214 and the lower surface of the insulator 282 are in contact with each other, and the region surrounded by the opening 480 can be said to be a region surrounded by the insulator 214 and the insulator 282.

With such a structure, the transistor 200 can be enclosed and sealed by the insulator 282 and the insulator 284 not only from the vertical direction of the substrate but also from the side surface direction. This makes it possible to prevent impurities such as water and hydrogen from diffusing from the outside of the insulator 284 into the transistor 200 and the transistor 400. Further, by forming the insulator 282 by the ALD method, it is possible to form a film even at the opening 480 without causing step breakage or the like. As a result, even if a step break occurs in the insulator 282, it can be covered with the insulator 284, so that the barrier property of the laminated film of the insulator 282 and the insulator 284 against impurities can be improved.

Further, it is preferable that the opening 480 is provided so as to be located inside the dicing line or scribe line for cutting out the semiconductor device 1000. As a result, even when the semiconductor device 1000 is cut out, the side surfaces of the insulator 280, the insulator 224, the insulator 216, and the like remain sealed with the insulator 282 and the insulator 284. It is possible to prevent impurities such as water from entering and diffusing into the transistor 200 and the transistor 400. A plurality of regions surrounded by openings 480 may be provided inside the dicing line or the scribe line, and the plurality of semiconductor devices may be individually sealed with the insulator 282 and the insulator 284.

[Transistor 400]
As shown in FIGS. 6 (A), 6 (B) and 6 (E), the transistor 400 has an insulator 212 arranged on the substrate 310 and an insulator arranged on the insulator 212. 214 and the conductor 403 (conductor 403a and conductor 403b), the conductor 405 (conductor 405a and the conductor 405b), the conductor 407 (conductor 407a, and the conductivity) arranged on the insulator 214. Body 407b), insulator 403, insulator 405, and insulator 220, insulator 222, and insulator 224 arranged on the conductor 407, and insulator 224, insulator 405b, and insulator 407b. The oxide semiconductor 430 arranged on the oxide semiconductor 430, the insulator 450 arranged on the oxide semiconductor 430, and the conductor 460 arranged on the insulator 450 (conductor 460a, conductor 460b, and conductor). 460c), a layer 470 arranged on the conductor 460c, an insulator 272 arranged on the layer 470, and an insulator 274 arranged on the insulator 272. Hereinafter, the configuration described with respect to the transistor 200 will be omitted.

A conductor 403, a conductor 405, and a conductor 407 are provided in the opening of the insulator 216. It is preferable that the conductor 403, the conductor 405, and the conductor 407 have the same configuration as that of the conductor 205. The conductor 403a is formed in contact with the inside of the opening of the insulator 216, and the conductor 403b is further formed inside. The conductor 405 and the conductor 407 also have the same configuration as the conductor 403. One of the conductors 405 and 407 can function as one of the source or drain electrodes, and the other can function as the other of the source or drain electrodes.

The oxide semiconductor 430 preferably has the same configuration as the oxide semiconductor 230c. Further, the oxide semiconductor 430 has a first region, a second region, and a third region. The third region is sandwiched between the first region and the second region in the top view. The transistor 400 has a conductor 405b below the first region of the oxide semiconductor 430 and a conductor 407b above the second region of the oxide semiconductor 430. Therefore, one of the first region or the second region of the oxide semiconductor 430c can function as a source region, and the other can function as a drain region. Further, the third region of the oxide semiconductor 430c can function as a channel forming region.

In the transistor 200, a channel is formed in the oxide semiconductor 230b, but in the transistor 400, a channel is formed in the oxide semiconductor 430. As the oxide semiconductor 230b and the oxide semiconductor 430, it is preferable to use semiconductor materials having different electrical properties. By using semiconductor materials having different electrical properties for the oxide semiconductor 230b and the oxide semiconductor 430, the electrical characteristics of the transistor 200 and the transistor 400 can be made different.

Further, for example, by using a semiconductor having an electron affinity smaller than that of the oxide semiconductor 230b for the oxide semiconductor 430, the threshold voltage of the transistor 400 can be made larger than that of the transistor 200. Specifically, when the oxide semiconductor 430 and the oxide semiconductor 230b are In—M—Zn oxides (oxides containing In, elements M and Zn), the oxide semiconductor 430 is mixed with In: M: Zn = x. ₁ : y ₁ : z ₁ [atomic number ratio], where the oxide semiconductor 230b is In: M: Zn = x ₂ : y ₂ : z ₂ [atomic number ratio], y ₁ / x ₁ is y ₂ / x. _An oxide semiconductor 430 and an oxide semiconductor 230b larger than 2 may be used. In the oxide semiconductor 230b, for example, the target atomic number ratio is In: M: Zn = 1: 1: 1, In: M: Zn = 1: 1: 1.2, In: M: Zn = 2: 1. : 1.5, In: M: Zn = 2: 1: 2.3, In: M: Zn = 2: 1: 3, In: M: Zn = 3: 1: 2, In: M: Zn = 4 It is preferable that the film is formed using 2: 4.1, In: M: Zn = 4: 2: 3, In: M: Zn = 5: 1: 7, or the like. Further, in the oxide semiconductor 430, for example, the target atomic number ratio is In: M: Zn = 1: 2: 4, In: M: Zn = 1: 3: 2, In: M: Zn = 1: 3. : 4, In: M: Zn = 1: 3: 6, In: M: Zn = 1: 3: 8, In: M: Zn = 1: 4: 3, In: M: Zn = 1: 4: 4 , In: M: Zn = 1: 4: 5, In: M: Zn = 1: 4: 6, In: M: Zn = 1: 6: 3, In: M: Zn = 1: 6: 4, In : M: Zn = 1: 6: 5, In: M: Zn = 1: 6: 6, In: M: Zn = 1: 6: 7, In: M: Zn = 1: 6: 8, In: M It is preferable that the film is formed by using Zn = 1: 6: 9, In: M: Zn = 1: 10: 1, and the like. However, the present invention is not limited to this, and the atomic number ratios of the oxide semiconductor 430 and the oxide semiconductor 230b may be appropriately set within a range satisfying the above equation. By using such an In-M-Zn oxide, the Vth of the transistor 400 can be made larger than that of the transistor 200.

Further, in the transistor 400, since the region where the channel of the oxide semiconductor 230 is formed is in direct contact with the insulator 224 and the insulator 450, it is easily affected by interfacial scattering and trap level. As a result, the field effect mobility and carrier density of the transistor 400 can be reduced. Further, the threshold voltage of the transistor 400 can be made larger than that of the transistor 200.

The oxide semiconductor 430 preferably contains a large amount of excess oxygen, and for example, it is preferable to use an oxide formed in an oxygen atmosphere. By using such an oxide semiconductor 430 as a semiconductor layer, the threshold voltage of the transistor 400 can be made larger than 0V, the off-current can be reduced, and the Icut can be made very small.

The insulator 450 preferably has the same configuration as the insulator 250, and can function as a gate insulating film. By providing such an insulator 450 in contact with the oxide semiconductor 430, oxygen can be effectively supplied to the oxide semiconductor 430. Further, similarly to the insulator 224, it is preferable that the concentration of impurities such as water or hydrogen in the insulator 450 is reduced.

The conductor 460 preferably has the same configuration as that of the conductor 260. It has a conductor 460a on the insulator 450, a conductor 460b on the conductor 460a, and a conductor 460c on the conductor 460b. The insulator 450 and the conductor 460 have a region that overlaps with the third region. Further, the ends of the insulator 450, the conductor 460a, the conductor 460b, and the conductor 460c are substantially the same. One of the conductors 403 and 460 can function as a gate electrode, and the other can function as a back gate electrode.

The layer 470 preferably has the same structure as the layer 270. A layer 470 is formed on the conductor 460. This makes it possible to prevent the surrounding excess oxygen from being consumed by the oxidation of the conductor 460. The layer 470 and the oxide semiconductor 430c are stretched beyond the end of the conductor 460 and have an overlapping region at the stretched portion, and the end of the layer 470 and the end of the oxide semiconductor 430 are substantially coincident with each other. There is.

Similar to the transistor 200, the transistor 400 also has a structure sandwiched between the insulator 274, the insulator 272, the insulator 214, and the insulator 212, so that oxygen is not diffused outward and the insulator 224 and the oxide semiconductor are formed. A large amount of oxygen can be contained in the 430 and the insulator 450. Further, it is possible to prevent impurities such as hydrogen or water from being mixed from above the insulator 274 and below the insulator 212, and to reduce the impurity concentrations in the insulator 224, the oxide semiconductor 230, and the insulator 250. can.

In this way, the threshold voltage of the transistor 400 is made larger than 0V by reducing the oxygen deficiency in the oxide semiconductor 430 that functions as the semiconductor layer of the transistor 400 and reducing impurities such as hydrogen and water. The off-current can be reduced and the Icut can be made very small. Further, the electrical characteristics of the transistor 400 can be stabilized and the reliability can be improved.

By using such a transistor 400 as a switching element to maintain the potential of the back gate of the transistor 200, the off state of the transistor 200 can be maintained for a long time.

<About constituent materials>

〔substrate〕
There is no major limitation on the substrate used for manufacturing the semiconductor device, but it is necessary to have at least heat resistance enough to withstand the subsequent heat treatment. For example, a single crystal semiconductor substrate made of silicon, silicon carbide, or the like, a polycrystalline semiconductor substrate, a compound semiconductor substrate made of silicon germanium, or the like can be used as the substrate. Further, an SOI substrate or a semiconductor substrate on which a semiconductor element such as a strain transistor or a FIN type transistor is provided can also be used. Alternatively, gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium nitride, indium phosphide, silicon germanium and the like, which are applicable to high electron mobility transistors (HEMTs), may be used. That is, the substrate is not limited to a simple support substrate, and may be a substrate on which a device such as another transistor is formed. In this case, at least one of the transistor 200, or the gate, source, or drain of the transistor 400 may be electrically connected to the other device.

Further, as the substrate, a glass substrate such as barium borosilicate glass or aluminoborosilicate glass, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like can also be used. A flexible substrate (flexible substrate) may be used as the substrate. When a flexible substrate is used, a transistor, a capacitive element, or the like may be directly manufactured on the flexible substrate, or a transistor, a capacitive element, or the like may be manufactured on another manufactured substrate, and then the flexible substrate is formed. It may be peeled off or transposed. In addition, in order to peel and transfer from the manufactured substrate to the flexible substrate, it is preferable to provide a peeling layer between the manufactured substrate and a transistor, a capacitive element, or the like.

As the flexible substrate, for example, metal, alloy, resin or glass, fibers thereof, or the like can be used. As for the flexible substrate used for the substrate, the lower the coefficient of linear expansion, the more the deformation due to the environment is suppressed, which is preferable. As the flexible substrate used for the substrate, for example, a material having a linear expansion coefficient of 1 × 10 ^-3 / K or less, 5 × 10 ^-5 / K or less, or 1 × 10 ^-5 / K or less may be used. Examples of the resin include polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, acrylic and the like. In particular, aramid is suitable as a flexible substrate because of its low coefficient of linear expansion.

〔Insulator〕
Insulator 216, insulator 220, insulator 224, insulator 250, insulator 450, and insulator 280 are, for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, argon, gallium. Insulating materials containing germanium, yttrium, zirconium, lanthanum, neodymium, hafnium or tantalum may be used in single layers or in layers. For example, silicon oxide, silicon oxide, silicon nitride, silicon nitride, aluminum nitride, aluminum oxide, aluminum oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide. , Hafnium oxide, tantalum oxide, aluminum silicate, etc. are used in a single layer or in layers. Further, among the oxide material, the nitride material, the oxide nitride material, and the nitride oxide material, a material obtained by mixing a plurality of materials may be used.

In the present specification, the nitride oxide refers to a compound having a higher nitrogen content than oxygen. The oxidative nitride refers to a compound having a higher oxygen content than nitrogen. The content of each element can be measured by using, for example, Rutherford backscattering method (RBS) or the like.

Insulator 212, insulator 214, insulator 222, insulator 272, insulator 274, insulator 282, and insulator 284 are water or water from insulator 224, insulator 250, insulator 450, and insulator 280. It is preferably formed using an insulating material that does not easily allow impurities such as hydrogen to permeate. For example, aluminum oxide, aluminum nitride, aluminum nitride, aluminum nitride, aluminum nitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, etc. Examples thereof include aluminum nitride. These may be used in a single layer or in a laminated manner.

By using an insulating material in which impurities do not easily permeate into the insulator 212, the insulator 214, and the insulator 222, it is possible to suppress the diffusion of impurities from the substrate side to the transistor and improve the reliability of the transistor. By using an insulating material in which impurities do not easily permeate into the insulator 272, the insulator 274, the insulator 282, and the insulator 284, the diffusion of impurities from the upper layer to the transistor above the insulator 280 is suppressed, and the reliability of the transistor is suppressed. You can improve your sex.

As the insulator 212, the insulator 214, the insulator 272, the insulator 282, and the insulator 284, a plurality of insulating layers formed of these materials may be laminated and used. Further, either the insulator 212 or the insulator 214 may be omitted. Further, either the insulator 282 or the insulator 284 may be omitted.

Here, the insulating material from which impurities are difficult to permeate has a function of suppressing the diffusion of impurities typified by hydrogen or water, has high oxidation resistance, and has a function of suppressing the diffusion of oxygen.

For example, with respect to silicon oxide, aluminum oxide has a very small diffusion distance of oxygen or hydrogen per hour in an atmosphere of 350 ° C. or 400 ° C. Therefore, it can be said that aluminum oxide is a material in which impurities are difficult to permeate.

Further, as an example of an insulating material in which impurities are difficult to permeate, for example, silicon nitride formed by the CVD method can be used. Here, hydrogen may diffuse into a semiconductor element having an oxide semiconductor such as a transistor 200, so that the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable that the transistor 200 is sealed with a film that suppresses the diffusion of hydrogen. Specifically, the membrane that suppresses the diffusion of hydrogen is a membrane that desorbs a small amount of hydrogen.

The amount of hydrogen desorbed can be analyzed using, for example, TDS. ^{For example, the amount of hydrogen desorbed from the insulator 212 is 2 × 10 15 in} the range of 50 ° C. to 500 ° C. in TDS, where the amount of desorption converted into hydrogen molecules is converted into the area of the insulator 212. Molecules · cm ^-2 or less, preferably 1 × 10 ¹⁵ molecules · cm ^-2 or less, more preferably 5 × 10 ¹⁴ molecules · cm ^-2 or less.

In particular, the insulator 216, the insulator 224, and the insulator 280 preferably have a low dielectric constant. For example, the relative permittivity of the insulator 216, the insulator 224, and the insulator 280 is preferably less than 3, preferably less than 2.4, and more preferably less than 1.8. By using a material having a low dielectric constant as an interlayer film, it is possible to reduce the parasitic capacitance generated between the wirings. It is preferably formed using an insulating material that does not easily allow impurities to permeate.

When an oxide semiconductor is used as the oxide semiconductor 230, it is preferable to reduce the hydrogen concentration in the insulator in order to prevent an increase in the hydrogen concentration in the oxide semiconductor 230. Specifically, the hydrogen concentration in the insulator is set to 2 × 10 ²⁰ atoms · cm ^-3 or less, preferably 5 × 10 ¹⁹ atoms · cm ^{− in (Secondary Ion Mass Spectrometry (SIMS)). 3} or less, more preferably 1 × 10 ¹⁹ atoms · cm ^-3 or less, further preferably 5 × 10 ¹⁸ atoms · cm ^-3 or less. In particular, insulator 216, insulator 224, insulator 250, insulator 450. , And it is preferable to reduce the hydrogen concentration of the insulator 280. At least, it is preferable to reduce the hydrogen concentration of the oxide semiconductor 230 or the insulator 224, the insulator 250, and the insulator 450 in contact with the oxide semiconductor 430. ..

Further, in order to prevent an increase in the nitrogen concentration in the oxide semiconductor 230, it is preferable to reduce the nitrogen concentration in the insulator. Specifically, the nitrogen concentration in the insulator is 5 × 10 ¹⁹ atoms · cm ^-3 or less, preferably 5 × 10 ¹⁸ atoms · cm ^-3 or less, more preferably 1 × 10 ¹⁸ atoms · cm ^{− in SIMS. It is 3} or less, more preferably 5 × 10 ¹⁷ atoms · cm ^-3 or less.

Further, it is preferable that the region of the insulator 224 in contact with at least the oxide semiconductor 230 and the region of the insulator 250 in contact with at least the oxide semiconductor 230 have few defects, and typically, an electron spin resonance method (ESR: Electron) is used. It is preferable that the signal observed in Spin Response) is small. For example, the signal described above includes the E'center where the g value is observed at 2.001. The E'center is due to the dangling bond of silicon. When a silicon oxide layer or a silicon nitride layer is used as the insulator 224 and the insulator 250, the spin density due to the ^{E'center is 3 × 10 17} spins · cm ^-3 or less, preferably 5 × 10 ¹⁶ spins · cm. ^A silicon oxide layer having a value of -3 or less or a silicon oxide layer may be used.

In addition to the above signals, a signal _{caused by nitrogen dioxide (NO 2} ) may be observed. The signal is divided into three signals by the nuclear spin of N, each of which has a g value of 2.037 or more and 2.039 or less (referred to as the first signal) and a g value of 2.001 or more and 2.003. The following (referred to as the second signal) and the g value of 1.964 or more and 1.966 or less (referred to as the third signal) are observed.

For example, as the insulator 224 and the insulator 250, an insulating layer having a spin density due to _{nitrogen dioxide (NO 2} ^{) of 1 × 10 17} spins · cm ^-3 or more and less than 1 × 10 ¹⁸ spins · cm ^{-3 is used.} Suitable.

The nitrogen oxide (NO _x ) containing nitrogen dioxide (NO ₂ ) forms a level in the insulating layer. The level is located within the energy gap of the oxide semiconductor. Therefore, when nitrogen oxides (NO _x ) diffuse to the interface between the insulating layer and the oxide semiconductor, the level may trap electrons on the insulating layer side. As a result, the trapped electrons stay near the interface between the insulating layer and the oxide semiconductor, so that the threshold voltage of the transistor is shifted in the positive direction. Therefore, if a film having a low nitrogen oxide content is used as the insulator 224 and the insulator 250, the shift of the threshold voltage of the transistor can be reduced.

As the insulating layer in which the amount of nitrogen oxide (NO _x ) released is small, for example, a silicon oxide nitride layer can be used. The silicon oxide nitride layer is a film in which the amount of ammonia released is larger than the amount of _{nitrogen oxide (NO x} ^{) released in TDS, and the amount of ammonia released is typically 1 × 10 18} molecules · cm ^-3 or more. 5 × 10 ¹⁹ moles · cm ^-3 or less. The amount of ammonia released is the total amount in the range where the temperature of the heat treatment in TDS is 50 ° C. or higher and 650 ° C. or lower, or 50 ° C. or higher and 550 ° C. or lower.

Since nitrogen oxides (NO _x ) react with ammonia and oxygen in the heat treatment, nitrogen oxides (NO _x ) can be reduced by using an insulating layer that releases a large amount of ammonia.

Further, at least one of the insulator 216, the insulator 224, the insulator 250, and the insulator 450 is preferably formed by using an insulator in which oxygen is released by heating. Specifically, in TDS, the amount of oxygen desorbed in terms of oxygen atoms is 1.0 × 10 ¹⁸ atoms · cm ^-3 or more, preferably 3.0 × 10 ²⁰ atoms · cm ^-3 or more. It is preferable to use the body.

Further, the insulating layer containing excess oxygen can also be formed by performing a treatment of adding oxygen to the insulating layer. The treatment of adding oxygen can be performed by using a heat treatment under an oxygen atmosphere, an ion implantation method, an ion doping method, a plasma imaging ion implantation method, a plasma treatment, or the like. Further, for the plasma treatment containing oxygen, for example, it is preferable to use an apparatus having a power source for generating high-density plasma using microwaves. Alternatively, a power source for applying RF (Radio Frequency) may be provided on the substrate side. High-density oxygen radicals can be generated by using high-density plasma, and oxygen radicals generated by high-density plasma can be efficiently guided into the target membrane by applying RF to the substrate side. .. Alternatively, the plasma treatment containing an inert gas may be performed using this device, and then the plasma treatment containing oxygen may be performed to supplement the desorbed oxygen. As the gas for adding oxygen, oxygen gas such as ¹⁶ O ₂ or ¹⁸ O ₂ , nitrous oxide gas, ozone gas, or the like can be used. In addition, in this specification, the process of adding oxygen is also referred to as "oxygen doping process".

Further, the oxygen doping treatment may be able to enhance the crystallinity of the semiconductor and remove impurities such as hydrogen and water. That is, the "oxygen doping treatment" can be said to be an "impurity removal treatment". In particular, as the oxygen doping treatment, by performing plasma treatment containing oxygen under reduced pressure, hydrogen and water are removed by breaking the bonds related to hydrogen and water in the target insulator or oxide. It changes to a state where it can be easily separated. Therefore, it is preferable to perform the plasma treatment while heating or the heat treatment after the plasma treatment. Further, by performing the plasma treatment after the heat treatment and further performing the heat treatment, the impurity concentration in the target film can be reduced.

The method for forming the insulator is not particularly limited, and depending on the material, a sputtering method, an SOG method, a spin coating, a dip, a spray coating, a droplet ejection method (inkjet method, etc.), a printing method (screen printing, offset printing, etc.) Etc.) may be used.

Further, the above-mentioned insulating layer may be used as the layer 245a, the layer 245b, the layer 270, and the layer 470. When an insulating layer is used for the layer 245a, the layer 245b, the layer 270, and the layer 470, it is preferable to use an insulating layer in which oxygen is hardly released and / or is hardly absorbed.

As the oxide semiconductor 230 and the oxide semiconductor 430, the oxide semiconductor shown in the second embodiment can be used. In the present embodiment, the oxide semiconductor 230 of the transistor 200 has the above-mentioned three-layer structure, but one aspect of the present invention is not limited to this. For example, the oxide semiconductor 230 may have a two-layer structure in which one of the oxide semiconductor 230a and the oxide semiconductor 230c is absent. Alternatively, a single-layer structure using any one of the oxide semiconductor 230a, the oxide semiconductor 230b, and the oxide semiconductor 230c may be used. Alternatively, a four-layer structure having any one of the above-mentioned semiconductors above or below the oxide semiconductor 230a or above or below the oxide semiconductor 230c may be used. Alternatively, the oxide semiconductor 230a, the oxide semiconductor 230b, and the oxide semiconductor 230b and the oxide semiconductor 230b are located on the oxide semiconductor 230a, under the oxide semiconductor 230a, on the oxide semiconductor 230c, and under the oxide semiconductor 230c. An n-layer structure having any one of the semiconductors exemplified as 230c (n is an integer of 5 or more) may be used.

Further, in the present specification and the like, a transistor using an oxide semiconductor as a semiconductor in which a channel is formed is also referred to as an “OS transistor”. Further, in the present specification and the like, a transistor using silicon having crystallinity in the semiconductor on which the channel is formed is also referred to as a “crystalline Si transistor”.

Crystalline Si transistors are more likely to obtain relatively higher mobility than OS transistors. On the other hand, it is difficult for a crystalline Si transistor to realize an extremely small off-current like an OS transistor. Therefore, it is important to properly use the semiconductor material used for the semiconductor according to the purpose and application. For example, an OS transistor and a crystalline Si transistor may be used in combination depending on the purpose and application.

Indium gallium oxide has a small electron affinity and a high oxygen blocking property. Therefore, it is preferable that the oxide semiconductor 230c contains indium gallium oxide. The gallium atom ratio [Ga / (In + Ga)] is, for example, 70% or more, preferably 80% or more, and more preferably 90% or more.

However, the oxide semiconductor 230a and the oxide semiconductor 230c may be gallium oxide. For example, when gallium oxide is used as the oxide semiconductor 230c, the leakage current generated between the conductor 205 and the oxide semiconductor 230 can be reduced. That is, the off-current of the transistor 200 can be reduced.

At this time, when a gate voltage is applied, a channel is formed in the oxide semiconductor 230b having a large electron affinity among the oxide semiconductor 230a, the oxide semiconductor 230b, and the oxide semiconductor 230c.

In order to impart stable electrical characteristics and good reliability to a transistor using an oxide semiconductor, impurities and oxygen deficiencies in the oxide semiconductor are reduced to achieve high purity authenticity, and at least the oxide semiconductor 230b is made intrinsically or It is preferable to use an oxide semiconductor that can be regarded as substantially genuine. Further, it is preferable that at least the channel forming region in the oxide semiconductor 230b is a semiconductor that can be regarded as genuine or substantially genuine.

Further, the layer 245a, the layer 245b, the layer 270, and the layer 470 may be formed by the same material and method as the oxide semiconductor 230 or the oxide semiconductor 430. When an oxide semiconductor is used for the layer 245a, the layer 245b, the layer 270, and the layer 470, it is preferable to use an oxide semiconductor in which oxygen is hard to be released or absorbed.

〔conductor〕
Examples of the conductive material for forming the conductor 205, the conductor 403, the conductor 405, the conductor 407, the conductor 240, the conductor 260, and the conductor 460 include aluminum, chromium, copper, silver, gold, and platinum. A material containing one or more metal elements selected from tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium and the like can be used. Further, a semiconductor having high electrical conductivity typified by polycrystalline silicon containing an impurity element such as phosphorus, and SiO such as nickel silicide may be used.

Further, the above-mentioned conductive material containing a metal element and oxygen may be used. Further, the above-mentioned conductive material containing a metal element and nitrogen may be used. For example, a conductive material containing nitrogen such as titanium nitride and tantalum nitride may be used. In addition, indium tin oxide (ITO: Indium Tin Oxide), indium oxide containing tungsten, indium zinc oxide containing tungsten, indium oxide containing titanium, indium tin oxide containing titanium, indium zinc oxide, silicon. Indium tin oxide to which is added may be used. Further, indium gallium zinc oxide containing nitrogen may be used.

Further, a plurality of conductive layers formed of the above materials may be laminated and used. For example, a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing oxygen are combined. Further, a laminated structure may be formed in which the above-mentioned material containing a metal element and a conductive material containing nitrogen are combined. Further, a laminated structure may be formed in which the above-mentioned material containing a metal element, a conductive material containing oxygen, and a conductive material containing nitrogen are combined.

As the conductor 205b, the conductor 403b, the conductor 405b, and the conductor 407b, for example, a conductive material such as tungsten or polysilicon may be used. Further, as the conductor 205a, the conductor 403a, the conductor 405a, and the conductor 407a, which are in contact with the insulator 212 and the insulator 214, a barrier layer (diffusion prevention layer) such as a titanium layer, a titanium nitride layer, or a tantalum nitride layer is provided. It can be used in a laminated or single layer.

An insulating material that does not allow impurities to permeate through the insulator 212 and the insulator 214 is used, and impurities permeate through the conductor 205a, the conductor 403a, the conductor 405a, and the conductor 407a that are in contact with the insulator 212 and the insulator 214. By using a difficult conductive material, diffusion of impurities into the transistor 200 and the transistor 400 can be further suppressed. Therefore, the reliability of the transistor 200 and the transistor 400 can be further improved.

Further, the above conductive materials may be used as the layer 245a, the layer 245b, the layer 270, and the layer 470. When a conductive material is used for the layers 245a, 245b, 270, and 470, it is preferable to use a conductive material in which oxygen is hardly released and / or is not easily absorbed.

<Example of Manufacturing Method of Semiconductor Device 1000>
An example of a method for manufacturing the semiconductor device 1000 will be described with reference to FIGS. 7 to 26. Here, FIGS. 7 to 26 correspond to FIG. 7 (A) to 26 (A) are top views of the semiconductor device 1000. 7 (B) to 26 (B) correspond to the alternate long and short dash line L1-L2 in FIGS. 7 (A) to 26 (A), and are cross-sectional views of the transistor 200 and the transistor 400 in the channel length direction. be. Further, FIGS. 7 (C) to 26 (C) correspond to the alternate long and short dash lines W1-W2 in FIGS. 7 (A) to 26 (A), and are cross-sectional views of the transistor 200 in the channel width direction. .. 7 (D) to 26 (D) are cross-sectional views of the transistor 200 corresponding to the alternate long and short dash line W3-W4 in FIGS. 7 (A) to 26 (A). Further, FIGS. 7 (E) to 26 (E) correspond to the alternate long and short dash lines W5-W6 in FIGS. 7 (A) to 26 (A), and are cross-sectional views of the transistor 400 in the channel width direction. ..

In the following, the insulating material for forming an insulator, the conductive material for forming a conductor, or the semiconductor material for forming a semiconductor shall be a sputtering method, a spin coating method, or a CVD (Chemical Vapor Deposition). ) Method (thermal CVD method, MOCVD (Metal Organic Chemical Vapor Deposition) method, PECVD (Plasma Enhanced CVD) method, high density plasma CVD (High density plasma CVD) method, LPCVD method (low pressure) method It can be formed by appropriately using), ALD method, MBE (Molecular Beam Deposition) method, or PLD (Pulsed Plasma Deposition) method.

The plasma CVD method can obtain a high quality film at a relatively low temperature. When a film forming method that does not use plasma during film formation, such as a MOCVD method, an ALD method, or a thermal CVD method, is used, the surface to be formed is less likely to be damaged, and a film with few defects can be obtained.

When forming a film by the ALD method, it is preferable to use a chlorine-free gas as the material gas.

First, the insulator 212, the insulator 214, and the insulator 216 are formed on the substrate 310 in this order.

As shown in the first embodiment, when a substrate having a bandgap smaller than the energy of the excitation light used in the μ-PCD measurement is used, a large number of carriers are generated on the substrate. As a result, the information obtained by the μ-PCD measurement includes a large amount of information derived from the substrate, which may make it difficult to evaluate the oxide semiconductor. When manufacturing a semiconductor device with a substrate with a small bandgap, separately prepare a substrate with a large bandgap such as a glass substrate or a quartz substrate, fabricate the semiconductor device with a glass substrate or a quartz substrate as a monitor substrate, and perform a transistor manufacturing process. By appropriately performing μ-PCD measurement on the way, it is possible to evaluate the carrier density of the oxide semiconductor.

In the present embodiment, aluminum oxide is formed as the insulator 212 by the ALD method. By forming the insulating layer using the ALD method, it is possible to form a dense insulating layer with reduced defects such as cracks and pinholes, or having a uniform thickness.

In the present embodiment, aluminum oxide is formed as the insulator 214 by a sputtering method. Further, as described above, the insulator 224 is preferably an insulator containing excess oxygen. Further, oxygen doping treatment may be performed after the insulator 216 is formed.

Next, a resist mask is formed on the insulator 216 to form openings in the insulator 216 corresponding to the conductor 205, the conductor 405, the conductor 403, and the conductor 407. The resist mask can be formed by appropriately using a photolithography method, a printing method, an inkjet method, or the like. When the resist mask is formed by a printing method, an inkjet method, or the like, the manufacturing cost can be reduced because the photomask is not used.

The resist mask can be formed by the photolithography method by irradiating the photosensitive resist with light through the photomask and removing the resist in the exposed portion (or the non-exposed portion) with a developing solution. .. The light irradiated to the photosensitive resist includes KrF excimer laser light, ArF excimer laser light, EUV (Extreme Ultraviolet) light and the like. Further, an immersion technique may be used in which a liquid (for example, water) is filled between the substrate and the projection lens for exposure. Further, instead of the above-mentioned light, an electron beam or an ion beam may be used. When an electron beam or an ion beam is used, a photomask is not required. The resist mask can be removed by a dry etching method such as ashing or a wet etching method using a special release liquid or the like. Both the dry etching method and the wet etching method may be used.

A part of the insulator 214 may also be removed when the opening is formed. Etching of the insulator 214 and the insulator 216 can be performed by using a dry etching method, a wet etching method, or the like. Both the dry etching method and the wet etching method may be used. After forming the openings, the resist mask is removed.

Next, on the insulator 214 and the insulator 216, the conductor 205a, the conductor 403a, the conductor 405a, and the conductor to be the conductor 407a, and the conductor 205b, the conductor 403b, the conductor 405b, and the conductor. A conductive film to be 407b is formed. In the present embodiment, a laminated film of tantalum nitride and titanium nitride is formed by a sputtering method as a conductive film serving as the conductor 205a, the conductor 403a, the conductor 405a, and the conductor 407a. Further, tungsten is formed by a sputtering method as a conductive film to be a conductor 205b, a conductor 403b, a conductor 405b, and a conductor 407b.

Next, a chemical mechanical polishing (CMP) treatment (also referred to as “CMP treatment”) is performed to carry out the conductor 205a, the conductor 205b, the conductor 403a, the conductor 403b, the conductor 405a, and the conductor. 405b, conductor 407a, and conductor 407b are formed (see FIGS. 8A to 8E). A part of the conductive film is removed by the CMP treatment. At this time, a part of the surface of the insulator 216 may also be removed. By performing the CMP treatment, the unevenness of the sample surface can be reduced, and the covering property of the insulating layer and the conductive layer formed after that can be improved.

The conductor 205, the conductor 405, the conductor 403, and the conductor 407 can be manufactured at the same time by using the dual damascene method. In this way, the conductor 205, the conductor 403, the conductor 405, and the conductor 407 are formed.

Insulator 220, insulator 222, and insulator 224 are formed in this order on the insulator 216, the conductor 205, the conductor 403, the conductor 405, and the conductor 407 (FIGS. 9 (A) to 9 (FIGS. 9) (A) to 9 (FIG. 9). E) See). In the present embodiment, hafnium oxide is formed as the insulator 220 by the ALD method, and silicon oxide is formed as the insulator 224 by the CVD method.

Here, it is preferable that the insulator 224 has a reduced concentration of impurities such as water and hydrogen in the film. Therefore, it is preferable to perform heat treatment in an atmosphere of an inert gas containing nitrogen, a rare gas, or the like to diffuse impurities such as water or hydrogen to the outside. The details of the heat treatment will be described later. Further, the insulator 224 is preferably an insulating layer containing excess oxygen. Therefore, oxygen doping treatment may be performed after the insulator 224 is formed.

Next, the oxide semiconductor 230A, the oxide semiconductor 230B, the conductive film 240A, the film 245A, and the conductive film 247A are formed in this order (see FIGS. 10A to 10E).

The oxide semiconductor 230A and the oxide semiconductor 230B forming the oxide semiconductor 230 and the oxide semiconductor 430 are preferably formed by a sputtering method. Forming by a sputtering method is preferable because the densities of the oxide semiconductor 230 and the oxide semiconductor 430 can be increased. As the sputtering gas, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen may be used. Further, the film may be formed while heating the substrate.

It is also necessary to purify the sputtering gas. For example, as the oxygen gas or noble gas used as the sputtering gas, a gas having a dew point of -60 ° C. or lower, preferably -100 ° C. or lower, is used. By forming a film using a highly purified sputtering gas, it is possible to prevent water and the like from being taken into the oxide semiconductor 230 and the oxide semiconductor 430 as much as possible.

Further, when the oxide semiconductor 230A and the oxide semiconductor 230B are formed by the sputtering method, it is preferable to remove as much water as possible in the film forming chamber of the sputtering apparatus. For example, it is preferable to use an adsorption type vacuum exhaust pump such as a cryopump to exhaust the film forming chamber to a high vacuum (from 5 × 10 ^-7 Pa to 1 × 10 ^{-4 Pa).} In particular, at stand of the sputtering apparatus, the partial pressure of the (gas molecules corresponding to m / z = 18) Gas molecules corresponding in _{H 2} O in the deposition chamber 1 × ¹⁰ -4 Pa or less, preferably 5 × 10 ^{- It is preferably 5} Pa or less.

In the present embodiment, the oxide semiconductor 230A is formed by a sputtering method. Further, oxygen or a mixed gas of oxygen and a rare gas is used as the sputtering gas. By increasing the proportion of oxygen contained in the sputtering gas, excess oxygen in the oxide film formed can be increased.

Further, when the oxide semiconductor 230B is formed, a part of oxygen contained in the sputtering gas may be supplied to the insulator 224, the insulator 222, and 216. The more oxygen contained in the sputtering gas, the more oxygen is supplied to the insulators 224, 222, and 216. Therefore, a region having excess oxygen can be formed in the insulator 224, the insulator 222, and the insulator 216. Further, a part of the oxygen supplied to the insulator 224, the insulator 222, and 216 reacts with the hydrogen remaining in the insulator 224, the insulator 222, and 216 to become water, and is insulated by the subsequent heat treatment. Emitted from body 224, insulator 222, and 216. In this way, the hydrogen concentration in the insulator 224, the insulator 222, and 216 can be reduced.

Therefore, the proportion of oxygen contained in the sputtering gas is preferably 70% or more, more preferably 80% or more, and even more preferably 100%. By using an oxide containing excess oxygen in the oxide semiconductor 230A, oxygen can be supplied to the oxide semiconductor 230b by a subsequent heat treatment.

Subsequently, the oxide semiconductor 230B is formed by a sputtering method. At this time, if the ratio of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less, an oxygen-deficient oxide semiconductor is formed. Transistors using oxygen-deficient oxide semiconductors can obtain relatively high field-effect mobility.

Next, μ-PCD measurement is performed by the method shown in the first embodiment, and the carrier densities of the oxide semiconductor 230A and the oxide semiconductor 230B are evaluated from the obtained peak value and lifetime τ1. Thereby, it can be efficiently confirmed whether or not there is any abnormality in the film forming process of the oxide semiconductor 230A and the oxide semiconductor 230B. If there is an abnormality, it can be immediately fed back to the manufacturing process to confirm the film forming process. By performing μ-PCD measurement during the transistor manufacturing process, an abnormal process can be found without a time delay, and an abnormality can be dealt with immediately. Further, by removing the abnormal sample from the transistor manufacturing process, it is possible to eliminate the waste of flowing the subsequent process.

An example of μ-PCD measurement during the transistor manufacturing process has been shown, but the process of performing μ-PCD measurement is not limited to this. In other steps, μ-PCD measurement may be performed as appropriate.

When an oxygen-deficient oxide semiconductor is used for the oxide semiconductor 230B, it is preferable to use an oxide film containing excess oxygen for the oxide semiconductor 230A. Further, oxygen doping treatment may be performed after the formation of the oxide semiconductor 230B.

It is preferable that the heat treatment is performed after the oxide semiconductor 230A and the oxide semiconductor 230B are formed. Details of the heat treatment conditions will be described later. In the present embodiment, heat treatment is performed at 400 ° C. for 1 hour in an oxygen gas atmosphere. As a result, oxygen is introduced into the oxide semiconductor 230A and the oxide semiconductor 230B. More preferably, the heat treatment at 400 ° C. for 1 hour is performed in the nitrogen gas atmosphere before the heat treatment in the oxygen gas atmosphere. First, by performing the heat treatment in a nitrogen gas atmosphere, impurities such as water or hydrogen contained in the oxide semiconductor 230A and the oxide semiconductor 230B are released, and the oxide semiconductor 230A and the oxide semiconductor 230B are released. The impurity concentration can be reduced.

Next, μ-PCD measurement is performed by the method shown in the first embodiment, and the carrier densities of the oxide semiconductor 230A and the oxide semiconductor 230B are evaluated from the obtained peak value and lifetime τ1. Thereby, it can be efficiently confirmed whether or not there is any abnormality in the oxide semiconductor 230A and the oxide semiconductor 230B.

An example of μ-PCD measurement during the transistor manufacturing process has been shown, but the process of performing μ-PCD measurement is not limited to this. In other steps, μ-PCD measurement may be performed as appropriate.

Next, the conductive film 240A is formed. In the present embodiment, tantalum nitride is formed as the conductive film 240A by a sputtering method. Since tantalum nitride has high oxidation resistance, it is preferable when heat treatment is performed in a subsequent step.

Next, a film 245A is formed. In the present embodiment, aluminum oxide is formed as the film 245A by the ALD method. By forming using the ALD method, it is possible to form a film having a dense, reduced defects such as cracks and pinholes, or a uniform thickness.

The conductive film 247A serves as a hard mask for forming the conductor 240a and the conductor 240b in a later step. In this embodiment, tantalum nitride is used as the conductive film 247A.

Next, the film 245A and the conductive film 247A are processed by a photolithography method to form the film 245B and the conductive film 247B (see FIGS. 11A to 11E). The film 245B and the conductive film 247B have openings.

When forming the opening, it is preferable that the side surfaces of the film 245B and the conductive film 247B on the opening side have an angle with respect to the upper surface of the oxide semiconductor 230b. The angle is 30 degrees or more and 90 degrees or less, preferably 45 degrees or more and 80 degrees or less. Further, it is preferable that the opening is formed by the resist mask using the minimum processing size. That is, the film 245B has an opening having a minimum processing dimension in width.

Next, a resist mask 290 is formed on the film 245B and the conductive film 247B by a photolithography method (see FIGS. 12A to 12E).

Next, using the resist mask 290 as a mask, a part of the conductive film 240A, the film 245B, and the conductive film 247B is selectively removed and processed into an island shape (FIGS. 13A to 13E). reference). In this way, the island-shaped conductive film 240B is formed from the conductive film 240A, the layers 245a and 245b are formed from the film 245B, and the conductors 247a and 247b are formed from the conductive film 247B. When the opening of the film 245B is the minimum processing dimension, the distance between the layers 245a and the layer 245b is the minimum processing dimension.

The conductive film 240A, the film 245A, and the conductive film 247A can be removed by using a dry etching method, a wet etching method, or the like. Both the dry etching method and the wet etching method may be used.

Subsequently, the oxide semiconductor 230A and a part of the oxide semiconductor 230B are selectively removed using the conductive film 240B as a mask (see FIGS. 14A to 14E). At this time, a part of the insulator 224 may be removed at the same time. After that, by removing the resist mask, the island-shaped oxide semiconductor 230a and the island-shaped oxide semiconductor 230b can be formed.

The oxide semiconductor 230A and the oxide semiconductor 230B can be removed by using a dry etching method, a wet etching method, or the like. Both the dry etching method and the wet etching method may be used.

Subsequently, a part of the conductive film 240B is selectively removed by using a dry etching method using the layers 245a, the layer 245b, the conductor 247a, and the conductor 247b as masks. By the etching step, the conductive film 240B is separated into the conductor 240a and the conductor 240b (see FIGS. 15A to 15E).

The gas used for dry etching is, for example, C ₄ F ₆ gas, C ₂ F ₆ gas, C ₄ F ₈ gas, CF ₄ gas, SF ₆ gas or CHF ₃ gas, or a mixture of two or more gases. Can be used. Alternatively, oxygen gas, helium gas, argon gas, hydrogen gas, or the like can be appropriately added to the gas. In particular, it is preferable to use a gas capable of producing an organic substance by plasma. For example, _{it is preferable to use one of C 4} F ₆ gas, C ₄ F ₈ gas, or CHF ₃ gas to which helium gas, argon gas, hydrogen gas, or the like is appropriately added.

Here, the conductors 247a and 247b function as hard masks, and the conductors 247a and 247b are also removed as the etching progresses.

Oxides of the conductor 240a and the conductor 240b are formed by etching the conductive film 240B while adhering the organic substances to the side surfaces of the layers 245a, the layer 245b, the conductor 247a, and the conductor 247b using a gas capable of producing an organic substance. A tapered shape can be formed on the side surface on the side in contact with the semiconductor 230c.

Since the conductor 240a and the conductor 240b have functions as a source electrode and a drain electrode of the transistor 200, the length of the distance between the conductor 240a and the conductor 240b facing each other may be referred to as the channel length of the present transistor. can. That is, when the opening of the film 245B is set to the minimum processing dimension, the distance between the layer 245a and the layer 245b is the minimum processing dimension, so that the gate line width and the channel length smaller than the minimum processing dimension can be formed.

The angle of the side surface of the opening of the film 245B can be controlled according to the ratio of the etching rate of the conductive film 240B to the deposition rate of organic substances deposited on the side surfaces of the layer 245a and the layer 245b. For example, if the ratio of the etching rate to the deposition rate of organic matter is 1, the angle may be 45 degrees.

The ratio of the etching rate to the deposition rate of organic substances may be appropriately set according to the gas used for etching. For example, as the etching gas, C ₄ using a mixed gas of F ₈ gas and argon gas can control the ratio of the deposition rate of etch rate and an organic material by controlling the high frequency power and an etching pressure of an etching apparatus.

Further, when the conductor 240a and the conductor 240b are formed by the dry etching method, an impurity element such as a residual component of the etching gas may adhere to the exposed oxide semiconductor 230b. For example, when a chlorine-based gas is used as the etching gas, chlorine or the like may adhere. Further, when a hydrocarbon gas is used as the etching gas, carbon, hydrogen, or the like may adhere to the etching gas. Therefore, it is preferable to reduce the impurity elements adhering to the exposed surface of the oxide semiconductor 230b. The impurities may be reduced by, for example, a cleaning treatment using hydrofluoric acid or the like, a cleaning treatment using ozone or the like, or a cleaning treatment using ultraviolet rays or the like. A plurality of cleaning treatments may be combined.

Further, plasma treatment using an oxidizing gas may be performed. For example, plasma treatment using nitrous oxide gas is performed. By performing the plasma treatment, the fluorine concentration in the oxide semiconductor 230b can be reduced. In addition, the effect of removing organic substances on the sample surface can also be obtained.

Further, the exposed oxide semiconductor 230b may be subjected to oxygen doping treatment. Further, the heat treatment described later may be performed.

Further, for example, by processing with the layers 245a and 245b as masks, an etching gas having a relatively high selection ratio between the conductive film 240B and the insulator 224 can be used. Therefore, even in a structure in which the total film thickness of the insulator 224 is thin, it is possible to prevent overetching of the wiring layer below. Further, since the voltage from the conductor 205 is efficiently applied by reducing the total film thickness of the insulator 224, it is possible to provide a transistor having low power consumption.

Next, heat treatment is performed in order to further reduce impurities such as water or hydrogen contained in the oxide semiconductor 230a and the oxide semiconductor 230b and to purify the oxide semiconductor 230a and the oxide semiconductor 230b. Is preferable.

Further, plasma treatment using an oxidizing gas may be performed before the heat treatment. For example, plasma treatment using nitrous oxide gas is performed. By performing the plasma treatment, the fluorine concentration in the exposed insulating layer can be reduced. In addition, the effect of removing organic substances on the sample surface can also be obtained.

The heat treatment is performed, for example, in an inert gas atmosphere containing nitrogen or a rare gas, in an oxidizing gas atmosphere, or when measured using an ultra-dry air (CRDS (cavity ring-down laser spectroscopy)) dew point meter. The operation is carried out in an atmosphere having a water content of 20 ppm (-55 ° C. in terms of dew point) or less, preferably 1 ppm or less, preferably 10 ppb or less. The "oxidizing gas atmosphere" refers to an atmosphere containing 10 ppm or more of an oxidizing gas such as oxygen, ozone, or oxygen nitride. Further, the “inert gas atmosphere” refers to an atmosphere in which the above-mentioned oxidizing gas is less than 10 ppm and is filled with nitrogen or a rare gas. Although there are no particular restrictions on the pressure during the heat treatment, it is preferable that the heat treatment is performed under reduced pressure.

Further, by performing the heat treatment, oxygen contained in the insulator 224 can be diffused into the oxide semiconductor 230a and the oxide semiconductor 230b at the same time as the release of impurities, and the oxygen deficiency contained in the oxide can be reduced. After the heat treatment in an inert gas atmosphere, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to supplement the desorbed oxygen. The heat treatment may be performed at any time after the oxide semiconductor 230a and the oxide semiconductor 230b are formed.

The heat treatment may be carried out at 250 ° C. or higher and 650 ° C. or lower, preferably 300 ° C. or higher and 500 ° C. or lower. The processing time shall be within 24 hours. Heat treatment for more than 24 hours is not preferable because it causes a decrease in productivity. When a metal such as Cu that easily diffuses by heating is used as the conductor, the heat treatment temperature may be 410 ° C. or lower, preferably 400 ° C. or lower.

In the present embodiment, after heat treatment at 400 ° C. for 1 hour in a nitrogen gas atmosphere, the nitrogen gas is replaced with oxygen gas, and heat treatment at 400 ° C. for 1 hour is further performed. First, by performing the heat treatment in a nitrogen gas atmosphere, impurities such as water or hydrogen contained in the oxide semiconductor 230a and the oxide semiconductor 230b are released, and the oxide semiconductor 230a and the oxide semiconductor 230b are released. The impurity concentration is reduced. Subsequently, by performing the heat treatment in an oxygen gas atmosphere, oxygen is introduced into the oxide semiconductor 230a and the oxide semiconductor 230b.

Further, during the heat treatment, a part of the upper surface of the conductive film 240B is covered with the layer 245a and the layer 245b, so that oxidation from the upper surface can be prevented.

Next, the photolithography method is used to form openings in the insulator 220, the insulator 222, and the insulator 224. The opening is provided on the conductor 405b and the conductor 407b (see FIGS. 16A to 16E).

Next, the oxide semiconductor 230c and the oxide semiconductor 230C which will later become the oxide semiconductor 430 are formed. In the present embodiment, the oxide semiconductor 230C uses an oxide containing a large amount of excess oxygen, similarly to the oxide semiconductor 230A. By using a semiconductor containing excess oxygen in the oxide semiconductor 230C, oxygen can be supplied to the oxide semiconductor 230b by a subsequent heat treatment.

Further, similarly to the oxide semiconductor 230a, when the oxide semiconductor 230c is formed, a part of oxygen contained in the sputtering gas is supplied to the insulator 224, the insulator 222, and the insulator 216 to form an excess oxygen region. In some cases. Further, a part of the oxygen supplied into the insulator 224, the insulator 222, and the insulator 216 reacts with the hydrogen remaining in the insulator 224, the insulator 222, and the insulator 216 to become water, and later Is released from the insulator 224, the insulator 222, and the insulator 216 by the heat treatment of. Therefore, the hydrogen concentration in the insulator 224, the insulator 222, and the insulator 216 can be reduced.

After forming the oxide semiconductor 230C, one or both of oxygen doping treatment and heat treatment may be performed. By performing the heat treatment, oxygen contained in the oxide semiconductor 230a and the oxide semiconductor 230c can be supplied to the oxide semiconductor 230b. By supplying oxygen to the oxide semiconductor 230b, oxygen deficiency in the oxide semiconductor 230b can be reduced. Therefore, when an oxygen-deficient oxide semiconductor is used for the oxide semiconductor 230b, it is preferable to use a semiconductor containing excess oxygen for the oxide semiconductor 230c.

A part of the oxide semiconductor 230c is in contact with the channel forming region of the oxide semiconductor 230b. Further, the upper surface and the side surface of the region where the channel of the oxide semiconductor 230b is formed are covered with the oxide semiconductor 230c. In this way, the oxide semiconductor 230b can be surrounded by the oxide semiconductor 230a and the oxide semiconductor 230c. By surrounding the oxide semiconductor 230b with the oxide semiconductor 230a and the oxide semiconductor 230c, it is possible to suppress the diffusion of impurities generated in a later step into the oxide semiconductor 230b.

Next, an insulating film 250A is formed on the oxide semiconductor 230C (see FIGS. 17A to 17E). In the present embodiment, silicon oxide nitride is formed as the insulating film 250A by the CVD method. The insulating film 250A is preferably an insulating layer containing excess oxygen. Further, the insulating film 250A may be subjected to oxygen doping treatment. Further, heat treatment may be performed after the insulating film 250A is formed.

Next, the conductive film 260A, the conductive film 260B, and the conductive film 260C are formed in this order (see FIGS. 18A to 18E). In the present embodiment, a metal oxide film formed by a sputtering method is used as the conductive film 260A, titanium nitride is used as the conductive film 260B, and tungsten is used as the conductive film 260C. By forming a film of the conductive film 260A using a sputtering method, oxygen can be added to the insulator 250 to bring it into a state of excess oxygen. Therefore, oxygen can be effectively supplied from the insulator 250 to the oxide semiconductor 230b.

Next, using a photolithography method, a part of the insulating film 250A, the conductive film 260A, the conductive film 260B, and the conductive film 260C is selectively removed to remove the insulator 250, the insulator 450, the conductor 260a, and the conductive film. A body 260b, a conductor 260c, a conductor 460a, a conductor 460b, and a conductor 460c are formed (see FIGS. 19A to 19E).

If the band gaps of the conductor 205, the conductor 403, the conductor 405, the conductor 407, the conductor 240, the conductor 260, and the conductor 460 are smaller than the energy of the excitation light used in the μ-PCD measurement, the conductor. A large number of carriers are generated in 205, the conductor 403, the conductor 405, the conductor 407, the conductor 240, the conductor 260, and the conductor 460. As a result, the information obtained by the μ-PCD measurement includes a large amount of information derived from the conductor 205, the conductor 403, the conductor 405, the conductor 407, the conductor 240, the conductor 260, and the conductor 460. It may be difficult to evaluate oxide semiconductors. Separately, a substrate with a large band gap such as a glass substrate or a quartz substrate is prepared, and as a monitor substrate, the conductor 205, the conductor 403, the conductor 405, the conductor 407, the conductor 240, the conductor 260 is used as a monitor substrate. And, by manufacturing a semiconductor device without providing the conductor 460 and performing μ-PCD measurement, it is possible to evaluate the carrier density of the oxide semiconductor.

Next, a film 270A to be processed into the layer 270 and the layer 470 in a later step is formed (see FIGS. 20A to 20E). The film 270A functions as a gate cap, and in the present embodiment, aluminum oxide formed by the ALD method is used.

As described above, in imparting stable electrical characteristics and good reliability to the transistor 200 and the transistor 400, the insulator 212, the insulator 214, the insulator 272, the insulator 274, the insulator 282, and the insulator 284 are used. It is important that the internal oxygen is supplied to the oxide semiconductor 230 and the oxide semiconductor 430 without being diffused outward, and that external impurities such as hydrogen or water are not mixed in the transistor 200 and the transistor 400.

Next, a photolithography method is used to selectively remove part of the film 270A to form layers 270 and 470. By forming the layer 270 on the conductor 260 in this way, it is possible to prevent the excess oxygen in the surroundings from being consumed due to the oxidation of the conductor 260.

The etching of the layer 270 and the layer 470 can be performed by using a dry etching method, a wet etching method, or the like. In this embodiment, the layer 270 and the layer 470 are formed by using a dry etching method. At this time, a part of the oxide semiconductor 230C may be removed, but a residue of the oxide semiconductor 230C is likely to be formed on the side surfaces of the oxide semiconductor 230a and the oxide semiconductor 230b.

Next, the oxide semiconductor 230C is etched using the layers 270 and 470 as masks (see FIGS. 21 (A) to 21 (E)). The etching treatment in this step may be performed by wet etching or the like, and in the present embodiment, wet etching is performed using phosphoric acid. As a result, the island-shaped oxide semiconductor 230c and the island-shaped oxide semiconductor 430 are formed. Even if a part of the oxide semiconductor 230C remains as a residue, it can be removed to expose the side surfaces of the oxide semiconductor 230a and the oxide semiconductor 230b.

Next, it is preferable to perform heat treatment. The above description can be taken into consideration for the heat treatment. In the present embodiment, after heat treatment at 400 ° C. for 1 hour in a nitrogen gas atmosphere, the nitrogen gas is replaced with oxygen gas, and heat treatment at 400 ° C. for 1 hour is further performed. First, by performing the heat treatment in a nitrogen gas atmosphere, impurities such as water and hydrogen contained in the oxide semiconductor 230 are released, and the impurity concentration in the oxide semiconductor 230 is reduced. Subsequently, oxygen is introduced into the oxide semiconductor 230 by performing heat treatment in an oxygen gas atmosphere.

Next, the substrate is carried into a film forming apparatus having a plurality of chambers, and heat treatment is performed in the chambers of the film forming apparatus. In the heat treatment, the above conditions of the heat treatment can be taken into consideration in the heating atmosphere and the like. For example, it is preferably performed in an oxygen atmosphere, and the chamber pressure is 1.0 × ^10-8 Pa or more and 1000 Pa or less, preferably 1.0 × ^10-8 Pa or more and 100 Pa or less, more preferably 1.0 × 10 ^{−. It} should be 8 Pa or more and 10 Pa or less, more preferably 1.0 × 10 ^-8 Pa or more and 1 Pa or less. The heating temperature may be 100 ° C. or higher and 500 ° C. or lower, preferably 200 ° C. or higher and 450 ° C. or lower. When a metal such as Cu that easily diffuses by heating is used as the conductor, the temperature may be preferably 410 ° C. or lower, more preferably 400 ° C. or lower. However, it is preferable that the heating temperature is higher than the substrate temperature at the time of film formation of the insulator 272, which will be described later.

In the present embodiment, the substrate temperature is set to 400 ° C. in an oxygen gas atmosphere, and the heat treatment is performed for about 5 minutes. This makes it possible to remove water such as adsorbed water before forming the insulator 272. In particular, by performing the heat treatment in an oxygen gas atmosphere, the heat treatment can be performed without forming an oxygen deficiency in the oxide semiconductor 230.

Next, the insulator 272 is formed into a film by a sputtering method in a chamber different from the chamber in which the heat treatment of the film forming apparatus is performed (see FIGS. 22 (A) to 22 (E)). The film formation of the insulator 272 is continuously performed without exposing it to the outside air from the above heat treatment. In the present embodiment, the film thickness of the insulator 272 is 5 nm or more and 100 nm or less, preferably 5 nm or more and 20 nm or less, and more preferably 5 nm or more and 10 nm or less.

The insulator 272 is preferably formed by a sputtering method in an atmosphere containing oxygen. In the present embodiment, an aluminum oxide film is formed as the insulator 272 by a sputtering method in an atmosphere containing oxygen. As a result, oxygen can be added in the vicinity of the surface in contact with the insulator 272 (the side surface of the oxide semiconductor 230a, the side surface of the oxide semiconductor 230b, the upper surface of the insulator 224, etc.) to create an excess oxygen state. Here, oxygen is added as, for example, an oxygen radical, but the state when oxygen is added is not limited to this. Oxygen may be added in the form of oxygen atoms, oxygen ions, or the like. By the heat treatment in the subsequent step, oxygen can be diffused and oxygen can be effectively supplied to the oxide semiconductor 230b.

It is preferable to heat the substrate when forming the insulator 272. Substrate heating is preferably higher than 100 ° C and preferably 200 ° C or lower. More preferably, it may be carried out at 120 ° C. or higher and 150 ° C. or lower. Water in the oxide semiconductor 230 can be removed by raising the substrate temperature to higher than 100 ° C. In addition, it is possible to prevent surface-adsorbed water from adhering to the formed film. Further, it is preferable to heat the substrate at the lowest possible temperature. By forming the film at a low temperature, the function of gettingtering impurities in the film in contact with the film formed at a low temperature is improved in the subsequent heat treatment. For example, by forming the insulator 272 into a film at around 130 ° C., hydrogen contained in the insulator 224, the oxide semiconductor 230a, the oxide semiconductor 230b, and the like can be gettered to the insulator 272.

Even if impurities such as water are removed by the above heat treatment, if they are exposed to the outside air before film formation, impurities such as hydrogen or water may be mixed in the oxide semiconductor 230 or the like again. However, as shown in the present embodiment, the insulator 272 is not mixed with impurities such as water by continuously forming a film with the same film forming apparatus without being exposed to the atmosphere from the above heat treatment. Can cover the transistor 200 and the transistor 400. Further, by adding oxygen to the site formed by desorbing impurities such as water by the above heat treatment, more oxygen can be contained. Further, by performing the heat treatment and the film forming treatment in different chambers in the multi-chamber type film forming apparatus, the insulator 272 can be formed without being affected by impurities such as water desorbed by the heat treatment. can.

Further, as the insulator 272, it is preferable to use an insulating material in which impurities such as water and hydrogen are difficult to permeate, and in this embodiment, aluminum oxide is used. Further, by forming the insulator 272 into a film by using the sputtering method, the film can be formed at a film forming rate faster than that of the insulator 274, and the film thickness of the laminated film of the insulator 272 and the insulator 274 can be increased with good productivity. In this way, the barrier property against impurities such as hydrogen and water can be improved with good productivity.

Next, the insulator 274 is formed on the insulator 272 by the ALD method (see FIGS. 23 (A) to 23 (E)). In the present embodiment, the film thickness of the insulator 274 is formed to be 5 nm or more and 20 nm or less, preferably 5 nm or more and 10 nm or less, and more preferably 5 nm or more and 7 nm or less.

For the insulator 274, it is preferable to use an insulating material in which impurities such as water and hydrogen are difficult to permeate, and for example, it is preferable to use aluminum oxide or the like. Further, by forming a film of the insulator 274 using the ALD method, it is possible to suppress the formation of cracks, pinholes, etc., and to form a film with good coverage. The insulator 272 and the insulator 274 are formed on an uneven shape, but by forming the insulator 274 by the ALD method, a transistor is not formed without step breaks, cracks, pinholes, or the like. The 200 and the transistor 400 can be covered with an insulator 274. Thereby, the barrier property against impurities such as hydrogen and water can be improved more remarkably.

In this way, by forming the transistor 200 and the transistor 400 into a structure sandwiched between the insulator 274, the insulator 272, the insulator 214, and the insulator 212, oxygen is not diffused outward, and the insulator 224 and the oxide are formed. A large amount of oxygen can be contained in the semiconductor 230 and the insulator 250. Further, it is possible to prevent impurities such as hydrogen or water from being mixed from above the insulator 274 and below the insulator 212, and to reduce the impurity concentrations in the insulator 224, the oxide semiconductor 230, and the insulator 250. can.

Next, it is preferable to perform heat treatment. The above description can be taken into consideration for the heat treatment. In this embodiment, heat treatment is performed at 400 ° C. for 1 hour in a nitrogen gas atmosphere.

By the heat treatment, oxygen contained in the insulator 224, the insulator 250 and the like can be diffused in the transistor 200. Thereby, the oxygen deficiency of the oxide semiconductor 230a, the oxide semiconductor 230b and the oxide semiconductor 230c can be reduced. Further, also in the transistor 400, oxygen contained in the insulator 224, the insulator 450 and the like can be diffused and supplied to the channel forming region of the oxide semiconductor 430, particularly the oxide semiconductor 430. Here, the insulator 212, the insulator 214, the insulator 222, and the insulator 272 can prevent oxygen from diffusing above and below the transistor 200 and the transistor 400, and the oxide semiconductor 230b and the oxide semiconductor 430 can be prevented. Can effectively supply oxygen.

In this way, by reducing oxygen deficiency in the oxide semiconductor 230b that functions as the semiconductor layer of the transistor 200 and reducing impurities such as hydrogen and water, the electrical characteristics of the transistor 200 are stabilized and reliability is improved. Can be made to.

Next, μ-PCD measurement is performed by the method shown in the first embodiment, and the carrier densities of the oxide semiconductor 230A and the oxide semiconductor 230B are evaluated from the obtained peak value and lifetime τ1. When the oxygen deficiency of the oxide semiconductor 230A and the oxide semiconductor 230B is sufficiently supplemented and the carrier density is low, it can be determined that the electrical characteristics of the transistor 200 are good. On the other hand, if the oxygen deficiency of the oxide semiconductor 230A and the oxide semiconductor 230B is not sufficiently replenished and the carrier density is high, it can be determined that the electrical characteristics of the transistor 200 are poor. As shown above, the carrier densities of the oxide semiconductor 230A and the oxide semiconductor 230B can be evaluated during the transistor manufacturing process by the μ-PCD measurement.

An example of μ-PCD measurement during the transistor manufacturing process has been shown, but the process of performing μ-PCD measurement is not limited to this. In other steps, μ-PCD measurement may be performed as appropriate.

The heat treatment may be performed after the insulator 272 is formed into a film. Further, when the insulator 272 is formed while heating the substrate, the heat treatment may be omitted.

Next, the insulator 280 is formed on the insulator 274. In the present embodiment, silicon oxide formed by the plasma CVD method is used as the insulator 280.

Next, the insulator 280 is subjected to CMP treatment to reduce the unevenness of the film surface (see FIGS. 24 (A) to 24 (E)).

Next, an opening 480 reaching the insulator 214 is formed in the insulator 216, the insulator 220, the insulator 222, the insulator 224, the insulator 272, the insulator 274, and the insulator 280 (FIGS. 25A to 25). 25 (E)). The step corresponds to step S13 of the flowchart shown in FIG. 28. Although only a part of the opening 480 extending in the W1-W2 direction is shown in FIG. 26A, the opening 480 is formed so as to surround the transistor 200 and the transistor 400.

Here, the opening 480 is preferably formed inside a dicing line or a scribe line for cutting out the semiconductor device 1000. As a result, even when the semiconductor device 1000 is cut out, the side surfaces of the insulator 280, the insulator 224, the insulator 216, and the like remain sealed with the insulator 282 and the insulator 284 formed in a later step. It is possible to prevent impurities such as hydrogen or water from entering through these insulators and diffusing into the transistor 200 and the transistor 400. A plurality of regions surrounded by openings 480 may be provided inside the dicing line or the scribe line, and the plurality of semiconductor devices may be individually sealed with the insulator 282 and the insulator 284.

Next, the substrate is carried into a film forming apparatus having a plurality of chambers, and heat treatment is performed in the chambers of the film forming apparatus. Thereby, impurities such as moisture adsorbed on the substrate before the film formation of the insulator 282 can be removed.

Next, the insulator 282 is formed into a film by using a sputtering method in a chamber different from the chamber in which the heat treatment of the film forming apparatus is performed. The film formation of the insulator 282 is continuously performed without exposing it to the outside air from the above heat treatment.

The insulator 282 is formed in contact with the upper surface of the insulator 214 at the opening 480. Therefore, the transistor 200 and the transistor 400 can be enclosed and sealed by the insulator 282 not only from the top and bottom of the substrate but also from the side surface direction. This makes it possible to prevent impurities such as water and hydrogen from diffusing from the outside of the insulator 282 into the transistor 200 and the transistor 400.

As shown in the present embodiment, the transistor 200 is formed by the insulator 282 without mixing impurities such as water by continuously forming a film with the same film forming apparatus without exposing the heat treatment to the outside air. And the transistor 400 can be covered. Further, by adding oxygen to the site formed by desorbing impurities such as water by the above heat treatment, more oxygen can be contained. Further, by performing the heat treatment and the film forming treatment in different chambers in the multi-chamber type film forming apparatus, the insulator 282 can be formed without being affected by impurities such as water desorbed by the heat treatment. can.

Next, an insulator 284 is formed on the insulator 282 by using the ALD method (see FIGS. 26 (A) to 26 (E)).

For the insulator 284, it is preferable to use an insulating material in which impurities such as water and hydrogen are difficult to permeate, and for example, it is preferable to use aluminum oxide or the like. Further, by forming a film of the insulator 284 using the ALD method, it is possible to suppress the formation of cracks and pinholes and to form a film with good coverage. By forming the insulator 282 by the ALD method, the film can be formed even at the opening 480 without causing step breakage, so that the barrier property against impurities can be further improved.

Next, it is preferable to perform heat treatment. By performing the heat treatment, hydrogen contained in the insulator 280 or the like can be gettered to the insulator 282 and the insulator 284, and can be diffused outward as water from above the insulator 284. In this way, impurities such as hydrogen contained in the insulator 280 can be reduced. The heat treatment may be performed after the insulator 284 is formed into a film. Further, when the insulator 284 is formed while heating the substrate, the heat treatment can be omitted.

Through the above steps, the transistor 200, the transistor 400, and the semiconductor device 1000 are formed. According to the above manufacturing method, the transistors 200 and the transistors 400 having different structures can be provided on the same substrate in substantially the same process. According to the above-mentioned manufacturing method, for example, it is not necessary to manufacture the transistor 400 after manufacturing the transistor 200, so that the productivity of the semiconductor device can be increased.

In the transistor 200, a channel is formed in the oxide semiconductor 230a and the oxide semiconductor 230b in contact with the oxide semiconductor 230c. In the transistor 400, a channel is formed in the oxide semiconductor 230c in contact with the insulator 224 and the insulator 450. Therefore, the transistor 400 is more susceptible to interfacial scattering than the transistor 200. Further, the electron affinity of the oxide semiconductor 230c shown in the present embodiment is smaller than the electron affinity of the oxide semiconductor 230b. Therefore, the Vth of the transistor 400 can be made larger than the Vth of the transistor 200, and the Icut of the transistor 400 can be made smaller.

As shown above, the carrier densities of the oxide semiconductor 230A and the oxide semiconductor 230B can be evaluated during the transistor manufacturing process by the μ-PCD measurement. Therefore, the transistor can be manufactured with high productivity. Alternatively, a semiconductor device having the transistor can be manufactured with high productivity.

Further, as shown in the first embodiment, the μ-PCD measurement can perform multi-point measurement in the substrate surface in a short time. The carrier density of the oxide semiconductor in the substrate surface can be evaluated by measuring multiple points in the substrate surface during the transistor manufacturing process. That is, it is possible to estimate the transistor electrical characteristics in the substrate surface during the transistor manufacturing process. Therefore, the transistor can be manufactured with high productivity. Alternatively, a semiconductor device having the transistor can be manufactured with high productivity.

(Embodiment 4)
In this embodiment, one embodiment of the semiconductor device will be described with reference to FIGS. 27 and 28.

[Storage device]
27 and 28 show an example of a storage device using the semiconductor device which is one aspect of the present invention.

The storage device shown in FIGS. 27 and 28 includes a transistor 400, a transistor 300, a transistor 200, and a capacitive element 100. Here, the transistor 200 and the transistor 400 are the same transistors as those described in the third embodiment.

The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the transistor 200 has a small off-current, it is possible to retain the stored contents for a long period of time by using the transistor 200 as a storage device. That is, since the refresh operation is not required or the frequency of the refresh operation is extremely low, the power consumption of the storage device can be sufficiently reduced.

Further, by applying a negative potential to the back gate of the transistor 200, the off-current of the transistor 200 can be further reduced. In this case, by configuring the transistor 200 to maintain the back gate voltage, it is possible to retain the memory for a long period of time without supplying a power source.

The back gate voltage of the transistor 200 is controlled by the transistor 400. For example, the top gate and the back gate of the transistor 400 are connected to the source by a diode, and the source of the transistor 400 and the back gate of the transistor 200 are connected to each other. When the negative potential of the back gate of the transistor 200 is held in this configuration, the voltage between the top gate and the source of the transistor 400 and the voltage between the back gate and the source become 0V. As shown in the previous embodiment, the Icut of the transistor 400 is very small. Therefore, with this configuration, the negative potential of the back gate of the transistor 200 can be maintained for a long time without supplying power to the transistor 200 and the transistor 400. As a result, the storage device having the transistor 200 and the transistor 400 can retain the stored contents for a long period of time.

In FIGS. 27 and 28, the wiring 3001 is electrically connected to the source of the transistor 300 and the wiring 3002 is electrically connected to the drain of the transistor 300. Further, the wiring 3003 is electrically connected to one of the source and drain of the transistor 200, the wiring 3004 is electrically connected to the gate of the transistor 200, and the wiring 3006 is electrically connected to the back gate of the transistor 200. .. The gate of the transistor 300 and the other of the source and drain of the transistor 200 are electrically connected to one of the electrodes of the capacitive element 100, and the wiring 3005 is electrically connected to the other of the electrodes of the capacitive element 100. .. The wiring 3007 is electrically connected to the source of the transistor 400, the wiring 3008 is electrically connected to the gate of the transistor 400, the wiring 3009 is electrically connected to the back gate of the transistor 400, and the wiring 3010 is the drain of the transistor 400. Is electrically connected to. Here, the wiring 3006, the wiring 3007, the wiring 3008, and the wiring 3009 are electrically connected.

<Configuration 1 of storage device>
The storage device shown in FIGS. 27 and 28 has a characteristic that the potential of the gate of the transistor 300 can be held, so that information can be written, held, and read as shown below.

The writing and holding of information will be described. First, the potential of the wiring 3004 is set to the potential at which the transistor 200 is in the conductive state, and the transistor 200 is brought into the conductive state. As a result, the potential of the wiring 3003 is given to the gate of the transistor 300 and the node FG that is electrically connected to one of the electrodes of the capacitive element 100. That is, a predetermined charge is given to the gate of the transistor 300 (writing). Here, it is assumed that either of the charges giving two different potential levels (hereinafter referred to as Low level charge and High level charge) is given. After that, the electric charge is held (retained) in the node FG by setting the potential of the wiring 3004 to the potential at which the transistor 200 is in the non-conducting state and putting the transistor 200 in the non-conducting state.

When the off-current of the transistor 200 is small, the charge of the node FG is retained for a long period of time.

Next, reading information will be described. When a predetermined potential (constant potential) is applied to the wiring 3001 and an appropriate potential (reading potential) is applied to the wiring 3005, the wiring 3002 takes a potential corresponding to the amount of electric charge held in the node FG. This is because, assuming that the transistor 300 is an n-channel type, the apparent threshold voltage _{Vth_H} when a high level charge is given to the gate of the transistor 300 is a Low level charge given to the gate of the transistor 300. This is because it is lower than the apparent threshold voltage _{Vth_L when the voltage is present.} Here, the apparent threshold voltage means the potential of the wiring 3005 required to bring the transistor 300 into the "conducting state". _{Therefore, by setting} the potential of the wiring 3005 to the potential _{V 0} between V th_H and V _{th_L} , the electric charge given to the node FG can be discriminated. For example, in writing, when the node FG is given a high level charge, the transistor 300 is in the “conducting state” _{when the potential of the wiring 3005 becomes V 0} (> V _{th_H).} On the other hand, when the node FG is given a Low level charge, the transistor 300 remains in the “non-conducting state” even _{if the potential of the wiring 3005 becomes V 0} (<V _{th_L).} Therefore, by discriminating the potential of the wiring 3002, the information held in the node FG can be read out.

Further, the memory cell array can be configured by arranging the storage devices shown in FIGS. 27 and 28 in a matrix.

When the memory cells are arranged in an array, the information of the desired memory cells must be read at the time of reading. For example, when the transistor 300 is a p-channel type, the memory cell has a NOR type configuration. Therefore, in a memory cell that does not read information, it is desirable to give the wiring 3005 a potential that _{causes the} transistor 300 to be in a “non-conducting state” regardless of the charge given to the node FG, that is, a potential lower than Vth_H. Only the information of the memory cell of can be read. Alternatively, when the transistor 300 is an n-channel type, the memory cell has a NAND type configuration. Therefore, in a memory cell that does not read information, it is desirable to give the wiring 3005 a potential that _{causes the} transistor 300 to be in a “conducting state” regardless of the charge given to the node FG, that is, a potential higher than Vth_L. Only memory cell information can be read.

<Configuration 2 of storage device>
The storage device shown in FIGS. 27 and 28 may have a configuration that does not include the transistor 300. Even when the transistor 300 is not provided, information can be written and held by the same operation as that of the storage device described above.

For example, reading information when the transistor 300 is not provided will be described. When the transistor 200 becomes conductive, the floating wiring 3003 and the capacitance element 100 are electrically connected, and the electric charge is redistributed between the wiring 3003 and the capacitance element 100. As a result, the potential of the wiring 3003 changes. The amount of change in the potential of the wiring 3003 takes a different value depending on the potential of one of the electrodes of the capacitance element 100 (or the electric charge accumulated in the capacitance element 100).

For example, if the potential of one of the electrodes of the capacitance element 100 is V, the capacitance of the capacitance element 100 is C, the capacitance component of the wiring 3003 is CB, and the potential of the wiring 3003 before the charge is redistributed is VB0. The potential of the wiring 3003 after being redistributed becomes (CB × VB0 + CV) / (CB + C). Therefore, assuming that the potential of one of the electrodes of the capacitance element 100 takes two states of V1 and V0 (V1> V0) as the state of the memory cell, the potential of the wiring 3003 (=) when the potential V1 is held. It can be seen that (CB × VB0 + CV1) / (CB + C)) is higher than the potential (= (CB × VB0 + CV0) / (CB + C)) of the wiring 3003 when the potential V0 is held.

Then, the information can be read out by comparing the potential of the wiring 3003 with a predetermined potential.

In the case of this configuration, for example, a transistor to which silicon is applied is used for a drive circuit for driving a memory cell, and a transistor to which an oxide semiconductor is applied is laminated and arranged on the drive circuit as the transistor 200. And it is sufficient.

The storage device shown above can retain the stored contents for a long period of time by applying a transistor using an oxide semiconductor and having a small off-current. That is, since the refresh operation becomes unnecessary or the frequency of the refresh operation can be extremely reduced, a storage device with low power consumption can be realized. Further, even when there is no power supply (however, the potential is preferably fixed), it is possible to retain the stored contents for a long period of time.

Further, since the storage device does not require a high voltage for writing information, deterioration of the element is unlikely to occur. For example, unlike a conventional non-volatile memory, electrons are not injected into the floating gate or extracted from the floating gate, so that problems such as deterioration of the insulator do not occur. That is, unlike the conventional non-volatile memory, the storage device according to one aspect of the present invention is a storage device in which the number of rewritable times is not limited and the reliability is dramatically improved. Further, since information is written depending on the conductive state and non-conducting state of the transistor, high-speed operation is possible.

<Structure of storage device 1>
An example of the storage device of one aspect of the present invention is shown in FIG. The storage device includes a transistor 400, a transistor 300, a transistor 200, and a capacitive element 100. The transistor 200 is provided above the transistor 300, and the capacitive element 100 is provided above the transistor 300 and the transistor 200.

The transistor 300 is provided on the substrate 311 and includes a conductor 316, an insulator 314, a semiconductor region 312 composed of a part of the substrate 311 and a low resistance region 318a and a low resistance region 318b that function as a source region or a drain region. Have.

As the substrate 311, a single crystal semiconductor substrate made of silicon or the like, a polycrystalline semiconductor substrate, a compound semiconductor substrate made of silicon germanium or the like can be used.

As shown in the first embodiment, when a substrate having a bandgap smaller than the energy of the excitation light used in the μ-PCD measurement is used, a large number of carriers are generated on the substrate. As a result, the information obtained by the μ-PCD measurement includes a large amount of information derived from the substrate, which may make it difficult to evaluate the oxide semiconductor. For example, when manufacturing a semiconductor device from a silicon single crystal semiconductor substrate, a substrate having a large bandgap such as a glass substrate or a quartz substrate is separately prepared, and the semiconductor device is manufactured from a glass substrate or a quartz substrate as a monitor substrate, and a transistor is used. By appropriately performing μ-PCD measurement during the manufacturing process, it is possible to evaluate the carrier density of the oxide semiconductor.

Further, when a conductor having a bandgap smaller than the energy of the excitation light used in the μ-PCD measurement is used, a large number of carriers are generated in the conductor. As a result, the information obtained by the μ-PCD measurement includes a large amount of information derived from the conductor, which may make it difficult to evaluate the oxide semiconductor. By separately preparing a substrate with a large bandgap such as a glass substrate or quartz substrate, manufacturing a semiconductor device as a monitor substrate without providing a conductor with a glass substrate or quartz substrate, and performing μ-PCD measurement, oxides are formed. It is possible to evaluate the carrier density of semiconductors.

The transistor 300 may be either a p-channel type or an n-channel type.

It is preferable to include a semiconductor such as a silicon-based semiconductor in a region in which a channel of the semiconductor region 312 is formed, a region in the vicinity thereof, a low resistance region 318a serving as a source region or a drain region, a low resistance region 318b, and the like. It preferably contains crystalline silicon. Alternatively, it may be formed of a material having Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may be used. Alternatively, the transistor 300 may be a HEMT (High Electron Mobility Transistor) by using GaAs, GaAlAs, or the like.

In the low resistance region 318a and the low resistance region 318b, in addition to the semiconductor material applied to the semiconductor region 312, an element that imparts n-type conductivity such as arsenic and phosphorus, or a p-type conductivity such as boron is imparted. Contains elements that

The conductor 316 that functions as a gate electrode is a semiconductor material such as silicon, a metal material, or an alloy that contains an element that imparts n-type conductivity such as arsenic or phosphorus, or an element that imparts p-type conductivity such as boron. A material or a conductive material such as a metal oxide material can be used.

The threshold voltage can be adjusted by determining the work function depending on the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride for the conductor. Further, in order to achieve both conductivity and embedding property, it is preferable to use a metal material such as tungsten or aluminum as a laminate for the conductor, and it is particularly preferable to use tungsten in terms of heat resistance.

The transistor 300 shown in FIG. 27 is an example, and the transistor 300 is not limited to the structure thereof, and an appropriate transistor may be used according to the circuit configuration and the driving method. Further, in the case of the configuration shown in <Configuration 2 of the storage device>, the transistor 300 may not be provided.

An insulator 320, an insulator 322, an insulator 324, and an insulator 326 are laminated in this order so as to cover the transistor 300.

As the insulator 320, the insulator 322, the insulator 324, and the insulator 326, for example, silicon oxide, silicon oxide nitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum nitride, aluminum nitride and the like can be used. Just do it.

The insulator 322 may have a function as a flattening film for flattening a step generated by a transistor 300 or the like provided below the insulator 322. For example, the upper surface of the insulator 322 may be flattened by a flattening treatment using a CMP method or the like in order to improve the flatness.

Further, for the insulator 324, it is preferable to use a film having a barrier property so that hydrogen and impurities do not diffuse in the region where the transistor 200 and the transistor 400 are provided from the substrate 311 or the transistor 300. Here, the barrier property is a function of suppressing the diffusion of impurities typified by hydrogen and water. For example, in an atmosphere of 350 ° C. or 400 ° C., the diffusion distance of hydrogen per hour in a film having a barrier property may be 50 nm or less. Preferably, in an atmosphere of 350 ° C. or 400 ° C., the diffusion distance of hydrogen per hour in the film having a barrier property is 30 nm or less, more preferably 20 nm or less.

As an example of a film having a barrier property against hydrogen, for example, silicon nitride formed by the CVD method can be used. Here, hydrogen may diffuse into a semiconductor element having an oxide semiconductor such as a transistor 200, so that the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 200 and the transistor 400 and the transistor 300. Specifically, the membrane that suppresses the diffusion of hydrogen is a membrane that desorbs a small amount of hydrogen.

The amount of hydrogen desorbed can be analyzed using, for example, TDS. For example, the amount of hydrogen desorbed from the insulator 324 is 2 × 10 in the range of 50 ° C. to 500 ° C. in the TDS analysis, in which the amount desorbed in terms of hydrogen molecules is converted into the area of the insulator 324. ^It may be 15 molecules · cm ^-2 or less, preferably 1 × 10 ¹⁵ molecules · cm ^-2 or less, more preferably 5 × 10 ¹⁴ molecules · cm ^-2 or less.

The insulator 326 preferably has a lower dielectric constant than the insulator 324. For example, the relative permittivity of the insulator 326 is preferably less than 4, more preferably less than 3. Further, for example, the relative permittivity of the insulator 324 is preferably 0.7 times or less, more preferably 0.6 times or less, the relative permittivity of the insulator 326. By using a material having a low dielectric constant as an interlayer film, it is possible to reduce the parasitic capacitance generated between the wirings.

Further, the insulator 320, the insulator 322, the insulator 324, and the insulator 326 are embedded with a capacitance element 100, a conductor 328 electrically connected to the transistor 200, a conductor 330, and the like. The conductor 328 and the conductor 330 have a function as a plug or a wiring. Further, as will be described later, a conductor having a function as a plug or wiring may collectively give a plurality of structures the same reference numerals. Further, in the present specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, a part of the conductor may function as a wiring, and a part of the conductor may function as a plug.

As the material of each plug and wiring (conductor 328, conductor 330, etc.), a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material is single-layered or laminated. Can be used. It is preferable to use a refractory material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is preferable to use tungsten. Alternatively, it is preferably formed of a low resistance conductive material such as aluminum or copper. Wiring resistance can be reduced by using a low resistance conductive material.

A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. 27, the insulator 350, the insulator 352, and the insulator 354 are laminated in this order. Further, a conductor 356 is formed on the insulator 350, the insulator 352, and the insulator 354. The conductor 356 has a function as a plug or a wiring. The conductor 356 can be provided by using the same material as the conductor 328 and the conductor 330.

For example, as the insulator 350, it is preferable to use an insulator having a barrier property against hydrogen, similarly to the insulator 324. Further, the conductor 356 preferably contains a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 350 having a barrier property against hydrogen. With this configuration, the transistor 300, the transistor 200, and the transistor 400 can be separated by a barrier layer, and the diffusion of hydrogen from the transistor 300 to the transistor 200 and the transistor 400 can be suppressed.

As the conductor having a barrier property against hydrogen, for example, tantalum nitride or the like may be used. Further, by laminating tantalum nitride and tungsten having high conductivity, it is possible to suppress the diffusion of hydrogen from the transistor 300 while maintaining the conductivity as wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen has a structure in contact with the insulator 350 having a barrier property against hydrogen.

On the insulator 354, an insulator 358, an insulator 210, an insulator 212, an insulator 214, and an insulator 216 are laminated in this order. As any one of the insulator 358, the insulator 210, the insulator 212, the insulator 214, and the insulator 216, it is preferable to use a substance having a barrier property against oxygen and hydrogen.

For example, the insulator 358, the insulator 212, and the insulator 214 have a barrier that prevents hydrogen and impurities from diffusing from, for example, the area where the substrate 311 or the transistor 300 is provided to the area where the transistor 200 and the transistor 400 are provided. It is preferable to use a film having a property. Therefore, the same material as the insulator 324 can be used.

Further, as an example of a film having a barrier property against hydrogen, silicon nitride formed by the CVD method can be used. Here, hydrogen may diffuse into a semiconductor element having an oxide semiconductor such as a transistor 200, so that the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 200 and the transistor 400 and the transistor 300. Specifically, the membrane that suppresses the diffusion of hydrogen is a membrane that desorbs a small amount of hydrogen.

Further, as the film having a barrier property against hydrogen, for example, it is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 212 and the insulator 214.

In particular, aluminum oxide has a high blocking effect that does not allow the membrane to permeate both oxygen and impurities such as hydrogen and water that cause fluctuations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from being mixed into the transistor 200 and the transistor 400 during and after the manufacturing process of the transistor. In addition, the release of oxygen from the oxides constituting the transistor 200 can be suppressed. Therefore, it is suitable for use as a protective film for the transistor 200 and the transistor 400.

Further, for example, the same material as that of the insulator 320 can be used for the insulator 210 and the insulator 216. Further, by using a material having a relatively low dielectric constant as an interlayer film for the insulating film, it is possible to reduce the parasitic capacitance generated between the wirings. For example, as the insulator 216, a silicon oxide film, a silicon nitride film, or the like can be used.

Further, the insulator 358, the insulator 210, the insulator 212, the insulator 214, and the insulator 216 include the conductor 218, and the conductors (conductor 205, conductor 405, conductor) constituting the transistor 200 and the transistor 400. The body 403, the conductor 407) and the like are embedded. The conductor 218 has a function as a plug or wiring for electrically connecting to the capacitance element 100 or the transistor 300. The conductor 218 can be provided by using the same material as the conductor 328 and the conductor 330.

In particular, the insulator 358, the insulator 212, and the conductor 218 in the region in contact with the insulator 214 are preferably conductors having a barrier property against oxygen, hydrogen, and water. With this configuration, the transistor 300 and the transistor 200 can be completely separated by a layer having a barrier property against oxygen, hydrogen, and water, and the diffusion of hydrogen from the transistor 300 to the transistor 200 and the transistor 400 can be suppressed. ..

A transistor 200 and a transistor 400 are provided above the insulator 216. As the transistor 200 and the transistor 400, it is preferable to use the transistor 200 and the transistor 400 described in the first embodiment.

An insulator 110 is provided above the transistor 200 and the transistor 400. As the insulator 110, the same material as the insulator 320 can be used. Further, by using a material having a relatively low dielectric constant as an interlayer film for the insulating film, it is possible to reduce the parasitic capacitance generated between the wirings. For example, as the insulator 110, a silicon oxide film, a silicon nitride film, or the like can be used.

Further, a conductor 285 and the like are embedded in the insulator 220, the insulator 222, the insulator 224, the insulator 272, the insulator 274, and the insulator 110.

The conductor 285 functions as a plug or wiring that electrically connects to the capacitive element 100, the transistor 200, or the transistor 300. The conductor 285 can be provided by using the same material as the conductor 328 and the conductor 330.

For example, when the conductor 285 is provided as a laminated structure, it is preferable to include a conductor that is difficult to oxidize (high oxidation resistance). In particular, it is preferable to provide a conductor having high oxidation resistance in a region in contact with the insulator 224 having an excess oxygen region. With this configuration, it is possible to prevent the conductor 285 from absorbing excess oxygen from the insulator 224. Further, the conductor 285 preferably contains a conductor having a barrier property against hydrogen. In particular, by providing a conductor having a barrier property against impurities such as hydrogen in the region in contact with the insulator 224 having an excess oxygen region, impurities in the conductor 285 and a part of the conductor 285 are diffused or externally. It is possible to suppress the diffusion path of impurities from.

Further, the conductor 287, the capacitance element 100, and the like are provided on the insulator 110 and the conductor 285. The capacitive element 100 has a conductor 112, an insulator 130, an insulator 132, an insulator 134, and a conductor 116. The conductor 112 and the conductor 116 have a function as electrodes of the capacitance element 100, and the insulator 130, the insulator 132, and the insulator 134 have a function as a dielectric of the capacitance element 100.

The conductor 287 functions as a plug or wiring that electrically connects to the capacitive element 100, the transistor 200, or the transistor 300. Further, the conductor 112 has a function as one of the electrodes of the capacitive element 100. The conductor 287 and the conductor 112 can be formed at the same time.

The conductor 287 and the conductor 112 include a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film containing the above-mentioned elements as components. (Tantalum nitride, titanium nitride film, molybdenum nitride film, tungsten nitride film) and the like can be used. Alternatively, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon oxide are added. It is also possible to apply a conductive material such as indium tin oxide.

The insulator 130, the insulator 132 and the insulator 134 include, for example, silicon oxide, silicon oxide, silicon nitride, silicon nitride, aluminum oxide, aluminum nitride, aluminum nitride, aluminum nitride, hafnium oxide, hafnium oxide, and the like. Hafnium nitride, hafnium nitride, or the like may be used, and the components can be laminated or provided in a single layer.

For example, when a high dielectric constant (high-k) material such as aluminum oxide is used for the insulator 132, the capacitance element 100 can increase the capacitance per unit area. Further, for the insulator 130 and the insulator 134, it is preferable to use a material having a large dielectric strength such as silicon oxide nitride. By sandwiching a high dielectric material with an insulator having a large dielectric strength, it is possible to suppress electrostatic breakdown of the capacitance element 100 and to obtain a capacitance element having a large capacitance.

Further, the conductor 116 is provided so as to cover the side surface and the upper surface of the conductor 112 via the insulator 130, the insulator 132, and the insulator 134. With this configuration, the side surface of the conductor 112 is wrapped in the conductor 116 via an insulator. With this configuration, the capacitance is also formed on the side surface of the conductor 112, so that the capacitance per projected area of the capacitive element can be increased. Therefore, it is possible to reduce the area, increase the integration, and miniaturize the storage device.

As the conductor 116, a conductive material such as a metal material, an alloy material, or a metal oxide material can be used. It is preferable to use a refractory material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is particularly preferable to use tungsten. When it is formed at the same time as another structure such as a conductor, Cu (copper), Al (aluminum), or the like, which are low resistance metal materials, may be used.

An insulator 150 is provided on the conductor 116 and the insulator 134. The insulator 150 can be provided by using the same material as the insulator 320. Further, the insulator 150 may function as a flattening film that covers the uneven shape below the insulator 150.

The above is the description of the configuration example. By using this configuration, in a storage device using a transistor having an oxide semiconductor, fluctuations in electrical characteristics can be suppressed and reliability can be improved. Alternatively, a transistor having an oxide semiconductor having a large on-current can be provided. Alternatively, a transistor having an oxide semiconductor having a small off-current can be provided. Alternatively, it is possible to provide a storage device with reduced power consumption.

<Modification example 1>
An example of a modification of the storage device is shown in FIG. FIG. 28 is different from FIG. 27 in the configuration of the transistor 300 and the shapes of the insulator 272 and the insulator 274.

In the transistor 300 shown in FIG. 28, the semiconductor region 312 (a part of the substrate 311) on which the channel is formed has a convex shape. Further, the side surface and the upper surface of the semiconductor region 312 are provided so as to be covered with the conductor 316 via the insulator 314. The conductor 316 may be made of a material that adjusts the work function. Since such a transistor 300 utilizes a convex portion of a semiconductor substrate, it is also called a FIN type transistor. It should be noted that an insulator that is in contact with the upper portion of the convex portion and functions as a mask for forming the convex portion may be provided. Further, although the case where a part of the semiconductor substrate is processed to form a convex portion is shown here, the SOI substrate may be processed to form a semiconductor film having a convex shape.

By using the transistor 300 having the above configuration and the transistor 200 in combination, it is possible to reduce the area, increase the integration, and miniaturize.

Further, as shown in FIG. 28, the insulator 220 and the insulator 222 do not necessarily have to be provided. With this configuration, productivity can be increased.

Further, as shown in FIG. 28, the lower surface of the insulator 272 and the upper surface of the insulator 214 may be in contact with each other at the openings formed in the insulator 216 and the insulator 224.

The above is the description of the modified example. By using this configuration, in a storage device using a transistor having an oxide semiconductor, fluctuations in electrical characteristics can be suppressed and reliability can be improved. Alternatively, a transistor having an oxide semiconductor having a large on-current can be provided. Alternatively, a transistor having an oxide semiconductor having a small off-current can be provided. Alternatively, it is possible to provide a storage device with reduced power consumption.

This embodiment can be carried out in combination with at least a part thereof as appropriate with other embodiments described in the present specification.

(Embodiment 5)
In the present embodiment, one embodiment of the semiconductor device using the oxide semiconductor shown in the previous embodiment as the semiconductor layer will be described with reference to FIGS. 29 to 30.

<Semiconductor wafers and chips>
FIG. 29A shows a top view of the substrate 711 before the dicing process is performed. As the substrate 711, for example, a semiconductor substrate (also referred to as a "semiconductor wafer") can be used. A plurality of circuit regions 712 are provided on the substrate 711. A semiconductor device or the like according to one aspect of the present invention can be provided in the circuit area 712.

Each of the plurality of circuit areas 712 is surrounded by a separation area 713. A separation line (also referred to as a “dicing line”) 714 is set at a position overlapping the separation region 713. By cutting the substrate 711 along the separation line 714, the chip 715 including the circuit area 712 can be cut out from the substrate 711. FIG. 29 (B) shows an enlarged view of the chip 715.

Further, a conductive layer, a semiconductor layer, or the like may be provided in the separation region 713. By providing a conductive layer, a semiconductor layer, or the like in the separation region 713, ESD that may occur during the dicing step can be alleviated, and a decrease in yield due to the dicing step can be prevented. Further, in general, the dicing step is performed while supplying pure water with reduced specific resistance by dissolving carbon dioxide gas or the like to the cutting portion for the purpose of cooling the substrate, removing shavings, preventing antistatic, and the like. By providing a conductive layer, a semiconductor layer, or the like in the separation region 713, the amount of pure water used can be reduced. Therefore, the production cost of the semiconductor device can be reduced. Moreover, the productivity of the semiconductor device can be increased.

<Electronic components>
An example of an electronic component using the chip 715 will be described with reference to FIGS. 30 (A) and 30 (B). The electronic component is also referred to as a semiconductor package or an IC package. Electronic components have a plurality of standards, names, etc., depending on the terminal take-out direction, the shape of the terminal, and the like.

In the assembly process (post-process), the electronic component is completed by combining the semiconductor device shown in the above embodiment and a component other than the semiconductor device.

The post-process will be described with reference to the flowchart shown in FIG. 30 (A). After forming the semiconductor device or the like according to one aspect of the present invention on the substrate 711 in the previous step, a "back surface grinding step" for grinding the back surface of the substrate 711 (the surface on which the semiconductor device or the like is not formed) is performed (step S721). .. By thinning the substrate 711 by grinding, it is possible to reduce the size of electronic components.

Next, a "dicing step" for separating the substrate 711 into a plurality of chips 715 is performed (step S722). Then, a "die bonding step" is performed in which the separated chips 715 are bonded onto the individual lead frames (step S723). For joining the chip 715 and the lead frame in the die bonding step, a method suitable for the product is appropriately selected, such as joining with a resin or joining with a tape. The chip 715 may be bonded on the interposer substrate instead of the lead frame.

Next, a "wire bonding step" is performed in which the leads of the lead frame and the electrodes on the chip 715 are electrically connected by a thin metal wire (wire) (step S724). A silver wire, a gold wire, or the like can be used as the thin metal wire. Further, as the wire bonding, for example, ball bonding or wedge bonding can be used.

The wire-bonded chip 715 is subjected to a "sealing step (molding step)" in which the chip 715 is sealed with an epoxy resin or the like (step S725). By performing the sealing process, the inside of the electronic component is filled with resin, the wire connecting the chip 715 and the lead can be protected from mechanical external force, and the characteristics deteriorate (reliability) due to moisture, dust, etc. (Decrease) can be reduced.

Next, a "lead plating step" for plating the leads of the lead frame is performed (step S726). The plating process prevents rust on the leads, and soldering can be performed more reliably when mounting on a printed circuit board later. Next, a "molding step" of cutting and molding the lead is performed (step S727).

Next, a "marking step" is performed in which a printing process (marking) is performed on the surface of the package (step S728). Then, the electronic component is completed through an "inspection step" (step S729) for checking the quality of the appearance shape, the presence or absence of malfunction, and the like.

Further, a schematic perspective view of the completed electronic component is shown in FIG. 30 (B). FIG. 30B shows a schematic perspective view of a QFP (Quad Flat Package) as an example of an electronic component. The electronic component 750 shown in FIG. 30B has a lead 755 and a chip 715. The electronic component 750 may have a plurality of chips 715.

The electronic component 750 shown in FIG. 30B is mounted on, for example, a printed circuit board 752. A plurality of such electronic components 750 are combined and electrically connected to each other on the printed circuit board 752 to complete a substrate (mounting substrate 754) on which the electronic components are mounted. The completed mounting board 754 is used for electronic devices and the like.

(Embodiment 6)
<Electronic equipment>
The semiconductor device according to one aspect of the present invention can be used in various electronic devices. FIG. 31 shows a specific example of an electronic device using the semiconductor device according to one aspect of the present invention.

The portable game machine 2900 shown in FIG. 31A has a housing 2901, a housing 2902, a display unit 2903, a display unit 2904, a microphone 2905, a speaker 2906, an operation switch 2907, and the like. Further, the portable game machine 2900 includes an antenna, a battery, and the like inside the housing 2901. The portable game machine shown in FIG. 31A has two display units 2903 and a display unit 2904, but the number of display units is not limited to this. The display unit 2903 is provided with a touch screen as an input device, and can be operated by a stylus 2908 or the like.

The information terminal 2910 shown in FIG. 31B has a display unit 2912, a microphone 2917, a speaker unit 2914, a camera 2913, an external connection unit 2916, an operation switch 2915, and the like in the housing 2911. The display unit 2912 includes a display panel and a touch screen using a flexible substrate. Further, the information terminal 2910 includes an antenna, a battery, and the like inside the housing 2911. The information terminal 2910 can be used as, for example, a smartphone, a mobile phone, a tablet-type information terminal, a tablet-type personal computer, an electronic book terminal, or the like.

The notebook personal computer 2920 shown in FIG. 31 (C) has a housing 2921, a display unit 2922, a keyboard 2923, a pointing device 2924, and the like. Further, the notebook personal computer 2920 includes an antenna, a battery, and the like inside the housing 2921.

The video camera 2940 shown in FIG. 31 (D) has a housing 2941, a housing 2942, a display unit 2943, an operation switch 2944, a lens 2945, a connection unit 2946, and the like. The operation switch 2944 and the lens 2945 are provided in the housing 2941, and the display unit 2943 is provided in the housing 2942. Further, the video camera 2940 includes an antenna, a battery, and the like inside the housing 2941. The housing 2941 and the housing 2942 are connected by a connecting portion 2946, and the angle between the housing 2941 and the housing 2942 can be changed by the connecting portion 2946. Depending on the angle of the housing 2942 with respect to the housing 2941, the orientation of the image displayed on the display unit 2943 can be changed, and the display / non-display of the image can be switched.

FIG. 31 (E) shows an example of a bangle type information terminal. The information terminal 2950 has a housing 2951, a display unit 2952, and the like. Further, an antenna, a battery, and the like are provided inside the information terminal 2950 and the housing 2951. The display unit 2952 is supported by a housing 2951 having a curved surface. Since the display unit 2952 includes a display panel using a flexible substrate, it is possible to provide an information terminal 2950 that is flexible, light, and easy to use.

FIG. 31 (F) shows an example of a wristwatch-type information terminal. The information terminal 2960 includes a housing 2961, a display unit 2962, a band 2963, a buckle 2964, an operation switch 2965, an input / output terminal 2966, and the like. Further, an antenna, a battery, and the like are provided inside the information terminal 2960 and the housing 2961. The information terminal 2960 can execute various applications such as mobile telephone, e-mail, text viewing and creation, music playback, Internet communication, and computer games.

The display surface of the display unit 2962 is curved, and display can be performed along the curved display surface. Further, the display unit 2962 is provided with a touch sensor and can be operated by touching the screen with a finger or a stylus. For example, the application can be started by touching the icon 2967 displayed on the display unit 2962. In addition to setting the time, the operation switch 2965 can have various functions such as power on / off operation, wireless communication on / off operation, manner mode execution / cancellation, and power saving mode execution / cancellation. .. For example, the function of the operation switch 2965 can be set by the operating system incorporated in the information terminal 2960.

In addition, the information terminal 2960 can execute short-range wireless communication standardized for communication. For example, by communicating with a headset capable of wireless communication, it is possible to make a hands-free call. Further, the information terminal 2960 is provided with an input / output terminal 2966, and data can be directly exchanged with another information terminal via a connector. It is also possible to charge via the input / output terminal 2966. The charging operation may be performed by wireless power supply without going through the input / output terminal 2966.

FIG. 31 (G) is an external view showing an example of an automobile. The automobile 2980 has a vehicle body 2981, wheels 2982, a dashboard 2983, a light 2984, and the like. Further, the automobile 2980 includes an antenna, a battery and the like.

For example, a storage device using the semiconductor device according to one aspect of the present invention can hold the above-mentioned control information of an electronic device, a control program, and the like for a long period of time. By using the semiconductor device according to one aspect of the present invention, a highly reliable electronic device can be realized.

This embodiment can be implemented in appropriate combination with the configurations described in other embodiments and examples.

In this example, an example in which a sample having an oxide semiconductor on a substrate is evaluated by μ-PCD measurement and Hall effect measurement is shown.

First, as a substrate, a quartz substrate having a thickness of 0.7 mm was prepared.

Next, an oxide semiconductor was formed into a film at 35 nm. The oxide semiconductor was formed by a sputtering method using an In—Ga—Zn oxide target having an atomic number ratio of In: Ga: Zn = 1: 1: 1. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.7 Pa by a miniature gauge MG-2 manufactured by Canon Anerva. The film forming power was 0.5 kW using a DC power supply. The substrate temperature was 300 ° C.

Next, heat treatment was performed at 450 ° C. for 1 hour in a nitrogen atmosphere. Next, heat treatment was performed at 450 ° C. for 1 hour in an oxygen atmosphere.

Next, the heat treatment was carried out for 1 hour in a hydrogen atmosphere to prepare Samples A1 to A17. In the heat treatment in a hydrogen atmosphere, sample A1 was not heat-treated, sample A2 was 100 ° C., sample A3 was 125 ° C., sample A4 was 150 ° C., sample A5 was 160 ° C., sample A6 was 170 ° C., and sample A7 was 180 ° C. ° C., sample A8 at 190 ° C., sample A9 at 200 ° C., sample A10 at 225 ° C., sample A11 at 250 ° C., sample A12 at 275 ° C., sample A13 at 300 ° C., sample A14 at 325 ° C., sample A15 at 350 ° C. The temperature of sample A16 was 375 ° C, and that of sample A17 was 400 ° C.

Next, μ-PCD measurement of Sample A1 to Sample A17 was performed. As the excitation light, a triple harmonic (YLF-3HG, wavelength 349 nm) of a laser using yttrium fluoride lithium to which neodymium was added as a laser medium was used. For the evaluation by μ-PCD measurement, a low-temperature polysilicon / SiC evaluation device LTA-1800SP manufactured by Kobelco Kaken Co., Ltd. was used.

Next, the Hall effect of Samples A1 to A17 was measured, and the carrier density and sheet resistance were calculated. Here, the Hall effect measurement is the Hall effect in which an electromotive force appears in the direction perpendicular to both the current and the magnetic field by applying a magnetic field vertically to the current flowing object, and the carrier density and mobility are used. And a method of measuring electrical characteristics such as resistance. In this example, the Hall effect was measured using the Van der Pauw method. The Hall effect was measured using the ResiTest 8400 series manufactured by Toyo Corporation.

Table 1 shows the μ-PCD measurement results, Hall effect measurement, and bandgap measurement results of Samples A1 to A17. In Samples A13 to A17, the peak value of the microwave obtained by the μ-PCD measurement was very low. The lifetime τ1 is not shown because the influence of noise on the attenuation curve is large and the lifetime τ1 cannot be calculated.

Next, the band gap (Eg) and the film thickness of Samples A1 to A17 were measured using a spectroscopic ellipsometer. The band gap (Eg) indicates the energy difference between the lower end Ec of the conduction band and the upper end Ev of the valence band. As a spectroscopic ellipsometer, a fully automatic ultra-thin film measurement system UT-300 manufactured by HORIBA, Ltd. was used.

Table 2 shows the band gap (Eg) and film thickness measurement results of Samples A1 to A17.

The relationship between the carrier density, the peak value measured by μ-PCD, and the sheet resistance is shown in FIG. 32 (A). In FIG. 32 (A), the horizontal axis represents the carrier density [cm ^-3 ], the left vertical axis represents the peak value [mV], and the right vertical axis represents the sheet resistance [Ω / □]. As the carrier density increased, the peak value measured by μ-PCD increased, but when the carrier density became ^{higher than around 1.0 × 10 18} cm ^-3 , the peak value tended to decrease. On the other hand, the sheet resistance tends to decrease as the carrier density increases.

The change in Fermi level corresponding to the carrier density can be expressed by Equation 5.

Here, n is the carrier density, Nc is the effective state density of the conduction band, Ec is the energy at the lower end of the conduction band, Ef is the Fermi level, k is the Boltzmann constant, and T is the temperature.

The relationship between the carrier density and the Fermi level is shown in FIG. 32 (B). In FIG. 32 (B), the horizontal axis represents the carrier density [cm ^-3 ], the left vertical axis represents the peak value [mV], and the right vertical axis represents the fermi level [eV]. It was found that the carrier density obtained by Hall effect measurement corresponds to the Fermi level calculated from the carrier density. ^{The carrier density (around 1.0 × 10 18} cm ^-3 ) at which the peak value measured by μ-PCD measurement begins to decrease is close to the band gap (about 3.37 eV) of the oxide semiconductor used in this example. It was found that the carrier density at which the conduction band of this oxide semiconductor begins to shrink is almost the same. It was also found that the peak value increases as the carrier density increases when the conduction band does not degenerate. As described above, since there is a relationship between the peak value measured by μ-PCD measurement and the carrier density measured by Hall effect measurement, it was found that the carrier density can be estimated by μ-PCD measurement.

The correlation between the carrier density and the peak value was calculated using the data of Samples A1 to A9 having a carrier density of 1 × 10 ¹⁸ cm ^{-3 or less in which the conduction band was not degenerated.} The correlation between the carrier density and the peak value is shown in FIG. 33 (A). In FIG. 33 (A), the horizontal axis represents the carrier density [cm ^-3 ] and the vertical axis represents the peak value [mV]. It was found that the approximate expression of the carrier density and the peak value can be expressed by the equation 6. The solid line in FIG. 33 (A) represents the approximate line shown in Equation 6. The coefficient of determination R ² (square of the correlation coefficient R) of the approximation line was 0.9378, and it was found that the logarithm of the carrier density and the peak value have a strong linear relationship. Further, it was found that the peak value corresponding to an arbitrary carrier density can be calculated by using the formula shown in the formula 6.

[Number 6]
Y = 124.34 × log (X) -9476.65

Here, X indicates the carrier density [cm ^-3 ], and Y indicates the peak value [mV].

As described in the second embodiment, when the purpose is to suppress the negative shift of the threshold voltage of the transistor, improve the on-current, or improve the mobility of the electric field effect, the carrier density of the oxide semiconductor is determined. 1 × 10 ⁵ cm ^-3 or more and less than 1 × 10 ¹⁸ cm ^-3 is preferable, 1 × 10 ⁷ cm ^-3 or more and 1 × 10 ¹⁷ cm ^-3 or less is more preferable, and 1 × 10 ⁹ cm ^-3 or more and 5 × 10 ¹⁶ cm ^-3 or less is more preferable, 1 × 10 ¹⁰ cm ^-3 or more and 1 × 10 ¹⁶ cm ^-3 or less is further preferable, and 1 × 10 ¹¹ cm ^-3 or more and 1 × 10 ¹⁵ cm ^-3 or less is further preferable. When the peak value corresponding to these carrier densities is calculated from Equation 6, it is found that the peak value is preferably 1290 mV or less, more preferably 1166 mV or less, further preferably 1129 mV or less, further preferably 1042 mV or less, and further preferably 917 mV or less. rice field. As shown in FIG. 33 (A), the peak value is not calculated because there is no actual measurement data ^{for the carrier density of 1 × 10 13} cm ^{-3 or less.}

Further, the relationship between the peak value and lifetime τ1 measured by μ-PCD measurement and the carrier density measured by Hall effect measurement is shown in FIG. 33 (B). In FIG. 33B, the horizontal axis represents the carrier density [cm ^-3 ], the left vertical axis represents the peak value [mV], and the right vertical axis represents the lifetime τ1 [nsec]. As the carrier density increases, both the peak value measured by μ-PCD and the lifetime τ1 tend to increase. As the carrier density increases, the lifetime becomes significantly shorter, less than 50 nsec, or uncalculable. When the lifetime τ1 is 50 nsec or more, it can be said that the carrier density is preferably less than ^{1 × 10 18} cm ^-3. It was found that by using not only the peak value but also the lifetime τ1, it becomes easier to judge whether the carrier density is high or low.

When a transistor is manufactured using an oxide semiconductor, data on the carrier density, peak value, and lifetime τ1 as shown in FIG. 33 (B) are acquired in advance. As a result, the carrier density of the oxide semiconductor can be estimated by performing μ-PCD measurement during the transistor manufacturing process. Further, the quality of the transistor electrical characteristics can be determined from the carrier density. Since the quality of the transistor electrical characteristics can be determined during the process, a transistor with good electrical characteristics can be efficiently manufactured. By lot-out the substrate that is presumed to have defective characteristics, it is possible to avoid unnecessary processing afterwards by advancing the process of the defective substrate.

FIG. 34 shows the relationship between the carrier density measured by the Hall effect measurement, the peak value measured by μ-PCD measurement, and the band gap. In FIG. 34, the horizontal axis represents the carrier density [cm ^-3 ], the left vertical axis represents the peak value [mV], and the right vertical axis represents the band gap [eV]. Below the carrier density of 1 × 10 ¹⁸ cm ^-3 , where the conduction band is not degenerate, there is no significant change in the bandgap, which is higher than the ^{carrier density of 1 × 10 18} cm ^{-3, where the conduction band is degenerate.} It was confirmed that the band gap tends to increase as the value increases. As described in the first embodiment, the Burstein-Mossshift effect widens the optical bandgap, which reduces the generation of carriers due to excitation light irradiation, which is the peak of the μ-PCD measurement. It is considered to be one of the causes for the value to decrease.

^{Here, in Samples A1 to A9 having a carrier density of 1 × 10 18} cm ^-3 or less in which the conduction band is not degenerated, no significant change is observed in the bandgap. Can be said to be variable. Similarly, it can be said that the difference in the film thickness value also varies. It is assumed that the bandgap and film thickness variations follow a normal distribution. Generally, assuming that the data (population) follows a normal distribution (Gaussian distribution), 68.3% of the total within ± 1σ, 95.4% within ± 2σ, and ± 3σ of ± 3σ centered on the average value. It is known that 99.7% and 99.999999% are included in ± 6σ, and it can be said that most of the data is included in the range of the average value ± 6σ. The standard deviation σ indicates the variance (variation) from the mean value. In Samples A1 to A9, the arithmetic mean value of the bandgap was 3.37 eV, and the standard deviation σ was 0.03 eV. Similarly, in Samples A1 to A9, the arithmetic mean value of the film thickness was 30.1 nm, and the standard deviation σ was 0.4 nm. ^{Samples A1 to A9 having a carrier density of 1 × 10 18} cm ^-3 or less in which the conduction band is not degenerated have a band gap of 3.17 eV or more and 3.58 eV or less and a film thickness in the range of an average value of ± 6σ. Can be regarded as an oxide semiconductor having a value of 27.7 nm or more and 32.5 nm or less.

As described above, from the relationship between the carrier density and the peak value shown in FIG. 33 (A) and the relationship between the carrier density and the lifetime τ1 shown in FIG. 33 (B), the peak value is 1042 mV or less and the lifetime τ1 is 50 nsec or more. If so, it can be estimated that the carrier density is less than ^{1 × 10 16} cm ^-3. Therefore, in an oxide semiconductor having a bandgap of 3.17 eV or more and 3.58 eV or less and a film thickness of 27.7 nm or more and 32.5 nm or less, if the peak value is 1042 mV or less and the lifetime τ1 is 50 nsec or more, the carrier It can be estimated that the density is less than 1 × 10 ¹⁶ cm ^{-3, which is preferable.}

In this example, an example in which a sample having an oxide semiconductor and an insulator on a substrate is evaluated by μ-PCD measurement is shown.

First, as a substrate, a quartz substrate having a thickness of 0.7 mm was prepared.

Next, silicon oxide nitride was formed into a film at 10 nm. The silicon oxide nitride was formed into a film by using the PECVD method. As the film-forming gas, a gas mixed in a volume ratio of 1 for monosilane and 800 for nitrous oxide was used. The pressure at the time of film formation was adjusted to 40 Pa. The film forming power was set to 150 W using a high frequency power supply of 60 MHz. The gap between the electrodes was 28 mm. The substrate temperature was 400 ° C.

Next, a 20 nm film of hafnium oxide was formed. Hafnium oxide was deposited using the ALD method. Tetrakis dimethylamide hafnium (TDHAH) and ozone were used as precursors. The substrate temperature was 200 ° C.

Next, silicon oxide nitride was formed into a film at 30 nm. The silicon oxide nitride was formed into a film by using the PECVD method. As the film-forming gas, a gas mixed in a volume ratio of 1 for monosilane and 800 for nitrous oxide was used. The pressure at the time of film formation was adjusted to 40 Pa. The film forming power was set to 150 W using a high frequency power supply of 60 MHz. The gap between the electrodes was 28 mm. The substrate temperature was 400 ° C.

Next, heat treatment was performed at 410 ° C. for 1 hour in an oxygen atmosphere.

Next, an In-Ga-Zn oxide was formed into a 5 nm film as the first oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 1: 3: 4. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 11% was used. The pressure at the time of film formation was adjusted to 0.7 Pa by a miniature gauge MG-2 manufactured by Canon Anerva. The film forming power was 0.5 kW using a DC power supply. The substrate temperature was 200 ° C.

Next, an In-Ga-Zn oxide was formed into a 35 nm film as the second oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 1: 1: 1. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.7 Pa by a miniature gauge MG-2 manufactured by Canon Anerva. The film forming power was 0.5 kW using a DC power supply. The substrate temperature was 300 ° C. After the film formation of the first oxide semiconductor, the second oxide semiconductor was continuously formed without exposing the first oxide semiconductor to the atmosphere. In this embodiment, a multi-chamber type sputtering apparatus in which a plurality of film forming chambers are connected to a transport chamber is used to form a second oxide semiconductor without exposing the first oxide semiconductor after film formation to the atmosphere. The substrate was transported to the membrane chamber.

Next, as step B1, heat treatment was performed at 400 ° C. for 1 hour in a nitrogen atmosphere. Next, heat treatment was performed at 400 ° C. for 1 hour in an oxygen atmosphere.

Next, μ-PCD measurement was performed. The in-plane distribution of peak values in the sample is shown in FIG. 35 (A). As the excitation light, a triple harmonic (YLF-3HG, wavelength 349 nm) of a laser using yttrium fluoride lithium to which neodymium was added as a laser medium was used. For the evaluation by μ-PCD measurement, a low-temperature polysilicon / SiC evaluation device LTA-1800SP manufactured by Kobelco Kaken Co., Ltd. was used. By repeating the measurement while moving the position of the sample (mapping measurement), it is possible to obtain information on the peak value and the lifetime in the sample plane. This time, mapping measurement was performed within 100 mm × 100 mm of a 5 inch × 5 inch size substrate at a pitch of 1 mm (10,000 points in the plane).

The median peak value in the sample mapping measurement is shown in step B1 of FIG. 39 (A). The median lifetime τ1 in the sample mapping measurement is shown in step B1 of FIG. 39 (B). Compared with the excitation light (λ = 349 nm) used in the μ-PCD measurement, which is about 3.55 eV, the band gap of silicon oxide is about 8.7 eV and hafnium oxide is about 5.1 eV. It can be said that carriers are hard to be generated in silicon oxide and hafnium oxide, and the influence on the peak value of μ-PCD measurement is small. Since the band gap of the second oxide semiconductor is about 3.37 eV and can be sufficiently excited by the excitation light used in the μ-PCD measurement, most of the information in the μ-PCD measurement obtained in step B1 is the second. It can be said that it is derived from the oxide semiconductor of. Since the first oxide semiconductor has a thin film thickness of 5 nm, even if carriers are generated, it is considered that the contribution to the peak value of the μ-PCD measurement is small. It can be referred to FIG. 40 of Example 3 described later that the peak value becomes smaller as the oxide semiconductor becomes thinner. The band gap of the first oxide semiconductor was about 3.4 eV.

Next, as step B2, a third oxide semiconductor was formed into a 5 nm film. The third oxide semiconductor was formed by a sputtering method using an In—Ga—Zn oxide target having an atomic number ratio of In: Ga: Zn = 1: 3: 2. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.7 Pa by a miniature gauge MG-2 manufactured by Canon Anerva. The film forming power was 0.5 kW using a DC power supply. The substrate temperature was 200 ° C.

Next, μ-PCD measurement was performed. The in-plane distribution of peak values in the sample is shown in FIG. 35 (B). The μ-PCD measurement was carried out in the same manner as in step B1.

The median peak value in the sample mapping measurement is shown in step B2 of FIG. 39 (A). The median lifetime τ1 in the sample mapping measurement is shown in step B2 of FIG. 39 (B). No significant change is observed between process B1 and process B2. Since the third oxide semiconductor has a thin film thickness of 5 nm, even if carriers are generated, it is considered that the contribution to the peak value of the μ-PCD measurement is small. Therefore, it can be referred to FIG. 40 of Example 3 described later that the peak value becomes smaller as the oxide semiconductor, which is considered to have not been significantly changed in the steps B1 and B2, becomes thinner. The band gap of the third oxide semiconductor was about 3.5 eV.

Next, as step B3, silicon oxide nitride was formed into a film at 10 nm. The silicon oxide nitride was formed into a film by using the PECVD method. As the film-forming gas, a gas mixed in a volume ratio of 1 for monosilane and 800 for nitrous oxide was used. The pressure at the time of film formation was adjusted to 40 Pa. The film forming power was set to 150 W using a high frequency power supply of 60 MHz. The gap between the electrodes was 28 mm. The substrate temperature was 400 ° C.

Next, μ-PCD measurement was performed. The in-plane distribution of peak values in the sample is shown in FIG. 36 (A). The μ-PCD measurement was carried out in the same manner as in step B1.

The median peak value in the sample mapping measurement is shown in step B3 of FIG. 39 (A). The median lifetime τ1 in the sample mapping measurement is shown in step B3 of FIG. 39 (B). The peak value of step B3 was very low as compared with step B2. If the peak value is very low, the influence of noise on the attenuation curve becomes large, so the lifetime τ1 could not be calculated. The * mark in FIG. 39 (B) indicates that the lifetime τ1 could not be calculated. It was found that a large number of carriers were generated in the oxide film semiconductor in the silicon oxide film formation by the PECVD method in step B3, and the peak value was significantly reduced.

Next, as step B4, silicon oxide nitride was formed into a 140 nm film. The silicon oxide nitride was formed into a film by using the PECVD method. As the film-forming gas, a gas mixed in a volume ratio of 1 for monosilane and 200 for nitrous oxide was used. The pressure at the time of film formation was adjusted to 133.3 Pa. The film forming power was set to 45 W using an RF power supply of 13.56 MHz. The gap between the electrodes was 20 mm. The substrate temperature was 325 ° C.

Next, μ-PCD measurement was performed. The in-plane distribution of peak values in the sample is shown in FIG. 36 (B). The μ-PCD measurement was carried out in the same manner as in step B1.

The median peak value in the sample mapping measurement is shown in step B4 of FIG. 39 (A). The median lifetime τ1 in the sample mapping measurement is shown in step B4 of FIG. 39 (B). No significant change was observed in the peak values of steps B3 and B4, and the peak values were very low. Therefore, it was found that a large number of carriers exist in the oxide semiconductor in step B4 as well.

Next, as step B5, aluminum oxide was formed into a 40 nm film. Aluminum oxide was formed by a sputtering method using a target having an atomic number ratio of Al: O = 2: 3. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 50% was used. The pressure at the time of film formation was adjusted to 0.4 Pa by the BA gauge. The film forming power was 2.5 kW using an RF power supply. The substrate temperature was 250 ° C.

Next, μ-PCD measurement was performed. The μ-PCD measurement showing the in-plane distribution of the peak value in the sample as shown in FIG. 37 (A) was performed by the same method as in step B1.

The median peak value in the sample mapping measurement is shown in step B5 of FIG. 39 (A). The median lifetime τ1 in the sample mapping measurement is shown in step B5 of FIG. 39 (B). No significant change was observed in the peak values of steps B4 and B5, and the peak values were very low. Therefore, it was found that a large number of carriers exist in the oxide semiconductor in step B5 as well.

Next, as step B6, heat treatment was performed at 350 ° C. for 1 hour in an oxygen atmosphere.

Next, μ-PCD measurement was performed. The in-plane distribution of peak values in the sample is shown in FIG. 37 (B). The μ-PCD measurement was carried out in the same manner as in step B1.

The median peak value in the sample mapping measurement is shown in step B6 of FIG. 39 (A). The median lifetime τ1 in the sample mapping measurement is shown in step B6 of FIG. 39 (B). It was confirmed that the peak value of step B6 was larger than that of step B5 and the carriers of the oxide semiconductor were reduced. The aluminum oxide used in step B5 contains excess oxygen and can release oxygen by heating. It is considered that the heat treatment in step B6 diffused the excess oxygen of aluminum oxide into the oxide and reduced the carriers of the oxide semiconductor. Since the band gap of silicon oxide is about 8.7 eV and that of aluminum oxide is about 8 eV, and the energy is larger than the excitation light (λ = 349 nm), it is difficult for carriers to be generated in silicon oxide and aluminum oxide. -It can be said that the effect of PCD measurement on the peak value is small.

Next, as step B7, silicon oxide nitride was formed into a film at 100 nm. The silicon oxide nitride was formed into a film by using the PECVD method. As the film-forming gas, a gas mixed in a volume ratio of 1 for monosilane and 200 for nitrous oxide was used. The pressure at the time of film formation was adjusted to 133.3 Pa. The film forming power was set to 45 W using an RF power supply of 13.56 MHz. The gap between the electrodes was 20 mm. The substrate temperature was 325 ° C.

Next, μ-PCD measurement was performed. The in-plane distribution of peak values in the sample is shown in FIG. 38. The μ-PCD measurement was carried out in the same manner as in step B1.

The median peak value in the sample mapping measurement is shown in step B7 of FIG. 39 (A). The median lifetime τ1 in the sample mapping measurement is shown in step B7 of FIG. 39 (B). Compared with step B6, in step B7, neither the peak value nor the lifetime τ1 is significantly changed. It was found that there was no significant change in the carrier density of the oxide semiconductor in step B7.

As shown in FIGS. 35 to 39, it was found that the influence of each step on the carrier density of the oxide semiconductor could be confirmed by μ-PCD measurement, and the carrier density of the oxide semiconductor could be estimated during the step. Further, it was found that the in-plane distribution of the carrier density of the oxide semiconductor can be confirmed in the middle of the process by the μ-PCD measurement. As a result, it was found that a transistor with good electrical characteristics can be efficiently manufactured.

In this example, an example in which μ-PCD measurement and light absorption rate are evaluated for a sample having an oxide semiconductor on a substrate is shown.

First, as a substrate, a quartz substrate having a thickness of 0.7 mm was prepared.

Next, an In-Ga-Zn oxide was formed as an oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 1: 1: 1. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.7 Pa by a miniature gauge MG-2 manufactured by Canon Anerva. The film forming power was 0.5 kW using a DC power supply. The substrate temperature was 300 ° C. The film thickness of the oxide semiconductors of the samples C1 to C15 was changed by changing the film formation time.

Next, the film thickness of the In-Ga-Zn oxide of Samples C1 to C15 was measured with a spectroscopic ellipsometer. As a spectroscopic ellipsometer, a fully automatic ultra-thin film measurement system UT-300 manufactured by HORIBA, Ltd. was used.

Next, the light absorption rate of the In-Ga-Zn oxide of Samples C1 to C15 was measured with a spectrophotometer. As the light absorption rate measurement, a spectrophotometer U-4100 type spectrophotometer manufactured by Hitachi High-Technologies Corporation was used.

Next, the samples C1 to C15 were measured by μ-PCD measurement. As the excitation light, a triple harmonic (YLF-3HG, wavelength 349 nm) of a laser using yttrium fluoride lithium to which neodymium was added as a laser medium was used. For the evaluation by μ-PCD measurement, a low-temperature polysilicon / SiC evaluation device LTA-1800SP manufactured by Kobelco Kaken Co., Ltd. was used.

Table 3 shows the results of film thickness measurement, light absorption rate measurement, and μ-PCD measurement in Samples C1 to C15.

FIG. 40 shows the relationship between the film thickness of the oxide semiconductor, the peak value measured by μ-PCD, and the light absorption rate measured by a spectrophotometer. In FIG. 40, the horizontal axis represents the film thickness [nm], the left vertical axis represents the peak value [mV], and the right vertical axis represents the light absorption rate [%]. As the film thickness increases, the peak value measured by μ-PCD increases. Further, as the film thickness becomes thicker, the light absorption rate at λ = 349 nm increases, which is in good agreement with the tendency of the peak value. It was found that as the film thickness increased, the absorption rate of the excitation light (λ = 349 nm) increased, and the generated carrier density increased, so that the peak value increased.

In addition, a sample was prepared according to the film thickness of the oxide semiconductor used for transistor fabrication, and the correlation between the carrier density by Hall effect measurement and the peak value and lifetime by μ-PCD measurement was obtained in advance. Keep it. Then, by performing the μ-PCD measurement in the middle of the actual transistor manufacturing process, the carrier density of the oxide semiconductor can be evaluated more accurately, and the quality of the electrical characteristics of the transistor can be judged.

In this example, an example in which μ-PCD measurement and band gap evaluation are performed on a sample having an oxide semiconductor on a substrate is shown.

First, as a substrate, a quartz substrate having a thickness of 0.7 mm was prepared.

Next, in the sample D1, 100 nm of In-Ga-Zn oxide was formed as an oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 1: 1: 1. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.7 Pa by a miniature gauge MG-2 manufactured by Canon Anerva. The film forming power was 0.5 kW using a DC power supply. The substrate temperature was 200 ° C.

Next, in sample D2, In-Ga-Zn oxide was formed into a 100 nm film as an oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 4: 2: 4.1. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.7 Pa by a miniature gauge MG-2 manufactured by Canon Anerva. The film forming power was 0.5 kW using a DC power supply. The substrate temperature was 200 ° C.

Next, in sample D3, In-Ga-Zn oxide was formed into a 100 nm film as an oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 3: 1: 2. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.7 Pa by a miniature gauge MG-2 manufactured by Canon Anerva. The film forming power was 0.5 kW using a DC power supply. The substrate temperature was 200 ° C.

Next, in the sample D4, In-Ga-Zn oxide was formed into a 100 nm film as an oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 5: 1: 6. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.4 Pa. The film forming power was set to 0.2 kW using a DC power supply. The substrate temperature was 300 ° C.

Next, in sample D5, In-Ga-Zn oxide was formed into a 100 nm film as an oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 5: 1: 7. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.4 Pa. The film forming power was set to 0.2 kW using a DC power supply. The substrate temperature was 300 ° C.

Next, in sample D6, In-Ga-Zn oxide was formed into a 100 nm film as an oxide semiconductor. The In-Ga-Zn oxide was formed by a sputtering method using an In-Ga-Zn oxide target having an atomic number ratio of In: Ga: Zn = 5: 1: 8. As the film-forming gas, a gas in which argon and oxygen were mixed so that the volume of oxygen was 33% was used. The pressure at the time of film formation was adjusted to 0.4 Pa. The film forming power was set to 0.2 kW using a DC power supply. The substrate temperature was 300 ° C.

Next, the samples D1 to D6 were heat-treated at 450 ° C. for 1 hour in a nitrogen atmosphere. Next, heat treatment was performed at 450 ° C. for 1 hour in an oxygen atmosphere.

Next, the energy difference between the lower end Ec of the conduction band and the upper end Ev of the valence band of Samples D1 to D6, that is, the band gap (Eg) was measured. As a spectroscopic ellipsometer, a fully automatic ultra-thin film measurement system UT-300 manufactured by HORIBA, Ltd. was used.

Next, μ-PCD measurement of Samples D1 to D6 was performed. As the excitation light, a triple harmonic (YLF-3HG, wavelength 349 nm) of a laser using yttrium fluoride lithium to which neodymium was added as a laser medium was used. For the evaluation by μ-PCD measurement, a low-temperature polysilicon / SiC evaluation device LTA-1800SP manufactured by Kobelco Kaken Co., Ltd. was used.

Table 4 shows the results of bandgap measurement and μ-PCD measurement in Samples D1 to D6.

FIG. 41 shows the relationship between the band gap of the oxide semiconductor and the peak value measured by μ-PCD. In FIG. 41, the horizontal axis represents the band gap [eV] and the vertical axis represents the peak value [mV]. As the bandgap becomes smaller, the peak value measured by μ-PCD increases. It was found that the smaller the bandgap, the higher the carrier density generated by the excitation light (λ = 349 nm), and the higher the peak value.

In addition, prepare a sample according to the composition and film thickness of the oxide semiconductor used for transistor fabrication, and determine the correlation between the carrier density by Hall effect measurement and the peak value and lifetime by μ-PCD measurement in advance. Get it. Then, by performing the μ-PCD measurement in the middle of the actual transistor manufacturing process, the carrier density of the oxide semiconductor can be evaluated more accurately, and the quality of the electrical characteristics of the transistor can be judged.

100 Capacitive element 110 Insulator 112 Insulator 116 Insulator 130 Insulator 132 Insulator 134 Insulator 150 Insulator 200 Insulator 205 Insulator 205a Insulator 205b Insulator 210 Insulator 212 Insulator 214 Insulator 216 Insulator 218 Insulator 220 Insulator 222 Insulator 224 Insulator 230 Oxide Semiconductor 230a Oxide Semiconductor 230A Oxide Semiconductor 230b Oxide Semiconductor 230B Oxide Semiconductor 230c Oxide Semiconductor 230C Oxide Semiconductor 240 Conductor 240a Conductor 240A Conductive 240b Conductor 240B Conductive 245 Layer 245a Layer 245A Film 245b Layer 245B Film 247a Conductor 247A Conductive 247b Conductor 247B Conductive 250 Insulator 250A Insulator Film 260 Conductor 260a Conductor 260A Conductive 260b Conductor 260B Conductive 260c Conductive 260C Conductive Film 270 Layer 270A Film 272 Insulator 274 Insulator 280 Insulator 282 Insulator 284 Insulator 285 Conductor 287 Conductor 290 Resist Mask 300 Transistor 310 Substrate 311 Substrate 312 Semiconductor Region 314 Insulator 316 Conductor 318a Low Resistance Region 318b Low Resistance region 320 Insulator 322 Insulator 324 Insulator 326 Insulator 328 Insulator 330 Insulator 350 Insulator 352 Insulator 354 Insulator 356 Insulator 358 Insulator 400 Transistor 403 Insulator 403a Conductor 403b Conductor 405 Conductor 405a Conductor 405b Conductor 407 Conductor 407a Conductor 407b Conductor 430 Oxide semiconductor 430c Oxide semiconductor 450 Insulator 460 Conductor 460a Conductor 460b Conductor 460c Conductor 470 Layer 480 Opening 711 Board 712 Circuit area 713 Separation area 714 Separation line 715 Chip 750 Electronic component 752 Print board 754 Mounting board 755 Lead 1000 Semiconductor device 1301 Pulse laser oscillator 1302 Microwave oscillator 1303 Directional coupler 1304 Magic T
1305 Waveguide 1305a Waveguide 1305b Waveguide 1306 Mixer 1307 Signal processing device 1310 Spacer 1311 Sample stage 1313 Mirror 1314 Lens 1315 Phaser 1320 Sample 1320a Oxide semiconductor 1320b Substrate 2900 Portable game machine 2901 Housing 2902 Housing 2903 Display 2904 Display 2905 Microphone 2906 Speaker 2907 Operation switch 2908 Stylus 2910 Information terminal 2911 Housing 2912 Display 2913 Camera 2914 Speaker 2915 Operation switch 2916 External connection 2917 Microphone 2920 Notebook type personal computer 2921 Housing 2922 Display 2923 Keyboard 2924 Pointing device 2940 Video camera 2941 Housing 2942 Housing 294 Display 2944 Operation switch 2945 Lens 2946 Connection 2950 Information terminal 2951 Housing 2952 Display 2960 Information terminal 2961 Housing 2962 Display 2963 Band 2964 Buckle 2965 Operation switch 2966 On Output terminal 2967 Icon 2980 Automobile 298 Car body 2982 Wheel 2983 Dashboard 2984 Light 3001 Wiring 3002 Wiring 3003 Wiring 3004 Wiring 3005 Wiring 3006 Wiring 3007 Wiring 3008 Wiring 3009 Wiring 3010 Wiring S721 Step S722 Step S723 Step S724 Step S725 Step S726 Step S727 Step S729 Step

Claims (6)

It has a substrate and an oxide semiconductor formed on the substrate.
Using the microwave photoconductive attenuation method of irradiating the oxide semiconductor with microwaves and excitation light, the intensity of the microwave reflected by the oxide semiconductor is measured , and the lifetime of the oxide semiconductor is calculated.
The carrier density of the oxide semiconductor is evaluated from the peak value of the intensity of the reflected microwave and the lifetime.
As the carrier density increases, the peak value of the intensity of the reflected microwave increases,
A method for evaluating an oxide semiconductor, wherein when the carrier density ^{becomes higher than around 1.0 × 10 18} cm ^-3 , the peak value of the intensity of the reflected microwave decreases. In claim 1,
A method for evaluating an oxide semiconductor, wherein the carrier density is evaluated from the correlation between the peak value of the reflection intensity of the microwave photoconductive attenuation method and the carrier density of the oxide semiconductor obtained by measuring the Hall effect. In claim 1 or 2,
A method for evaluating an oxide semiconductor in which the energy of the excitation light is larger than the band gap of the oxide semiconductor and smaller than the band gap of the substrate. In claims 1 to 3,
It has a first insulator formed on the oxide semiconductor, and has
A method for evaluating an oxide semiconductor in which the energy of the excitation light of the microwave photoconductive attenuation method is smaller than the band gap of the first insulator. In claim 3 or 4,
It has a second insulator formed between the substrate and the oxide semiconductor, and has.
A method for evaluating an oxide semiconductor in which the energy of the excitation light of the microwave photoconductive attenuation method is smaller than the band gap of the second insulator. In claim 4 or 5,
A method for evaluating an oxide semiconductor in which the first insulator or the second insulator has a laminated structure.

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