JP6915452B2 - Optical logic elements and optical logic circuits - Google Patents

Description

The present invention relates to an optical logic device, and more particularly to a linear optical logic device whose main purpose is to be used on-chip.

Optical logic elements are one of the important devices for realizing high-speed optical calculation without RC delay, and have been studied by many institutions for a long time. Most of them utilize nonlinear optical effects (see Non-Patent Document 1). In an optical logic element that utilizes a nonlinear optical effect, the nonlinear optical effect is essential for ensuring the binary contrast of the output bit signal (the ratio of the absolute intensity at "0" output to the absolute intensity at "1" output). However, there are the following problems in using the nonlinear optical effect.

(1) A large input intensity (or intensity density) of the signal is required.
(2) The insertion loss is large.
(3) Performance changes depending on the input strength.
(4) The structure is complicated and it is not easy to manufacture.

Although the problem (1) above can be compensated to some extent by the device structure, it is difficult to fundamentally solve any of the problems. Therefore, even in the present situation, the application of the nonlinear optical logic element is remarkably limited from the viewpoint of cascading property (the number of optical logic elements that can be connected and used in cascade) and power consumption. Even if the constraints of cascade and power consumption are satisfied, it is difficult to obtain binary contrast exceeding 10 dB and low insertion loss at the same time.

On the other hand, in order to avoid the problem of the optical logic element utilizing the above-mentioned nonlinear optical effect, a linear optical logic element based on linear optics has also been proposed. The advantage of linear optics is that the performance does not depend on the input intensity and it can operate even at a low input intensity (at the level of several photons at the extreme), so the power consumption can be overwhelmingly reduced. However, at present, the linear optical logic element has the following problems and has not been put into practical use.

(5) Binary contrast is limited in principle.
(6) A certain insertion loss occurs.

Specific examples of the linear optical logic element include a total optical logic element using a free space optical system in which a beam splitter, an attenuator, a wave plate, a polarizer, and the like are combined. In such an optical logic element, it is said that all logical operations can be performed by treating the linearly polarized phase ± 45 ° as bits of the (0, 1) signal, but a plurality of logical operations can be performed in one logical operation. Individual optical components are required, the structure is complicated, and the overall length is long. Further, since the half mirrors are inserted in two stages, the insertion loss is 6 dB or more (absolute strength at one output is 0.25 or less).

In addition, as an on-chip type element, an optical logic element using a plasmonic waveguide has been reported, and it has been experimentally demonstrated that the total length is about several μm and the binary contrast is about 9 dB in AND operation (). Non-Patent Document 2). However, since the propagation loss of the metal waveguide is very large, it is considered that the insertion loss is at least about 10 dB, and it is not suitable for the configuration of an optical circuit premised on the determination of the calculation result based on a constant optical output intensity.

P.Singh et al., “All-Optical Logic Gates: Designs, Classification, and Comparison”, Advances in Optical Technologies, Volume 2014, Article ID 275083, 2014 M. Ota et al., “Plasmonic-multimode-interference-based logic circuit with simple phase adjustment”, Sci. Rep. 6, 24546, 2016

As described above, among the conventional optical logic elements, those using the nonlinear optical effect have the above-mentioned problems (1)-(4) such as a large insertion loss. In addition to the above (5) and (6), the linear optical logic element using the spatial optical system also has problems such as an increase in size of the device and an increase in loss. As a result, the current situation is that practical optical logic devices have not yet been proposed.

Therefore, an object of the present invention is to provide a small-sized and low-loss optical logic element and an optical logic circuit.

In order to achieve the above object, the optical logic element according to the present invention is formed on a substrate made of a first dielectric material and one surface of the substrate, and has higher refraction than the first dielectric material. From the first optical waveguide and the second optical waveguide for signal light input, which are made of a second dielectric material having a ratio, and the second optical waveguide formed on the one surface of the substrate. A third optical waveguide for signal light output and a fourth optical waveguide for bias light input, which is formed on the one surface of the substrate and is made of the second dielectric material. The first optical waveguide, the second optical waveguide, and the third optical waveguide form a Y-branched optical waveguide in which one ends are connected to each other, and the fourth optical waveguide is the first optical waveguide. The first optical waveguide is arranged between the optical waveguide and the second optical waveguide, and one end of the fourth optical waveguide closer to the Y-branch optical waveguide is formed in a tapered shape in a plan view. It is characterized by coupling with a waveguide and the second optical waveguide.

In the above optical logic element, the first optical waveguide and the second optical waveguide are arranged symmetrically with respect to an extension line of the third optical waveguide, and the fourth optical waveguide is the first optical waveguide. It may be configured so that it is arranged on the extension line of the optical waveguide of 3.

In the above optical logic element, the phase of the signal light is changed so that the phases of the signal lights input to the first optical waveguide and the second optical waveguide are in phase with each other in the Y-branched optical waveguide. The phase of the bias light input to the first phase shifter and the fourth optical waveguide is a signal input to the first optical waveguide and the second optical waveguide in the Y-branched optical waveguide, respectively. A second phase shifter that changes the phase of the biased light so as to be in phase opposite to the phase of the light may be further provided.

The optical logic element according to the present invention is a substrate made of a first dielectric material and a second dielectric material formed on one surface of the substrate and having a higher refractive index than the first dielectric material. A first optical waveguide and a second optical waveguide for signal light input, and a third optical waveguide for signal light output, which is formed on the one surface of the substrate and is made of the second dielectric material. The optical waveguide is provided with a fourth optical waveguide formed on the one surface of the substrate and made of the second dielectric material for bias light input , and one end of the third optical waveguide is provided. , The fourth optical waveguide is arranged between the first optical waveguide and the second optical waveguide, and is connected to one end of the fourth optical waveguide, the first optical waveguide and the first optical waveguide. Each of the optical waveguides 2 is characterized by having a coupling portion that is coupled to the fourth optical waveguide.

In the above optical logic element, the phase of the signal light is changed so that the phases of the signal lights input to the first optical waveguide and the second optical waveguide are in phase with each other at the coupling portion. The phase of the bias light input to the phase shifter 1 and the fourth optical waveguide is opposite to the phase of the signal light input to the first optical waveguide and the second optical waveguide, respectively. A second phase shifter that changes the phase of the biased light so as to be coupled to the first optical waveguide and the second optical waveguide may be further provided.

Further, the optical logic circuit of the present invention includes the optical logic element, and the optical logic element receives light of an amplitude bit in which a value of 0 or 1 is assigned to different amplitudes as the signal light and the bias. It is characterized in that light is used as an input and the output light of the third optical waveguide is used as a calculation result.
Further, one configuration example of the optical logic circuit of the present invention further includes an intensity modulator that generates the signal light by intensity-modulating the continuous light for signal light generation according to the corresponding bit of the input digital electric signal. It is characterized by.

Further, the optical logic circuit of the present invention includes the optical logic element, and the optical logic element receives light of phase bits in which values of 0 and 1 are assigned to different phases as the signal light and the bias. It is characterized in that light is used as an input and the output light of the third optical waveguide is used as a calculation result .

Further, one configuration example of the optical logic circuit of the present invention is a third phase shifter that generates the signal light by phase-modulating continuous light for generating signal light according to the corresponding bits of the input digital electric signal. It is characterized by further preparation.
Further, one configuration example of the optical logic circuit of the present invention is characterized by further including a light source whose intensity of the bias light can be adjusted.

In the present invention, the two signal lights input to the first optical waveguide and the second optical waveguide and the bias light input to the fourth optical waveguide interfere with each other and output from the third optical waveguide. Will be done. At this time, the optical calculation can be realized by appropriately adjusting the phases and intensities of the two signal lights and the bias light. Further, since the first to fourth optical waveguides are formed on the same surface of the substrate, the element can be miniaturized. Therefore, according to the present invention, it is possible to realize an optical logic element and an optical logic circuit that are smaller and have lower loss than conventional elements.

FIG. 1A is a perspective view showing a configuration of an optical logic element according to a first embodiment of the present invention. FIG. 1B is a plan view showing the configuration of the optical logic element according to the first embodiment. FIG. 1C is a diagram illustrating a usage mode of the optical logic element according to the first embodiment. FIG. 2 is a diagram showing an example (AND operation) of the electromagnetic field simulation result of the optical logic element according to the first embodiment. FIG. 3 is a diagram showing the wavelength dependence of various performances of the optical logic device according to the first embodiment. FIG. 4 is a diagram showing another example (XNOR operation) of the electromagnetic field simulation result of the optical logic element according to the first embodiment. FIG. 5 is a diagram showing another example (NOR operation) of the electromagnetic field simulation result of the optical logic element according to the first embodiment. FIG. 6A is a perspective view showing a configuration of an optical logic element according to a second embodiment of the present invention. FIG. 6B is a plan view showing the configuration of the optical logic element according to the second embodiment. FIG. 7A is a perspective view showing a configuration of an optical logic element according to a third embodiment of the present invention. FIG. 7B is a plan view showing the configuration of the optical logic element according to the third embodiment. FIG. 8 is a diagram showing a concept of performing a logical operation of a phase bit using the optical logic element according to the first to third embodiments. FIG. 9 is a diagram showing a configuration of an optical logic circuit according to a fourth embodiment of the present invention. FIG. 10 is a diagram showing a configuration of an optical logic circuit that performs a logical operation of an amplitude bit. FIG. 11 is a diagram showing a concept of performing a logical operation of a phase bit using another optical logic element. FIG. 12 is a diagram showing a configuration of an optical logic circuit according to a fifth embodiment of the present invention.

Hereinafter, examples of the present invention will be described with reference to the drawings.

[First Example]
As shown in FIG. 1A, the optical logic element 1 according to the first embodiment of the present invention is formed on a substrate 10 made of a first dielectric material and one surface 10a of the substrate 10, and the first It is provided with a first optical waveguide 11, a second optical waveguide 12, a third optical waveguide 13, and a fourth optical waveguide 14 made of a second dielectric material having a higher refractive index than the dielectric material of the above.

Here, examples of the first dielectric constituting the substrate 10 include silica (SiO ₂ ) such as quartz.
The second dielectric constituting the first to fourth optical waveguides 11, 12, 13, and 14, is, for example, silicon (Si). The refractive index of silica is 1.444 at a wavelength of light of 1550 nm, whereas the refractive index of silicon (Si) is 3.476. Therefore, when the first to fourth optical waveguides 11, 12, 13, and 14 are made of silicon, the substrate and air act as a clad in the first to fourth optical waveguides 11, 12, 13, and 14. Light is trapped in.
Further, the optical logic element 1 is configured on the planar optical waveguide by forming the first to fourth optical waveguides 11, 12, 13, and 14 on one surface 10a of the substrate 10.

As shown in FIGS. 1A to 1C, in the optical logic element 1 according to the present embodiment, one end of each of the first optical waveguide 11, the second optical waveguide 12, and the third optical waveguide 13 is connected to each other. This constitutes a Y-branched optical waveguide. The first optical waveguide 11 and the second optical waveguide 12 are optical waveguides for signal light input, respectively, and act as a set of signal light input ports. Further, the third optical waveguide 13 is an optical waveguide for signal light output and acts as an optical output port.
Hereinafter, in the present specification, the first optical waveguide 11 and the second optical waveguide 12 may be referred to as a “signal optical input port”, and the third optical waveguide 13 may be referred to as an “optical output port”.
In this embodiment, the first optical waveguide 11 and the second optical waveguide 12 serving as the signal light input port are arranged symmetrically with respect to the extension line of the third optical waveguide 13 serving as the optical output port. ..

On the other hand, the fourth optical waveguide 14 is an optical waveguide for bias light input and acts as a bias light input port. Hereinafter, in the present specification, the fourth optical waveguide 14 may be referred to as a “bias optical input port”.
The fourth optical waveguide 14 serving as the bias optical input port is arranged between the first optical waveguide 11 and the second optical waveguide 12. More specifically, the fourth optical waveguide 14 is arranged on an extension of the third optical waveguide 13.

One end of the fourth optical waveguide 14 closer to the Y-branch optical waveguide 14 is formed in a tapered shape in a plan view. One end of the fourth optical waveguide 14 formed in a tapered shape is called a "tapered portion 14a". The tapered portion 14a is arranged close to the first optical waveguide 11 and the second optical waveguide 12 of the Y-branched optical waveguide with a gap. As a result, the first optical waveguide 11, the second optical waveguide 12, and the fourth optical waveguide 14 are optically coupled to each other.

In such an optical logic element, the input signal lights A and B that have propagated through the first optical waveguide 11 and the second optical waveguide 12, which are signal light input ports, propagate through the fourth optical waveguide 14. The output light is output from the third optical waveguide 13 that serves as an optical output port by interfering with the bias light.

<Structural parameters of optical logic elements>
Structure of an optical logic element according to the present embodiment, for example, as shown in Figure 1B, the width (waveguide width) of each waveguide W, the waveguide height h _H, the fourth optical for bias light input Length of tapered portion 14a of waveguide 14 (tapered length) L _taper , gap width between Y-branched optical waveguide and tapered portion (gap width between tapered waveguides) g, first optical waveguide 11 and second optical waveguide It is represented by the angle (Y branch angle) α formed by 12.

As the range of each of the above structural parameters, W = 0.1 to 2.0 μm, h _H = 0.1 to 2.0 μm, L _taper = 0.1 to 20 μm, g = 0 to 1.0 μm, α = 5 It is assumed to be ~ 60 °. The value of the structural parameter may be appropriately selected according to the material constituting the optical waveguide. For example, there may be a combination of parameters such that the tapered portion 14a of the fourth optical waveguide 14 and the first optical waveguide 11 and the second optical waveguide 12 constituting the Y-branched optical waveguide 14 contact (overlap) with each other. ..

<Manufacturing method of optical logic element>
The above-mentioned optical logic element can be manufactured by the following steps. That is, a substrate made of silica or the like is prepared, and a layer of silicon (Si) is grown on the surface at that position. A method such as CVD may be used for the growth of the silicon layer.
Next, the photosensitive material coated on the surface of the silicon layer is patterned into a predetermined pattern as shown in FIG. 1B by a photolithography technique, and then the silicon layer is etched to obtain an optical waveguide as shown in FIG. 1A. Can be obtained.

<Phase relationship between input light and bias light and its adjustment method and reference>
When the above-mentioned device is used as an optical logic element for a logical operation, the phases of a set of input signal lights A and B are in phase with each other. That is, the phases of the set of input signal lights A and B input to the two optical input ports are adjusted so as to enhance the output light from the optical output ports.
Further, the phase of the bias light is opposite to that of the signal light. That is, the phases of the bias light are adjusted with respect to the input signal lights A and B input to each signal light input port so as to weaken the output light from the light output port. Regarding the bias light, it is further desirable that the optical power of the bias light is constant and larger than the optical power of the input signal lights A and B. At this time, it is desirable that the optical power of the bias light has at least twice the intensity of the optical power of the signal light.

If the optical lengths of the first optical waveguide 11 and the second optical waveguide 12 are equal, the input signal lights A and B input to the two signal light input ports are the output lights output from the light output ports. The phases of the bias light are adjusted so that C strengthens each other, and the phases of the bias light are adjusted so that the output light C from the optical output port weakens with respect to the input signal lights A and B.
If the length of the first optical waveguide 11 and the length of the second optical waveguide 12 are equal to each other, the set of signal lights is the connection point between the first optical waveguide 11 and the second optical waveguide 12, that is, Y. Branched Optical Waveguides are in phase at the branch point.

To make the input signal light A and the input signal light B in phase with each other, for example, as shown in FIG. 1C, a pair of input signal lights A and B are provided by an off-chip or on-chip phase shifter 15, respectively. The relative phases of the input signal light A and the input signal light B may be adjusted so that the output light C is maximized while being input to the signal light input port.
Further, in order to reverse the phase of the bias light and the signal light, the phase shifter 16 adjusts the phase of the bias light so that the output light C is minimized while the bias light and the input signal light A are input. do it.

<Performance index and effect of bias light>
The performance index of the optical AND element is when the input (A, B) = (0,0), (0,1), (1,0) with respect to the output when the input (A, B) = (1,1). _{The minimum value BC min} in the binary contrast of each output and the absolute optical output intensity at input (A, B) = (1,1), that is, the insertion loss Loss (insertion loss if the output is 1). If Loss = 0 dB and is greater than 1, it is defined as Loss <0 dB, that is, gain).

When there is no bias light, the minimum value of binary contrast is BC _min = 6 dB, whereas when there is bias light, it can be improved to _{BC min = 9.54 dB.} Here, BC _min = 9.54 dB can be achieved by satisfying the following conditions:
(1) The signal light input port (that is, the first optical waveguide 11 and the second optical waveguide 12) of signal light such as a Y branch is left and right with respect to the direction of the optical output port (third optical waveguide 13). Being introduced symmetrically;
(2) There is a bias optical input port;
(3) Bias light intensity P _bias can be adjusted.

In the evaluation of the optical AND element, the insertion loss Loss is evaluated from the output of the (1,1) input when the _{minimum value BC min = 9.54 dB in the binary contrast is set.}
For better AND operation, as shown in FIG. 1B and the like, the first optical waveguide 11 and the second optical waveguide 12 (signal light input port) are connected to the third optical waveguide 13 (optical output port). On the other hand, it is desirable that the Y-branch is symmetrical. At this time, two signal light input port input signal light A input from each transmission T _A to the optical output port of the B, T _B are equal to each other. On the other hand, the transmittance T _bias input bias light to the bias optical port, because of the gap, is lower compared with the T _A and T _B.

<Example of operation as an optical logic element (Part 1: AND operation)>
FIG. 2 shows an example of the electromagnetic field simulation result by the three-dimensional finite element method of the linear optical logic element optimized for the optical communication wavelength.
First, the calculation model is shown in FIGS. 2 (a1) and 2 (a2). The optical waveguide is _{assumed to be a Si thin wire on a SiO 2} substrate with an air clad, and each structural parameter has a waveguide width W = 0.48 _{μm, a waveguide height h H} = 0.22 μm, and a taper length L. _{The taper} = 0.95 μm, the gap width between tapered waveguides g = 50 nm, and the Y branch angle α = 15 °. Optical signal intensity inputted to the two signal light input port are equal to each other _{(P A = P B = 1} ), and the operating wavelength lambda = 1.54 .mu.m.

The light intensity distribution of the cross section horizontal to the center of the Si thin line for each input light is shown in FIGS. 2 (b) to 2 (e), respectively. In FIG. 2, (b) is when the input (A, B) = (0,0), (c) is when the input (A, B) = (0,1), and (d) is the input (A, B). ) = (1,0), (e) represents the simulation result when the input (A, B) = (1,1). Shown in FIG. 2 (b) to (d) are relative to the optical signal intensity of the output light is P _C = 0.117, shown in FIG. 2 (e) is P _C = 1.054, and the in the linear optical base Nevertheless, it can be seen that the AND operation can be clearly approximated.

Here, by setting the bias light intensity _{P bias = 7.05 (~T A /} 4T bias), the minimum value BC _min ~9.54dB binary contrast, insertion loss Loss~-0.23dB (minus losses Therefore, it corresponds to the gain).

In order to verify the possibility of wideband operation, the wavelength dependence of each performance at a wavelength of λ = 1.4 to 1.7 μm was determined for the same element as the calculation model shown in FIGS. 2 (a1) and (a2). Calculated. The result is shown in FIG.

First, the transmittance of the optical output port T _A (T _B) and FIG wavelength dependency of the bias light transmittance T _bias 3 of the input signal light A as a basis for performance at each wavelength (B) (a) Shown in. To achieve lossless AND element while maintaining the minimum value BC _min = 9.54dB binary contrast, the transmittance _{T A (T B) ≧ 4} /9 (= 0.444 ...) but is required, It can be seen that this condition is satisfied in almost the entire wavelength range assumed in this calculation and the characteristics are flat.

When allowed to adjust the bias light intensity P _bias according to the wavelength dependence of the transmittance T _A (T _B) and T _bias as shown in FIG. 3 (b), as shown in FIG. 3 (c), the binary The minimum contrast value BC _min = 9.54 dB can be maintained at any operating wavelength. The wavelength dependence of the insertion loss Loss is as shown in FIG. 3 (d), and there is no loss at a wavelength of λ = 1.5 to 1.6 μm, but rather a gain of 0.2 dB or more can be obtained. In order to enable efficient operation in the entire wavelength range, from FIG. 3 (b), the can bias light intensity P _bias is sufficient if about twice the intensity of the input signal light intensity P _A (P _B) Understand.

<Example of operation as an optical logic element (Part 2: XNOR operation)>
By changing the intensity of the bias light while keeping the structure of the optical logic element as it is, different logic operations can be performed. _{The electromagnetic field simulation results when the bias light intensity P bias} is 4 times and 9 times, respectively, with the same element structure as the calculation model shown in FIGS. 2 (a1) and 2 (a2) are shown in FIGS. 4 and 5, respectively. ..

In FIG. 4, (a) is when the input (A, B) = (0,0), (b) is when the input (A, B) = (0,1), and (c) is the input (A, B). ) = (1,0), (d) represents the simulation result when the input (A, B) = (1,1). According to this, it can be seen that the operation of XNOR is realized.

Further, also in FIG. 5, (a) is when the input (A, B) = (0,0), (b) is when the input (A, B) = (0,1), and (c) is the input (c). When A, B) = (1,0), (d) represents the simulation result when the input (A, B) = (1,1), and according to this, the NOR operation is realized. You can see that. _{The minimum value BC min} and insertion loss Loss in the binary contrast when XNOR is operated _{are BC min} > 17 dB and Loss = 3.46 dB, and when NOR is operated, BC _min > 9.5 dB and Loss to 0 dB. be.

By multiplying the bias light intensity P _bias by a constant in this way, the logical operation function of one optical logic element can be changed to AND (FIG. 2), XNOR (FIG. 4), and NOR (FIG. 5).

As described above, in order to avoid problems in nonlinear optics, the optical logic element according to the present embodiment can constantly realize binary contrast BC9.54 dB even at different operating wavelengths by utilizing a linear optical element. can. That is, by adjusting the bias light intensity, the minimum value BC _min = 9.54 dB of the binary contrast can be realized in a wavelength band wider than the optical communication wavelength band. Lossless operation is possible while maintaining the _{above BC min} over the entire optical communication wavelength band.

In addition, since it operates based only on linear optics, it does not require a large input intensity and its performance is independent of the input intensity, so that it can be expected to save a large amount of power even at the photon level.
Furthermore, the decrease in signal strength due to optical logic operation, that is, the insertion loss is suppressed to the minimum, and in some cases, the gain is about 0.2 to 0.3 dB while maintaining the binary contrast BC, and is 1 or more. Output strength comes out. That is, since the input signal light can be amplified, the compensation processing by the non-linear optics in the subsequent stage, which is necessary for signal discrimination, can be minimized. In addition, further improvement in performance can be expected by combining linear optical logical operations with amplification and slight nonlinear optical effects.

Further, in the same element, the logical operation function can be changed by adjusting the optical adjustment, specifically, the intensity of the bias light. As a result, the circuit configuration can be changed flexibly and at high speed by the adjustment mechanism introduced in advance in the circuit even after the optical circuit is manufactured.

Further, according to the optical logic element 1 according to the present embodiment, the element length in the region where optical interference actually occurs is about 2 μm, so that the pass time of the optical signal is extremely short, about 0.02 ps. Since this is at least one-hundredth shorter than that of a conventional optical switch, the pass time of the entire optical path element circuit can be significantly shortened, which can contribute to the realization of extremely low-delay optical calculation. ..

Further, as shown in FIG. 3, since wideband operation is possible, wavelength division multiplexing calculation by a single element is possible. Further, since it can be composed of only a dielectric material, it is possible to suppress additional loss and facilitate production. In addition, the element can be turned on-chip and further shortened. These are important for optical arithmetic applications with low arithmetic delay.

Further, a SiCMOS foundry, which is composed of only a dielectric material and is easy to manufacture and can be integrated with a phase shifter and an intensity modulator in a batch in the optical communication wavelength band, can be used.

In addition, on-chip integration is possible, and a plurality of elements can be connected by a sufficiently short optical waveguide. As a result, various functionality can be created while maintaining the above-mentioned low calculation delay.

[Second Example]
Next, a second embodiment of the present invention will be described with reference to FIGS. 6A and 6B.
In this embodiment, the same components as those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 6A, the optical logic element 2 according to the second embodiment is formed on a substrate 10 made of a first dielectric material such as _{silica (SiO 2) and one surface 10a of the substrate 10.} A first optical waveguide 21, a second optical waveguide 22, a third optical waveguide 23, and a second optical waveguide made of a second dielectric material having a higher refractive index than the first dielectric material such as silicon (Si). The optical waveguide 24 of 4 is provided. Here, the first optical waveguide 21 and the second optical waveguide 22 act as a signal light input port, the third optical waveguide 23 acts as an optical output port, and the fourth optical waveguide 24 is a bias light input port. Acts as.

As shown in FIGS. 6A and 6B, in the optical logic element 2 according to the present embodiment, a bias optical input is provided between the first optical waveguide 21 and the second optical waveguide 22 that act as a signal optical input port. A fourth optical waveguide 24 that acts as a port is arranged. Further, in this embodiment, the first optical waveguide 21 and the second optical waveguide 22 are arranged so as to be symmetrical with respect to the fourth optical waveguide 24 in a plan view.
Further, the fourth optical waveguide 24 and the third optical waveguide 23 that acts as an optical output port are connected to each other at one end thereof.

The first optical waveguide 21 and the second optical waveguide 22 which are signal light input ports have coupling portions 21a and 22a which are coupled to the fourth optical waveguide 24 which is a bias light input port, respectively. That is, the coupling portions 21a and 22a are _{arranged in parallel with the fourth optical waveguide 23 with a distance g DC} , respectively, and have a length L in the vicinity of the tip portions of the first optical waveguide 21 and the second optical waveguide 22. It is the part for _DC. In this way, the first optical waveguide 21 and the second optical waveguide 22 are provided with the coupling portions 21a and 22a, respectively, so that the first optical waveguide 21, the second optical waveguide 22, and the fourth optical waveguide 24 Are separated from each other to the extent that they can be coupled to each other to form a directional coupler.

In the optical logic element 2 according to the present embodiment, the transmittance T _A of the signal light input to the input port optical output port input signal light A output from the _(B) (T B), the transmittance of the bias light When T _bias, a relationship that T _bias = 2T _a -1.
Like the first embodiment, by setting the bias light intensity P _bias ~T _A / 4T _bias, a minimum value BC _min = 9.54dB binary contrast.
_{The length L DC} of the coupling portions 21a and 22a is preferably about 90% of the 3dB bond length.

[Third Example]
Next, a third embodiment of the present invention will be described with reference to FIGS. 7A and 7B.
In this embodiment as well, the components common to those in the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted.

As shown in FIG. 7A, the optical logic element 3 according to the third embodiment is formed on a substrate 10 made of a first dielectric material such as _{silica (SiO 2) and one surface 10a of the substrate 10.} A first optical waveguide 31, a second optical waveguide 32, a third optical waveguide 33, and a second optical waveguide made of a second dielectric material having a higher refractive index than the first dielectric material such as silicon (Si). The optical waveguide 34 of 4 is provided. Here, the first optical waveguide 31 and the second optical waveguide 32 act as a set of signal light input ports, and the third optical waveguide 33 acts as an optical output port. Further, the fourth optical waveguide 34 acts as a bias optical input port.

In the optical logic element 3 according to the present embodiment, the first optical waveguide 31 and the second optical waveguide 32 acting as a signal light input port and the third optical waveguide 33 acting as an optical output port are the first. Similar to the optical logic element 1 according to the embodiment of the above, one end of each is connected to each other to form a Y-branched optical waveguide. The angle (Y branch angle) formed by the first optical waveguide 31 and the second optical waveguide 32 is represented by β.

As shown in FIGS. 7A and 7B, in the optical logic element 3 according to the present embodiment, the fourth optical waveguide 34, which is a bias optical input port, is coupled to the third optical waveguide 33 constituting the Y-branch optical waveguide. It has a coupling portion 34a to be formed. _{That is, the coupling portion 34a is a portion having a length of L DC in the} vicinity of the tip portion of the fourth optical waveguide 34, which is arranged in parallel with the third optical wave guide 33 at a distance of g _DC . By providing the coupling portion 34a in the fourth optical waveguide 34 in this way, the third optical waveguide 33 and the fourth optical waveguide 34 are separated from each other to such an extent that they can be coupled to each other to form a directional coupler. is doing.

In this embodiment, the signal light is interfered with by the Y branch and then interfered with the bias light by the directional coupler. That is, the interference of three waves is divided into two times. Assuming that the transmittance from the bias optical side of the directional coupler to the optical output port is T _DC , the transmittance from the Y branch side is (1-T _DC ). When the transmittance of the Y branches of the input signal light A (B) and T _A (T _B), bias light intensity P _bias is that the _{P bias ~T A T DC / 4} (1-T DC), binary The minimum contrast value BC _min = 9.54 dB.

Although the optical logic element 3 according to the present embodiment has a slightly longer configuration than the configuration of the optical logic element 1 according to the first embodiment, a set of input signal lights A and B merge. and interfering signal light converging section together Te, since the bias light that interferes with the merging unit coupled to the bias light input port is separated, is excellent in controllability of T _a (T _B) and T _DC, The transmittance can be easily optimized.

[Fourth Example]
In the first to third embodiments, the light of the amplitude bits to which the values of "0" and "1" are assigned to different amplitudes are used as the input signal lights A and B, but in this embodiment, "0" is used in different phases. Let the light of the phase bits to which the values of "and" 1 "are assigned be the signal lights A and B. FIG. 8 shows a concept of performing a logical operation of a phase bit using the optical logic elements 1 to 3 described in the first to third embodiments. Although FIG. 8 describes the case where the optical logic element 1 is used, the optical logic elements 2 and 3 may be used instead of the optical logic element 1.

The signal lights A and B have in-phase (0) or anti-phase (π) phases with respect to the bias light. When performing the logical operation of the phase bit as in this embodiment, the signal lights A and B and the bias light all have the same intensity. Moreover, the phase of the bias light is fixed.

The signal light A input to the optical waveguide 11 (signal light input port) of the optical logic element 1, the bias light input to the optical waveguide 14 (bias light input port), and the bias light input to the optical waveguide 12 (signal light input port). The transmission ratio (merging ratio) of the signal light B to the optical waveguide 13 (optical output port) is 1: 1: 1, and the transmission ratios of the signal lights A and B and the bias light are reduced to 1/3. The closer it is, the closer the insertion gain is to 4.8 dB. Here, to explain the definition of the insertion gain, the output light at the time of inputting (A, B) = (0,0) is a times (a> 1) with respect to the relative intensity 1 of the signal lights A and B. In this case, the insertion gain is set to ₁₀ log 10 (a).

However, the merging ratio of the optical logic element 1 does not have to be limited to 1: 1: 1, and it can operate even at 1: γ: 1 (0 <γ). In this case, the binary contrast BC> 9.5 dB can be maintained by setting the intensity of the bias light to 1 / γ times the intensity of the signal lights A and B. As γ asymptotes to zero, the insertion gain asymptotes to 6.5 dB, but the required bias light intensity increases. If the insertion gain is to be increased, γ should be made as small as possible. The merging ratio of the optical logic element 1 can be set by the shape of the optical logic element 1.

Table 1 shows the input / output relationship when the transmittances of the two signal lights A and B and the bias light to the optical output port are all 1/3 and the relative intensity of the signal lights A and B and the bias light is 1.

As described above, the signal lights A and B are phase bit lights based on the phase of the bias light, and have a phase of the same phase (0) or the opposite phase (π) with respect to the bias light. The in-phase (0) corresponds to the digital signal bit “1” (intensity 1 in the case of the amplitude bit), and the opposite phase (π) corresponds to the digital signal bit “0” (intensity in the case of the amplitude bit). 0). The output light C obtained as a result of the logical operation of the phase bits is an amplitude bit. When at least one of the signal lights A and B is out of phase (π) with respect to the bias light, the output light C having an intensity of 1/3 with respect to the intensity of the signal lights A and B and the bias light is obtained. When the signal lights A and B are in phase (0) with respect to the bias light, the output light C having three times the intensity is obtained. According to this embodiment, an AND operation with a binary contrast BC> 9.5 dB and an insertion gain of 4.8 dB can be realized.

Next, FIG. 9 shows a specific configuration required for the logical operation of the phase bits of this embodiment. The optical logic circuit shown in FIG. 9 receives an optical logic element 1, a light source 4 that outputs continuous light and bias light for signal light generation, and continuous light for signal light generation according to each bit of an input digital electric signal. It is composed of electro-optical phase shifters 5-1 and 5-2 that generate signal light by phase modulation. This optical logic circuit is integrated on a substrate made of a dielectric material.

The light source 4 inputs continuous light having a relative intensity of 1 to the electro-optical phase shifters 5-1 and 5-2, and inputs the continuous light to the electro-optical phase shifters 5-1 and 5-2 for signal light generation continuous light. Continuous light of the same intensity and the same wavelength as bias light is input to the optical waveguide 14 (bias light input port) of the optical logic element 1. The continuous light for generating signal light and the bias light may be in phase or out of phase.

When the corresponding bit of the input digital electric signal is "0", the electro-optical phase shifter 5-1 and 5-2 outputs the input light with the phase opposite to the bias light (π). When the corresponding bit is "1", the phase of the input light is set to the same phase (0) as the bias light and output. In this way, signal lights A and B having a phase corresponding to the corresponding bit of the input digital electric signal can be generated and input to the optical waveguides 11 and 12 (signal light input port) of the optical logic element 1.

Note that FIG. 9 describes a case where the merging ratio of the optical logic element 1 is set to 1: 1: 1 and the intensities of the signal lights A and B and the bias light are the same. However, as described above, the merging ratio is the same. May be set to 1: γ: 1 (0 <γ), and the intensity of the bias light may be set to 1 / γ with respect to the intensity of the signal lights A and B.

In order to make the bias light and the signal lights A and B accurately in phase or out of phase, all the 2-bit digital electric signals input to the electro-optic phase shifters 5-1 and 5-2 are "1". Electro-optic phase shifters 5-1 and 5-so that sometimes the output light C is maximized, or the output light C is minimized when at least one of the 2-bit digital electrical signals is "0". 2 may be adjusted.
Further, in order to adjust the optical input intensity to a predetermined ratio, an intensity modulator may be provided at an arbitrary port of the optical logic element 1.

According to this embodiment, the following effects can be obtained.
(I) The generation of the signal lights A and B can be realized only by the electro-optical phase shifters 5-1 and 5-2, and the configuration of the optical logic circuit can be simplified.
When constructing an optical logic circuit in which the light of the amplitude bit is used as the input signal light A and B, as shown in FIG. 10, the intensity modulators 6-1 and 6-2 by the Mach Zender interference system are used as the optical logic element 1. It is necessary to provide it in the signal light input port of. The intensity modulators 6-1 and 6-2 generate signal lights A and B by intensity-modulating continuous light for signal light generation according to the corresponding bits of the input digital electric signal.

(II) The relative output intensity at the time of (A, B) = (0,0) input (corresponding to (A, B) = (1,1) input in the case of AND operation of amplitude bit) is 3, and it is inserted. The gain can be ~ 4.8 dB. In the case of the AND operation of the amplitude bit, the insertion gain is limited to ~ 0.5 dB.

(III) Binary contrast BC = 9.54 dB can be realized as in the first to third embodiments.

Although FIGS. 8 to 10 describe the case where the optical logic element 1 of the first embodiment is used, the optical logic elements 2 and 3 may be used instead of the optical logic element 1 as described above. ..

[Fifth Example]
Next, a fifth embodiment of the present invention will be described. In this embodiment, FIG. 11 shows a concept of performing a logical operation of a phase bit using an optical logic element different from that of the first to third embodiments. In this embodiment, the optical logic elements 1 (or optical logic elements 2 and 3) shown in FIGS. 8 and 9 are replaced with a configuration in which two optical logic elements 7 and 8 having two inputs and one output are connected in cascade. Is.

The optical logic element 7 merges the signal light A input to the optical waveguide 70 (signal light input port) and the signal light B input to the optical waveguide 71 (signal light input port) to form the optical waveguide 72 (optical output). Output to port). The ratio (merging ratio) of the transmittances of the signal lights A and B to the optical output ports is 1: 1.

The optical logic element 8 merges the light output from the optical logic element 7 and input to the optical waveguide 80 (signal optical input port) and the bias light input to the optical waveguide 81 (bias optical input port) to form an optical waveguide. Output to 82 (optical output port). The ratio (merging ratio) of the transmittance of the input light from the optical logic element 7 to the optical output port of the bias light is 1: 1.

As each of the optical logic elements 7 and 8, a Y-branched optical waveguide having a structure including the substrate 10 and the optical waveguides 11 to 13 described in the first embodiment can be used.
As described in the fourth embodiment, the signal lights A and B are phase bit lights having a phase of the same phase (0) or the opposite phase (π) with respect to the bias light. The intensity ratio of the signal lights A and B to the bias light is 2: 1.

The transmission of the two signal lights A and B in the optical logic element 7 to the optical output port is 1/2, and the transmission of the input light and the bias light from the optical logic element 7 in the optical logic element 8 to the optical output port is Table 2 shows the input / output relationship when the intensity ratio of the signal lights A and B and the bias light is 2: 1 at 1/2.

As described above, the signal lights A and B are phase bit lights based on the phase of the bias light, and have a phase of the same phase (0) or the opposite phase (π) with respect to the bias light. The in-phase (0) corresponds to the digital signal bit “1” (intensity 1 in the case of the amplitude bit), and the opposite phase (π) corresponds to the digital signal bit “0” (intensity in the case of the amplitude bit). 0). The output light C obtained as a result of the logical operation of the phase bits is an amplitude bit. When at least one of the signal lights A and B is out of phase (π) with respect to the bias light, an output light C having an intensity of 1/4 of the intensity of the signal lights A and B is obtained, and the signal light A is obtained. When B and B are in phase (0) with respect to the bias light, an output light C having an intensity of 9/4 is obtained. According to this embodiment, an AND operation with a binary contrast BC> 9.5 dB and an insertion gain of ~ 3.5 dB can be realized.

Next, FIG. 12 shows a specific configuration required for the logical operation of the phase bits of this embodiment. In the optical logic circuit shown in FIG. 12, optical logic elements 7 and 8, a light source 4a that outputs continuous light and bias light for signal light generation, and continuous light for signal light generation are input to each bit of a digital electric signal. It is composed of electro-optical phase shifters 9-1 and 9-2 that generate signal light by phase-modulating according to the above. This optical logic circuit is integrated on a substrate made of a dielectric material.

The light source 4a inputs continuous light having a relative intensity of 1 to the electro-optical phase shifters 9-1 and 9-2, and inputs the continuous light to the electro-optical phase shifters 9-1 and 9-2 for signal light generation. Continuous light having the same wavelength as the above and having a intensity of 1/2 is input to the optical waveguide 81 (bias light input port) of the optical logic element 8 as bias light. The continuous light for generating signal light and the bias light may be in phase or out of phase.

The operation of the electro-optical phase shifters 9-1 and 9-2 is the same as that of the electro-optical phase shifters 5-1 and 5-2 of the fourth embodiment. In this way, signal lights A and B having a phase corresponding to the corresponding bit of the input digital electric signal can be generated and input to the optical waveguides 70 and 71 (signal light input port) of the optical logic element 7.

In order to make the bias light and the signal lights A and B accurately in phase or out of phase, the 2-bit digital electrical signals input to the electro-optic phase shifters 9-1 and 9-2 are all "1". Electro-optic phase shifters 9-1, 9- so that sometimes the output light C is maximized, or the output light C is minimized when at least one of the 2-bit digital electrical signals is "0". 2 may be adjusted.
Further, in order to adjust the optical input intensity to a predetermined ratio, an intensity modulator may be provided at an arbitrary port of the optical logic elements 7 and 8.

It is already widely known in the world that the optical logic elements 7 and 8 have a structure having a small loss and being easy to manufacture. Therefore, when the yield and the ease of calibration are emphasized, it is highly possible that this embodiment is adopted instead of the fourth embodiment.

1-3,7,8 ... Optical logic element, 4,4a ... Light source, 5-1,5-2,9-1,9-2 ... Electro-optical phase shifter, 6-1, 6-2 ... Intensity modulation Vessel, 10 ... Substrate, 11-14, 21-24, 31-34, 70-72, 80-82 ... Optical waveguide, 15, 16 ... Phase shifter, 21a, 22a, 34a ... Coupling part.

Claims (10)

A substrate made of a first dielectric material and
A first optical waveguide and a second optical waveguide for signal light input, which are formed on one surface of the substrate and are made of a second dielectric material having a higher refractive index than the first dielectric material. ,
A third optical waveguide for signal light output, formed on the one surface of the substrate and made of the second dielectric material.
A fourth optical waveguide for biased light input, formed on the one surface of the substrate and made of the second dielectric material, is provided.
The first optical waveguide, the second optical waveguide, and the third optical waveguide form a Y-branched optical waveguide in which one ends are connected to each other.
The fourth optical waveguide is arranged between the first optical waveguide and the second optical waveguide, and one end of the fourth optical waveguide closer to the Y-branch optical waveguide is tapered in a plan view. An optical logic element that is formed in a shape and is coupled to the first optical waveguide and the second optical waveguide. In the optical logic device according to claim 1,
The first optical waveguide and the second optical waveguide are arranged symmetrically with respect to the extension line of the third optical waveguide.
The fourth optical waveguide is an optical logic element characterized in that it is arranged on an extension of the third optical waveguide. In the optical logic device according to claim 1 or 2.
A first phase shifter that changes the phase of the signal light so that the phases of the signal lights input to the first optical waveguide and the second optical waveguide are the same in the Y-branched optical waveguide. When,
The phase of the bias light input to the fourth optical waveguide is opposite to the phase of the signal light input to the first optical waveguide and the second optical waveguide in the Y-branch optical waveguide. A second phase shifter that changes the phase of the biased light,
An optical logic element characterized by further comprising. A substrate made of a first dielectric material and
A first optical waveguide and a second optical waveguide for signal light input, which are formed on one surface of the substrate and are made of a second dielectric material having a higher refractive index than the first dielectric material. ,
A third optical waveguide for signal light output, formed on the one surface of the substrate and made of the second dielectric material.
A fourth optical waveguide for biased light input, formed on the one surface of the substrate and made of the second dielectric material, is provided.
One end of the third optical waveguide is connected to one end of the fourth optical waveguide.
The fourth optical waveguide is arranged between the first optical waveguide and the second optical waveguide.
An optical logic element, wherein the first optical waveguide and the second optical waveguide each have a coupling portion that is coupled to the fourth optical waveguide. In the optical logic device according to claim 4,
A first phase shifter that changes the phase of the signal light so that the phases of the signal lights input to the first optical waveguide and the second optical waveguide are in phase with each other at the coupling portion.
The phase of the bias light input to the fourth optical waveguide is opposite to the phase of the signal light input to the first optical waveguide and the second optical waveguide, respectively, and the first optical waveguide and the said A second phase shifter that changes the phase of the biased light so as to couple with the second optical waveguide,
An optical logic element characterized by further comprising. The optical logic element according to any one of claims 1 to 5 is provided.
The optical logic element receives as the signal light the light of the amplitude bit in which the values of 0 and 1 are assigned to different amplitudes and the bias light as the input.
An optical logic circuit characterized in that the output light of the third optical waveguide is used as a calculation result. In the optical logic circuit according to claim 6,
An optical logic circuit further comprising an intensity modulator for generating the signal light by intensity-modulating continuous light for signal light generation according to a corresponding bit of an input digital electric signal. The optical logic element according to any one of claims 1 to 5 is provided.
The optical logic element receives, as the signal light, light of phase bits in which values of 0 and 1 are assigned to different phases, and receives the bias light as input.
An optical logic circuit characterized in that the output light of the third optical waveguide is used as a calculation result. In the optical logic circuit according to claim 8,
An optical logic circuit further comprising a third phase shifter that phase-modulates continuous light for generating signal light according to the corresponding bits of an input digital electric signal to generate the signal light. In the optical logic circuit according to any one of claims 6 to 9.
An optical logic circuit further comprising a light source capable of adjusting the intensity of the bias light.

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