JP6911523B2 - Structure manufacturing method and structure - Google Patents

Description

The present disclosure relates to a method for manufacturing a structure and the structure.

MEMS (Micro Electro Mechanical Systems) technology is being used not only in electronic devices but also in various fields such as optical devices. MEMS techniques may be used to create structures using substrates with recesses (eg, grooves or bottomed holes). Patent Documents 1 to 3 disclose a method for producing such a structure.

Patent Document 1 discloses that a silicon oxide film is formed on the side surface of a groove by introducing oxygen into an inductively coupled plasma processing apparatus. Patent Document 2 discloses that silicon oxide, which is an insulator, is obliquely vapor-deposited from the top of a lattice made of silicon in the depth direction. In Patent Document 3, an insulating film having a thickness of 5 nm or more and 5000 nm or less is formed on the side surface and the bottom surface of the recess formed on the silicon substrate, and at least a part of the insulating film formed on the bottom surface of the recess is removed. It discloses that the silicon layer is exposed and the recess is filled with metal by electroplating.

Japanese Patent No. 5420923 Japanese Patent No. 5649307 Japanese Patent No. 57736224

When the insulating film on the bottom surface is removed after forming the insulating film on the side surface and the bottom surface of the recess provided on the substrate, the insulating film other than the bottom surface is also removed. Therefore, in the inventions described in Patent Documents 1 to 3, a portion where the insulating film becomes thin or a portion where the silicon layer existing in the back of the insulating film is exposed may appear. In this case, when the metal layer is formed by electrolytic plating toward the bottom surface of the recess, the plating tends to grow from the portion where the insulating property is deteriorated. As a result, voids are likely to be generated in the metal layer. The presence of such voids is not desirable. For example, when an X-ray image imaging grid is produced, the voids cause unevenness in the captured image.

An object of the present invention is to provide a method for producing a structure and a structure in which voids are suppressed from being generated in the metal layer due to abnormal precipitation from a portion where the insulating property is deteriorated.

In the method for manufacturing a structure according to an embodiment of the present disclosure, a plurality of recesses arranged in a predetermined direction are formed on one surface of a substrate containing silicon, and the substrate is thermally oxidized to cause the plurality of recesses. At least the entire silicon existing between the two adjacent recesses is oxidized, and the silicon oxide layer on the bottom surface of the plurality of recesses is removed by anisotropic etching.

In the method for manufacturing a structure according to an embodiment of the present disclosure, a plurality of recesses arranged in a predetermined direction are formed on one surface of a substrate containing silicon, and the substrate is thermally oxidized to cause the plurality of recesses. The silicon oxide is formed so that the depth from one surface of the silicon oxide layer formed between the two adjacent recesses is at least greater than the depth of the silicon oxide layer formed on the bottom surfaces of the plurality of recesses. Is oxidized, and the silicon oxide layer on the bottom surface of the plurality of recesses is removed by performing anisotropic etching.

The one surface includes a first region in which the plurality of recesses are formed and a second region adjacent to the first region, and at least the second region is formed before the plurality of recesses are formed. A silicon oxide layer may be formed on the surface.

After the plurality of recesses are formed, a silicon oxide layer may be present on the surfaces of the first region and the second region.

After the plurality of recesses are formed, the silicon oxide layer may be present on the surface of the second region, and the silicon oxide layer may not be present on the surface of the first region.

The one surface includes a first region in which the plurality of recesses are formed and a second region adjacent to the first region, and after the thermal oxidation, a mask material is formed in the second region. Then, the anisotropic etching may be performed using the mask material as a mask.

After the thermal oxidation, the silicon oxide layer may be removed from the surface facing the one surface.

Each region between the two adjacent recesses may be longer in the depth direction of the recess than in the predetermined direction.

The width of the silicon oxide layer existing between the two adjacent recesses in the predetermined direction may be 16 μm or less.

After removing the silicon oxide layer on the bottom surface of the plurality of recesses, a metal layer may be formed toward the bottom surface.

The structure according to the embodiment of the present disclosure includes a silicon layer, a plurality of silicon oxide layers provided on the silicon layer at intervals in a predetermined direction, and the plurality of silicon oxide layers. Includes two adjacent silicon oxide layers and a plurality of metal layers, each in contact with the silicon layer.

According to the present invention, it is possible to provide a method for producing a structure and a structure in which voids are suppressed from being generated in the metal layer due to abnormal precipitation from a portion where the insulating property is deteriorated.

It is a top view which shows the outline of the structure which concerns on one Embodiment of this disclosure. It is a cross-sectional view of AA'of the structure which concerns on one Embodiment of this disclosure. It is a figure which shows the flow of the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure explaining the process of step S110 in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure explaining the process of step S120 in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure explaining the process of step S130 in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure explaining the process of step S140 in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure explaining the process of step S150 in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure explaining the process of step S160 in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure which shows the state of removal of the silicon oxide layer of the bottom surface of the recess in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure explaining the process of step S170 in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure explaining the process of step S180 in the manufacturing method of the structure which concerns on Embodiment 1 of this disclosure. It is a figure which shows the flow of the manufacturing method of the structure which concerns on Embodiment 2 of this disclosure. It is a figure explaining the process of step S210 in the manufacturing method of the structure which concerns on Embodiment 2 of this disclosure. It is a figure explaining the process of step S220 in the manufacturing method of the structure which concerns on Embodiment 2 of this disclosure. It is a figure explaining the process of step S230 in the manufacturing method of the structure which concerns on Embodiment 2 of this disclosure. It is a figure explaining the process of step S240 in the manufacturing method of the structure which concerns on Embodiment 2 of this disclosure. It is a figure explaining the process of step S250 in the manufacturing method of the structure which concerns on Embodiment 2 of this disclosure. It is a figure explaining the process of step S140 in the manufacturing method of the structure which concerns on Embodiment 2 of this disclosure. It is a figure which shows the flow of the manufacturing method of the structure which concerns on Embodiment 3 of this disclosure. It is a figure explaining the process of step S310 in the manufacturing method of the structure which concerns on Embodiment 3 of this disclosure. It is a figure explaining the process of step S320 in the manufacturing method of the structure which concerns on Embodiment 3 of this disclosure. It is a figure explaining the process of step S330 in the manufacturing method of the structure which concerns on Embodiment 3 of this disclosure. It is a figure explaining the process of step S340 in the manufacturing method of the structure which concerns on Embodiment 3 of this disclosure. It is a figure explaining the process of step S350 in the manufacturing method of the structure which concerns on Embodiment 3 of this disclosure. It is a figure which shows the state of removal of the silicon oxide layer of the bottom surface of the recess in the manufacturing method of the structure which concerns on Embodiment 4 of this disclosure. FIG. 5 is a cross-sectional view taken along the line AA'of the structure according to the fourth embodiment of the present disclosure. It is sectional drawing of the diffraction grating using the structure which concerns on one Embodiment of this disclosure.

Hereinafter, the structure according to the present invention and a method for manufacturing the same will be described with reference to the drawings. However, the structure of the present invention and the method for producing the same can be carried out in many different modes, and are not construed as being limited to the contents of the embodiments shown below.

In the drawings referred to in the present embodiment, the same parts or parts having similar functions are designated by the same reference numerals or similar reference numerals (signatures in which A is simply added after the numbers). Further, for convenience of explanation, the terms "upper" and "lower" will be used for explanation, but the vertical direction may be reversed. Further, in the following description, for example, the expression of the silicon oxide layer 200 on the silicon layer 100 merely explains the hierarchical relationship between the silicon layer 100 and the silicon oxide layer 200, and the silicon layer 100 and the silicon oxide layer 200. Other members may be arranged between the two. Further, the dimensional ratio of the drawing may differ from the actual ratio for convenience of explanation, or a part of the configuration may be omitted from the drawing.

<Embodiment 1>
[Structure of structure 10]
FIG. 1 is a plan view showing an outline of the structure 10 according to the embodiment of the present disclosure. FIG. 2 is a cross-sectional view taken along the line AA'of the structure 10 according to the embodiment of the present disclosure. In each of the cross-sectional views described below, the width of the peripheral region 130 in the D2 direction is shown to be small due to the space of the drawings.

The structure 10 has a circular shape here, but is not limited to this structure. The structure 10 may have a shape such as a quadrangle. Of the structure 10, one surface is referred to as "first surface 102", and the surface facing the first surface 102 is referred to as "second surface 104". The structure 10 has a plurality of recesses 120 on the first surface 102, at least in the effective region 110 (first region). The effective domain is an area actually used in the structure 10.

The recess 120 here constitutes a linear groove. Therefore, the effective region 110 is an region in which the recesses 120 are arranged in a grid pattern. The peripheral region 130 (second region) is an region existing around the effective region 110. The peripheral area 130 is adjacent to the effective area 110. The effective region 110 may be provided so as to match the outer shape of the structure 10. In this case, the peripheral region 130 does not have to exist.

The recess 120 has a shape having a length in the D1 direction. A plurality of recesses 120 are formed, and the recesses 120 are periodically arranged in the D2 direction intersecting the D1 direction. That is, the recesses 120 are arranged at regular intervals in the D2 direction. Further, in the D2 direction, the recesses 120 and the portions where the recesses 120 are not provided are alternately arranged. In the example shown in FIG. 1, the D2 direction is a direction orthogonal to the D1 direction. Further, the width of the recess 120 in the D2 direction is L, the width of the recess 120 adjacent to the D2 direction in the D2 direction is S, and the width of the recess 120 in the D1 direction is K. The L of the recess 120 may be 0.5 μm or more and 30 μm or less, S may be 16 μm or less, and K may be 6 cm or more and 14 cm or less. The ratio of K to L (K / L) may be, for example, 200 or more and 2800 or less. Further, the ratio of S to L (S / L) may be, for example, 200 or more and 2800 or less. As an example, in the structure 10 used for the X-ray image imaging grid, L of the recess 120 is 2.5 μm or more and 7.5 μm or less, S is 2.5 μm or more and 7.5 μm or less, and K is 10 cm or more and 13 cm or less. You may. As an example, S and L are 2.5 μm. The ratio of S to L of each recess 120 (S / L) may or may not be constant, but is preferably configured such that the S / L value is substantially constant. For example, S / L may be set in the range of 0.5 or more and 2.0 or less. The recesses 120 are arranged side by side at least 1000 or more, preferably 6000 or more, and more preferably 26000 or more in the D2 direction. The above values of L, S, and K are examples, and are not limited to the above values. The substrate 600 is provided with a notch 140 (which may be an orientation flat instead of the notch).

In plan view, each recess 120 is configured as a linear portion that reaches at least a pair of ends of the effective region 110. However, each recess 120 is not limited to a linear shape, and may be a curved shape or a combination of a linear shape and a curved shape. Further, the recess 120 may be arranged beyond the effective region 110 in the D1 direction and the D2 direction. Further, the lengths of the plurality of recesses 120 may not be the same, and the lengths of some recesses 120 may be different from the lengths of the other recesses 120.

As shown in FIG. 2, the structure 10 has a silicon layer 100, a silicon oxide layer 200, and a metal layer 300. The silicon layer 100 is a layer mainly containing silicon. The silicon oxide layer 200 is provided on the silicon layer 100 and is a layer mainly containing silicon oxide. The silicon oxide layer 200 has a plurality of recesses 120 in the effective region 110. The recess 120 exposes the silicon layer 100 on the bottom surface 124. The recess 120 has, for example, a high aspect ratio of 10 or more. The aspect ratio is the ratio of the depth P of the recess 120 to the width L of the recess 120 in the D2 direction. The width L of the recess 120 is defined by the opening of the first surface 102 and the recess 120. The depth P of the recess 120 is defined by the distance from the first surface 102 to the bottom surface 124 of the recess 120 (that is, the length in the D3 direction). D3 is the direction that intersects D1 and D2, here the direction that is orthogonal to D1 and D2. P is, for example, 100 μm, but may be less than 100 μm or deeper than 100 μm.

The silicon oxide layer 200 includes a plurality of convex portions 210 and a silicon oxide film 220. The plurality of convex portions 210 correspond to regions between two adjacent concave portions 120, respectively. The plurality of convex portions 210 are provided in the effective region 110. The plurality of convex portions 210 are periodically arranged in the D2 direction, like the plurality of concave portions 120. That is, the plurality of convex portions 210 are provided on the silicon layer 100 at intervals in the D2 direction. As a result, in the effective region 110, the convex portions 210 and the concave portions 120 are alternately arranged in the D2 direction. The height of the convex portion 210 is the distance in the depth direction (that is, the D3 direction) of the concave portion 120 from the position of the first surface 102 to the position of the bottom surface 124. Therefore, the height of the convex portion 210 is P, which is substantially the same as the depth of the concave portion 120. The convex portion 210 is a columnar shape longer in the D3 direction than in the D2 direction (that is, P> S). Since the entire convex portion 210 is a silicon oxide layer, S is equal to the width of the silicon oxide layer existing between the two adjacent concave portions 120 in the D2 direction.

The silicon oxide film 220 is a film-like silicon oxide layer that covers the surface of the silicon layer 100. In the present embodiment, the silicon oxide film 220 covers the surface of the silicon layer 100, for example, in the peripheral region 130. The silicon oxide film 220 is not provided on the second surface 104. Therefore, on the second surface 104, the silicon layer 100 having a higher conductivity than the silicon oxide layer 200 is exposed.

The metal layer 300 is arranged inside each of the plurality of recesses 120. The structure 10 has two adjacent convex portions 210 among the plurality of convex portions 210, and a plurality of metal layers 300 each in contact with the silicon layer 100. In the effective region 110, the convex portions 210 and the metal layers 300 are alternately arranged in the D2 direction.

The metal layer 300 is formed by using a material containing a metal. The material of the metal layer 300 can be selected according to the electromagnetic wave of the wavelength band to be diffracted. The transmittance of the metal layer 300 with respect to electromagnetic waves in the target wavelength band is lower than the transmittance of the silicon layer 100 and the silicon oxide layer 200. For example, as the material of the metal layer 300, a material having a transmittance of the metal layer 300 for X-rays (radiation) lower than that of the silicon layer 100 and the silicon oxide layer 200 for X-rays can be used. The structure 10 may be used for radiation such as α-rays, β-rays, γ-rays, neutron rays, and cosmic rays in addition to X-rays. Further, as the metal layer 300, a metal material such as platinum, gold, silver, copper, and nickel can be used. As the metal layer 300, a material containing rhodium, ruthenium, iridium and the like can be used in addition to the above materials.

In the cross-sectional view shown in FIG. 2, the side surface 122 of the recess 120 is substantially orthogonal to the first surface 102, but the present invention is not limited to this. For example, in a cross-sectional view, the side surface 122 of the recess 120 may intersect the first surface 102 at an angle not orthogonal to each other (so-called forward taper shape or reverse taper shape).

[Manufacturing method of structure 10]
A method for manufacturing the structure 10 according to the first embodiment will be described with reference to FIGS. 3 to 12. FIG. 3 is a diagram showing a flow of a manufacturing method of the structure 10 according to the first embodiment. FIG. 4 is a diagram illustrating the process of step S110.

The step of step S110 is a step of forming a silicon oxide film 220 on the surface of a substrate (that is, a silicon substrate) 600 mainly containing silicon. In the step S110, for example, the silicon oxide film 220 is formed on the entire surface of the substrate 600 by thermally oxidizing the substrate 600. In addition to the thermal oxidation method, a plasma CVD method, a thermal CVD method, a catalytic CVD method (Cat (Catalytic) -CVD method or a hot wire CVD method) or the like may be adopted.

FIG. 5 is a diagram illustrating the process of step S120. The step S120 is a step of forming the mask material 420 in the region corresponding to the plurality of recesses 120 in the first surface 102 of the substrate 600 after the step S110. In the present embodiment, in the step S120, after the mask material 420 is formed on the entire first surface 102, the mask material 420 and the silicon oxide film 220 are removed from the region where the recess 120 is formed. The mask material 420 is, for example, a photoresist. The region of the first surface 102 where the recess 120 is not formed is covered with the mask material 420.

FIG. 6 is a diagram illustrating the process of step S130. The step of step S130 is a step of forming a plurality of recesses 120 in the substrate 600. In other words, the step of step S130 is a step of forming a plurality of convex portions 210 on the substrate 600. Specifically, in the step S130, etching is performed from the first surface 102 side of the substrate 600 using the mask material 420 as a mask. The etching is, for example, deep etching using a Bosch process or reactive ion etching. When etching is performed, a plurality of recesses 120 are formed in the region where the mask material 420 is not formed.

FIG. 7 is a diagram illustrating the process of step S140. The step of step S140 is a step of removing the mask material 420 from the first surface 102 of the substrate 600 after the plurality of recesses 120 are formed.

FIG. 8 is a diagram illustrating the process of step S150. The step of step S150 is a step of forming a silicon oxide layer on the plurality of convex portions 210 by thermally oxidizing the substrate 600. The step of step S150 oxidizes at least the entire silicon existing in each convex portion 210 of the plurality of convex portions 210. As a result, each of the convex portions 210 of the plurality of convex portions 210 becomes a silicon oxide layer. Therefore, the depth (that is, the length in the D3 direction) of the silicon oxide layer of each convex portion 210 from the first surface 102 is P, which is the same as the length of the convex portion 210 in the D3 direction. Further, by the step S150, the silicon oxide layer 230 is formed on the bottom surface 124 of each recess 120. Assuming that the depth of the silicon oxide layer 230 is p1, the relationship of P> p1 is satisfied.

For example, when thermal oxidation is performed from the side surfaces 122 on both sides of each convex portion 210 in the D2 direction using an apparatus capable of thermally oxidizing to a depth of 8 μm, the width of each convex portion 210 in the D2 direction should be 16 μm or less. For example, the entire convex portion 210 is transformed into a silicon oxide layer. Therefore, in the step S120, the mask material 420 is formed so that the width (that is, the distance S) of the silicon oxide layer existing in the convex portion 210 in the D2 direction after the thermal oxidation in step S150 is 16 μm. In the step S120, the distance between the two adjacent recesses after the recess 120 is formed may be, for example, 7.04 μm (theoretical value). In the step of step S120, the mask material 420 may be formed so that the width of the silicon oxide layer existing in the convex portion 210 in the D2 direction after the thermal oxidation of step S150 is 16 μm or less at the maximum. The reason why the entire convex portion 210 is formed as a silicon oxide layer will be described later. Further, a silicon oxide film 220 having a thickness of p2 is formed in the peripheral region 130. The silicon oxide film 220 in the peripheral region 130 is formed by the steps of steps S110 and S150.

FIG. 9 is a diagram illustrating the process of step S160. The step S160 is a step of removing the silicon oxide layer 230 from the bottom surface 124 of the plurality of recesses 120 by performing anisotropic etching from the first surface 102 side of the substrate 600. By the step S160, the silicon layer 100 is exposed on the bottom surface 124 of the recess 120.

FIG. 10 is a diagram showing a state of removal of the silicon oxide layer 230 on the bottom surface 124. FIG. 10 shows an enlarged cross-sectional view of a part of the substrate 600.

According to the step S160, a part of the silicon oxide layer is removed not only from the silicon oxide layer 230 but also from the upper surface of each convex portion 210. However, since the silicon oxide layer satisfying the relationship of P> p1 is formed in each convex portion 210 by the step of step S150, the silicon layer 100 is not exposed from the convex portion 210. Further, according to the step S160, a part of the silicon oxide film 220 is also removed. However, by the steps of steps S110 and S150, a silicon oxide film 220 having a thickness of p2 is formed in the peripheral region 130. Since the relationship of at least p2> p1 is satisfied, it is unlikely that the silicon layer 100 is exposed from the peripheral region 130. As a result, after the step S160, the silicon layer 100 is exposed on the bottom surface 124 on the first surface 102, but the silicon layer 100 is not exposed in the region other than the bottom surface 124.

FIG. 11 is a diagram illustrating the process of step S170. The step of step S170 is a step of removing the silicon oxide film 220 from the second surface 104. The step S170 removes the silicon oxide film 220 from the entire second surface 104, for example. As a result, full-scale power supply can be performed via the second surface 104. In the step S170, for example, the silicon oxide film 220 is removed by etching the substrate 600 from the second surface 104 side.

The etching is, for example, wet etching or dry etching. When dry etching is used, dry etching can be performed using trifluoromethane (CHF ₃ ) gas or ethane hexafluoroethane (C ₂ F ₆ ) gas. When wet etching is used, hydrofluoric acid (HF), buffered hydrofluoric acid (BHF), surfactant-added buffered hydrofluoric acid (LAL®) and the like can be used. The wet etching is performed by masking the first surface 102 side. As a result, the structure 700 used for manufacturing the structure 10 as shown in FIG. 11 is obtained. The step S170 may be a step of removing the silicon oxide film 220 from a part of the second surface 104. Alternatively, the method for manufacturing a structure according to the present disclosure does not have to include the step S170.

FIG. 12 is a diagram illustrating the process of step S180. The step S180 is a step of forming the metal layer 300 toward the bottom surface 124 of the plurality of recesses 120 of the substrate 600 (structure 700). Specifically, in the step S170, the metal layer 300 is grown upward from the bottom surface 124 by an electrolytic plating method in which the substrate 600 is energized. When the formation of the metal layer 300 is completed, the structure 10 shown in FIG. 2 is obtained.

As described above, according to the method for manufacturing the structure 10 according to the first embodiment, the silicon oxide layer of the convex portion 210 becomes thin, or the silicon layer 100 existing in the back of the silicon oxide layer is not exposed. Therefore, in the step S180, the growth of the metal layer from the portion where the insulating property of the convex portion 210 is deteriorated is unlikely to occur. Therefore, according to the method for manufacturing the structure 10 according to the first embodiment, it is possible to suppress the generation of voids in the metal layer 300 due to abnormal precipitation from the portion where the insulating property of the convex portion 210 is deteriorated. can do. Further, the surface of the peripheral region 130 is covered with the silicon oxide film 220. Therefore, it is possible to suppress the occurrence of abnormal precipitation near the boundary between the effective region 110 and the peripheral region 130 due to the growth of the metal layer from the peripheral region 130.

Further, in the effective region 110 of the structure 10, the convex portions 210 and the metal layers 300 constituting the silicon oxide layer are alternately arranged in the D2 direction, which is caused by the difference in the absorption rate of silicon and silicon oxide with respect to X-rays. Changes in the captured image are also suppressed. For example, the decrease in contrast of the captured image is suppressed.

<Embodiment 2>
A method for manufacturing the structure 10 according to the second embodiment will be described with reference to FIGS. 13 to 19. FIG. 13 is a diagram showing a flow of a manufacturing method of the structure 10 according to the second embodiment. FIG. 14 is a diagram illustrating the process of step S210. The step S210 is a step of forming the mask material 440 in the peripheral region 130 of the substrate 600 after the silicon oxide film 220 is formed by the step S110. The mask material 440 is not formed in the effective region 110. The mask material 440 is, for example, a photoresist.

FIG. 15 is a diagram illustrating the process of step S220. The step of step S220 is a step of removing the silicon oxide film 220 from the effective region 110. Specifically, step S220 removes the silicon oxide film 220 by etching from the first surface 102 side. In the example of FIG. 15, the silicon oxide film 220 is left on the second surface 104 side, but it may be removed.

FIG. 16 is a diagram illustrating the process of step S230. The step of step S230 is a step of forming the mask material 460 in the region corresponding to the plurality of recesses 120 in the effective region 110. In the step S230, for example, after forming the mask material 460 on the first surface 102, the mask material 460 is removed from the region where the recess 120 is formed. As a result, the silicon layer 100 is exposed in the region where the recess 120 is formed. The mask material 460 is, for example, a photoresist. The region where the recess 120 of the first surface 102 is not formed is covered with the mask material 440 or the mask material 460. The method for manufacturing the structure according to the present disclosure may include a step of removing the mask material 440 after the step of step S210. In this case, the step S230 may form the mask material 460 in the portion where the mask material 440 is removed.

FIG. 17 is a diagram illustrating the process of step S240. The step S240 step is a step of forming a plurality of recesses 120 by etching the substrate 600 from the first surface 102 side using the mask material 440 and the mask material 460 as masks. By the step S240, a plurality of recesses 120 are formed in the region where the mask material 440 or the mask material 460 is not formed and the silicon layer 100 is exposed in the effective region 110. The etching method may be the same as the step S130 of the first embodiment.

FIG. 18 is a diagram illustrating the process of step S250. The step of step S250 is a step of removing the mask material 440 and the mask material 460 from the substrate 600.

FIG. 19 is a diagram illustrating the process of step S260. The step of step S260 is a step of forming a silicon oxide layer on the plurality of convex portions 210 by thermally oxidizing the substrate 600. The step of step S260 oxidizes at least the entire silicon existing in each of the convex portions 210 of the plurality of convex portions 210, as in the step of step S150. As a result, each of the convex portions 210 of the plurality of convex portions 210 becomes a silicon oxide layer. Further, by the step S260, the silicon oxide layer 230 is formed on the bottom surface 124 of each recess 120. The depth (that is, the length in the D3 direction) of the silicon oxide layer of each convex portion 210 from the first surface 102 is P, which is the same as the length of the convex portion 210 in the D3 direction (that is, P> p1).

When using an apparatus capable of thermally oxidizing to a depth of 8 μm, in the step S230, the width (that is, the distance S) of the silicon oxide layer existing in the convex portion 210 after the thermal oxidation of step S260 is 16 μm. The mask material 460 is formed so as to be. In the step S230, the distance between the two adjacent recesses after the recess 120 is formed may be, for example, 7.04 μm (theoretical value). In the step of step S230, the mask material 460 may be formed so that the width of the silicon oxide layer existing in the convex portion 210 in the D2 direction after the thermal oxidation of step S260 is 16 μm or less at the maximum.

After the step S160, the structure 10 shown in FIG. 2 is obtained by performing each step S160, step S170, and step S180 in the same manner as in the first embodiment described above.

Also in the second embodiment described above, the same effect as that of the structure 10 or the manufacturing method of the structure 10 in the first embodiment is obtained.

<Embodiment 3>
A method for manufacturing the structure 10 according to the third embodiment will be described with reference to FIGS. 20 to 25. The method for manufacturing the structure 10 according to the third embodiment is significantly different from the first and second embodiments in that it does not include the step of thermally oxidizing the substrate 600 in step S110. FIG. 20 is a diagram showing a flow of a manufacturing method of the structure 10.

FIG. 21 is a diagram illustrating the process of step S310. The step of step S310 is a step of forming a plurality of recesses 120 on the substrate 600 on which the silicon oxide film 220 is not formed. In the step S310, for example, a photolithography method is used to perform etching for forming a plurality of recesses 120.

FIG. 22 is a diagram illustrating the process of step S320. The step of step S320 is a step of forming a silicon oxide layer on the plurality of convex portions 210 by thermally oxidizing the substrate 600. The step of step S320 oxidizes at least the entire silicon existing in each of the convex portions 210 of the plurality of convex portions 210, as in the steps of steps S150 and S260. As a result, each of the convex portions 210 of the plurality of convex portions 210 becomes a silicon oxide layer. Further, by the step S320, the silicon oxide layer 230 is formed on the bottom surface 124 of each recess 120. The depth (that is, the length in the D3 direction) of the silicon oxide layer of each convex portion 210 from the first surface 102 is P, which is the same as the length of the convex portion 210 in the D3 direction (that is, P> p1). Further, the silicon oxide film 220 is formed on the surface of the substrate 600 by the step S320.

FIG. 23 is a diagram illustrating the process of step S330. The step of step S330 is a step of forming the mask material 480 in the peripheral region 130 of the substrate 600. As shown in FIG. 23, the mask material 480 is not formed in the effective region 110. The mask material 480 is, for example, a photoresist.

FIG. 24 is a diagram illustrating the process of step S340. The step S340 is a step of removing the silicon oxide layer 230 from the bottom surface 124 of the plurality of recesses 120 by performing anisotropic etching from the first surface 102 side of the substrate 600. By the step S340, the silicon layer 100 is exposed on the bottom surface 124 of the recess 120. Since a silicon oxide layer satisfying the relationship of P> p1 is formed on each convex portion 210, the silicon layer 100 at the back of the convex portion 210 is not exposed. Further, although the step S110 is not performed in the present embodiment, since the mask material 480 is formed on the surface of the peripheral region 130, the silicon layer 100 is exposed from the peripheral region 130 due to the step S340. It's hard to think of that. As a result, after the step S340, on the first surface 102, the silicon layer 100 is exposed on the bottom surface 124, and the silicon layer 100 is not exposed in the region other than the bottom surface 124.

FIG. 25 is a diagram illustrating the process of step S350. The step of step S350 is a step of removing the mask material 480 from the substrate 600.
Then, as in the first embodiment described above, the steps S170 and S180 are performed to obtain the structure 10 shown in FIG.

Also in the third embodiment, the same effect as that of the structure 10 or the manufacturing method of the structure 10 in the first embodiment is obtained. Further, when the step S340 is performed, the mask material 480 is formed in the peripheral region 130. Therefore, it is unlikely that the silicon layer 100 is exposed from the peripheral region 130. Therefore, the occurrence of abnormal precipitation due to the exposure of the silicon layer 100 from the peripheral region 130 is suppressed.

<Embodiment 4>
A method for manufacturing the structure 10A according to the fourth embodiment will be described with reference to FIGS. 26 to 27. FIG. 26 is a cross-sectional view showing the substrate 600 before the silicon oxide layer 230 on the bottom surface 124 is removed. FIG. 27 is a cross-sectional view showing the structure 10A after the silicon oxide layer 230 on the bottom surface 124 has been removed.

In the method for manufacturing the structure 10A according to the fourth embodiment, a plurality of recesses 120A are formed in which the diameter gradually decreases (that is, tapered) from the first surface 102 toward the bottom surface 124. In this case, silicon may remain in a part of each convex portion 210A depending on the thermal oxidation time of the step of forming the silicon oxide layer on the plurality of convex portions 210A (steps S150, S240, S320). Even in such a case, the depth p3 of the silicon oxide layer of each convex portion 210A from the first surface 102 (that is, the length in the D3 direction) is larger than the depth p1 of the silicon oxide layer formed on the bottom surface 124. If the condition of being large (that is, p3> p1) is satisfied, the silicon layer 100 is unlikely to be exposed from the first surface 102. Further, also in the structure 10A, the width of the silicon oxide layer existing between the two adjacent recesses 120A in the D2 direction may be 16 μm or less at the maximum.

Therefore, even in the manufacturing method of the structure 10A according to the present embodiment, the convex portion 210 is caused by the anisotropic etching for removing the silicon oxide layer 230 from the bottom surface 124 as in the first to third embodiments. The silicon layer 100 is not exposed. Therefore, it is possible to suppress the generation of voids in the metal layer 300A due to abnormal precipitation from the portion where the insulating property of the convex portion 210 is deteriorated. As described above, even when silicon remains in a part of the convex portion 210A, it is possible to suppress abnormal precipitation from a portion where the insulating property is deteriorated.

[Application method of diffraction grating 20]
A method of applying the structure 10 according to the first to third embodiments and the structure 10A according to the fourth embodiment to an X-ray image imaging grid will be described with reference to FIG. 28. FIG. 28 is a diagram showing an application method of a diffraction grating according to an embodiment of the present disclosure. As shown in FIG. 28, an X-ray tube having a large focal size is used as the X-ray light source 530 for capturing an X-ray image. The X-ray 550 emitted from the X-ray light source 530 is diffused by the diffusing member 540 which can have coherence, and is incident on the phase grating 545 and the diffraction grating 20 as the diffusing X-ray 555. Diffuse X-rays 555 radiate from the diffuse member 540. The phase grating 545 and the diffraction grating 20 are bent so that the traveling direction of the diffuse X-ray 555 and the direction of the side surface 510 of the metal layer 500 are parallel to each other. In order to bend the diffraction grating 20 into the shape shown in FIG. 28, a notch 505 is provided on the first surface 102 side of the diffraction grating 20. The notch 505 is formed after the metal layer 500 is formed in the recess 120. The same applies to the phase grid 545. The shape of the phase grating 545 is similar to the shape of the diffraction grating 20, but the metal layer 500 is not arranged in the recess of the diffraction grating 20. Diffuse X-rays 555 produce a Talbot effect on the phase grid 545 and form a Talbot image. This Talbot image is affected by the diffraction grating 20 to form the image contrast of the moire fringes. By analyzing the moire fringes, information such as X-ray absorption, scattering, and differential phase can be obtained.

When the subject is placed between the diffusion member 540 and the diffraction grating 20, the phase of the X-ray is shifted by the subject. The phase shift of X-rays is detected as moire by a detector arranged on the opposite side of the diffraction grating 20 from the subject. The subject is imaged by detecting the moire. By performing phase retrieval processing such as Fourier transform on the information detected in this way, a phase image of the subject can be obtained.

The present invention is not limited to the above embodiment, and can be appropriately modified without departing from the spirit. For example, the thicker the silicon oxide layer formed on the convex portion 210 or the convex portion 210A, the thinner the silicon oxide layer on the convex portion 210 or the convex portion 210A, or the silicon layer 100 existing behind the convex portion 210A is exposed. It is less likely to oxidize. Therefore, a silicon oxide layer thicker than 16 μm may be present in the convex portion 210 or the convex portion 210A.

10, 10A: Structure, 20: Diffraction grating, 100: Silicon layer, 102: First surface, 104: Second surface, 110: Effective area, 120, 120A: Recessed, 122: Side surface, 124: Bottom surface, 130: Peripheral area, 140: Notch, 200: Silicon oxide layer, 210, 210A: Convex part, 220: Silicon oxide film, 230: Silicon oxide layer, 300, 300A: Metal layer, 420: Mask material, 440: Mask material, 460 : Mask material, 480: Mask material, 500: Metal layer, 510: Side surface, 530: Line light source, 540: Diffusing member, 550: X-ray, 555: Diffusing X-ray, 600: Substrate, 700: Structure

Claims (10)

A plurality of recesses arranged in a predetermined direction are formed on one surface of a substrate containing silicon.
By thermally oxidizing the substrate, at least the entire silicon existing between the two adjacent recesses of the plurality of recesses is oxidized.
The silicon oxide layer on the bottom surface of the plurality of recesses is removed by performing anisotropic etching.
Method of manufacturing the structure. The one surface includes a first region in which the plurality of recesses are formed and a second region adjacent to the first region.
The method for producing a structure according to claim 1, wherein a silicon oxide layer is formed on the surface of at least the second region before forming the plurality of recesses. The method for producing a structure according to claim 2, wherein the silicon oxide layer is present on the surfaces of the first region and the second region after the plurality of recesses are formed. The method for producing a structure according to claim 2, wherein the silicon oxide layer is present on the surface of the second region and the silicon oxide layer is not present on the surface of the first region after the plurality of recesses are formed. .. The one surface includes a first region in which the plurality of recesses are formed and a second region adjacent to the first region.
After the thermal oxidation, a mask material is formed in the second region.
The method for producing a structure according to claim 1, wherein the anisotropic etching is performed using the mask material as a mask. The method for producing a structure according to any one of claims 1 to 5, wherein the silicon oxide layer is removed from the surface facing the one surface after the thermal oxidation. The method for manufacturing a structure according to any one of claims 1 to 6, wherein each region between the two adjacent recesses is longer in the depth direction of the recess than in the predetermined direction. The method for producing a structure according to any one of claims 1 to 7, wherein the width of the silicon oxide layer existing between the two adjacent recesses in the predetermined direction is 16 μm or less. The method for manufacturing a structure according to any one of claims 1 to 8, wherein a metal layer is formed toward the bottom surface after removing the silicon oxide layer on the bottom surface of the plurality of recesses. Silicon layer and
A silicon oxide layer is a convex portion with respect to the silicon layer, and a plurality of the silicon oxide layer provided spaced intervals to each other in a predetermined direction,
Two adjacent silicon oxide layers among the plurality of silicon oxide layers, and a plurality of metal layers in contact with the silicon layers, respectively.
Structure containing.

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