JP6887393B2 - Power converter - Google Patents

Description

The present invention relates to a power conversion device in which a power conversion semiconductor element is used as a main circuit element for power conversion.

Power semiconductor elements for power conversion are widely used as core components of power conversion devices (also referred to as "power converters") such as inverters for motor drives and conversion devices for power transmission and distribution. A power semiconductor element is mounted on a power semiconductor module and incorporated in a power converter with one element or a configuration in which a plurality of elements are connected in parallel.

In recent years, in order to improve the performance of power converters, silicon carbide (SCI) devices, which have the features of low loss and high-speed operability, have been used as power semiconductor devices for power conversion. SiC devices have a wide bandgap and have a breakdown breakdown voltage that is about 10 times higher than that of Si. When the breakdown voltage is designed to be equal, the thickness of the channel semiconductor layer that serves as the current path can be made thinner than that of Si devices. Since it is possible, a very small on-resistance value at the time of conduction can be realized. Further, when compared with the same withstand voltage, the depletion layer width is as short as about 1/10 of that of the Si element, and high-speed switching of about 10 times is possible due to the effect of shortening the carrier traveling length.

Conventionally, as a technique for reducing the power loss in the power switching device during low temperature operation of the power switching device, in the gate voltage control / resistance switching circuit, the channel resistance of the transistor is based on the value detected by the channel resistance detection unit. The resistance value of is obtained, and the drive circuit is instructed to control the gate voltage of the power switching device based on the resistance value, or the turn-on resistance connected to the turn-on transistor and the turn-off resistance connected to the turn-off transistor. There was one that controlled to switch the resistance value of (see, for example, Patent Document 1).

Further, conventionally, as a drive circuit for reducing the temperature dependence of loss of a wide-gap semiconductor element, there is a drive circuit that detects the temperature of a power semiconductor switching element and changes the gate drive voltage or the gate drive resistance based on the detected value. (See, for example, Patent Document 2).

Further, conventionally, it has been shown as an experimental value that Vth tends to increase in the low temperature region with respect to the temperature dependence such as the threshold voltage Vth of the SiC-MOSFET that determines the temperature region dependence of the switching loss (for example). See Non-Patent Document 1).

Further, conventionally, the relationship between the gate plateau voltage VGP and the load current Iload, which is one of the characteristics of the power semiconductor element, has been formulated (see, for example, Non-Patent Document 2).

Japanese Unexamined Patent Publication No. 2016-52197

JP-A-2007-259576

F. Jiang et al., “Comparative study of temperature-dependent characteristics for SiC MOSFETs”, 2016 13th China International Forum on Solid State Lighting, pp.50-53

B. Jayant Baliga, “Fundamentals of Power Semiconductor Devices”, ISBN-10: 0387473130, pp.436-447

The power converter is required to have low power consumption from the viewpoint of energy saving, and a part of the power loss generated by the power converter is the power loss consumed by the power semiconductor module. This power loss is the sum of the resistance loss (conduction loss) that occurs in the flow path through which the steady current flows and the switching loss (switching loss) that occurs by multiplying the transient current and transient voltage during switching. Therefore, the power semiconductor module and the power semiconductor element mounted inside are required to have low power loss.

The temperature dependency of power loss MOSFET according to the SiC (M etal O xide S emiconductor F ield E ffect T ransistor) type power semiconductor device occurs when it is applied to the power converter, for example, in Patent Document 1 There is a description. Paragraph 0003 of Patent Document 1 states that it is important to have a control method in which the on-voltage increases as the temperature rises and therefore the temperature dependence of power loss is reduced. Further, Patent Document 1 describes that when the device temperature is lowered, the on-voltage is lowered with the temperature up to a certain temperature, but when the temperature is further lowered, the on-voltage is increased again. From the contents of Patent Document 1 described above, the temperature dependence of the power loss that occurs in the SiC-MOSFET type power semiconductor element is caused by the on-voltage, that is, the resistance loss that occurs in the flow path through which the steady current flows. It is clearly shown that the loss increases on the low temperature side and the high temperature side of the temperature region.

Patent Document 2 is a document for the purpose of providing a drive circuit for reducing the temperature dependence of loss of a wide-gap semiconductor element, and Patent Document 2 detects the temperature of a power semiconductor switching element and detects the detected temperature. It is described that when is higher than a predetermined temperature, the gate drive voltage is increased or the gate drive resistance is decreased. Further, Patent Document 2 describes that when the temperature of the element in the power module is high, the gate resistance can be reduced, di / dt and dv / dt can be increased in speed, and the loss of the power element can be reduced. Has been done. As a method for detecting the temperature of a semiconductor element, a method using a thermistor and a method using the temperature dependence of the current-voltage characteristic of a temperature detecting diode are disclosed. Therefore, Patent Document 2 describes an example of a method of reducing the element loss by reducing the switching loss when the element temperature becomes high.

From Patent Documents 1 and 2 described above, among the power losses of the SiC-MOSFET type power semiconductor element, 1) the conduction loss increases in the low temperature region and the high temperature region, and 2) when the element becomes high temperature. It can be said that a method of shortening the switching time by reducing the gate resistance and reducing the switching loss among the power losses to lower the temperature of the device has been conventionally known.

As described above, when a power semiconductor module equipped with a SiC-MOSFET type power semiconductor element is used in the power conversion device, there is a problem that both the switching loss and the conduction loss increase in the low element temperature region. When a plurality of power semiconductor modules are connected in parallel, the loss including the switching loss and the conduction loss is unevenly distributed among the plurality of modules due to the variation in the characteristics between the modules, and the loss is excessive in a specific power semiconductor module. When a current flows or a steep temperature rise occurs, the long-term operation reliability of the power semiconductor module may decrease.

As described above, the SiC-MOSFET type power semiconductor device has a temperature dependence of the resistance of the current path in the MOSFET, and when the device temperature region is roughly divided into three regions of low temperature, intermediate temperature, and high temperature, It shows the characteristics that the resistance value in the low temperature region and the high temperature region is high and the resistance value in the intermediate temperature region is low. When a SiC-MOSFET type power semiconductor element is used in a power semiconductor module, the characteristics of conduction loss (Econd) determined by the steady current and resistance have the tendency shown in the upper part of FIG. 8 from the low temperature region to the intermediate temperature region. The conduction loss decreases and increases again from the intermediate temperature region to the high temperature region. The switching loss (Esw) has a tendency with respect to the element temperature shown in the lower part of FIG. 8, and shows a tendency that the loss in the low temperature region increases as compared with the loss in the intermediate temperature region and the high temperature region. Switching losses dominate in applications to power converters with high switching frequency. The temperature region dependence of this switching loss is determined by the temperature dependence such as the threshold voltage Vth of the SiC-MOSFET. Regarding the temperature dependence of Vth, which is the controlling factor, Fig. Experimental values are disclosed in No. 2, and the tendency for Vth to increase in the low temperature region is clarified.

In the low temperature region, both the conduction loss Econd and the switching loss Esw tend to increase as shown in FIG. In this case, since the power loss increases when the power conversion device is started or in a low temperature environment, it is necessary to reduce the power loss even when the element temperature is in a low temperature region. Further, when a plurality of power semiconductor modules equipped with SiC-MOSFET type power semiconductor elements are used and these are connected in parallel to form the power conversion device, the conduction loss is caused by the variation in characteristics between the power semiconductor modules. The loss combined with the switching loss becomes non-uniform among the plurality of modules, and the element temperature of the plurality of power semiconductor elements mounted on the power semiconductor module becomes non-uniform. As a result, an overcurrent may flow in a specific power semiconductor module or a part of the power semiconductor elements connected in parallel inside the specific power semiconductor module, or a steep temperature fluctuation may occur. Therefore, the long-term operation of the power semiconductor module may occur. It may reduce reliability.

Prior arts for detecting the temperature of a SiC-MOSFET type power semiconductor element to change the voltage and resistance of a gate drive circuit are described in Patent Document 1 and Patent Document 2.

The circuit configuration shown in FIGS. 1, 2, and 5 of Patent Document 1 includes a channel resistance detection unit 18 or 18A that is different from the switching element that serves as the main current flow path of the power converter. It has been shown that the gate drive resistance value and the gate drive voltage are changed according to the detected value. In the circuit configuration described in Patent Document 1, it is necessary to additionally provide a voltage output terminal from the channel resistance detection unit in the power semiconductor module. Further, since a part of the area of the switching element of the main current is allocated to the channel resistance detection unit, there is a drawback that the area of the switching element is reduced.

Patent Document 2 describes an example of a thermistor and a temperature detecting diode as a method of detecting the temperature of an element. However, in these detection methods, since the detection element is installed at a position away from the power semiconductor element in order to secure the electrical insulation characteristics, there is a temperature difference from the power semiconductor element to be implemented, and the time response to temperature fluctuation is also different. .. Therefore, there is a possibility that the timing of the gate resistance change control described in Patent Document 2 is deviated and the resistance value change amount is excessive or insufficient. Further, in the switching operation for an inductive load using a SiC-MOSFET type power semiconductor element, the switching loss is small in the high temperature region as described above, and the voltage change rate (dv / dt) and the current change rate (di / dt) are small. Is higher than in the low temperature region. If the gate resistance is further reduced and the dv / dt and di / dt are increased, the intensity of the high-frequency spike noise generated in the switching transient waveform increases, and the value of the noise generated from the power converter increases. Problems arise.

Therefore, this was done in order to overcome the problems of the above-mentioned prior art, and the element temperature of the SiC-MOSFET type power semiconductor element mounted on the power semiconductor module is detected from the electrical characteristics of the element, and the detection result is obtained. Therefore, among the power losses generated in the low temperature region of the device, it is an issue to reduce the switching loss.

The present invention includes a plurality of means for solving the above problems. For example, the power conversion device of the present invention is a power conversion device including a plurality of power semiconductor modules and a plurality of gate drive circuits. The plurality of power semiconductor modules have the power semiconductor of the upper arm and the power semiconductor of the lower arm integrally in a common module or individually in separate modules, and the power of the upper arm. The semiconductor and the power semiconductor of the lower arm form a half-bridge circuit, the drain terminal of the power semiconductor of the upper arm is a high potential terminal, and the source terminal of the power semiconductor of the upper arm and the power semiconductor of the lower arm. The drain terminal is commonly connected to the intermediate potential terminal, the source terminal of the power semiconductor of the lower arm is a low potential terminal, and the gate terminal and source sense terminal of the power semiconductor of the upper arm and the power semiconductor of the lower arm are The gate drive circuit for the upper arm and the gate drive circuit for the lower arm are connected to each other via the gate wiring and the source sense wiring, respectively, and each of the plurality of gate drive circuits applies a gate drive voltage. The gate drive terminal to output, the source sense drive terminal to output the reference potential of the potential of the gate drive terminal, the first power supply terminal to which the high potential side potential constituting the gate drive voltage is applied, and the gate drive. A second power supply terminal to which a low potential side potential constituting a voltage is applied, a drive control signal terminal for controlling the gate drive voltage, a gate voltage threshold detection determination circuit, a first gate resistance switching circuit, and a second gate resistance switching circuit. Two or more gate resistance switching circuits including the gate resistance switching circuit of the above, a turn-on gate resistance connected to the first gate resistance switching circuit and having a resistance variable function, and the second gate. The gate voltage threshold detection determination circuit includes a turn-off gate resistor connected to a resistance switching circuit and having a resistance variable function, and the gate voltage threshold detection determination circuit is a first input terminal for inputting a gate voltage of the power semiconductor. And a second input terminal for inputting the source voltage of the power semiconductor, the second input terminal is connected to the source sense drive terminal, and the first power supply terminal of the gate drive circuit is connected. The first power supply terminal of the gate voltage threshold detection determination circuit and the second power supply terminal of the gate voltage threshold detection determination circuit are connected to the second power supply terminal of the gate drive circuit, respectively. To the drive control signal terminal The control reference signal terminal is connected, the first output terminal is connected to the control signal terminal of the first gate resistance switching circuit, and the second output terminal is connected to the control signal terminal of the second gate resistance switching circuit. The control signal of the first gate resistance switching circuit is based on the voltage between the input terminals, which is the potential difference between the first input terminal and the second input terminal, and the potential of the control reference signal terminal. It is characterized in that at least one of the terminal and the control signal terminal of the second gate resistance switching circuit is instructed to switch the value of the gate resistance.

According to the present invention, it is possible to suppress an increase in switching loss at a low temperature and reduce the loss of the entire power conversion device.

It is a circuit block diagram which shows the structure of Example 1 which is 1st Embodiment of the power conversion apparatus of this invention. It is a figure which shows the transient response waveform at the time of turn-on obtained from Example 1 of this invention. It is a figure which shows the transient response waveform at the time of turn-off obtained from Example 1 of this invention. It is a figure which shows the comparison of the transient response waveform obtained from Example 1 of this invention, and the transient response waveform obtained by using the conventional structure of the same element temperature. It is explanatory drawing which shows typically the influence by load current with respect to the effect of reducing the switching loss obtained by using the 1st to 3rd Examples of the power conversion apparatus of this invention. It is a circuit block diagram which shows the structure of Example 2 which is 2nd Embodiment of the power conversion apparatus of this invention. It is a figure which shows the structure of Example 3, which is the 3rd Embodiment of the power conversion device of this invention, which is one Example of the power conversion device which embodies the internal structure of the part of the gate voltage threshold voltage detection determination circuit. .. It is a graph which shows the element temperature dependence of the energy loss (conduction loss and switching loss) of the general power conversion apparatus which mounts the power semiconductor module which applied the SiC-MOSFET type power semiconductor element. It is explanatory drawing which shows the circuit form of the conventional power conversion apparatus which includes a power semiconductor module and a gate drive circuit. It is explanatory drawing which shows the transient response waveform at the time of turn-on of the power semiconductor module mounted on the conventional power conversion device. It is explanatory drawing which shows the temperature dependence of the transient response waveform at the time of turn-on of the power semiconductor module mounted on the conventional power conversion device. It is explanatory drawing which shows an example of the cause of the temperature dependence of the transient response waveform at the time of turn-off of the power semiconductor module mounted on the conventional power conversion device. It is explanatory drawing which shows the element temperature dependence of the voltage between the gate source sense terminal during the gate plateau period of the power semiconductor module mounted on the conventional power conversion apparatus.

The power conversion device of the present invention constitutes a half-bridge circuit using a power semiconductor module, and the gate drive circuit for driving the power semiconductor module includes a gate voltage threshold detection determination circuit, a gate resistance switching circuit, and a resistance variable function. It is equipped with a gate resistor. The gate voltage threshold detection determination circuit uses the gate-source sense terminal voltage of the power semiconductor module as an input signal and compares the gate-source sense terminal voltage levels with reference to the threshold voltage of the built-in gate voltage threshold generation circuit. The high and low of the element temperature of the SiC-MOSFET type power semiconductor element inside the power semiconductor module is determined, and if it is in the low temperature region, a switching signal is transmitted to the control signal terminal of the gate switching circuit to change and control the gate resistance value.

Hereinafter, examples of embodiments of the power conversion device of the present invention will be described with reference to the drawings as examples.

<< Example of overall circuit configuration >>
FIG. 1 shows the configuration of the power conversion device according to the first embodiment of the present invention. The power conversion device according to the present embodiment is an arbitrary natural number having a maximum number of parallel power semiconductor modules 1a-n and 1b-n (n is a plurality of power semiconductor modules connected in parallel to each other as a maximum value. ) And a power conversion device including a plurality of gate drive circuits 2a and 2b.

The plurality of power semiconductor modules include an upper arm power semiconductor 11 (upper power semiconductor 11 of the two power semiconductors 11 in the figure) and a lower arm power semiconductor 11 (lower side of the two power semiconductors 11 in the figure). The power semiconductor 11) of the above is integrally provided by a common module, or is individually provided by a separate module. That is, in FIG. 1, the power semiconductor 11 of the upper arm and the power semiconductor 11 of the lower arm are mounted on separate power semiconductor modules, that is, the upper power semiconductor module 11a-n and the lower power semiconductor module 11b, respectively. Although the form mounted on −n is shown, the present invention is not limited to this form, and for example, the power semiconductor 11 of the upper arm and the power semiconductor 11 of the lower arm are integrated into a power semiconductor module common to each other. The form (not shown) mounted on the device is also included in the scope of the present invention.

The power semiconductor 11 of the upper arm and the power semiconductor 11 of the lower arm form a half-bridge circuit. The drain terminal D1 of the power semiconductor 11 of the upper arm is a high potential terminal. The source terminal S1 of the power semiconductor of the upper arm and the drain terminal D2 of the power semiconductor of the lower arm are commonly connected to the intermediate potential terminal. The source terminal S2 of the power semiconductor of the lower arm is a low potential terminal.

The gate terminals G1 and G2 of the upper arm power semiconductor 11 and the lower arm power semiconductor 11 and the source sense terminals Ss1 and Ss2 are gate-driven for the upper arm via the gate wiring 41 and the source sense wiring 42, respectively. It is connected to the circuit 2a and the gate drive circuit 2b for the lower arm.

Each of the plurality of gate drive circuits 2a and 2b comprises a gate drive terminal G0 that outputs a gate drive voltage, a source sense drive terminal Ss0 that outputs a reference potential of the potential of the gate drive terminal G0, and a high gate drive voltage. The first power supply terminal GSH to which the potential side potential is applied, the second power supply terminal GSL to which the low potential side potential constituting the gate drive voltage is applied, and the drive control signal terminal SIG for controlling the gate drive voltage. Connected to a gate voltage threshold detection determination circuit 3, two or more gate resistance switching circuits including a first gate resistance switching circuit 28 and a second gate resistance switching circuit 29, and a first gate resistance switching circuit 28. It also includes a turn-on gate resistance 33 having a variable resistance function, and a turn-off gate resistance 34 connected to the second gate resistance switching circuit 29 and having a variable resistance function.

The gate voltage threshold detection determination circuit 3 has a first input terminal G0 for inputting the gate voltage of the power semiconductor 11 and a second input terminal Ss0 for inputting the source voltage of the power semiconductor 11. A second input terminal Ss0 is connected to the source sense drive terminal Ss0. The first power supply terminal GSH of the gate drive circuits 2a and 2b and the second power supply terminal GSL of the gate drive circuits 2a and 2b have the first power supply terminal GSH of the gate voltage threshold detection determination circuit 3 and the gate voltage threshold detection determination determination, respectively. The second power supply terminal GSL of the circuit 3 is connected. A control reference signal terminal SIG is connected to the drive control signal terminal SIG of the gate drive circuits 2a and 2b. A first output terminal CNT is connected to the control signal terminal of the first gate resistance switching circuit 28, and a second output terminal DTOFF is connected to the control signal terminal of the second gate resistance switching circuit 29. Based on the above connection relationship, the gate voltage threshold detection determination circuit 3 sets the voltage between the input terminals, which is the potential difference between the first input terminal G0 and the second input terminal Ss0, and the potential of the control reference signal terminal SIG. Based on this, at least one of the control signal terminal of the first gate resistance switching circuit 28 and the control signal terminal of the second gate resistance switching circuit 29, that is, the control signal terminal of the first gate resistance switching circuit 28 at the time of turn-on. At the time of dawn off, the control signal terminal of the second gate resistance switching circuit 29 is instructed to switch the value of the gate resistance.

In the power conversion device according to the present embodiment, in addition to the configuration of the conventional power conversion device shown in FIG. 9, the gate voltage threshold detection determination circuit 3, the first resistance changeover switch element 28, and the second are inside the gate drive circuit 2. The configuration includes the resistance changeover switch element 29, the gate drive resistance RgON2 (33), and the gate drive resistance RgOFF2 (34). The configuration of the conventional power conversion device shown in FIG. 9 will be described later.

In the configuration of the power conversion device according to the present embodiment, the switches of the resistance changeover switch elements 28 and 29 are opened and closed according to the voltage values output from the terminals CNT and CNTOFF of the gate voltage threshold detection determination circuit 3, and the gate drive resistance RgON2 The configuration is such that the resistance value of the gate drive resistor RgOFF2 can be switched between operating as a gate drive resistor and being short-circuited by a switch element and invalidated. In the case of turn-on switching, a gate drive resistor obtained by adding the values of the gate drive resistors RgON1 and RgON2 is generated in the path from the terminal GSH to which the gate drive voltage VGSH is applied to the gate drive circuit output terminal G0. Depending on the operation of the gate voltage threshold value detection determination circuit 3 described later, the resistance changeover switch element 28 is short-circuited, and the effective gate drive resistance value can be reduced from the sum of RgON1 + RgON2 to RgON1. Similarly, in the case of turn-off switching, a gate drive resistor that is the sum of the gate drive resistors RgOFF1 and RgOFF2 is generated in the path from the terminal GSL to which the gate drive voltage VGSL is applied to the gate drive circuit output terminal G0. By controlling the output signal of the gate voltage threshold detection determination circuit 3, the resistance changeover switch element 29 is short-circuited, and the effective gate drive resistance can be reduced from the sum of RgOFF1 + RgOFF2 to only the value of RgOFF1.

The gate voltage threshold detection determination circuit 3 receives the difference potential between the gate terminal G0 and the source sense terminal Ss0 as an input, performs a comparison determination with the determination threshold voltage VGPRg set in advance, and controls the turn-on gate drive resistance according to the determination result. The control signal CNTOFF of the signal CNT and the turn-off gate drive resistance is changed. Further, by monitoring the control signal SIG of the gate drive circuit 2 itself, it has a function of switching the output of the control signal into two states of enabling and disabling. Disabling the control signals CNT and CNT OFF prevents the gate voltage threshold value detection determination circuit 3 from malfunctioning when noise is added to the potential of the gate terminal G0 or during the period in which the OFF state is held.

<< Configuration of conventional circuit >>
FIG. 9 shows the configuration of a conventional power converter that forms the basis of the power converter according to the present embodiment. The main circuit of the power converter is composed of a power semiconductor module 1, a gate drive circuit 2, a power supply 51, and a load inductance 52 (Lload).

The power semiconductor module 1 is shown in a one-arm configuration, and a plurality of modules (1a-1 to 1a-3, 1b-1 to 1b-3) are connected in parallel to form a half bridge. The module 1a and the lower arm module 1b are connected in a longitudinal manner. The power supply 51 is connected between the drain terminal D1 of the upper arm module 1a and the source terminal S2 of the lower arm module 1b. The load inductance 52 may be equivalently connected to the S2 terminal of the lower arm module according to the inflow and outflow of the current, but in this specification, the case of connecting to the D1 terminal of the upper arm module is used. I will explain. A bus bar capable of passing a large current is used for the connection between the power semiconductor module, the power supply, and the load inductance, but the notation is omitted in FIG.

A gate drive circuit 2 is used to control the switching operation of the power semiconductor module 1. The upper arm gate drive circuit 2a has a power supply terminal GSH and GSL, a drive control signal terminal SIG, a gate drive terminal G0 and a source sense terminal Ss0, and is a power semiconductor module 1a via a gate wiring 41 and a source sense wiring 42. The gate terminal G1 and the source sense terminal Ss1 are connected. The lower arm gate drive circuit 2b is connected to the gate terminal G2 and the source sense terminal Ss2 of the power semiconductor module 1b via the gate wiring 41 and the source sense wiring 42.

A predetermined power supply voltage capable of operating the drive circuit 2 is applied between the power supply terminal GSH and the GSL terminal of the gate drive circuit 2. The switching operation is controlled by applying different control signals of the upper arm control signal Vsiga and the lower arm control signal Vsigb to the drive control signal terminal SIG.

The power semiconductor module 1 is composed of one or more SiC-MOSFET type power semiconductor elements 11 and one or more return diode elements 12. The drain of the power semiconductor element 11 is connected to the drain terminal D1, and the source of the power semiconductor element 11 is connected to the source terminal S1. When the current rating of the power semiconductor module exceeds the rating of the power semiconductor element 11 and the return diode element 12, a plurality of elements are used and connected in parallel.

The gate of the power semiconductor element 11 is connected to the gate terminal G1 (G2), and the source sense terminal Ss1 (Ss2) to which the gate drive voltage is applied in pairs with the G1 (G2) is the power semiconductor element 11. Connected to the source of.

The gate drive circuit 2 includes a voltage dividing circuit 21, a voltage dividing circuit 22, a voltage dividing capacitor 23 and a voltage dividing capacitor 24, a drive signal control circuit 25, a high potential side switch element 26 and a low potential side switch element 27, and a turn-on gate drive. It is composed of a resistor RgON1 (31) and a turn-off gate drive resistor RgOFF1 (32). The voltage dividing circuit 21, the voltage dividing circuit 22, the voltage dividing capacitor 23, and the voltage dividing capacitor 24 divide the voltage VGD applied between the power supply terminals GSH and GSL of the gate drive circuit 2 and divide the voltage VGD applied between the power supply terminals GSH and GSL to the source sense terminal Ss0. The potential VSs0 is determined. The drive signal control circuit 25 uses the control signal voltage VSIG input to the drive control signal terminal SIG as an input signal to drive the control terminals of the high potential side switch element 26 and the low potential side switch element 27. The turn-on gate drive resistor RgON1 (31), the turn-off gate drive resistor RgOFF1 (32), the switch element 26 and the switch element 27 are connected in series between the terminal GSH and the terminal GSL as shown in FIG. The node connecting the high potential side switch element 26 and the low potential side switch element 27 is designated as the gate drive terminal G0. When the high potential side switch element 26 is changed from off (release) to on (closed) by the drive signal control circuit 25 and the low potential side switch element 27 is changed from on to off, the terminal G0 is VGSL via the resistor RgOFF1. The state is changed from the state of being connected to VGSH to VGSH via the resistor RgON1, and the power semiconductor module is turned on. In the case of turn-off operation, the reverse control is performed, and when the high potential side switch element 26 changes from on to off and the low potential side switch element 27 changes from off to on, the terminal G0 is VGSH via the resistor RgON1. It changes from the state of being connected to VGSL to the state of being connected to VGSL via the resistor RgOFF1.

<< Transient waveform of conventional circuit >>
The operation of the transient waveform will be described with reference to FIG. The power semiconductor module 1a shows a transient response waveform when the power semiconductor module 1b is turned on while the power semiconductor module 1a is kept off. The items showing the waveform are the drive control signal Vsigb, the voltage Vgs2 between the gate and source sense terminals of the module 1b (voltage between the gate terminal G2 and the source sense terminal VSs2), the gate drive current Ig2 flowing into the terminal G2, and the above. The source main current Is2 flowing out from the source terminal S2, the drain terminal D2 of the module 1b, the source terminal S2, and the voltage Vds2 between the terminals.

At the trigger time t1 of Vsig, the potential changes from VL to VH, and at the time t2 after a certain delay time (td1), the high potential side potential VGSH inside the gate drive circuit 2 and the module source sense terminal voltage VSs2. In the meantime, a positive step voltage is applied from VGSL (eg -10V) to VGSH (eg + 15V).

The gate-source sense terminal voltage Vgs2 that determines the turn-on operation of the module makes a transient response with the CR time constant due to the input capacitance Ciss of the module and the turn-on drive resistor RgON1 generated in the gate drive path, and starts increasing toward VGSH.

The gate current Ig2 flowing in from the terminal G2 shows a transient response that the step voltage is applied to the series circuit of the Ciss and the RgON1, and decreases with the gate peak current Ig2peak as the maximum value.

At time t3, Vgs2 reaches the threshold voltage VTH of the SiC-MOSFET type power semiconductor element, and the current Is2 begins to flow between the drain and source terminals of the power semiconductor element.

At time t4, the value of Is2 reaches the load current value Iload. After that, in the period from time t4 to t5, the drain-source terminal voltage Vds2 drops from the power supply voltage Vcc to the on-voltage VON1 at the time of Iload flow while passing a constant Is2 (= Iload). In the period from t4 to t5, the gate-source sense terminal voltage Vgs2 tends to increase in response to the voltage decrease of Vds2. This tendency is due to the static characteristics of SiC-MOSFET type power semiconductor devices in which the gate-source sense voltage Vgs changes (increases) when Vds changes (decreases) under the condition that the main current Iload flows in constantly. This is to reflect. The value of the gate drive current Ig2 decreases from IGP1 to IGP2 in response to the change in Vgs2.

In the period from time t5 to t6, the changes of the main currents Is2 and Vds2 are almost completed, but Vgs2 changes so as to reach the input step response voltage value (VDSH), and Ig2 corresponds to this. The value of is asymptotic to the zero current value, the on-resistance decreases as the Vgs2 value increases, and the on-voltage changes to VON2, which is a steady-state VON lower than VON1. The above is the operation of the switching transient response at the time of turn-on.

An object of the present invention is to reduce switching loss in a region where the device temperature is low. The switching loss is determined according to the turn-on loss EonI determined according to the rate of change dIs2 / dt of the source current during the (t4-t3) period in FIG. 10 and the rate of change dVds2 / dt of the source current during the period (t5-t4). It is the sum of the turn-on loss EonV.

<< Temperature dependence of transient waveform of conventional circuit >>
FIG. 11 schematically shows the dependence of the switch-on switching transient response of a SiC-MOSFET type power semiconductor device on the device temperature. An example of the waveform when the element temperature is high temperature (solid line: for example 150 ° C.) and low temperature (dotted line: for example -50 ° C.) is shown.

In the transient response of the gate-source sense terminal voltage Vgs2, the threshold voltage VTH becomes higher as the temperature is lower (LT), so that the outflow timing t3 _LT of the source terminal current Is2 is delayed as compared with the case of high temperature (HT). The potential of Vgs2 at the timing t4 when Is2 reaches the steady-state value Iload and Vds2 begins to decrease is referred to as the gate plateau start potential (VGP1). As the element temperature decreases, VTH increases _{and has a relationship of VTH LT} > VTH _HT , while VGP1 also increases at a low temperature, and a relationship of _{VGP1 LT} > VGP1 _{HT occurs.} As described above, in Non-Patent Document 2, the relationship between the gate plateau voltage VGP1 and the load current Iload, which is one of the characteristics of the power semiconductor element, is formulated, and VGP1 ≈ VTH + Iload / between VGP1 and Iload. It has been clarified that it has a relationship of gm. From this equation, the differential voltage of VGP-VTH is determined by the current Iload and the transconductance gm. When Iload is set to a predetermined value and the temperature dependence of gm is small, the difference voltage of VGP-VTH is substantially constant regardless of the temperature. Therefore, it can be said that the difference voltage (VGP1 _LT- VTH _LT ) and (VGP1 _HT- VTH _HT ) are equivalent, and the difference in transient time between _{(t4 LT-} t3 _LT ) and (t4 _HT- t3 _{HT) is small.} The transient response from time t3 to t4 is a time constant determined by the product of the turn-on resistor RgON1 and the input capacitance Ciss of the element, and the temperature dependence of the time constant is small, and the temperature dependence of the above-mentioned difference voltage value is also small. is there. The period of (t4-t3) is the period of change (increase) of the source current, that is, the value of dIs2 / dt has a small temperature dependence. Therefore, it can be said that the value of EonI, which is mainly due to dIs2 / dt, among the turn-on switching loss Eon, has little dependence on the element temperature.

Next, the temperature dependence of the turn-on switching loss Eon in which dVds2 / dt is the main factor (t5-t4) is examined. After Vgs2 reaches VGP1 (t4), it changes to VGP2 (t5), during which time Vds2 decreases from Vcc to the on-voltage VON1. The length of this period (t5-t4) is determined by the feedback capacitance Cgd of the SiC-MOSFET type power semiconductor element and its charging current Ig2. Since the temperature dependence of Cgd is negligible, the temperature dependence of Ig2 becomes dominant. Ig2 is linked to the Vgs waveform in FIG. 11 _{, and from the relationship of VGP1 LT} > VGP1 _HT , the VRg applied to the gate resistor RgON1 at the time of turn-on determined by the difference voltage between VGP and VGSH is VRg _LT <VRg _HT. It becomes the relationship of. _{Since the gate current Ig2 has a relationship of Ig LT} <Ig _HT due to the temperature dependence of VRg, the period for charging Cgd having no temperature dependence, that is, (t5-t4) is (t5 _{HT -t4 HT} ) <( It is shown in FIG. 11 that the relationship is t5 _{LT −} t4 _LT). Further, in a low temperature region is remarkable increase in the Vgs2 of the period from VGP1 _LT to VGP2 _LT, more _{VRg LT} have smaller tendency against _{VRg HT.} From the above examination, in the turn-on waveform at low temperature, the potentials of VGP1 and VGP2 fluctuate to a high potential, the value of the gate current Ig decreases, and the change period during which Vds2 decreases becomes longer than at high temperature. It is clear that the value of EonV determined by dVds2 / dt increases in the turn-on switching loss Eon.

Here, the values of VGP1 and VGP2 are arranged. When a power semiconductor module using a SiC-MOSFET type power element performs a switching operation with respect to an inductive load, the predetermined load current is set to Iload, and the threshold including the element temperature (T) dependence of the power semiconductor module is set to VTH. (T), the mutual conductance of the power semiconductor module when the voltage between the drain terminal and the source terminal of the power semiconductor module is on voltage is gm (VON), and the gate plateau voltage VGP2 is
VGP2 ≒ VTH (T) + Iload / gm (VON)
Can be estimated.

Further, when the transconductance when the voltage between the drain terminal and the source terminal of the power semiconductor module is the power supply voltage (Vcc) is gm (Vcc), the gate plateau voltage VGP1 is
VGP1 = VTH (T) + Iload / gm (Vcc)
Can be estimated.
Since gm (VON) <gm (Vcc), when the element temperature is constant,
The relationship VGP1 <VGP2 occurs, causing the transient response of the gate plateau voltage shown in FIGS. 10 and 11.

From the explanation of the transient response at the time of turn-on using FIGS. 10 and 11 above, it is clear that the switching loss increases in the low temperature region due to the element temperature dependence of the SiC-MOSFET type power semiconductor element. A similar problem occurs at turn-off.

FIG. 12 schematically shows the dependence of the SiC-MOSFET type power semiconductor device on the switching transient response at turn-off with respect to the device temperature. An example of the waveform when the element temperature is high temperature (solid line: for example 150 ° C.) and low temperature (dotted line: for example -50 ° C.) is shown.

In the transient response of the gate-source sense terminal voltage Vgs2, first, at time t2, Vgs2 decreases from the positive drive voltage VGSH toward VGSL. The time constant is a CR time constant determined by the product of the gate resistance RgOFF1 and the input capacitance Ciss of the power semiconductor element.

At time t3, the source current Is2 remains constant, Vgs2 decreases to the value of the gate plateau voltage VGP2, and Vds2 begins to increase from the potential of VON2. The value of VGP2 differs depending on the temperature of the element, and there is a relationship of _{(VGP2 LT} > VGP2 _{HT) between the high temperature (HT) and the low temperature (LT).} This is because the temperature dependence of VGP2 has a relationship of VGP2≈VTH + Iload / gm as described above, and the VTH term that decreases with increasing temperature is dominant.

During the period from time t3 to t4, the gate current Ig2 becomes the charging current in order to increase the applied voltage of the feedback capacitance Cgd of the SiC-MOSFET type power semiconductor element. As Vds2 increases, Vgs2, that is, the gate plateau voltage also decreases, and fluctuates from VGP2 (time t3) to VGP1 (time t4). The voltage fluctuation from VGP2 to VGP1 is determined by the static characteristics (Id2-Vds2 characteristics) of the SiC-MOSFET type power semiconductor element. Under the condition that the current Is2 is constant, the rate of change of Vgs2 with respect to Vds2 is different, and the lower the temperature, the larger the rate of change. Therefore, in the gate plateau voltage region, the gate current Ig2 causes not only the feedback capacitance Cgd but also the change of Vgs2 from VGP2 to VGP1, so that the gate-source input capacitance of the SiC-MOSFET type power semiconductor element. It also becomes a charging current for Cgs. Therefore, Ig2 is divided into a Cgd charging current and a Cgs charging current at the gate terminal of the SiC-MOSFET type power semiconductor element, and the charging current to the Cgd that increases Vds2 is reduced. In particular, in a region where the element temperature is low, the fluctuation of Vgs2 from VGP2 to VGP1 is large, so that the effective gate current value for charging Cgd during that period is the gate through which the gate terminal G2 of the power semiconductor module 1 passes. It decreases with respect to the current Ig2, and the Cgs charging time (time t4-t3) becomes long.

Time t5 is the time when the source current Is2 decreases from the value of Iload and decreases to zero current. During this period (t4 to t5), Vgs2 decreases from VGP1 to VTH. The time required for the decrease is determined by the time constant of Vgs2 and is determined by the gate resistance RgOFF1 and the Cgs of the SiC-MOSFET type power semiconductor element, so that the dependence on the element temperature is small. Therefore, the Eoff generation period in which dIs2 / dt is the main factor, that is, the EoffI generated in the period (t4 to t5) has little dependence on the element temperature. From the above description, the switching loss during the turn-off operation of the SiC-MOSFET type power semiconductor device is dependent on the device temperature due to the loss EoffV in the voltage change period mainly due to dVds2 / dt, and increases in the low temperature region. On the other hand, it can be said that the loss EoffI during the current change period, which is mainly due to dIs2 / dt, has little dependence on the element temperature.

As shown in the object of the present invention, it is important to reduce the switching loss generated in the SiC-MOSFET type power semiconductor device in the low temperature region. In particular, in the switching operation, the element temperature dependence of the switching loss (EonV and EoffV) that occurs during the change period of the main voltage (Vds) is large, and it is necessary to reduce it in the low temperature region.

FIG. 13 shows the Vds voltage dependence of the gate plateau period at the time of turn-on of the gate-source voltage Vgs of the SiC-MOSFET type power element. The characteristics of Vgs during the gate plateau period are schematically shown in the range from the VON1 voltage to the power supply voltage Vcc with the Vds voltage as the horizontal axis. Here, VGP1 indicates the potential on the low potential side (starting voltage at turn-on) of Vgs during the gate plateau period when the element temperature is the same, and VGP2 indicates Vgs during the gate plateau period when the element temperature is the same. Indicates the potential on the high potential side (end voltage at turn-on). The lower the element temperature, the higher the Vgs potential during the gate plateau period. As described above, the temperature dependence of the switching loss that occurs during the change period of the main voltage (Vds) in the switching operation at the time of turn-on is the value of the gate current Ig depending on the magnitude of the potentials of VGP1 to VGP2 in FIG. Is fluctuated, and the value of Ig, which is the charging current, fluctuates (decreases) in the low temperature region.

<< Setting range of determination threshold VGPRg according to the present embodiment of the present invention >>
Therefore, in the present invention, it is determined whether or not the element temperature is in the low temperature region, and if it is in the low temperature region, the increase in switching loss is suppressed by increasing the gate current Ig. As a means for realizing this, it will be described below that the element temperature is determined based on the voltage value during the gate plateau period, and the gate resistance that can be changed in order to increase the gate current Ig is controlled (the resistance value is reduced). It becomes a reference value of the voltage value during the gate plateau period, and the value of the determination threshold value (VGPRg) of Vgs for controlling the gate resistance is set in the range shown in FIG. 13 as an example. Especially in the low temperature region (LT) where the switching loss is reduced, the judgment threshold VGPRg is set near the gate plateau start voltage VGP1LT so that the gate resistance is reduced during most of the gate plateau period, and at the same time. At the intermediate temperature (MT) where the switching loss is small, the end voltage of the gate plateau period is set near VGP2MT so that the change to the switching loss due to the reduction of the gate resistance is small.

<< Effect of this embodiment >>
According to this embodiment, the switching loss in the low temperature region can be reduced with respect to the intermediate temperature region by the above setting. In the high temperature region where the switching loss is small, the gate resistance is reduced after the switching operation is completed, so that the switching loss remains a small value without fluctuation. Depending on the specifications required by the power converter for the power semiconductor module, it may be necessary to significantly reduce the switching loss even in the intermediate temperature region. Therefore, the set value of the Vgs determination threshold voltage (VGPRg) is shown in the figure. Although not limited to the range shown in 13, if the low temperature side temperature of the temperature region in which the switching loss is desired is referred to as LT and the high temperature side is referred to as MT, the value of VGPRg is set between _{VGP1 MT} and VGP2 _LT. It is necessary to.

<< An example of an overall circuit configuration that reduces high-frequency noise components >>
FIG. 6 shows the overall circuit configuration of the second embodiment of the present invention. This example is a modification of Example 1. In this embodiment, the power semiconductor modules 1c and 1d constituting the upper and lower arms are connected to the gate terminal G1 (G2) and the gate sense terminal Gs1 (Gs2) of the power semiconductor module from the gate of the SiC-MOSFET type power element mounted inside. ) Is branched into two. The terminal Gs1 is connected to the gate sense terminal Gs1 from the gate of the power element via the high resistance Rgs1 (Rgs2), and the Gs1 terminal is connected to the source sense terminal Ss1 (Ss2) terminal via a capacitance. The present embodiment is different from the first embodiment in the above points, but is common to the first embodiment in other points. Here, the CR time constant determined by Rgs1 and Cgs1 applies the transient response of the gate / source sense terminal Vgs described with reference to FIGS. 11 and 12 while reducing high-frequency noise during switching to the terminal Gs1 (Gs2). Adjust so that the CR constant is transmitted between the terminal Ss1 (Ss2) and the terminal Ss1 (Ss2).

The gate drive circuits 2c and 2d include terminals of a gate terminal G0, a gate sense terminal Gs0, and a source sense terminal Ss0. The gate terminals G1 (G2) of the power semiconductor modules 1c and 1d are connected to the gate terminals G0 of the gate drive circuits 2c and 2d via the gate wiring 41. The gate sense terminals Gs1 (Gs2) of the power semiconductor modules 1c and 1d are connected to the gate sense terminals Gs0 of the gate drive circuits 2c and 2d via the gate wiring 43. Similarly, the gate sense terminals Ss1 (Ss2) of the power semiconductor modules 1c and 1d are connected to the source sense terminals Ss0 of the gate drive circuits 2c and 2d via the gate wiring 42.

<< Effect of this embodiment >>
According to this embodiment, by using the power semiconductor modules 1c and 1d shown in FIG. 6 and the gate drive circuits 2c and 2d, the gate voltage threshold detection determination circuit is used for the configuration of the first embodiment shown in FIG. It is possible to reduce the high frequency noise component of the Vgs waveform input to. Along with this, the effect of reducing the number of false detections of the threshold value determination based on the difference potential between the gate terminal G0 and the source sense terminal Ss0 of the gate voltage threshold value detection determination circuit built in the gate drive circuits 2c and 2d can be obtained. ..

<< An example that embodies the configuration and function of the gate voltage threshold detection judgment circuit >>
FIG. 7 shows a partial circuit configuration of a third embodiment of the present invention. This embodiment is an example embodying the internal circuit configuration of the gate voltage threshold value detection determination circuit 3 of the first or second embodiment, and is therefore a modification of the first or second embodiment. It differs from Example 1 and Example 2 in that the internal circuit configuration of the gate voltage threshold value detection determination circuit 3 is embodied, but is common to Example 1 or Example 2 in other points. The gate voltage threshold detection determination circuit 3 is composed of two circuits, a detection determination circuit 3a that outputs a control signal CNT of the turn-on gate drive resistance and a detection determination circuit 3b that outputs a control signal CNT OFF of the turn-off gate drive resistance. The configuration will be described by taking the threshold value detection determination circuit 3a as an example. The gate threshold generation circuit 101 operates using VGSH and VGSL as the power supply voltage, and outputs a preset detection threshold voltage VGPRgON of the VGS value at the time of turn-on. The amplifier 103 amplifies the difference voltage between the voltage of the gate terminal G0 and VGPRgON, and the Schmitt trigger type comparator 104 determines the magnitude of the output voltage of the amplifier 103 based on the comparison voltage VCOMP output by the comparison voltage generation circuit 105. , A binary high and low voltage signal is generated as the output voltage of the control signal CNT. This voltage signal becomes a control signal for the resistance changeover switch elements 28 and 29 shown in FIGS. 1 and 6. For example, the resistance changeover switch elements 28 and 29 are released at a low potential and short-circuited at a high potential. To realize. The amplifier control power supply 106 refers to the control signal SIG of the gate drive circuit 2 itself, and only when the power semiconductor module referencing the gate voltage is in the switching period and the turn-on operation is instructed. The power supply voltage supplied to the comparator 104 is output at a predetermined value, and the output of the comparator 104 can output, for example, a high potential signal, and is controlled so that the state of the resistance changeover switch element can be changed. On the other hand, unless the power semiconductor module that refers to the gate voltage is in the switching period and the turn-on operation is instructed, the power supply voltage to the comparator 104 is output at a value lower than the predetermined voltage. The output of the comparator 104 does not depend on the input potential of the comparator 104, for example, only a low potential signal is output to make the state of the resistance changeover switch element invariant, and the power supply terminal of the gate voltage threshold detection determination circuit 3 or the gate drive circuit 2 is used. It functions to suppress the output of the control signal that causes a malfunction even when the potential of is fluctuated due to noise or the like.

Similar to the threshold detection determination circuit 3a, the threshold detection determination circuit 3b amplifies the difference voltage between the voltage of the gate terminal G0 and the VGPRgOFF based on the threshold voltage VGPRgOFF output by the gate threshold generation circuit 102, and is a Schmitt trigger type. The comparator 104 determines the magnitude of the output voltage of the amplifier 103 based on the comparison voltage VCOMP output by the comparison voltage generation circuit 105, and generates a binary high / low voltage signal which is the output voltage of the control signal CNTOFF.

By configuring the gate voltage threshold value detection determination circuit 3 shown in this embodiment, the value of the gate resistance at turn-on (RgON1 + RgON2 or RgON1) and the value of the gate resistance at turn-off (RgOFF1 + RgOFF2 or RgOFF1) are independently controlled. The operation described in Examples 1 and 2 can be realized while maintaining high noise immunity.

<< Example of transient waveform when the present invention is applied >>
The transient response during the switching operation of the circuit of the present invention shown in Examples 1 to 3 is schematically shown in FIG. This is an example of turning-on driving the power semiconductor module 1b of the lower arm of the first embodiment (FIG. 1). The gate-source sense terminal voltage Vgs2 rises at time t2 in the same manner as the transient response operation (FIG. 11) of the conventional circuit shown in FIG. At this time, when the element temperature of the power semiconductor module is low temperature (LT), the waveform is shown by the dotted line, and when the element temperature is intermediate temperature (MT), the waveform is shown by the solid line. According to the temperature dependence of the gate plateau voltage of the SiC-MOSFET type power semiconductor element mounted on the power semiconductor module illustrated in FIG. 13, the gate plateau potential is higher in the low temperature region than in the intermediate temperature region. The gate plateau period itself becomes longer. This is because, as described above, in the low temperature region, the difference voltage between the high potential VGSH of the gate drive circuit and Vgs2 during the gate plateau period decreases, and the value of the gate current Ig2 decreases. By adopting the circuit configurations shown in Examples 1 to 3, the value of the gate voltage determination threshold VGPRgON shown in FIG. 2 can be set. As described in the explanation of FIG. 13, the setting range of the determination threshold value VGPRgON is a potential higher than the gate plateau voltage VGP1MT at the intermediate temperature and up to the maximum voltage VGP2LT of Vgs2 during the gate plateau period at the low temperature. Set the value of VGPRgON in the range of. At time t3 _MT and t3 _LT , Vgs2 exceeds the threshold value VTH of the SiC-MOSFET type power element, and the source current Is2 begins to flow. Assuming that Vgs2 at time t4 when the source current increases to the same value as the load current Iload is the gate plateau start voltage VGP1, the value of VGP1 _{MT at the intermediate temperature is VGP1 MT} <VGP1 _{LT with respect to VGP1 LT at low temperature.} There is a big and small relationship. In the process of increasing Vgs2 from VGP1 to the gate plateau end voltage VGP2, in the present invention, the preset determination threshold value VGPRgON is reached (time tx _LT and tx _MT ), and control is performed to reduce the gate resistance value. As shown in the transient response waveform of RgON @ LT in FIG. 2, the resistance value is reduced from the resistance value of RgON1 + RgON2 to only RgON1 at time txLT. Note that the gate resistance value change control causes a delay time associated with the circuit operation described in Examples 1 to 3, but the delay time is smaller than that of the switching operation of the present invention, and thus is omitted from the description. ..

<< Effect of this embodiment >>
According to this embodiment, the gate current Ig2 increases due to the change in the value of RgON at the _{time tx LT} , and the rate of change dVds2 @ LT / dt of Vds2, which decreases from _{the time t4 LT, becomes a steeper rate dVds2.} It changes to'@ LT / dt. By this action, the time required for turn-on switching can be shortened even in the low temperature region, and the value of the switching loss Eon at the time of turn-on can be reduced. The effect of the present invention at low temperature has been described above, but in the case of the intermediate temperature shown by the solid line in FIG. 2, the change timing at which the gate resistance decreases at the intermediate temperature is determined by setting the determination threshold voltage VGPRgON. Time tx _MT . Since the time tx _{MT is after the change time t5 MT} of Vds2 at the intermediate temperature has elapsed, the time when the gate resistance is reduced is outside the period in which the switching loss occurs. Therefore, at the intermediate temperature, the switching loss can be maintained at the same characteristics as the conventional circuit. In Vds2 in FIG. 2, it is an effect in Example 1 that the slope of the Vds2 voltage drop changes steeply at _{the time tx LT.} In the second embodiment, when the gate resistance control is performed based on Vgs2, when high frequency noise is superimposed on the transient waveform of Vgs2, the number of malfunctions in the gate resistance control is calculated with respect to the circuit configuration of the first embodiment. The effect is that it can be reduced.

Similar to the turn-on operation, in the turn-off operation shown in FIG. 3, the configurations shown in the first to third embodiments have the effect of reducing the switching loss when the element temperature is low. In the case of turn-off, the value of the detection threshold voltage VGPRgOFF set in the internal circuit of the gate voltage threshold detection determination circuit 3 shown in the third embodiment is set to a voltage _{higher than the gate plateau voltage VGP1 MT} at the intermediate temperature, and at a low temperature. The effect of the present invention can be obtained by setting the voltage lower than that of VGP2 _LT. Due to the VGPRgOFF set in the above range, the gate plateau voltage at low temperature becomes VGPRgOFF or less when the drain / source voltage Vds2 is increasing, the gate voltage threshold value detection determination circuit 3 operates, and the gate at turn-on. The drive resistance is reduced from (RgOFF1 + RgOFF2) to RgOFF1. By reducing the gate drive resistance, the absolute value of the gate drive current Ig2 is increased, and the charging time of the feedback capacitance Cgd of the SiC-MOSFET type power semiconductor element mounted on the power semiconductor module is shortened. Therefore, the time required for the turn-off operation at a low temperature is shortened, and the value of the switching loss Off at the time of turn-off can be reduced by shortening the rise time of the voltage Vds2 in particular.

Similar to the explanation of the effect of the present invention at the time of turn-on, the effect of the present invention on the switching at the time of turn-off at a low temperature is described above, but in the case of the intermediate temperature shown by the solid line in FIG. It shows the case where the gate resistance decreases during the switching period even at the intermediate temperature by setting the threshold voltage VGPRgOFF. The change timing of the gate resistance at the intermediate temperature is the time tx _MT . Since the time tx _{MT is before the change end time t4 MT} of Vds2 at the intermediate temperature, the gate resistance can be reduced and the switching loss can be reduced. By making it possible to set the values of VGPRgON and VGPRgOFF individually, the element temperature at which the effect of reducing the switching loss is obtained can be set separately at the time of turn-on and at the time of turn-off. Also in Vds2 in FIG. 3, the effect of Example 1 is that the slope of the Vds2 voltage drop changes from dVds2 @ LT / dt to a steeper rate of change dVds2'@ LT / dt steepness at _{time tx LT.} Is. Similar to the turn-on time, in the second embodiment, when the gate resistance control is performed based on Vgs2, when high frequency noise is superimposed on the transient waveform of Vgs2, the gate resistance control is performed with respect to the circuit configuration of the first embodiment. It is an effect that the number of malfunctions in the above can be reduced.

Here, using the transient waveform at turn-on (FIG. 4), the conventional operation and the operation when the present invention is applied are compared with respect to the same element temperature. As shown in FIG. 4, by applying the present invention, the absolute value of the gate drive current Ig2 is increased after the time txLT, and the feedback capacitance Cgd of the SiC-MOSFET type power semiconductor element mounted on the power semiconductor module is charged. Time is shortened. The time required for the turn-on operation is shortened, and in particular, the value of the switching loss Eon at the time of turn-on can be reduced by shortening the drop time of the voltage Vds2.

<< An example of determining the gate plateau voltage according to the load current value >>
FIG. 5 shows the relationship between the effect of the present invention and the load current value Iload according to the fourth embodiment of the present invention. The description of the present invention described in Examples 1 to 3 is based on the premise of a constant load current Iload. In an actual power conversion device, the value of the load current changes depending on the load inductance and the control command of the power semiconductor module that drives the load inductance. The dependency between the element temperature and the switching loss is schematically shown with the load current Iload as a parameter.

As described above, in Non-Patent Document 2, the relationship between the gate plateau voltage VGP and the load current Iload, which is one of the characteristics of the power semiconductor element, is formulated, and the relationship between the VGP and the Iload is VGP≈VTH + Iload /. It has been clarified that it has a relationship of gm. That is, if the threshold voltage VTH of the SiC-MOSFET type power element and the transconductance gm are constant, the value of the gate plateau voltage VGP increases or decreases in proportion to the load current Iload. Here, the switching loss itself also depends on the magnitude of the load current Iload, and the larger the Iload, the greater the switching loss Esw.

In the fourth embodiment of the present invention, the value of the determination threshold voltage VGPRg of Vgs is determined based on both the load current Iload and the element temperature. FIG. 5 shows that when the element temperature is the intermediate temperature (TMT), the value of VGPRg is determined under the condition of the load current Iload1.

<< Effect of this embodiment >>
According to the present embodiment, if the load current is Iload 1, the effects of the present invention described in Examples 1 to 3 can be obtained in a region where the element temperature is lower than TMT by the above setting. Even in the case of the load current Iload2 smaller than Iload1, the effect of the present invention can be obtained if the load current is lower than TMT2. The result of reducing Esw by the effect is shown by a dotted line in FIG. When the load current is a large current indicated by Iload 1, the switching loss is reduced from EswLT1 to EswLT1'in the region from the intermediate temperature TMT1 to the low temperature. Even in the case of Iload2 smaller than Iload1, the switching loss can be reduced at a lower temperature than the low temperature TMT2 (here, TMT2 <TMT1), and the switching loss is reduced to EswLT2'.

As described above, it is possible to reduce the power loss of the power conversion device by setting the effect of reducing the switching loss based on the fluctuation of the VGP voltage due to the load current.

Further, in Examples 1 to 4, the present invention has an effect in the turn-off operation as well as in the turn-on operation, and the switching loss is reduced even when the present invention is applied only in the case of the turn-on operation or only in the case of the turn-off operation. The effect of is obtained.

Further, the above setting value of the detection threshold voltage VGPRg has described a setting example that is particularly effective in reducing the switching loss at a low temperature, and when it is desired to reduce the switching loss in a wide range such as a low temperature to an intermediate temperature. A reduction in switching loss can be obtained by appropriately adjusting and setting the value of VGPRg.

1a, 1b: Power semiconductor module 1c, 1d: Power semiconductor module with gate sense terminal 2a, 2b: Gate drive circuit 2c, 2d: Gate drive circuit that can be connected to a power semiconductor module with gate sense terminal 3: Gate Voltage threshold detection judgment circuit 31-34: Gate drive resistance 41, 42: Gate wiring 51: Power supply 52: Load inductance 101, 102: Gate threshold generation circuit 103: Amplifier 104: Schmitt trigger type comparator 105: Comparative potential generation circuit 106: Amplifier control power supply

Claims (12)

A power conversion device including a plurality of power semiconductor modules and a plurality of gate drive circuits.
The plurality of power semiconductor modules have the power semiconductor of the upper arm and the power semiconductor of the lower arm integrally in a common module or individually in separate modules.
The power semiconductor of the upper arm and the power semiconductor of the lower arm form a half-bridge circuit, the drain terminal of the power semiconductor of the upper arm is a high potential terminal, and the source terminal of the power semiconductor of the upper arm and the lower arm. The drain terminal of the power semiconductor of the arm is commonly connected to the intermediate potential terminal, and the source terminal of the power semiconductor of the lower arm is a low potential terminal.
The gate terminal and the source sense terminal of the power semiconductor of the upper arm and the power semiconductor of the lower arm are the gate drive circuit for the upper arm and the gate for the lower arm via the gate wiring and the source sense wiring, respectively. Connected to the drive circuit and
Each of the plurality of gate drive circuits
The gate drive terminal that outputs the gate drive voltage and
A source sense drive terminal that outputs a reference potential of the potential of the gate drive terminal, and
The first power supply terminal to which the high potential side potential constituting the gate drive voltage is applied, and
A second power supply terminal to which the low potential side potential constituting the gate drive voltage is applied, and
The drive control signal terminal that controls the gate drive voltage and
Gate voltage threshold detection judgment circuit and
Two or more gate resistance switching circuits including a first gate resistance switching circuit and a second gate resistance switching circuit, and
A turn-on gate resistor connected to the first gate resistance switching circuit and having a variable resistance function,
It is connected to the second gate resistance switching circuit and has a turn-off gate resistance having a variable resistance function.
The gate voltage threshold value detection determination circuit is
It has a first input terminal for inputting the gate voltage of the power semiconductor and a second input terminal for inputting the source voltage of the power semiconductor.
The second input terminal is connected to the source sense drive terminal,
The first power supply terminal of the gate drive circuit and the second power supply terminal of the gate drive circuit have a first power supply terminal of the gate voltage threshold detection determination circuit and a second power supply terminal of the gate voltage threshold detection determination circuit, respectively. The power terminal is connected,
A control reference signal terminal is connected to the drive control signal terminal of the gate drive circuit, and the control reference signal terminal is connected.
The first output terminal is connected to the control signal terminal of the first gate resistance switching circuit, and the first output terminal is connected.
A second output terminal is connected to the control signal terminal of the second gate resistance switching circuit, and the second output terminal is connected.
Based on the voltage between the input terminals, which is the potential difference between the first input terminal and the second input terminal, and the potential of the control reference signal terminal, the control signal terminal of the first gate resistance switching circuit and A power conversion device characterized in that a switching instruction for a gate resistance value is given to at least one of the control signal terminals of the second gate resistance switching circuit. In the power conversion device according to claim 1,
A power conversion device characterized in that the first input terminal of the gate voltage threshold value detection determination circuit is connected to the gate drive terminal. In the power conversion device according to claim 2,
At least one of the power semiconductors is a SiC-MOSFET type power semiconductor element.
The drain of the SiC-MOSFET type power semiconductor element connected in parallel of one or more is used as the drain terminal of the power semiconductor module.
A power conversion device characterized in that the source of the SiC-MOSFET type power semiconductor element is a source terminal and a source sense terminal of the power semiconductor module. In the power conversion device according to claim 1,
Each of the plurality of gate drive circuits further includes a gate voltage sense terminal for detecting the gate voltage of the power semiconductor module.
A power conversion device characterized in that the first input terminal of the gate voltage threshold detection determination circuit is connected to the gate voltage sense terminal. In the power conversion device according to claim 4,
At least one of the power semiconductors is a SiC-MOSFET type power semiconductor element.
The drain of the SiC-MOSFET type power semiconductor element connected in parallel of one or more is used as the drain terminal of the power semiconductor module.
The source of the SiC-MOSFET type power semiconductor element is a source terminal and a source sense terminal of the power semiconductor module.
The gate of the SiC-MOSFET type power semiconductor element is used as a gate drive terminal of the power semiconductor module.
The gate is connected to the first terminal of the first resistor, the second terminal of the first resistor is connected to the first terminal of the first capacitance, and the second terminal of the first capacitance is connected. Is connected to the source sense terminal or the source terminal, and the second terminal of the first resistor serves as a gate sense terminal of the power semiconductor module. In the power conversion device according to claim 1,
The gate voltage threshold value detection determination circuit is
A first threshold voltage detection determination circuit having a first gate voltage threshold generation circuit, a first gate voltage detection circuit, a first gate voltage determination circuit, and a first gate voltage detection circuit control power supply.
Includes a second gate voltage threshold generation circuit, a second gate voltage detection circuit, a second gate voltage determination circuit, and a second threshold detection determination circuit having a second gate voltage detection circuit control power supply. Consists of
The first gate voltage detection circuit has a first input terminal of the gate voltage threshold detection determination circuit and a preset first input terminal based on the potential of the second input terminal of the gate voltage threshold detection determination circuit. The potential difference obtained by amplifying the potential difference between the element temperature determination threshold and the output terminal of the first gate voltage threshold generation circuit is output to the output terminal.
The first gate voltage determination circuit compares the output voltage of the first gate voltage detection circuit with the comparison voltage, and outputs a switching signal of the first gate resistance switching circuit.
The first gate voltage detection circuit control power supply controls the power supply potential supplied to the first gate voltage determination circuit, and outputs a switching control signal input to the control reference signal terminal of the gate voltage threshold detection determination circuit. With reference to this, when a turn-on instruction is given, control is performed to output the output potential of the first gate voltage determination circuit.
The second gate voltage detection circuit has a first input terminal of the gate voltage threshold detection determination circuit and a preset second input terminal based on the potential of the second input terminal of the gate voltage threshold detection determination circuit. Outputs the potential difference amplified with the output terminal of the second gate voltage threshold generation circuit that outputs the element temperature determination threshold of the above, and outputs the potential difference to the output terminal.
The second gate voltage determination circuit compares the output voltage of the second gate voltage detection circuit with the comparison voltage, and outputs a switching signal of the second gate resistance switching circuit.
The second gate voltage detection circuit control power supply controls the power supply potential supplied to the second gate voltage determination circuit, and outputs a switching control signal input to the control reference signal terminal of the gate voltage threshold detection determination circuit. A power conversion device, which is referred to and controls to output the output potential of the second gate voltage determination circuit when a turn-off instruction is given. In the power conversion device according to claim 6,
The power semiconductor module is configured to perform a switching operation with respect to an inductive load.
The power semiconductor when the predetermined load current is I, the threshold including the element temperature (T) dependence of the power semiconductor module is VTH (T), and the voltage between the drain terminal and the source terminal of the power semiconductor module is on voltage. The mutual conductance of the modules is gm (VON), and the gate plateau voltage VGP2 is VGP2 = VTH (T) + I / gm (VON).
When
Potential difference between the element temperature determination threshold voltage output by the first gate voltage threshold generation circuit constituting the gate voltage threshold detection determination circuit and the potential of the second input terminal of the gate voltage threshold detection determination circuit. Is set to VGP2 or less. In the power conversion device according to claim 7,
When the voltage between the drain terminal and the source terminal of the power semiconductor module is equal to the power supply voltage (Vcc) of the power converter, the transconductance of the power semiconductor module at the time of on voltage is gm (Vcc), and the gate plateau voltage VGP1 VGP1 = VTH (T) + I / gm (Vcc)
When
Potential difference between the element temperature determination threshold voltage output by the first gate voltage threshold generation circuit constituting the gate voltage threshold detection determination circuit and the potential of the second input terminal of the gate voltage threshold detection determination circuit. Is set to VGP1 or higher. In the power conversion device according to claim 8,
The gate plateau voltage VGP2 _LT when the element temperature T defining the gate plateau voltage VGP2 is the temperature _TL at a low temperature is VGP2 _LT = VTH ( _TL ) + I / gm (VON).
When
Potential difference between the element temperature determination threshold voltage output by the first gate voltage threshold generation circuit constituting the gate voltage threshold detection determination circuit and the potential of the second input terminal of the gate voltage threshold detection determination circuit. Is _{set to VGP2 LT} or less. In the power conversion device according to claim 9,
The gate plateau voltage gate plateau voltage when the element temperature T that define VGP1 is at a temperature T _M at intermediate temperature VGP1 _MT to _{VGP1 MT = VTH (T M)} + I / gm (VON)
When
Potential difference between the element temperature determination threshold voltage output by the first gate voltage threshold generation circuit constituting the gate voltage threshold detection determination circuit and the potential of the second input terminal of the gate voltage threshold detection determination circuit. Is _{set to VGP1 MT} or higher. In the power conversion device according to claim 10,
Temperature _{T L} at a low temperature that defines the gate plateau voltage VGP2 _LT is a -25 ° C.,
Temperature T _M at intermediate temperature that defines the gate plateau voltage VGP1 _MT is a + 25 ° C.
A power conversion device characterized by the fact that. In the power conversion device according to claim 11,
The power conversion device, wherein the gate plateau voltage VGP1 and the gate plateau voltage VGP2 are determined according to a predetermined load current I.

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