JP6834274B2 - Gradation voltage generation circuit, display driver, electro-optic device and electronic device - Google Patents

Description

The present invention relates to a gradation voltage generation circuit, a display driver, an electro-optic device, an electronic device, and the like.

Display panels such as liquid crystal display panels have unique gamma characteristics depending on the model, etc., and the display driver drives the display panel with a data voltage that matches the gamma characteristics to display appropriate gradation. Is realized. The gamma characteristic is a characteristic (gamma curve) that associates a gradation displayed on a pixel with a data voltage that realizes the gradation. Matching the correspondence between the display data and the data voltage to the gamma characteristics is called gamma correction (or gradation correction) or the like. For example, gamma correction is realized by digital processing of display data or (adjustment) of gamma characteristics of a gradation voltage generation circuit. When realized by the gamma characteristic of the gradation voltage generation circuit, it is necessary to adjust the voltage corresponding to each gradation according to the gamma characteristic of the display panel.

For example, Patent Document 1 discloses a technique for adjusting the gamma characteristic of a gradation voltage generation circuit. In Patent Document 1, the first to ninth reference voltages are generated by the first ladder resistor, the reference voltage is amplified by the voltage follower and supplied to the second ladder resistor, and the second ladder resistor is the first. The first to 64th gradation voltages are output by further dividing between the ninth reference voltage and the ninth reference voltage. The first and second reference voltages are output as the first and third gradation voltages, and the second gradation voltage in between is the resistance division by the first and second resistors of the second ladder resistor. Will be generated. The resistance values of the first and second resistors can be variably adjusted.

Japanese Unexamined Patent Publication No. 2005-10276

By the way, in order to match the gradation voltage generation circuit with the gamma characteristics of various display panels, it is desirable that all gradation voltages can be adjusted freely, but the number of switch elements and resistors for making the resistance value variable is large. The number increases and the circuit scale increases. Therefore, there is a method of dividing the ladder resistor into several blocks and configuring each block into one variable resistor circuit. In this case, the resistivity ratio between the blocks becomes variable, and the gamma characteristic of the display panel is realized by adjusting it.

However, each block contains one or more of the ladder resistors, and the resistivity ratio within that block cannot be adjusted. Therefore, when trying to match the gamma characteristics of various display panels, the error between the gamma characteristics and the gamma characteristics of the gradation voltage generation circuit may become large. For example, suppose that there is a display panel having a linear gamma curve and a display panel having a curved gamma curve in the gradation range in charge of a certain block. At this time, if the resistivity ratio in the block is matched with one gamma characteristic, it is difficult to appropriately realize the other gamma characteristic.

According to some aspects of the present invention, it is possible to provide a gradation voltage generation circuit, a display driver, an electro-optical device, an electronic device, and the like that can correspond to the gamma characteristics of various display panels.

One aspect of the present invention includes first to nth variable resistance circuits (n is an integer of 3 or more) connected in series, and at least i of the first to nth variable resistance circuits is variable. The resistance circuit (i is an integer of 1 or more and n or less) outputs a plurality of gradation voltages, and the other variable resistance circuits of the first to nth variable resistance circuits have one or more gradation voltages. The i-th variable resistance circuit outputs the p-th voltage-dividing node and the q-th voltage-dividing node (p and q are different integers) among the plurality of voltage-dividing nodes from which a plurality of gradation voltages are output. ), It is related to a gradation voltage generation circuit further having a variable resistance portion.

According to one aspect of the present invention, since a variable resistance unit is further provided between the p-th voltage division node and the q-th voltage division node of the plurality of voltage division nodes, the i-th variable resistance circuit can be used. Of the gamma characteristics of a plurality of gradation voltages to be output, some gamma characteristics (gamma characteristics of the gradation voltage output from the voltage division node between the p-th voltage division node and the q-th voltage division node). Can be adjusted. This makes it possible to adjust the gamma characteristics of a plurality of gradation voltages output by the third variable resistance circuit according to the local changes in the gamma characteristics of the display panel, and the gamma characteristics of various display panels can be adjusted. It becomes possible to correspond.

Further, in one aspect of the present invention, one end of the first variable resistance circuit of the first to nth variable resistance circuits is connected to the first power supply node, and the first variable resistance circuit of the first to nth variable resistance circuits is connected. One end of the variable resistance circuit of n is connected to a second power supply node having a higher potential than the first power supply node, and the third variable resistance circuit is one of the first to n variable resistance circuits. A variable resistance circuit other than the first variable resistance circuit and the nth variable resistance circuit may be used.

The number of gradation voltages output by the second to second n-1 variable resistance circuits is larger than that of the first and second variable resistance circuits corresponding to both ends of the gamma characteristic. Therefore, when trying to match the gamma characteristics of various display panels, there is a high possibility that the shape of the gamma characteristics will change in the gradation range. In this respect, in one aspect of the present invention, since the i-th variable resistance circuit is a variable resistance circuit other than the first and nth variable resistance circuits, it can cope with the shape change of the gamma characteristic as described above.

Further, in one aspect of the present invention, at least one resistor is provided between the first voltage dividing node and the qth voltage dividing node, and the lower limit of the resistance value of the variable resistance portion is the above. It may be greater than the respective resistance values of at least one resistor.

The variable resistance unit further included in the i-th variable resistance circuit adjusts the gamma characteristic in a local gradation range corresponding to the gradation voltage output by the i-th variable resistance circuit. According to one aspect of the present invention, the lower limit of the range of change in the resistance value of the variable resistor is the resistance of at least one resistor provided between the p-th voltage dividing node and the q-th voltage-dividing node. It is larger than the value, and the local gamma characteristic can be adjusted (for example, fine adjustment).

Further, in one aspect of the present invention, one of the voltage dividing node of the first p and the voltage dividing node of the qth is a node at one end or a node at the other end of the variable resistance circuit of the i. May be good.

In this way, the gradation range corresponding to the gradation voltage output by the i-th variable resistance circuit is adjusted by the variable resistance portion of the i-th variable resistance circuit, and the other range. It can be divided into a second range. Then, the slope can be relatively adjusted between the gamma characteristic in the first range and the gamma characteristic in the second range.

Further, in one aspect of the present invention, the resistors included in the first to nth variable resistance circuits are arranged in the first direction of the transistors included in the first to nth variable resistance circuits, and the variable resistors are arranged. The circuit elements constituting the unit may be arranged in a second direction orthogonal to the first direction of the transistor included in the first to nth variable resistance circuits.

By doing so, the i-th variable resistance circuit can be further increased without changing the layout of the resistors and transistors included in the first to nth variable resistance circuits (for example, the layout of the conventional gradation voltage generation circuit). The layout of the variable resistor part to have can be added. For example, when the variable resistance portion is realized by the on-resistance of a transistor, the size of the transistor can be made smaller than the size of the transistor included in the third variable resistance circuit. In this case, a variable resistance portion can be added while suppressing an increase in the layout area.

Further, in one aspect of the present invention, the variable resistance unit has a plurality of transistors connected in parallel between the first voltage dividing node and the qth voltage dividing node, and the plurality of transistors of the plurality of transistors. The resistance value of the variable resistance unit may be variably set by the on-resistance of the plurality of transistors, which is set by turning on and off.

By doing so, since a polyresistor or the like is not used for the variable resistance portion further included in the third variable resistance circuit, the size of the transistor of the variable resistance portion can be made very small. As a result, it becomes possible to provide the variable resistance portion in the third variable resistance circuit while suppressing the increase in the layout area.

In another aspect of the present invention, a plurality of reference voltages are input, and each resistance circuit outputs one or a plurality of gradation voltages based on any two reference voltages of the plurality of reference voltages. The nth resistance circuit (n is an integer of 3 or more) is included, and the i-th resistance circuit among the first to nth resistance circuits is of a plurality of voltage dividing nodes to which a plurality of gradation voltages are output. It is related to a gradation voltage generation circuit having a variable resistance portion provided between a voltage dividing node of pth and a voltage dividing node of qth.

According to another aspect of the present invention, since the variable resistance unit is provided between the p-th voltage division node and the q-th voltage division node of the plurality of voltage division nodes, the i-th resistance circuit outputs. Of the gamma characteristics of a plurality of gradation voltages, some gamma characteristics (gamma characteristics of the gradation voltage output from the voltage division node between the p-th voltage division node and the q-th voltage division node) are selected. Can be adjusted. This makes it possible to adjust the gamma characteristics of multiple gradation voltages output by the i-th resistor circuit according to the local changes in the gamma characteristics of the display panel, and supports the gamma characteristics of various display panels. It becomes possible to do.

Further, in another aspect of the present invention, one or a plurality of resistors are provided between the first voltage dividing node and the qth voltage dividing node, and the resistances of the respective resistors of the one or the plurality of resistors are provided. The value is set between the first voltage dividing node and the p-p voltage-dividing node, and the q-th voltage-dividing node and the qth voltage-dividing node among the first to k-th voltage-dividing nodes which are the plurality of voltage-dividing nodes. It may be smaller than the resistance value of each resistance of one or more resistors provided between the voltage dividing node of k.

In this way, it is possible to adjust the slope of the portion of the gradation range corresponding to the gradation voltage output by the i-th resistance circuit in which the slope of the gamma characteristic is relatively small. This makes it possible to adjust the direction in which the gamma characteristic in the gradation range is made more curved.

Further, in another aspect of the present invention, at least one resistor is provided between the first voltage dividing node and the qth voltage dividing node, and the lower limit of the resistance value of the variable resistance portion is set. It may be larger than the resistance value of each of the at least one resistor.

The variable resistance portion of the i-th resistance circuit adjusts the gamma characteristic in a local gradation range corresponding to the gradation voltage output by the i-th resistance circuit. According to another aspect of the present invention, the lower limit of the range of change of the resistance value of the variable resistor portion is each of at least one resistor provided between the voltage dividing node of the pth and the voltage dividing node of the qth. It is larger than the resistance value, and the local gamma characteristic can be adjusted (for example, fine adjustment).

Yet another aspect of the present invention is a plurality of voltages in which one end is electrically connected to a first variable resistance circuit connected to the first power supply node and one end is electrically connected to the other end of the first variable resistance. A second variable resistance circuit including a dividing node, one end of which is electrically connected to the other end of the second variable resistance, and the other end of which is connected to a second power supply node having a higher potential than the first power supply node. A third variable resistance circuit, a variable resistance portion provided between the pth voltage dividing node and the qth voltage dividing node (p and q are different integers) among the plurality of voltage dividing nodes, and It is related to the gradation voltage generation circuit including.

According to still another aspect of the present invention, since a variable resistor portion is further provided between the first voltage dividing node and the qth voltage dividing node among the plurality of voltage dividing nodes, the first variable resistor is provided. Among the gamma characteristics of a plurality of gradation voltages output by the second variable resistance circuit provided between the circuit and the third variable resistance circuit, some gamma characteristics can be adjusted. This makes it possible to adjust the gamma characteristics of a plurality of gradation voltages output by the second variable resistance circuit according to the local changes in the gamma characteristics of the display panel, and the gamma characteristics of various display panels can be adjusted. It becomes possible to correspond.

Further, in one aspect of the present invention, another aspect, and yet another aspect, q may be larger than p + 1.

Since q is greater than p + 1, one or more (at least one) resistors will be provided between the p-th voltage-splitting node and the q-th voltage-splitting node.

Yet another aspect of the present invention relates to a display driver comprising the gradation voltage generation circuit described in any of the above.

Further, another aspect of the present invention relates to an electro-optical device including the gradation voltage generation circuit described in any of the above.

Further, another aspect of the present invention relates to an electronic device including the gradation voltage generation circuit described in any of the above.

A configuration example of the gradation voltage generation circuit of this embodiment. As an example of the third variable resistance circuit, a configuration example of the fifth variable resistance circuit. A layout configuration example of the gradation voltage generation circuit of this embodiment. Comparative example of the fifth variable resistance circuit. The first example of the gamma characteristic of the display panel. The first example of the gamma characteristic of the display panel. A second example of the gamma characteristic of the display panel. A second example of the gamma characteristic of the display panel. A third example of the gamma characteristic of the display panel. A third example of the gamma characteristic of the display panel. A first modification of the fifth variable resistance circuit. A second modification of the fifth variable resistance circuit. A third modification of the fifth variable resistance circuit. A modified example of the gradation voltage generation circuit. As an example of the i-th resistance circuit, a configuration example of the fifth resistance circuit. Display driver configuration example. Configuration example of an electro-optical device. Configuration example of electronic equipment.

Hereinafter, preferred embodiments of the present invention will be described in detail. The present embodiment described below does not unreasonably limit the content of the present invention described in the claims, and all of the configurations described in the present embodiment are indispensable as a means for solving the present invention. Not necessarily.

1. 1. Gradation voltage generation circuit FIG. 1 is a configuration example of the gradation voltage generation circuit 10 of the present embodiment. The gradation voltage generation circuit 10 includes first to nth variable resistance circuits connected in series. In the following, the case of n = 7 will be described as an example, but n is not limited to 7, and may be an integer of 3 or more.

Specifically, the gradation voltage generation circuit 10 has a low potential side power supply voltage VL (broadly defined as a first power supply voltage and a reference voltage) and a high potential side power supply voltage VH (broadly defined as a second power supply voltage and a reference voltage). The first to 33rd gradation voltages V1 to V33 divided between the voltages) are output. The first gradation voltage V1 is the voltage VL, and the 33rd gradation voltage V33 is the voltage VH. The voltages VL and VH are supplied from, for example, the voltage generation circuit 180 of FIG.

The first to seventh variable resistance circuits RVA1 to RVA7 (first to nth variable resistance circuits) are connected in series in that order. The voltage VL is input to the node at one end of the first variable resistance circuit RVA1, and the voltage VH is input to the node at one end of the seventh variable resistance circuit RVA7. Then, from the six nodes between the first to seventh variable resistance circuits RVA1 to RVA7, the second gradation voltage V2, the fourth gradation voltage V4, the tenth gradation voltage V10, and the 24th, respectively. The gradation voltage V24, the thirtieth gradation voltage V30, and the 32nd gradation voltage V32 are output. Gradation voltages other than these are generated by each variable resistance circuit by dividing the voltage across the voltage. For example, the fourth variable resistance circuit RVA4 divides the voltage between the tenth gradation voltage V10 and the 24th gradation voltage V24 to generate the eleventh to 23rd gradation voltages V11 to V23.

The number of gradation voltages output by the gradation voltage generation circuit 10 is not limited to 33. In the present embodiment, the source amplifier (drive circuit) further divides the voltage between each gradation voltage output by the gradation voltage generation circuit 10 by 4 and finally outputs a data voltage of 128 gradations. In this case, the gradation voltage generation circuit 10 outputs a gradation voltage of 128/4 + 1 = 33. For example, when the number of voltage divisions in the source amplifier is 4 and a data voltage of 256 gradations is output, the gradation voltage generation circuit 10 outputs a gradation voltage of 256/4 + 1 = 65.

Further, the number of gradation voltages output by each of the variable resistance circuits of the first to seventh variable resistance circuits RVA1 to RVA7 is not limited to FIG. For example, the first variable resistance circuit RVA1 outputs one gradation voltage (V2) to the node at the other end, but is not limited to this, and may output a plurality of gradation voltages by further dividing the voltage. Good.

Conventionally, as will be described later in FIG. 4, by adjusting the resistance ratio of the first to seventh variable resistance circuits RVA1 to RVA7, the gradation voltages V2, V4, V10 of the nodes between the variable resistance circuits, Adjust V24, V30, and V32 to match the gamma characteristics of the display panel (electro-optical panel) as shown in FIG. However, since the resistance ratio of the series resistors (R24 to R29) in the variable resistance circuit cannot be adjusted, for example, a display panel or the like in which the shape of the gamma curve is locally large (for example, the gradation "24" in FIGS. 5 and 7). It may be difficult to match the gamma characteristics of the gradation voltage generation circuit with (gamma curve of "30").

For example, by increasing the number (n) of variable resistance circuits connected in series in the gradation voltage generation circuit 10, it is possible to widen the adjustment range of the gamma characteristic. However, as the number of variable resistance circuits increases, the number of switches in the adjustment unit increases, and the layout area increases. The switch of the adjusting unit is, for example, a transistor, but a very small on-resistance is required in order to reduce the influence on the resistance value, and a large-sized transistor is required.

Therefore, in the present embodiment, the first to seventh variable resistance circuits RVA1 to RVA7 are configured as follows. FIG. 2 shows a configuration example of the fifth variable resistance circuit RVA5 as an example. The fifth variable resistance circuit RVA5 of FIG. 2 includes an adjustment unit 20, a voltage dividing unit 30, and a variable resistance unit 40 (variable resistance circuit, partial adjustment unit, partial adjustment circuit).

The voltage dividing unit 30 has resistors R24 to R29 connected in series between the node NV24 having a gradation voltage V24 and the node NV30 having a gradation voltage V30. The resistors R24 to R29 divide the resistance between the gradation voltage V24 and the gradation voltage V30, and output the voltages of the tap nodes NV25 to NV29 as the gradation voltages V25 to V29. The resistors R24 to R29 are, for example, polyresistors (fixed resistance elements made of polysilicon).

The adjusting unit 20 has resistors RT1 to RT10 and switches ST1 to ST10 connected in series. One end of switches ST1 to ST10 is connected to node NV30. The other ends of the switches ST1 to ST10 are connected to one end of the resistors RT1 to RT10. The other ends of the resistors RT1 to RT9 are connected to one end of the resistors RT2 to RT10, and the other end of the resistors RT10 is connected to the node NV24. The resistors RT1 to RT10 are, for example, poly resistors, each having a different resistance value. The switches ST1 to ST10 are composed of, for example, transistors, and are, for example, a P-type transistor, an N-type transistor, or a transfer gate in which a P-type transistor and an N-type transistor are combined. The switches ST1 to ST10 are controlled on and off by, for example, the control circuit 120 of FIG. 16, and the combined resistance of the adjusting unit 20 and the voltage dividing unit 30 changes according to the on and off of each switch. .. The on and off of each switch may be set, for example, by register setting, or may be set by setting information stored in advance in a non-volatile memory or the like. The number of resistors provided in the adjusting unit 20 is not limited to 10. Further, the configuration of the adjusting unit 20 is not limited to FIG. For example, resistors RT1 to RT10 are provided in parallel between the node NV24 and the node NV30, and switches ST1, ST2, ..., ST10 are connected in series to the resistors RT1, RT2, ..., RT10, respectively. May be good.

The variable resistance unit 40 is provided between the node NV24 and the node NV26. By variably adjusting the resistance value of the variable resistance unit 40, the combined resistance of the resistors R24, R25 and the variable resistance unit 40 changes.

As described above, in the present embodiment, the i-th variable resistance circuit RVAi of the first to nth variable resistance circuits (RVA1 to RVA7) outputs a plurality of gradation voltages, and the other variable resistance circuits (RVA1 to RVA7) output a plurality of gradation voltages. RVAi-1, RVAi + 1 to RVAn) outputs one or more gradation voltages. The i-th variable resistance circuit RVAi is a variable resistance unit 40 provided between the p-th voltage division node and the q-th voltage division node of the plurality of voltage division nodes to which a plurality of gradation voltages are output. Further.

In the example of FIG. 2, the i-th variable resistance circuit RVAi corresponds to the fifth variable resistance circuit RVA5. Further, the plurality of voltage dividing nodes to which the plurality of gradation voltages are output correspond to the nodes NV24 to NV30 to which the gradation voltages V24 to V30 are output. Further, the pth voltage dividing node corresponds to the node NV24, and the qth voltage dividing node corresponds to the node NV26. That is, if the nodes NV24 to NV30 are referred to as the first to seventh voltage dividing nodes, p = 1 and q = 3. Note that p and q are not limited to this. That is, when the voltage dividing unit 30 has the first to second voltage dividing nodes (t is an integer of 3 or more), p and q are integers of 1 or more and t or less, and q may be larger than p + 1. Further, when p = 1, q ≠ t.

Note that FIG. 2 shows a case where the fifth variable resistance circuit RVA5 further includes a variable resistance unit 40, but the present invention is not limited to this, and the third variable resistance circuit RVAi including the variable resistance unit 40 is the first variable resistance circuit RVAi. It may be any of the 1st to 7th variable resistance circuits RVA1 to RVA7. Further, each of the plurality of variable resistance circuits among the first to seventh variable resistance circuits RVA1 to RVA7 may further include a variable resistance unit 40.

In this way, by providing the variable resistance section 40 between the first voltage dividing node (NV24) and the third voltage dividing node (NV26), the resistance ratio of the resistors R24 to R29 of the voltage dividing section 30 can be adjusted. It is possible to make some adjustments. That is, the inclination of the gamma curve in the portion of the gradation voltage V24 to V26 in the gamma curve due to the gradation voltage V24 to V30 can be changed, and the shape of the gamma curve due to the gradation voltage V24 to V30 can be changed. For example, a linear gamma curve can be changed to a curved line, or a curved gamma curve can be made closer to a straight line. This makes it possible to match the gamma characteristics of the gradation voltage generation circuit 10 with the gamma characteristics of various display panels even in a display panel or the like in which the shape of the gamma curve is locally large.

Further, in the present embodiment, as described above, one end of the first variable resistance circuit RVA1 is connected to the first power supply node (voltage VL node, low potential side power supply node), and the seventh variable resistance circuit RVA7 is One end is connected to a second power supply node (voltage VH node, high potential side power supply node) having a higher potential than the first power supply node. At this time, the i-th variable resistance circuit is a variable resistance circuit other than the first variable resistance circuit RVA1 and the seventh variable resistance circuit RVA7 (nth variable resistance circuit). That is, 2 ≦ i ≦ n-1 = 6.

As shown in FIGS. 5 and 6, the slope of the gamma curve is large at both ends of the gradation (near the gradations “1” and “33”), and the slope of the gamma curve is small at the center of the gradation. When the inclination is small, the voltage difference per gradation is small, so that the resistance value of each resistor of the voltage dividing unit 30 becomes small. Therefore, the number of resistances of the voltage dividing section 30 is relatively small in the variable resistance circuits RVA1 and RVA7 corresponding to the edge of the gradation, and the resistance of the voltage dividing section 30 in the variable resistance circuits RVA2 to RVA6 corresponding to the center of the gradation. The number is relatively large. If the number of resistors is reduced in the central portion, the voltage difference between both ends of the variable resistance circuit becomes smaller, and it is necessary to reduce the resistance value of the adjusting portion 20. This is because the on-resistance of the switch (transistor) of the adjusting unit 20 must be made very small, and the size of the switch becomes too large.

In this way, the variable resistance circuits RVA2 to RVA6 corresponding to the central portion of the gradation have a wide gradation range in charge. Therefore, when trying to correspond to various display panels, the gamma in the gradation range in charge is used. The shape of the curve will change significantly. In this regard, in the present embodiment, since the third variable resistance circuit RVAi to which the variable resistance unit 40 is further provided is the second to sixth variable resistance circuits RVA2 to RVA6 (one or a plurality of them), the gradation range in charge thereof. It can correspond to the shape change of the gamma curve in.

Further, in the present embodiment, at least one resistor (R24, R25) is provided between the first voltage dividing node (NV24 in FIG. 2) and the qth voltage dividing node (NV26). The lower limit of the resistance value of the variable resistance unit 40 is larger than the resistance value of each of the at least one resistor (R24, R25).

Specifically, when at least one resistor is one resistor, the lower limit of the resistance value of the variable resistance unit 40 is larger than the resistance value of the resistor. When at least one resistor is a plurality of resistors, the resistance value of the variable resistor section 40 is larger than the maximum value among the resistance values of the respective resistors of the plurality of resistors. The resistance value of the variable resistance unit 40 is variable, but for example, the lower limit of the variable range is larger than the resistance value of at least one resistor.

The variable resistance unit 40 included in the third variable resistance circuit RVAi adjusts the gamma characteristic in the local gradation range in charge of the third variable resistance circuit RVAi. That is, it is basically used for fine adjustment of gamma characteristics. Therefore, the variable resistance unit 40 does not need to extremely fluctuate the combined resistance between the p-th voltage division node and the q-th voltage division node. In this respect, in the present embodiment, the lower limit of the resistance value of the variable resistance unit 40 is larger than the resistance value of each of at least one resistor provided between the p-th voltage division node and the q-th voltage division node. It is getting bigger and fine-tuning the local gamma characteristics.

Further, since the variable resistance unit 40 is provided as a part of the series resistance of the voltage dividing unit 30, the resistance value may be small and the size of the switch (transistor) included in the variable resistance unit 40 may be large. In this respect, according to the present embodiment, since the resistance value of the variable resistance unit 40 does not become too small, it is possible to suppress an increase in the size of the variable resistance unit 40.

Further, in the present embodiment, one of the voltage dividing nodes of the p-th voltage dividing node and the q-th voltage dividing node is a node at one end or a node at the other end of the variable resistance circuit RVAi of the i-th.

In the example of FIG. 2, the first voltage dividing node is the node NV24 at one end of the fifth variable resistance circuit RVA5.

In this way, the gradation range (“24” to “30” in FIG. 2) in charge of the third variable resistance circuit RVAi becomes the first range (24 to 26) adjusted by the variable resistance unit 40. It can be divided into two with the other second range (26 to 30). Then, the variable resistance unit 40 can relatively adjust the inclination of the gamma curve in the first range and the inclination of the gamma curve in the second range. Thereby, the shape of the local gamma curve in the gradation range in charge of the third variable resistance circuit RVAi can be changed. For example, it is possible to change a shape in which the inclination changes gently to a shape in which the inclination changes rapidly at a certain gradation or a shape in which the inclination changes more linearly.

Further, in the present embodiment, the variable resistance unit 40 has a plurality of transistors connected in parallel between the first voltage dividing node and the qth voltage dividing node. Then, the on-resistance of the plurality of transistors is set by turning on and off the plurality of transistors, and the resistance value of the variable resistance unit 40 is variably set by the on-resistance.

In the example of FIG. 2, the variable resistor unit 40 has first to third transistors TR1 to TR3 connected in parallel between the node NV24 and the node NV26. The number of transistors connected in parallel is not limited to three. Each transistor of the transistors TR1 to TR3 is, for example, a P-type transistor (first conductive type transistor), but is not limited to this, and may be an N-type transistor (second conductive type transistor) or a P-type transistor. It may be a transfer gate that combines and an N-type transistor. The transistors TR1 to TR3 are controlled on and off by, for example, the control circuit 120 of FIG. 16, and the resistance value of the variable resistance unit 40 is determined by the on-resistance of the turned-on transistor.

In this way, by setting the resistance value of the variable resistance unit 40 by the on-resistance of the transistors TR1 to TR3, the variable resistance unit 40 can have a layout area much smaller than that of the adjustment unit 20. That is, since a poly resistor or the like is not used for the variable resistance portion 40, it is not necessary to reduce the on-resistance of the transistors TR1 to TR3, and the size of the transistors TR1 to TR3 can be made very small. This makes it possible to expand the adjustment range of the gamma characteristic with almost no increase in the layout area from the conventional gradation voltage generation circuit 10.

The configuration of the variable resistor unit 40 is not limited to the above, and for example, a polyresistor connected in parallel between the p-th voltage division node and the q-th voltage division node is selected by a switch (transistor). You may.

Further, the gradation voltage generation circuit of the present embodiment may be configured as follows. That is, the gradation voltage generation circuit is electrically connected to a first variable resistance circuit having one end connected to a first power supply node (VL node) and one end to the other end of the first variable resistance circuit. A second power supply with a second variable resistance circuit containing a plurality of voltage dividing nodes, one end of which is electrically connected to the other end of the second variable resistance circuit, and the other end having a higher potential than the first power supply node. A third variable resistance circuit connected to a node (VH node), a variable resistance portion provided between the pth voltage dividing node and the qth voltage dividing node among the plurality of voltage dividing nodes, and including.

For example, the first variable resistance circuit here corresponds to RVA1 in FIG. 1, and the second variable resistance circuit corresponds to RVA5 (RVAi, any of RVA2 to RVA6) in FIG. The variable resistance circuit corresponds to RVA 7 in FIG. The term "electrically connected" includes not only the case of being directly connected but also the case of being electrically connected via a circuit element such as a resistor. That is, the second variable resistance circuit is provided between the first and third variable resistance circuits, and even if another variable resistance circuit or the like is connected between the first and second variable resistance circuits. Alternatively, another variable resistance circuit may be connected between the second and third variable resistance circuits.

2. 2. Layout FIG. 3 is a layout configuration example of the gradation voltage generation circuit 10 of the present embodiment. FIG. 3 shows a plan view of the semiconductor substrate on which the gradation voltage generation circuit 10 is formed.

The region in which the resistors constituting the first to seventh variable resistance circuits RVA1 to RVA7 (first to nth variable resistance circuits) are arranged is defined as the first region 60. The region in which the transistors constituting the first to seventh variable resistance circuits RVA1 to RVA7 are arranged is defined as the second region 70. In this case, the circuit elements constituting the variable resistance unit 40 are arranged in regions 80 other than the first region 60 and the second region 70.

Specifically, the resistors R24 to R29 of the voltage dividing section 30 and the resistors RT1 to RT10 of the adjusting section 20 are arranged in the first region 60. For example, a plurality of unit resistors are arranged in a matrix. In FIG. 3, the unit resistance is shown by a hatched rectangle. For example, the unit resistors are arranged so that the longitudinal direction of each unit resistor is along the first direction D1. Then, by connecting several unit resistors in series or in parallel, each resistor such as resistors R24 to R29 is configured. The arrangement of the unit resistors is not limited to FIG. 3, and the unit resistors may be arranged in the first region 60 along the second direction D2 (that is, only one row of the matrix). The second direction D2 is a direction orthogonal to (intersects) the first direction D1. Here, the region in which the resistor is arranged is a region in which a diffusion layer, a polysilicon layer, or the like provided when forming a resistor (for example, a polyresistor) on a semiconductor substrate is arranged.

In the second region 70, the transistors constituting the switches ST1 to ST10 of the adjusting unit 20 of FIG. 2 are arranged. For example, a plurality of transistors are arranged along the second direction D2. The direction along the gate of the transistor (channel width direction) is the first direction D1. In FIG. 3, the P-type transistor is indicated by a rectangle with a reference numeral “PTR”, and the N-type transistor is indicated by a rectangle with a reference numeral “NTR”. Here, the region in which the transistor is arranged is an region in which the diffusion layer (source, drain, well) and the polysilicon layer (gate) provided when the transistor is formed on the semiconductor substrate are arranged.

Transistors TR1 to TR3 of the variable resistance unit 40 of FIG. 2 are arranged in the region 80.

As described above, in the present embodiment, the resistors included in the variable resistance circuits RVA1 to RVA7 are arranged in the first direction D1 (first direction D1 side) of the transistors included in the variable resistance circuits RVA1 to RVA7. The circuit elements constituting the variable resistance unit 40 are arranged in the second direction D2 (second direction D2 side) of the transistors included in the variable resistance circuits RVA1 to RVA7.

As described above, since the size of the transistors TR1 to TR3 is smaller than the size of the transistors (switches ST1 to ST10) of the adjusting unit 20, the region 80 can be much smaller than the second region 70. Therefore, by arranging the region 80 in the outer peripheral portion of the second region 70, for example, the variable resistance portion 40 can be introduced with almost no increase in the layout area (or change in the layout). The position of the region 80 is not limited to FIG. For example, the second region 70 may be divided into a plurality of regions, and the region 80 may be provided between the divided regions.

Here, the case where the circuit element constituting the variable resistance unit 40 is only a transistor has been described above as an example, but the present invention is not limited to this. For example, the circuit element may be a resistor (polyresistor) and a transistor. In this case, resistors and transistors are arranged in regions other than the first region 60 and the second region 70. For example, a resistance arrangement region of the variable resistance portion 40 is provided in the outer peripheral portion of the first region 60, and a transistor arrangement region of the variable resistance portion 40 is provided in the outer peripheral portion of the second region 70.

3. 3. Comparative Example and Method for Adjusting Gamma Characteristics in the present Embodiment FIG. 4 is a comparative example of the fifth variable resistance circuit RVA5. In FIG. 4, the variable resistance portion 40 of FIG. 2 is not provided. In the comparative example, the variable resistance section 40 is not provided in the first to fourth, sixth, and seventh variable resistance circuits RVA1 to RVA4, RVA6, and RVA7.

5 and 6 are first examples of gamma characteristics of the display panel. FIG. 5 shows the gradation voltage at each gradation. FIG. 6 shows a gradation voltage difference (for example, gradation voltage difference V2-V1 for gradation “2”) from the next lower gradation in each gradation.

In the present embodiment, the resistivity ratios of the first to seventh variable resistance circuits RVA1 to RVA7 are set so as to (approximately) match the gamma characteristics of the gradation voltage generation circuit 10 with the gamma characteristics of such a display panel. adjust. That is, since the gradation voltages V2, V4, V10, V24, V30, and V32 of the nodes between the first to seventh variable resistance circuits RVA1 to RVA7 are variable, the gradation voltage matches the gamma characteristic of the display panel. Adjust so that.

The gradation voltage between the gradation voltages V2, V4, V10, V24, V30, and V32 is determined by the resistance ratio of the series resistance in each variable resistance circuit. For example, the fifth variable resistance circuit RVA5 divides the gradation voltage V24 and V30 by the resistors R24 to R29 to generate the gradation voltage V25 to V29. The gamma curve due to the gradation voltages V25 to V29 is determined by the resistance ratio of the resistors R24 to R29.

For example, it is assumed that the resistance ratio of the series resistors in each variable resistance circuit is designed according to the gamma characteristics of the display panels of FIGS. 5 and 6. As shown in FIG. 6, for example, in the gradations "10" to "24" in charge of the fourth variable resistance circuit RVA4, the gradation voltage difference is constant (the slope of the gamma curve is constant), so that each resistance of the series resistance is It has the same resistance value. In the gradations "24" to "30" in charge of the fifth variable resistance circuit RVA5, the gradation voltage difference increases, so that each resistance of the series resistance has a larger resistance value as the gradation side increases. The gamma characteristics may be approximately matched as shown by the dotted line curve shown in A1 of FIG.

7 and 8 are second examples of gamma characteristics of the display panel. Consider a case where the gradation voltage generation circuit 10 designed according to the gamma characteristics of FIGS. 5 and 6 is adjusted to match the gamma characteristics of FIGS. 7 and 8.

In the gamma characteristics of FIGS. 7 and 8, the gradation range in which the inclination near the center is constant is wide. Therefore, in the gradations "24" to "30" in charge of the fifth variable resistance circuit RVA5, the gradation voltage difference is constant (the slope of the gamma curve is constant). As shown in B1 of FIG. 7 and C1 of FIG. 8, by making the resistance ratio of the fifth variable resistance circuit RVA5 relatively small, the gamma curves in the gradations "24" to "30" are laid down ( It is possible to get closer to the gamma characteristics of the display panel (by reducing the tilt).

However, since the resistance ratio of the series resistors (R24 to R29) cannot be changed in the configuration as in the comparative example of FIG. 4, the characteristic that the gradation voltage difference increases toward the higher gradation side cannot be changed. Therefore, the gamma curve in the gradations "24" to "30" remains curved and does not become a straight line (constant slope). Further, if the gamma characteristics of the display panel are approximated by connecting the gamma curves whose shapes do not match, the gradation change may become unnatural at the boundary. For example, in the characteristics of the gradation voltage difference as shown in FIG. 8, the gradation voltage difference cannot be smoothly connected at the boundary (for example, gradation “24”, “30”, etc.) (for example, the gradation voltage difference drops once at the boundary). ) May.

9 and 10 are a third example of the gamma characteristic of the display panel. Consider a case where the gradation voltage generation circuit 10 designed according to the gamma characteristics of FIGS. 5 and 6 is adjusted to match the gamma characteristics of FIGS. 9 and 10.

In the gamma characteristics of FIGS. 9 and 10, the slope near the center is not constant but changes gently. Therefore, the gradation voltage difference gradually changes in the gradations "10" to "24" that the fourth variable resistance circuit RVA4 is in charge of. As shown in E1 of FIG. 10, by relatively adjusting the resistance ratio of the fourth variable resistance circuit RVA4, the slope of the gamma curve in the gradations "10" to "24" is changed and approximately displayed. It is possible to approach the gamma characteristics of the panel.

However, in the configuration as in the comparative example of FIG. 4, since the resistivity ratio of the series resistors cannot be changed, the characteristic that the gradation voltage difference is constant cannot be changed. Therefore, the gamma curve in the gradations "10" to "24" remains a straight line (constant slope) and does not become a curve.

As described above, in the conventional configuration, when the gradation voltage generation circuit 10 is applied to various display panels, the error between the gamma characteristic of the gradation voltage generation circuit 10 and the gamma characteristic of the display panel becomes large, and the display quality becomes large. May decrease. For example, when grayscale is displayed, unevenness and lines may be visible.

In this regard, as described with reference to FIG. 2, in the present embodiment, a variable resistance portion 40 for making the resistivity ratio of a part of the series resistors variable is further provided. As a result, the shape of the local gamma curve due to the series resistance can be changed, and the error between the gamma characteristic of the gradation voltage generation circuit 10 and the gamma characteristic of the display panel can be reduced.

For example, when the variable resistance unit 40 is provided on the high gradation side (for example, between the nodes NV28 and NV30 in FIG. 2), the gamma curve on the high gradation side can be laid down by reducing the combined resistance in the variable resistance unit 40. it can. Then, the curvilinear characteristic shown in B1 of FIG. 7 can be made closer to a straight line, and can be made closer to the gamma characteristic of the display panel.

Alternatively, when the variable resistance unit 40 is provided on the low gradation side (for example, as shown in FIG. 2), the gamma curve on the low gradation side can be laid down by reducing the combined resistance in the variable resistance unit 40. Then, the gamma curve on the relatively high gradation side stands (the slope becomes steep), so that the gamma curve can be changed more steeply. For example, the gamma curves of the gradations "24" to "30" in FIG. 7 are straight lines, and it is assumed that the gradation voltage generation circuit 10 is designed according to this characteristic. In this case, by changing the gamma curve of the gradations "24" to "30" into a curve as described above, it is possible to match the gamma characteristic of FIG.

Alternatively, as will be described later in FIG. 11, when the variable resistance portion 40 is provided in the central portion, the slope of the gamma curve in the central portion can be relatively reduced by reducing the combined resistance in the variable resistance portion 40. For example, the linear characteristics of the gradations "10" to "24" shown in E1 of FIG. 10 are changed to curvilinear characteristics by making the inclination (gradation voltage difference) of the central portion relatively small. It can be approached to the gamma characteristic of the display panel.

4. Modification example of the third variable resistance circuit Hereinafter, a modification of the i-th variable resistance circuit RVAi will be described. Hereinafter, the fifth variable resistance circuit RVA5 will be described as an example, but each modification can be applied to any of the first to seventh variable resistance circuits RVA1 to RVA7.

FIG. 11 is a first modification of the fifth variable resistance circuit RVA5. In the first modification, the variable resistance unit 40 is a node NV26 (pth voltage division node) and a node NV28 (qth voltage division node) which are the central portions of the gradations “24” to “30”. It is provided in between.

With such a configuration, the slope of the gamma curve can be relatively changed between the central portion and both sides of the gradation range in charge of the fifth variable resistance circuit RVA5, for example, as described in FIG. Adjustment is possible.

FIG. 12 is a second modification of the fifth variable resistance circuit RVA5. In the second modification, a plurality of variable resistance portions 41 to 43 are provided. That is, the variable resistance unit 41 is provided between the node NV28 and the node NV30 on the high gradation side of the gradations "24" to "30", and the variable resistance unit 42 has the gradations "24" to "30". The variable resistance portion 43 is provided between the node NV24 and the node NV28, which is the central portion of the above, and the variable resistance portion 43 is provided between the node NV24 and the node NV26, which are on the low gradation side of the gradations “24” to “30”. .. Each of these variable resistance portions 41 to 43 has the same configuration as the variable resistance portion 40 of FIG.

With such a configuration, it is possible to more freely adjust the shape of the gamma curve in the gradation range in charge of the fifth variable resistance circuit RVA5. The number of the plurality of variable resistance circuits is not limited to three. Further, it is arbitrary which voltage division node each of the plurality of variable resistance circuits is provided between.

FIG. 13 is a third modification of the fifth variable resistance circuit RVA5. In the third modification, the variable resistors 44 and 45 have a nested structure. That is, the variable resistance unit 44 is provided between the node NV24 and the node NV26, and the variable resistance unit 45 is provided between the node NV24 and the node NV28 having a gradation range wider than that of the variable resistance unit 44. Each of these variable resistance portions 44 and 45 has the same configuration as the variable resistance portion 40 of FIG.

With such a configuration, it is possible to more freely adjust the change in the inclination of the gamma curve in the gradation range in charge of the fifth variable resistance circuit RVA5. The nesting (depth) is not limited to double, and more multiple nesting may be configured. Further, in FIG. 13, the variable resistors 44 and 45 share the node NV24, but the present invention is not limited to this. For example, the variable resistance unit 44 may be provided between the node NV25 and the node NV27.

5. Modification example of the gradation voltage generation circuit FIG. 14 is a modification of the gradation voltage generation circuit 10. The gradation voltage generation circuit 10 includes the first to nth resistance circuits. A plurality of reference voltages are input to the first to nth resistance circuits, and each resistance circuit of the first to nth resistance circuits is one or more based on any two reference voltages of the plurality of reference voltages. Outputs the gradation voltage. In the following, the case of n = 7 will be described as an example, but n is not limited to 7, and may be an integer of 3 or more.

The first to eighth reference voltages VR1 to VR8 from the reference voltage generation circuit 90 are input to the first to seventh resistance circuits RB1 to RB7. Specifically, the i-th reference voltage VRi is input to one end of the i-th resistance circuit RBi, and the i + 1 reference voltage VRi + 1 is input to the other end. The reference voltages VR1 to VR8 are output as gradation voltages V1, V2, V4, V10, V24, V30, V32, and V33, respectively. Gradation voltages other than these are generated by each resistance circuit by dividing the voltage across the resistor circuit. For example, the fourth resistance circuit RB4 divides the voltage between the reference voltages VR4 and VR5 (gradation voltage V10, V24) to generate gradation voltages V11 to V23.

The reference voltage generation circuit 90 is a circuit that generates reference voltages VR1 to VR8, and is provided as a circuit separate from the gradation voltage generation circuit 10. For example, the reference voltage generation circuit 90 is included in a circuit device different from the circuit device (IC or the like) including the gradation voltage generation circuit 10. Alternatively, the reference voltage generation circuit 90 may be provided in the same circuit device as the gradation voltage generation circuit 10. The reference voltage generation circuit 90 is composed of, for example, a plurality of regulators that output reference voltages VR1 to VR8. Alternatively, the reference voltage generation circuit 90 is composed of a ladder resistor and a plurality of amplifier circuits that buffer the output voltage of the ladder resistor and output it as reference voltages VR1 to VR8.

FIG. 15 shows a configuration example of the fifth resistance circuit RB5 as an example of the third resistance circuit. The fifth resistance circuit RB5 includes a voltage dividing unit 30 and a variable resistance unit 40. That is, the configuration is such that the adjusting unit 20 is removed from the fifth variable resistance circuit RVA5 in FIG. The configuration of the voltage dividing unit 30 and the variable resistance unit 40 is the same as in FIG. 2, and reference voltages VR5 and VR6 are input to both ends of the voltage dividing unit 30. Then, the variable resistance unit 40 divides the p-th voltage division node (NV24) and the qth voltage division node (NV24) among the plurality of voltage division nodes (NV24 to NV30) to which a plurality of gradation voltages (V24 to V30) are output. It is provided between the node (NV26).

According to this modification, as in the embodiment described with reference to FIG. 2, even in a display panel or the like in which the shape of the gamma curve is locally large, gradation voltage is generated for the gamma characteristics of various display panels. It is possible to match the gamma characteristics of the circuit 10.

Further, in this modification, one or a plurality of resistors (R24, R25) are provided between the first voltage dividing node (NV24) and the qth voltage dividing node (NV26). The resistance value of each resistor of the one or a plurality of resistors (R24, R25) is the qth voltage dividing node (NV26) of the first to kth voltage dividing nodes (NV24 to NV30) which are a plurality of voltage dividing nodes. ) And one or more resistors (R26 to R29) provided between the k-th voltage dividing node (NV30), which is smaller than the resistance value of each resistor. In FIG. 15, the first voltage dividing node is the first voltage dividing node (NV24), but the present invention is not limited to this. When p> 1, the resistance value of each resistor of one or more resistors provided between the p and q voltage dividing nodes is between the first voltage dividing node and the p voltage dividing node. It is smaller than the resistance value of each resistor of one or more resistors provided.

By doing so, the slope of the portion of the gradations "24" to "30" in charge of the fifth resistance circuit RB5 in which the slope of the gamma curve is relatively small is adjusted (the slope is made relatively smaller). ) Is possible. As a result, it is possible to adjust the direction in which the gamma curve in the gradations "24" to "30" is made more curved, and it is possible to make adjustment according to the gamma characteristic of the display panel.

Further, in this modification, at least one resistor (R24, R25) is provided between the first voltage dividing node (NV24) and the qth voltage dividing node (NV26). Then, as in the embodiment described with reference to FIG. 2, the resistance value of the variable resistance unit 40 is larger than the resistance value of at least one resistor (R24, R25).

As described with reference to FIG. 2, the variable resistance unit 40 does not need to extremely fluctuate the combined resistance between the pth voltage dividing node and the qth voltage dividing node. That is, the resistance value of the variable resistance unit 40 is larger than the resistance value of the resistor provided between the p-th voltage division node and the q-th voltage division node, and the local gamma characteristic is finely adjusted. It has become a thing.

6. The display driver FIG. 16 is a configuration example of the display driver 100 including the gradation voltage generation circuit 10 of the present embodiment. The display driver 100 includes a gradation voltage generation circuit 10, a scanning line driving circuit 110 (scanning line driving unit), a control circuit 120 (control unit, processing circuit), a data line driving circuit 130 (data line driving unit), and an interface circuit 150. (Interface unit) and voltage generation circuit 180 (voltage generation unit) are included. The display driver 100 is a circuit device, and is realized by, for example, an integrated circuit device (IC) or the like.

The interface circuit 150 communicates with an external processing device (for example, a display controller, MPU, CPU, etc.). Communication includes, for example, transfer of display data (image data), supply of clock signals and synchronization signals, transfer of commands (or control signals), and the like. The interface circuit 150 is composed of, for example, an I / O buffer or the like.

The control circuit 120 processes display data, controls timing, controls each part of the display driver 100, and the like based on display data, clock signals, synchronization signals, commands, and the like input via the interface circuit 150. For example, in timing control, the driving timing of the scanning line of the display panel and the driving timing of the data line are controlled based on the synchronization signal and the display data. It also controls the polarity of the data voltage written to each pixel. The control circuit 120 is composed of a logic circuit such as a gate array.

The data line drive circuit 130 includes a plurality of drive circuits. Each drive circuit includes a D / A conversion circuit and an amplifier circuit. The gradation voltage generation circuit 10 outputs a plurality of gradation voltages (V1 to V33 in FIG. 1), and each gradation voltage corresponds to any of the plurality of gradation values. The D / A conversion circuit selects two adjacent gradation voltages corresponding to the display data from the plurality of gradation voltages from the gradation voltage generation circuit 10. The amplifier circuit further divides the voltage between the two gradation voltages from the D / A conversion circuit, amplifies the voltage corresponding to the display data among the divided voltages, and outputs the data voltage to the data line (source) of the display panel. Output to line). The D / A conversion circuit is composed of, for example, a switch circuit, and the amplifier circuit is composed of, for example, an operational amplifier, a capacitor, a resistor, and the like.

The scanning line driving circuit 110 outputs a scanning line selection signal to the scanning line (gate line) of the display panel. For example, the scanning line drive circuit 110 includes a circuit that generates a signal that specifies a scanning line to be selected, a buffer circuit that buffers the signal and outputs it as a selection signal, and the like.

The voltage generation circuit 180 generates a common voltage supplied to the common electrode of the display panel and a voltage supplied to each part of the display driver 100. For example, the power supply voltage of the gradation voltage generation circuit 10 (VH, VL in FIG. 1), the power supply voltage of the buffer circuit of the scanning line drive circuit 110, the power supply voltage of the amplifier circuit of the data line drive circuit 130, and the like are generated. For example, the voltage generation circuit 180 is composed of a booster circuit, a regulator, a resistance voltage divider circuit, and the like.

7. Electro-optics FIG. 17 is a configuration example of an electro-optics 350 including the display driver 100 (gradation voltage generation circuit 10) of the present embodiment.

The electro-optical device 350 connects the glass substrate 210, the pixel array 220 formed on the glass substrate 210, the display driver 100 mounted on the glass substrate 210, and the data lines of the display driver 100 and the pixel array 220. Includes a wiring group 230, a wiring group 240 connecting the scanning lines of the display driver 100 and the pixel array 220, a flexible board 250 connected to the display controller 300, and a wiring group 260 connecting the flexible board 250 and the display driver 100. .. The wiring group 230, the wiring group 240, and the wiring group 260 are formed of a transparent electrode (ITO: Indium Tin Oxide) or the like on the glass substrate 210. The pixel array 220 includes pixels, data lines, and scanning lines, and the glass substrate 210 and the pixel array 220 correspond to display panels. The electro-optical device may further include a substrate connected to the flexible substrate 250 and a display controller 300 mounted on the substrate.

Although the case where the display driver 100 is mounted on the glass substrate of the display panel has been described above as an example, the configuration of the electro-optical device 350 is not limited to this. For example, the display driver 100 may be mounted on a circuit board, and the circuit board and the display panel may be connected to each other.

8. Electronic device FIG. 18 is a configuration example of an electronic device 400 including the display driver 100 (gradation voltage generation circuit 10) of the present embodiment. Examples of the electronic devices of the present embodiment include in-vehicle display devices (for example, meter panels, etc.), monitors, displays, single-panel projectors, television devices, information processing devices (computers), portable information terminals, car navigation systems, and portable devices. Various electronic devices equipped with display devices such as game terminals, DLP (Digital Light Processing) devices, and printers can be assumed.

The electronic device 400 includes an electro-optical device 350, a CPU 310 (processing device in a broad sense), a display controller 300, a storage unit 320 (memory, storage device), a user interface unit 330 (user interface circuit), and a data interface unit 340 (data interface). Circuit) is included. The electro-optical device 350 includes a display driver 100 and a display panel 200. The CPU 310 may realize the function of the display controller 300, and the display controller 300 may be omitted. Further, the display driver 100 and the display panel 200 may not be integrally configured as the electro-optical device 350, but may be incorporated into an electronic device as individual components.

The user interface unit 330 is an interface unit that receives various operations from the user. For example, it is composed of a button, a mouse, a keyboard, a touch panel attached to the display panel 200, and the like. The data interface unit 340 is an interface unit that inputs and outputs image data and control data. For example, it is a wired communication interface such as USB, or a wireless communication interface such as a wireless LAN. The storage unit 320 stores the image data input from the data interface unit 340. Alternatively, the storage unit 320 functions as a working memory for the CPU 310 and the display controller 300. The CPU 310 performs control processing and various data processing of each part of the electronic device. The display controller 300 controls the display driver 100. For example, the display controller 300 converts the image data transferred from the data interface unit 340 or the storage unit 320 via the CPU 310 into a format that can be accepted by the display driver 100, and transfers the converted image data to the display driver 100. Output. The display driver 100 drives the display panel 200 based on the image data transferred from the display controller 300.

For example, when the electronic device 400 is an in-vehicle display device, the CPU 310, the storage unit 320, and the like correspond to an ECU (Electronic Control Unit), and various information processed by the ECU (for example, vehicle speed, remaining fuel amount, room temperature, date and time, etc.) Information) is transferred to the display controller 300 and the electro-optical device 350, and is displayed on the display panel 200. The vehicle-mounted display device and the ECU may be separate bodies, and the vehicle-mounted display device may not include the CPU 310, the storage unit 320, or the like.

Although the present embodiment has been described in detail as described above, those skilled in the art will easily understand that many modifications that do not substantially deviate from the novel matters and effects of the present invention are possible. Therefore, all such modifications are included in the scope of the present invention. For example, a term described at least once in a specification or drawing with a different term in a broader or synonymous manner may be replaced by that different term anywhere in the specification or drawing. Further, all combinations of the present embodiment and modifications are also included in the scope of the present invention. Further, the configuration and operation of the gradation voltage generation circuit, the display driver, the electro-optical device, the electronic device, and the like are not limited to those described in the present embodiment, and various modifications can be performed.

10 ... Gradation voltage generation circuit, 20 ... Adjustment section, 30 ... Voltage divider section, 40-45 ... Variable resistance section,
60 ... 1st region, 70 ... 2nd region, 80 ... region, 90 ... reference voltage generation circuit,
100 ... Display driver, 110 ... Scanning line drive circuit, 120 ... Control circuit,
130 ... data line drive circuit, 150 ... interface circuit, 180 ... voltage generation circuit,
200 ... Display panel, 210 ... Glass substrate, 220 ... Pixel array,
230, 240 ... Wiring group, 250 ... Flexible board, 260 ... Wiring group,
300 ... Display controller, 310 ... CPU, 320 ... Storage unit,
330 ... User interface section, 340 ... Data interface section,
350 ... Electro-optics, 400 ... Electronic equipment,
D1 ... 1st direction, D2 ... 2nd direction,
NV24 to NV30 ... node (voltage split node), R24 to R29 ... resistor,
RB1 to RB7 ... 1st to 7th resistance circuits, RT1 to RT10 ... Resistors,
RVA1 to RVA7 ... 1st to 7th variable resistance circuits, ST1 to ST10 ... switches,
TR1 to TR3 ... Transistor, V1 to V33 ... Gradation voltage,
VH ... High potential side power supply voltage, VL ... Low potential side power supply voltage,
VR1 to VR8 ... 1st to 8th reference voltages

Claims (11)

The first to nth variable resistance circuits (n is an integer of 3 or more) connected in series are included.
Of the first to nth variable resistance circuits, at least the i-th variable resistance circuit (i is an integer of 1 or more and n or less) outputs a plurality of gradation voltages.
Each of the other variable resistance circuits of the first to nth variable resistance circuits outputs one or more gradation voltages.
The third variable resistance circuit is
A variable resistor portion provided between the p-th voltage-dividing node and the q-th voltage-dividing node (p and q are different integers) among the plurality of voltage-dividing nodes to which a plurality of gradation voltages are output is further provided. Have and
At least one resistor is provided between the first voltage dividing node and the qth voltage dividing node.
A gradation voltage generation circuit characterized in that the lower limit of the resistance value of the variable resistance portion is larger than the resistance value of each of the at least one resistor. The first to nth variable resistance circuits (n is an integer of 3 or more) connected in series are included.
Of the first to nth variable resistance circuits, at least the i-th variable resistance circuit (i is an integer of 1 or more and n or less) outputs a plurality of gradation voltages.
Each of the other variable resistance circuits of the first to nth variable resistance circuits outputs one or more gradation voltages.
The third variable resistance circuit is
A variable resistor portion provided between the p-th voltage-dividing node and the q-th voltage-dividing node (p and q are different integers) among the plurality of voltage-dividing nodes to which a plurality of gradation voltages are output is further provided. Have and
The plurality of resistors constituting the first to nth variable resistance circuits were along the gates of the respective transistors of the plurality of transistors with respect to the plurality of transistors forming the first to nth variable resistance circuits. Arranged in a matrix in the first direction,
The plurality of transistors are arranged along a second direction orthogonal to the first direction.
Wherein the plurality of circuit elements constituting the variable resistor portion, the grayscale voltage generating circuit, characterized in that it is pre SL arranged in a second direction of the plurality of transistors. In claim 1 or 2,
The first variable resistance circuit of the first to nth variable resistance circuits is
One end is connected to the first power node,
The nth variable resistance circuit of the first to nth variable resistance circuits is
One end is connected to a second power node having a higher potential than the first power node.
The third variable resistance circuit is
A gradation voltage generation circuit, which is a variable resistance circuit other than the first variable resistance circuit and the nth variable resistance circuit among the first to nth variable resistance circuits. In any one of claims 1 to 3,
One of the voltage dividing node of the p-th voltage dividing node and the voltage-dividing node of the qth q is a node at one end or a node at the other end of the variable resistance circuit of the i-th. circuit. In any of claims 1 to 4,
The variable resistance portion is
It has a plurality of transistors connected in parallel between the pth voltage dividing node and the qth voltage dividing node.
The set by said plurality of transistors on and off the variable resistor, the on-resistance of said plurality of transistors of the variable resistor, the resistance value of the variable resistance portion is characterized in that it is variably set Gradation voltage generation circuit. A first to nth resistance circuits (n is 3) in which a plurality of reference voltages are input and each resistance circuit outputs one or a plurality of gradation voltages based on any two reference voltages of the plurality of reference voltages. Includes the above integers)
The i-th resistance circuit among the first to nth resistance circuits is
It has a variable resistance unit provided between the p-th voltage-dividing node and the q-th voltage-dividing node among the plurality of voltage-dividing nodes to which a plurality of gradation voltages are output.
One or more resistors are provided between the pth voltage dividing node and the qth voltage dividing node.
The resistance value of each resistance of the one or the plurality of resistors is set between the first voltage dividing node and the p-th voltage dividing node among the first to kth voltage dividing nodes which are the plurality of voltage dividing nodes. , And a gradation voltage generation circuit characterized in that it is smaller than the resistance value of each resistance of one or a plurality of resistors provided between the qth voltage dividing node and the kth voltage dividing node. A first to nth resistance circuits (n is 3) in which a plurality of reference voltages are input and each resistance circuit outputs one or a plurality of gradation voltages based on any two reference voltages of the plurality of reference voltages. Includes the above integers)
The i-th resistance circuit among the first to nth resistance circuits is
It has a variable resistance unit provided between the p-th voltage-dividing node and the q-th voltage-dividing node among the plurality of voltage-dividing nodes to which a plurality of gradation voltages are output.
At least one resistor is provided between the first voltage dividing node and the qth voltage dividing node.
A gradation voltage generation circuit characterized in that the lower limit of the resistance value of the variable resistance portion is larger than the resistance value of each of the at least one resistor. In any of claims 1 to 7,
A gradation voltage generation circuit characterized in that q is larger than p + 1. A display driver comprising the gradation voltage generation circuit according to any one of claims 1 to 8. An electro-optical device comprising the gradation voltage generation circuit according to any one of claims 1 to 8. An electronic device comprising the gradation voltage generation circuit according to any one of claims 1 to 8.

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