JP6820361B2 - Volatile memory devices and efficient data movement methods in those volatile memory devices - Google Patents

Description

The present invention relates to volatile memory devices, and more particularly to volatile memory devices and methods for efficient bulk data transfer and backup operations in volatile memory devices.

Today, volatile memory devices are widely used in field artificial intelligence AI, machine learning applications. These applications require large amounts of (bulk) data to be transferred between volatile memory devices in pin-restricted channels, and efficient bulk data movement is critical within volatile memory devices, especially for accelerator applications. Is. In order to meet the market demand for bulk data movement in volatile memory devices, it is necessary to design volatile memory devices in consideration of efficient bulk data movement and high-speed data movement execution.

Several architectures have been proposed for fast and efficient bulk data movement. For example, there are row clones and low cost reciprocal link subarrays (LISA), but their effectiveness is limited to row clone methods that can enable fast data movement, the method of which is volatile memory of which data movement is one. Only when they are in the same subarray of the device. To overcome the drawback of limiting data movement within the same subarray, memory cells are divided into multiple subarrays within a volatile memory device, each subarray is connected via a wide bitline interface and of different subarrays. Concatenated subarrays have been proposed by connecting rows to a narrow 64-bit data bus. While these prior arts perform efficient bulk data movement, they result in long latency and high power consumption. In addition, wide data paths for connecting subarrays within the same memory cell are not available. To overcome this problem, additional circuitry is required and the operating time is much higher, resulting in slower data movement. In addition, the adoption of an additional circuit increases the chip size and makes the process difficult.

Efficiency with the advantages of hidden backup operation, high speed, low cost, easy mountability and low power consumption for certain applications in this art, according to the demand for efficient bulk data movement in volatile memory. It is desired to actually develop a volatile memory device that realizes such bulk data movement.

Therefore, the present invention provides volatile memory devices and methods for efficient bulk data transfer and backup operations in volatile memory devices.

In one embodiment, the present invention provides a volatile memory device having a plurality of subarrays configured to access data, each subarray being electrically coupled to each other. Row control is configured to control each row of multiple subarrays. Column control is configured to control each column of a plurality of subarrays. The plurality of sense amplifiers is suitable for each of the plurality of subarrays to be periodically enabled during the data access operation. The plurality of subword drivers is suitable for providing a drive signal to the corresponding word line in the plurality of subarrays adjacent to the plurality of subarrays. The volatile memory device is configured to perform a data transfer operation in a predetermined block and determine odd and even data in the predetermined block. The volatile memory device enables the first backup block and the second backup block in the dynamic memory array by column control, and simultaneously backs up the odd data and the even data to the first backup block and the second backup block.

The volatile memory device determines a first backup block and a second backup block in the dynamic memory array through active commands.

Volatile memory devices self-define a first backup block and a second backup block in a dynamic memory array.

It is determined by the active command that the volatile memory device performs the data movement operation in a predetermined block. It is determined by the self-refresh operation that the volatile memory device performs the data movement operation in a predetermined block. The active command includes the address positions of a predetermined block, a first backup block, and a second backup block.

In one embodiment of the invention, during the self-refresh operation, the decision with or without backup of the data movement operation is selected by model repository backup or on-the-fly backup.

An efficient method of moving data in a volatile memory device having a dynamic memory array, including determining a backup array and a normal array in the volatile memory device by active commands. Normal operation and backup operation are determined by the active command. The steps for executing the backup operation include a step for executing a data movement operation in a predetermined block, a step for determining odd data and even data in the predetermined block, a step for periodically enabling the sense amplifier in the predetermined block, and a sense. After enabling the amplifier, the step of enabling the first backup block and the second backup block in the Dynac memory array by row control, and the first backup block and the second backup block of the odd data and the even data at the same time. Includes steps to back up to.

In view of the above, the method of the present invention can perform dedicated data transfer in a volatile memory device. In addition to moving data, hidden backups are performed simultaneously at different locations by splitting the data into odd and even data and putting them in a first backup block and a second backup block. Therefore, a wide data path is not needed to transfer bulk data. Furthermore, by performing a hidden backup operation during the bulk data movement operation, the backup operation is shared with the refresh function, which greatly reduces power consumption.

A block diagram of a memory bank in a volatile memory device based on an exemplary embodiment of the present invention is shown. A block diagram of conventional row control of a volatile memory device is shown. A block diagram of row control of a volatile memory device based on an exemplary embodiment of the present invention is shown. The bulk data movement operation (backup operation) sequence of the volatile memory device based on the exemplary embodiment of the present invention is shown. The operation waveform of the bulk data movement (backup operation) in the volatile memory device based on the exemplary embodiment of the present invention is shown. A flowchart of a data access operation in a volatile memory device based on an exemplary embodiment of the present invention is shown.

To make the above easier to understand, some embodiments with drawings will be described in detail below.

It should be understood that other embodiments can be utilized and structural changes can be made without departing from the scope of the invention. It should also be understood that the expressions and terms used herein are for illustration purposes only and should not be considered limiting. The use of "includes" or "has" and variations thereof herein is meant to include the items listed thereafter and their equivalents, as well as additional items. Unless otherwise specified, the terms "connected," "connected," and "attached" in the present specification, and variations thereof, are used in a broad sense, with direct and indirect connections, couplings, and. It includes mounting.

FIG. 1 shows a block diagram of a memory bank in a volatile memory device based on an exemplary embodiment of the present invention. With reference to FIG. 1, the volatile memory device 100 includes a plurality of memory banks 110. Each of the plurality of memory banks 110 is divided into a plurality of subarrays 150. The number of subarrays in the memory bank 110 is determined based on the density of the volatile memory device 100. The volatile memory device 100 can be any type of memory device, such as a dynamic random access memory (DRAM) or a static random access memory (SRAM). A plurality of memory banks 110, also referred to as "banks," are configured to store data that are electrically connected to each other. For example, the volatile memory device 100 is divided into a plurality of memory cells, typically 8 to 64 banks. Each bank is further subdivided into a plurality of subarrays 16 × 8Kb, 64 × 8Kb, 512 × 8Kb, but the present invention is not limited thereto. Each bank with the plurality of subarrays 150 is coupled to the corresponding subword driver (SWD) 151 and sense amplifier (SA) 152. The subword driver 151 corresponds to the subword line. The subword driver 151 is arranged adjacent to both sides of the subarray and drives the corresponding subarray 150. A plurality of subarrays 150 internally connected by an internal data bus are configured to perform data movement between memory cells.

The volatile memory device 100 further includes a row control 125, a row address decoder 120, a column control 135, and a row address decoder 130. The row control 125 and the column control 135 receive a control signal from the address register to access the data in the corresponding row data and column data. The access data in the present specification refers to backup data that is not read / written. Data access is performed by command signals such as "SELF? REFRESH" and "BACKUP". Therefore, the memory command signal in the present invention is not limited to a specific command operation. Based on the command from the address register to access the data, the row control 125 provides the control signal to the row address decoder 120. The row address decoder 120 selects one row of the memory bank 110. Similarly, the column address decoder 130 selects the column data corresponding to the column control signal from the column control 135. The sense amplifier 152 is suitable for a plurality of subarrays to be periodically enabled / disabled during a data movement (backup) operation. The refresh counter, which is not shown in the schematic, is configured to perform a refresh operation in the memory bank. In addition, the refresh counter also performs a "self-refresh" or "auto-refresh" of the memory cells without an active command. Therefore, the refresh counter in the present invention is not limited to this.

The volatile memory device 100 is configured to perform a data movement (backup) operation in a memory cell in response to a request from a user. During the data transfer (backup) operation, the volatile memory device 100 performs the data transfer operation within the defined memory blocks. In an exemplary embodiment of the invention, when performing a data transfer operation in a particular memory bank, the particular memory bank is determined as a predetermined block. The data transfer operation is performed in the corresponding subarray 150 by enabling the Sense Up 152 and the subword driver 151. In some embodiments, the number of predetermined blocks can be one or more, which requires that data movement operations and data backups be performed simultaneously at different address locations, details of which will be described below. ..

FIG. 2 shows a block diagram of conventional row control in the volatile memory device 100. With reference to FIG. 2, the row control 210 is a row control 125 as detailed in FIG. 1, and therefore a detailed description of the operation of the row control 210 will be omitted here. In a conventional volatile memory device, the row control 210 receives a bank active signal and a column address signal from an address register to access data. In response to the bank active signal and the row address signal, the row control 210 provides the word line enable signal WL enable, the sense amplifier SA enable, and the bit line BLEQU enable and row address enable signals. Word line enable signal WL enable is set to enable word line WL through the subword driver SWD. The row address enable signal is set to access data in the corresponding subarray of the volatile memory device 100. In traditional methods, accessing data refers to read / write operations. With this architecture, the data in the corresponding row can be accessed by the bank active signal and the row address signal from the address register of the volatile memory device. Traditional volatile memory devices perform read / write operations in the corresponding banks and use wide data paths between subarrays to limit data movement operations within the volatile memory device, resulting in long latency and long latency. It causes high memory consumption.

FIG. 3 shows a block diagram of a row control 300 of a volatile memory device 100 based on an exemplary embodiment of the present invention. With reference to FIG. 3, the row control 310 is similar to the row control 210 as detailed in FIG. With reference to the conventional row control 210 detailed above, the row control 310 in an exemplary embodiment of the invention receives a bank active signal and a row address signal to perform access to data in the corresponding subarray. To do. The data access in this embodiment refers to backup data without read / write operation. The sub-array 150 of the memory bank 110 is determined as a normal array and a backup array in the volatile memory device 100. Apart from the conventional data access operation (that is, normal operation) detailed in FIG. 2, the volatile memory device 100 executes data movement (backup operation) by an active command. In some other embodiments, enabling the backup operation in the present invention is not limited to this, as the backup operation is performed without an active command and the volatile memory device 100 itself defines the backup operation. .. The operation sequences of the normal operation and the backup operation will be described in detail below. In addition to the bank active signal and the row address signal to the row control 310, a delay signal corresponding to the bank active is given to the row control by the delay circuit 320 to execute the backup operation, and the detailed operation of the backup operation is detailed below. Describe.

During the backup operation, the row control 310 receives a bank active signal for enabling the sub-array and executing the data movement operation, and a row address signal for arranging the row address of the sub-array and executing the data movement operation. In addition to the bank active signal, the row control 310 receives an enable signal with a delay generated by the delay circuit 320. The delay circuit 320 has N inverter circuits, where N is selected to be a real positive number (eg, N = 1, 2, 3, 4, ...). In some embodiments, the delay circuit 320 can also be implemented by using resistors and capacitors (RC delays) or logic circuits. Therefore, the delay circuit 320 in the present invention is not limited to these. After receiving a command from the address register to access the data, the row control 310 receives the enable signal WL enable (normal array), SA enable (normal array), BLEQ (normal array), backup array WL enable (backup array). , SA enable (backup array), and BL enable (backup array). The BL enable signal from the row control 310 is provided corresponding to the subarray row address (bank) to perform normal and backup operations simultaneously, thereby consuming efficient data with low power consumption during the backup operation. Achieve moving operation. The detailed operation of subdividing the memory cell into a normal array and a backup array will be described in detail below. By this method, low power consumption and hidden backup during the data movement operation are achieved without adding additional hardware for the backup operation.

FIG. 4 shows a bulk data transfer operation sequence of a volatile memory device based on an exemplary embodiment of the present invention. With reference to FIG. 1, the schematic diagram of the memory bank of the volatile memory device 400 is the same as the schematic diagram of the memory bank of the volatile memory device 100. During the data transfer (backup) operation, the volatile memory device 400 determines odd and even data in the predetermined block 410. The predetermined block 410 is represented by an example in the exemplary embodiment as WL (i), WL (j), WL (k), WL (1), and has four lines connected corresponding to the word line WL. It is subdivided into. Similarly, the data in each column is coupled to the corresponding sense amplifier SA. When the data move (backup) operation is enabled, the volatile memory device is determined as odd and even data within a given block 410, and the odd data is determined as data in the odd columns (eg, column 1, 3, 5, 7 ...). Similarly, even data in a volatile memory device is determined by the controller by selecting data in even columns (eg, columns 2, 4, 6, 8 ...). In some other embodiments, the volatile memory device 400 itself can determine the odd and even data in the predetermined block 410, and thus the odd and even data in the predetermined block 410 in the present invention. The decision is not limited to this.

After determining the odd and even data in the predetermined block 410, the volatile memory device 400 enables the first backup block 420 and the second backup block 430, and the first backup block 420 and the second backup block 430. Is defined as a backup array during the data movement operation. The odd-numbered data in the predetermined block 410 is moved to the first backup block 420, and at the same time, the even-numbered data is moved to the second backup block 430. Therefore, efficient data movement and hidden backup operations are performed within the volatile memory device by partitioning the data that needs to be moved to different locations that are performed at the same time. This operation does not require a wide data path for bulk data movement during the refresh operation, and sharing the backup operation with the refresh function significantly reduces power consumption.

In some embodiments, the volatile memory device defines a first backup block 420 and a second backup block 430 by default, and in some other embodiments the first backup block 420 and a second backup block 420. Backup block 430 is defined by the controller through active commands. In some embodiments, the backup operation is performed during a self-refresh or auto-refresh operation. The active command is provided by the controller having the address positions of the predetermined block, the first backup block and the second backup block. During the execution of the self-refresh command, the model repository backup (MRS) or on-the-fly backup selects the data movement operation with and without backup.

FIG. 5 shows an operating waveform of bulk data movement in a volatile memory device based on an exemplary embodiment of the present invention. Referring to FIG. 5, the word line WL (i) of the predetermined block 1 enables the block 1 at the time t0 during the data movement operation. Following the WL (i) enable, its BL and complementary bitline BL # are enabled corresponding to predetermined block 1. After the time is delayed by t1, the sense amplifier SA corresponding to the data in the predetermined block 1 is enabled. In the meantime, the volatile memory device determines a first backup block and a second backup block to back up odd and even data. At time t2, the cell nodes combined with the corresponding WL and BL are backed up simultaneously in the first backup block, block 01 and second backup block, block 12. Similarly, during time t3, the SA lines of SA0 and SA3 are enabled and the BL and BL # of the corresponding data in the predetermined block are enabled during the backup operation. The backup operation is executed in the backup block 01 and the backup block 12. During this operation, the first backup block is backup 01 and the second backup block is backup 12. Therefore, a plurality of predetermined blocks are enabled at the same time by enabling the corresponding SA and WL signals. Referring to FIG. 5, the normal operation in the normal array and the backup operation in the backup array are identified through the controller by the active command Xadd <i> = 0/1. For example, the active command for normal operation in the normal array is defined as Xadd <i> = 0, and the backup operation is defined as Xadd <i> = 1.

FIG. 6 is a flow chart of a data access operation in a volatile memory device based on an exemplary embodiment of the present invention, which includes determining a backup array and a normal array in the volatile memory device by the active command in step 600. The active command is defined as Xadd <i> = 0/1, and in step 610, the active command for performing the normal operation or the backup operation on the volatile memory device is determined. When the active command is Xadd <i> = 0, the volatile memory device is determined to perform normal operation as defined in step 630. When the active command in step 610 is determined to be Xadd <i> = 1, the volatile memory device enables the initiation of a backup operation as defined in step 620. The steps for performing a backup operation include the following steps: In step 601 the data movement operation is executed in the predetermined block. In step 602, odd-numbered data and even-numbered data in a predetermined block are determined. In step 603, the sense amplifiers of the cells in the predetermined block are periodically enabled. After enabling the sense amplifier, in step 604, the first backup block and the second backup block in the dynamic memory array are enabled through row control. After performing all the steps described above, in step 605, the odd-numbered data and the even-numbered data are simultaneously backed up in the first backup block and the second backup block.

In summary, embodiments of the present invention introduce volatile memory devices and methods of efficient hidden data movement in volatile memory devices. This method can perform dedicated data movements in volatile memory devices. In addition to moving data, hidden backups are performed simultaneously at different locations by splitting the data into odd and even data and putting them in a first backup block and a second backup block. Therefore, a wide data path is not needed to transfer bulk data. Furthermore, by performing a hidden backup operation during the bulk data movement operation, the backup operation is shared with the refresh function, which greatly reduces power consumption. This method is not limited to the control signal from the controller for executing the data movement operation, but is also performed by the self-refresh or auto-refresh operation. The volatile memory device may determine the first backup block and the second backup block without an active command.

As will be apparent to those skilled in the art, various modifications and variations can be made to the disclosed embodiments without departing from the scope or spirit of the invention. In view of the above, the present invention is intended to cover the modifications and modifications contained within the scope of claims and their equivalents described below.

110 Memory bank 120 rows Address decoder 125, 210, 310 Row control 130 Column address decorator 135 Column control 150 Sub array 410 Predetermined block 420 First backup block 430 Second backup block 151 Subword driver 152 Sense amplifier 320 Delay circuit SA Sense Amplifier BL bit line WL word line

Claims (14)

An efficient data movement method for volatile memory devices with dynamic memory arrays.
Includes determining backup and normal arrays in volatile memory devices with active commands
The backup operation and normal operation are determined by the active command.
The step of executing the backup operation is
Performing a data movement operation in a given block,
Determining odd-numbered data and even-numbered data in the predetermined block
To periodically enable the sense amplifier of the predetermined block,
After enabling the sense amplifier, and that the row control to enable the first backup block and a second backup block in the die Nami click memory array,
To back up the odd-numbered data and the even-numbered data to the first backup block and the second backup block at the same time,
Including
An efficient method of moving data in a volatile memory device, wherein the predetermined block, the first backup block, and the second backup block are coupled to the same word line. The efficient data movement method in a volatile memory device according to claim 1, wherein the volatile memory device determines the first backup block and the second backup block in the dynamic memory array through an active command. The efficient data movement method in a volatile memory device according to claim 1, wherein the volatile memory device self-defines the first backup block and the second backup block in the dynamic memory array. The efficient data movement method in a volatile memory device according to claim 1 or 2, wherein performing the data movement operation in the predetermined block is determined by an active command. The efficient data movement method in a volatile memory device according to claim 1, wherein performing the data movement operation in the predetermined block is determined by the self-refresh operation. The efficient data movement method in a volatile memory device according to claim 1 or 2, wherein the active command includes an address position of the predetermined block, the first backup block, and the second backup block. The efficient data movement method in a volatile memory device according to claim 5, wherein during the self-refresh operation, the determination with or without backup of the data movement operation is selected by model repository backup or on-the-fly backup. With multiple subarrays configured to access data, each electrically coupled to each other,
Row control configured to control each row of the plurality of subarrays,
A column control configured to control each column of the plurality of subarrays,
A plurality of sense amplifiers suitable for periodically enabling each of the plurality of subarrays during a data access operation, and
A plurality of subword drivers suitable for providing a drive signal to the corresponding word line in the plurality of subarrays adjacent to the plurality of subarrays.
Including
A data movement operation is executed in a predetermined block, odd data and even data in the predetermined block are determined, and the data is determined.
The first backup block and the second backup block in the dynamic memory array are enabled through row control, and the odd data and the even data are simultaneously backed up to the first backup block and the second backup block.
A volatile memory device in which the predetermined block, the first backup block, and the second backup block are coupled to the same word line. The volatile memory device according to claim 8, wherein the first backup block and the second backup block in the dynamic memory array are determined through an active command. The volatile memory device according to claim 8, wherein the first backup block and the second backup block in the dynamic memory array are self-defining. The volatile memory device according to claim 8, wherein performing a data movement operation in the predetermined block is determined by an active command. The volatile memory device according to claim 8, wherein performing the data movement operation in the predetermined block is determined by the self-refresh operation. The volatile memory device according to claim 9, wherein the active command includes the predetermined block, the first backup block, and the address positions of the second backup block. The volatile memory device according to claim 12, wherein during the self-refresh operation, the determination with or without backup of the data movement operation is selected by model repository backup or on-the-fly backup.