JP6789453B2 - Phase difference detection circuit and clock generator - Google Patents

Description

The present invention relates to a phase difference detection circuit and a clock generator for detecting an abnormality in a signal source.

The phase difference detection circuit may be used in a master clock generator of a positioning satellite system or the like.
The phase difference detection circuit is a circuit that detects an abnormality in a signal source by detecting the phase difference of signals output from a plurality of signal sources and monitoring the phase difference.

The following Patent Document 1 discloses a phase difference detection circuit capable of detecting the phase difference of signals output from a plurality of signal sources even when the frequencies of signals output from a plurality of signal sources are different. ing.
The phase difference detection circuit disclosed in Patent Document 1 includes two frequency synthesizers, two frequency converters, and a phase meter.
Hereinafter, in order to distinguish between the two frequency synthesizers, they are referred to as "first frequency synthesizer" and "second frequency synthesizer".
Further, in order to distinguish between the two frequency converters, they are described as "first frequency converter" and "second frequency converter".

The first frequency converter uses the frequency signal output from the first frequency synthesizer to convert the input signal into an intermediate frequency signal.
The second frequency converter uses the frequency signal output from the second frequency synthesizer to convert the input signal into an intermediate frequency signal.
The frequency of the frequency signal output from the first frequency synthesizer and the frequency of the frequency signal output from the second frequency synthesizer are different frequencies. The intermediate frequency signal output from the first frequency converter and the intermediate frequency signal output from the second frequency converter have the same frequency.
The phase meter detects the phase difference between the intermediate frequency signal output from the first frequency converter and the intermediate frequency signal output from the second frequency converter.

Japanese Unexamined Patent Publication No. 2010-259072

In the phase difference detection circuit disclosed in Patent Document 1, the frequency of the frequency signal used by the first frequency converter for frequency conversion of the input signal and the frequency of the frequency signal used by the second frequency converter for frequency conversion of the input signal. Is different.
Therefore, the intermediate frequency signal output from the first frequency converter and the intermediate frequency signal output from the second frequency converter are superposed with different phase jitters, so that the phase difference detection accuracy in the phase meter is high. May deteriorate.
The phase difference detection circuit disclosed in Patent Document 1 has a problem that the presence or absence of an abnormality in a signal source may be mistaken as the phase difference detection accuracy deteriorates.

The present invention has been made to solve the above problems, and provides a phase difference detection circuit and a clock generator capable of preventing erroneous determination of the presence or absence of an abnormality in a signal source even when phase jitter is superimposed. The purpose is to get.

The phase difference detection circuit according to the present invention is a first signal that generates a third signal from a first signal output from the first signal source and a second signal output from the second signal source. The frequency converter, the first delay circuit that delays the first signal output from the first signal source and outputs it as the fourth signal, and the second signal output from the second signal source. From the second delay circuit that is delayed and output as the fifth signal, the fourth signal output from the first delay circuit, and the fifth signal output from the second delay circuit, a third signal is used. A second frequency converter that produces a sixth signal having the same frequency as the signal frequency, a phase of a third signal produced by the first frequency converter, and a second frequency converter. It is provided with a comparator that outputs a seventh signal indicating a phase difference from the phase of the sixth signal, and a determination circuit is provided with a first signal source or a first signal source based on the seventh signal output from the comparator. The occurrence of an abnormality in the second signal source is detected.

The phase difference detection circuit according to the present invention can prevent erroneous determination of the presence or absence of an abnormality in the signal source even if phase jitter is superimposed.

It is a block diagram which shows the clock generation apparatus which includes the phase difference detection circuit 4 by Embodiment 1. FIG. It is a block diagram which shows the determination circuit 19 of the phase difference detection circuit 4 according to Embodiment 1. FIG. It is explanatory drawing which shows the time change of the signal when an abnormality occurs in the 1st signal source 1. It is explanatory drawing which shows the time change of the signal when an abnormality occurs in the 2nd signal source 2. It is a block diagram which shows the other clock generation apparatus by Embodiment 1. FIG. It is a block diagram which shows the clock generation apparatus which includes the phase difference detection circuit 4 by Embodiment 2. It is a block diagram which shows the determination circuit 30 of the phase difference detection circuit 4 by Embodiment 2. And abnormality occurs in both the first signal source 1 and the second signal source 2, a first abnormality occurrence time t ₁ of the signal source 1 and the abnormality occurrence time t ₂ of the second signal source 2 It is explanatory drawing which shows the time change of the signal in the case of the same (t ₁ = t ₂ ). And abnormality occurs in both the first signal source 1 and the second signal source 2, a second abnormality occurrence time t ₂ of the signal source 2 than the abnormality occurrence time t ₁ of the first signal source 1 It is explanatory drawing which shows the time change of the signal in the case of slow (t ₁ <t ₁ + τ _A <t ₂ <t ₂ + τ _B ). It is explanatory drawing which shows the time change of the digital signal in the pattern (1)-(12). It is a block diagram which shows the clock generation apparatus which includes the phase difference detection circuit 6 by Embodiment 3. FIG. It is a block diagram which shows the determination circuit 49 of the phase difference detection circuit 6 according to Embodiment 3. FIG. It is explanatory drawing which shows the time change of the signal when an abnormality occurs in the 1st signal source 1. It is explanatory drawing which shows the time change of the signal when an abnormality occurs in the 2nd signal source 2. And abnormality occurs in both the first signal source 1 and the second signal source 2, a first abnormality occurrence time t ₁ of the signal source 1 and the abnormality occurrence time t ₂ of the second signal source 2 It is explanatory drawing which shows the time change of the signal in the case of the same (t ₁ = t ₂ ). And abnormality occurs in both the first signal source 1 and the second signal source 2, a second abnormality occurrence time t ₂ of the signal source 2 than the abnormality occurrence time t ₁ of the first signal source 1 It is explanatory drawing which shows the time change of the signal in the case of slow (t ₁ <t ₂ ). It is a block diagram which shows the other clock generation apparatus by Embodiment 3. FIG.

Hereinafter, in order to explain the present invention in more detail, a mode for carrying out the present invention will be described with reference to the accompanying drawings.

Embodiment 1.
FIG. 1 is a configuration diagram showing a clock generator including the phase difference detection circuit 4 according to the first embodiment.
In FIG. 1, the first signal source 1 is a signal source targeted for abnormality detection, and is realized by a crystal oscillator, a rubidium oscillator, a cesium oscillator, a VCO (Voltage Controlled Oscillator), a DDS, or the like.
The first signal source 1 outputs a first signal having a frequency of f ₁ and an initial phase of θ ₁ to each of the clock signal generator 3, the first frequency converter 11, and the first delay circuit 12. To do.
The second signal source 2 is a signal source targeted for abnormality detection, and is realized by a crystal oscillator, a rubidium oscillator, a cesium oscillator, a VCO, a DDS, or the like.
The second signal source 2 outputs a second signal having a frequency of f ₂ and an initial phase of θ ₂ to each of the clock signal generator 3, the first frequency converter 11, and the second delay circuit 13. To do.

The clock signal generation unit 3 is realized by a multiplier, a frequency divider, or the like.
The clock signal generation unit 3 generates a clock signal by using the first signal output from the first signal source 1 and the second signal output from the second signal source 2.
In the clock generator shown in FIG. 1, the clock signal generation unit 3 generates one clock signal from the first signal and the second signal. However, this is only an example, and the clock signal generation unit 3 may generate one clock signal from the first signal and generate another clock signal from the second signal.
The phase difference detection circuit 4 monitors the first signal output from the first signal source 1 and the second signal output from the second signal source 2, and monitors the first signal source 1 or the second signal source 2. The occurrence of an abnormality in the signal source 2 of the above is detected.
Further, the phase difference detection circuit 4 monitors the first signal output from the first signal source 1 and the second signal output from the second signal source 2, and monitors the first signal source 1 and the first signal source 1 and the second signal. Among the second signal sources 2, the signal source in which the abnormality has occurred is determined.

The first frequency converter 11 is realized by a mixer, a sample hold circuit, or a circuit in which a mixer and a sample hold circuit are combined.
The first frequency converter 11 generates a third signal from the first signal output from the first signal source 1 and the second signal output from the second signal source 2, and the third signal is generated. The signal of 3 is output to the first filter 15.
For example, the first frequency converter 11 uses the second signal to convert the frequency of the first signal to generate a third signal.

The first delay circuit 12 is realized by a through line having a fixed line length. The first delay circuit 12 may be implemented by a first delay time tau _A variable length coaxial tube adjustment is possible.
First delay circuit 12, a first signal output from the first signal source 1 is delayed by a first delay time tau _A, as a fourth signal, the first signal after a delay the second Is output to the frequency converter 14.

The second delay circuit 13 is realized by a through line having a fixed line length. The second delay circuit 13 may be implemented by a second delay time τ variable length coaxial tube adjustment is possible _B.
The second delay circuit 13, a second signal output from the second signal source 2 is delayed by a second delay time tau _B, as a fifth signal, the second signal after a delay the second Is output to the frequency converter 14.
The first delay time τ _A in the first delay circuit 12 and the second delay time τ _B in the second delay circuit 13 have different delay times.
In the first embodiment, an example in which τ _A <τ _B will be described, but τ _A > τ _B may be used.
In order for the determination circuit 19 described later to be able to determine which of the first signal source 1 and the second signal source 2 has an abnormality, τ _A ≠ τ _B. There is a need.
However, if the determination circuit 19 can detect the occurrence of an abnormality in the first signal source 1 or the second signal source 2, τ _A = τ _B may be used.

The second frequency converter 14 is realized by a mixer, a sample hold circuit, or a circuit in which a mixer and a sample hold circuit are combined.
The second frequency converter 14 generates a sixth signal from the fourth signal output from the first delay circuit 12 and the fifth signal output from the second delay circuit 13, and the second frequency converter 14 generates a sixth signal. The signal of 6 is output to the second filter 16.
For example, the second frequency converter 14 uses the fifth signal to convert the frequency of the second signal to generate the sixth signal.
The frequency of the sixth signal output from the second frequency converter 14 is the same frequency as the frequency of the third signal output from the first frequency converter 11.

Here, the first frequency converter 11 uses the second signal to convert the frequency of the first signal, and as the third signal, the first signal after frequency conversion is used as the first filter 15. Is output to. However, this is only an example, and the first frequency converter 11 uses the first signal to convert the frequency of the second signal, and as the third signal, the second signal after frequency conversion. May be output to the first filter 15.
When the first frequency converter 11 uses the first signal to convert the frequency of the second signal, the second frequency converter 14 uses the fourth signal to convert the frequency of the fifth signal. The frequency is converted, and as the sixth signal, the fifth signal after frequency conversion is output to the second filter 16.

The first filter 15 is realized by a chip inductor, a chip capacitor, an LPF (Low Pass Filter), a BPF (Band Pass Filter), or the like. Further, the first filter 15 may be realized by a microstrip, a coaxial resonator, or the like.
The first filter 15 has a pass band through which the signal component of the third signal output from the first frequency converter 11 passes, and is a filter that suppresses signals outside the pass band and unnecessary waves. ..
Therefore, the first filter 15 suppresses the spurious signal contained in the third signal output from the first frequency converter 11, and suppresses the spurious signal (hereinafter, "third"). (Referred to as'signal') is output to the comparator 17.

The second filter 16 is realized by a chip inductor, a chip capacitor, an LPF, a BPF, or the like. Further, the second filter 16 may be realized by a microstrip, a coaxial resonator, or the like.
The second filter 16 has a pass band through which the signal component of the sixth signal output from the second frequency converter 14 passes, and is a filter that suppresses signals outside the pass band and unnecessary waves. ..
Therefore, the second filter 16 suppresses the spurious signal contained in the sixth signal output from the second frequency converter 14, and suppresses the spurious signal (hereinafter, "sixth"). (Referred to as'signal') is output to the comparator 17.

The comparator 17 is realized by a mixer or the like.
The comparator 17 compares the phase of the third'signal output from the first filter 15 with the phase of the sixth'signal output from the second filter 16 and compares the phase of the third'signal. The phase difference between the phase and the phase of the 6th signal is detected.
The comparator 17 outputs a seventh signal indicating the detected phase difference to the ADC (Analog to Digital Converter) 18.

The ADC 18 is an analog-to-digital converter realized by a delta-sigma type AD (Analog to Digital) converter, a flash type AD converter, or the like.
The ADC 18 converts the seventh signal output from the comparator 17 from an analog signal to a digital signal, and outputs the digital signal to the determination circuit 19.
For example, the ADC 18 converts the seventh signal from an analog signal to a digital signal by sampling the seventh signal in synchronization with the clock signal, and outputs the digital signal to the determination circuit 19.
The clock signal may be a clock signal output from the clock signal generation unit 3 or may be given from the outside of the clock generation device.
The ADC 18 includes a memory for storing a digital signal each time the seventh signal is converted from an analog signal to a digital signal, averages a plurality of digital signals, and outputs the averaged digital signal to the determination circuit 19. You may.

The determination circuit 19 is realized by an FPGA (Field Programmable Gate Array) or the like.
The determination circuit 19 includes a phase calculation unit 21, a change time measurement unit 22, and a determination unit 23 (see FIG. 2).
The determination circuit 19 detects the occurrence of an abnormality in the first signal source 1 or the second signal source 2 based on the digital signal output from the ADC 18.
For example, in the determination circuit 19, if the phase of the digital signal output from the ADC 18 does not change with the passage of time, there is no abnormality in either the first signal source 1 or the second signal source 2. Is determined. If the phase of the digital signal output from the ADC 18 changes with the passage of time, the determination circuit 19 determines that the first signal source 1 or the second signal source 2 has an abnormality.
Further, the determination circuit 19 determines which of the first signal source 1 and the second signal source 2 has an abnormality based on the time change of the phase of the digital signal output from the ADC 18. To judge.

FIG. 2 is a configuration diagram showing a determination circuit 19 of the phase difference detection circuit 4 according to the first embodiment.
In FIG. 2, the phase calculation unit 21 calculates the phase of the digital signal output from the ADC 18 and outputs the calculated phase to the change time measurement unit 22.
The change time measuring unit 22 detects the phase change output from the phase calculating unit 21.
When the change time measuring unit 22 detects a phase change, it measures the time from the time when the change is detected until the changed phase returns to the original phase, and outputs the measured time to the determination unit 23.

The determination unit 23 detects the occurrence of an abnormality in the first signal source 1 or the second signal source 2 based on the time output from the change time measurement unit 22.
For example, if the time output from the change time measuring unit 22 is zero, the determination unit 23 determines that there is no abnormality in either the first signal source 1 or the second signal source 2. Output.
Further, the determination unit 23 determines which of the first signal source 1 and the second signal source 2 has an abnormality based on the time output from the change time measurement unit 22. To do.
For example, if the time output from the change time measuring unit 22 is the first delay time τ _A , the determination unit 23 outputs a determination result indicating that an abnormality has occurred in the first signal source 1. .. If the time output from the change time measuring unit 22 is the second delay time τ _B , the determination unit 23 outputs a determination result indicating that an abnormality has occurred in the second signal source 2.

Next, the operation of the phase difference detection circuit 4 shown in FIG. 1 will be described.
In the phase difference detection circuit 4 shown in FIG. 1, a through line is used as the first delay circuit 12 and the second delay circuit 13, and the first frequency converter 11, the second frequency converter 14, and the comparator are used. It is assumed that a mixer is used as 17.
Further, among the components of the phase difference detection circuit 4 shown in FIG. 1, in the components other than the first delay circuit 12 and the second delay circuit 13, there is a delay from the input of the signal to the output of the signal. Shall not occur.

式（１）において、ｔは、時刻であり、以下の式でも同様である。As shown in the following equation (1), the first signal source 1 uses the clock signal generator 3 and the first frequency converter 11 to generate the first signal having a frequency of f ₁ and an initial phase of θ _1. And output to each of the first delay circuit 12.

In the formula (1), t is a time, and the same applies to the following formula.

As shown in the following equation (2), the second signal source 2 uses the clock signal generator 3 and the first frequency converter 11 to generate a second signal having a frequency of f ₂ and an initial phase of θ _2. And output to each of the second delay circuit 13. In the first embodiment, it is assumed that f ₁ > f ₂ for convenience of explanation.

First delay circuit 12, when the first signal source 1 receives the first signal, delaying the first signal by a first delay time tau _A.
The first delay circuit 12 outputs the fourth signal represented by the following equation (3) to the second frequency converter 14 as the first signal after the delay.

The second delay circuit 13, when the second signal source 2 receives the second signal, delays the second signal by a second delay time tau _B.
The second delay circuit 13 outputs the fifth signal represented by the following equation (4) to the second frequency converter 14 as the second signal after the delay.

式（５）及び式（６）において、ｍ，ｎは、正の整数である。The first frequency converter 11 mixes the first signal output from the first signal source 1 and the second signal output from the second signal source 2, and uses the third signal as a third signal. The mixed signal of the first signal and the second signal is output to the first filter 15.
The second frequency converter 14 mixes the fourth signal output from the first delay circuit 12 and the fifth signal output from the second delay circuit 13, and obtains a sixth signal as a sixth signal. The mixed signal of the signal 4 and the signal 5 is output to the second filter 16.
Here, assuming that the two frequencies input to the mixer used as the frequency converter are _fin1 and _fin2 , the output frequencies of the mixer are shown in the following equations (5) and (6). Will be done.

In equations (5) and (6), m and n are positive integers.

The two signals input to the first frequency converter 11 are a first signal and a second signal, the frequency of the first signal is f ₁ , and the frequency of the second signal is f ₂ .
The two signals input to the second frequency converter 14 are a fourth signal and a fifth signal, the frequency of the fourth signal is f ₁ , and the frequency of the fifth signal is f ₂ . is there.
Here, the desired frequency of the third signal, which is the output signal of the first frequency converter 11, is f ₁ − f ₂ , and the output signal of the second frequency converter 14 is the sixth signal. It is assumed that the desired frequency is f ₁ − f ₂ . The desired frequency of the third signal is the output frequency of the mixer represented by the equations (5) and (6), and the designer of the clock generator shown in FIG. 1 wants to use the third signal. It means the frequency of the output signal. The desired frequency of the sixth signal has the same meaning as the desired frequency of the third signal.
Since the frequencies f ₁ −f ₂ are the frequencies when m = n = 1 in the equation (6), here, the desired frequencies in the first frequency converter 11 and the second frequency converter 14, respectively. It is assumed that the output frequency is the frequency when m = n = 1 in the equation (6).

第２の周波数変換器１４から出力される第６の信号は、以下の式（８）のように表される。

式（６）におけるｍ＝ｎ＝１の場合の周波数以外の周波数を有する信号は、スプリアス信号であるため、第３の信号及び第６の信号のそれぞれは、所望の周波数ｆ_１−ｆ_２を有する信号以外に、多数のスプリアス信号が重畳されている。Therefore, the third signal output from the first frequency converter 11 is expressed by the following equation (7).

The sixth signal output from the second frequency converter 14 is expressed by the following equation (8).

Since the signal having a frequency other than the frequency in the case of m = n = 1 in the equation (6) is a spurious signal, each of the third signal and the sixth signal has a desired frequency f ₁ − f ₂ . In addition to the included signals, a large number of spurious signals are superimposed.

When the first filter 15 receives the third signal from the first frequency converter 11, the first filter 15 passes the signal of the frequency f ₁ − f ₂ among the signals contained in the third signal to the third signal. The spurious signal included in the signal of 3 is suppressed.
The third signal, that is, the signal having the frequency f ₁ − f ₂ , which is the third signal whose spurious signal is suppressed by the first filter 15, is input to the comparator 17.
When the second filter 16 receives the sixth signal from the second frequency converter 14, the second filter 16 passes the signal of the frequency f ₁ − f ₂ among the signals included in the sixth signal to the _second filter. The spurious signal included in the signal of 6 is suppressed.
The sixth signal, which is the sixth signal in which the spurious signal is suppressed by the second filter 16, that is, the signal having the frequency f ₁ − f ₂ , is input to the comparator 17.
The first filter 15 and the second filter 16 are provided to prevent malfunction and failure of the comparator 17 due to input of a large number of spurious signals to the comparator 17.
When the spurious signal contained in the third signal and the spurious signal contained in the sixth signal have a frequency other than the operable frequency of the comparator 17, or when the power of the spurious signal is low, etc. Then, the malfunction and failure of the comparator 17 do not occur. If the comparator 17 does not malfunction or fail, the first filter 15 and the second filter 16 may not be mounted on the phase difference detection circuit 4.

When the comparator 17 receives the third'signal from the first filter 15 and the second filter 16 to the sixth'signal, the phase of the third'signal and the phase of the sixth'signal Is compared to detect the phase difference between the phase of the third'signal and the phase of the sixth'signal.
The comparator 17 outputs a seventh signal indicating the detected phase difference to the ADC 18.
In the first embodiment, it is assumed that a mixer is used as the comparator 17, and the output signals of the mixer are generally expressed as equations (5) and (6).
The seventh signal output from the comparator 17 is a signal having a frequency represented by m = n = 1 in the equation (6), and a signal other than the frequency represented by m = n = 1 is generated. Not to be. That is, it is assumed that the frequency of the seventh signal output from the comparator 17 is DC (Direct Current).

The frequency f _1, f ₂ of the two signals input to the first frequency converter 11, the frequency f _1, f ₂ of the two signals input to the second frequency converter 14, the same ..
Therefore, the phase jitter superimposed on the third signal output from the first frequency converter 11 and the phase jitter superimposed on the sixth signal output from the second frequency converter 14 are the same. Is.
Therefore, when the comparator 17 detects the phase difference between the phase of the third signal and the phase of the sixth signal, it is superimposed on the phase jitter superimposed on the third signal and on the sixth signal. Since the phase jitter is canceled out, deterioration of the detection accuracy of the phase difference in the comparator 17 can be suppressed.

When the ADC 18 receives the seventh signal from the comparator 17, it converts the seventh signal from an analog signal to a digital signal and outputs the digital signal to the determination circuit 19.
When the determination circuit 19 receives a digital signal from the ADC 18, an abnormality occurs in either of the first signal source 1 and the second signal source 2 based on the time change of the phase of the digital signal. Judge whether or not.
Hereinafter, the determination process by the determination circuit 19 will be specifically described.

When the phase calculation unit 21 receives the digital signal from the ADC 18, the phase calculation unit 21 calculates the phase of the digital signal and outputs the calculated phase to the change time measurement unit 22.
The change time measuring unit 22 detects the phase change output from the phase calculating unit 21.
When the change time measuring unit 22 detects the change in phase, the change time measuring unit 22 measures the time Δt from the time when the change is detected until the changed phase returns to the original phase, and outputs the measured time Δt to the determination unit 23.

If the time Δt output from the change time measuring unit 22 is the first delay time τ _A , the determination unit 23 outputs a determination result indicating that an abnormality has occurred in the first signal source 1.
Further, the determination unit 23 outputs a determination result indicating that an abnormality has occurred in the second signal source 2 if the time Δt output from the change time measurement unit 22 is the second delay time τ _B. To do.

FIG. 3 is an explanatory diagram showing a time change of a signal when an abnormality has occurred in the first signal source 1.
In FIG. 3, the horizontal axis is time.
In Figure 3, the second signal source 2 is normal shows an example in which abnormality occurs when a first signal source 1 is a time t _1.
Since the first signal source 1 is normal at the time before the time t ₁ , the frequency of the first signal output from the first signal source 1 is f ₁ .
After time t _1, since an abnormality has occurred in the first signal source 1, the frequency of the first signal output from the first signal source 1 changes from f ₁ to (f ₁ + Δf ₁ ). changes, the initial phase is changed to the theta _{1 'from} theta _1.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and is transmitted to the comparator 17 as a third'signal.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 3, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) changes -f _2.
On the other hand, the second frequency converter 14, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 a second signal is transmitted with a delay of second delay time tau _B. Then, the spurious signal of the sixth signal output from the second frequency converter 14 is suppressed by the second filter 16 and transmitted to the comparator 17 as the sixth'signal.
Therefore, as shown in FIG. 3, the frequency of the sixth signal changes from f ₁ −f ₂ to (f ₁ + Δf ₁ ) −f ₂ at time t ₁ + τ _A.

In the time before the time t _1, 'a signal, the sixth' third and signals, in the initial phases are different by a frequency the same. Therefore, in the time before the time t _1, the digital signal indicating the phase of the seventh signal, i.e., 'a signal, the sixth' third digital signal indicating the phase difference between the phase of the signal, a constant Is.
In the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) −f ₂ , and the frequency of the 6th signal is f ₁ −f ₂ . Therefore, the phase of the digital signal indicating the phase difference changes with the passage of time. Digital signal phase, every second, changes by frequency Delta] f _1.

In the time after time t ₁ + τ _A , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the digital signal indicating the phase difference between the third'signal and the sixth'signal is constant.
From the above, when an abnormality occurs when the first signal source 1 is at time t ₁ , the time Δt output from the change time measuring unit 22, that is, the time t ₁ when the phase change is detected, is changed. The time until the time t ₁ + τ _A when the resulting phase returns to the original phase coincides with the first delay time τ _A.
Therefore, if the time Δt output from the change time measuring unit 22 is the first delay time τ _A , the determination unit 23 outputs a determination result indicating that an abnormality has occurred in the first signal source 1. To do.

FIG. 4 is an explanatory diagram showing a time change of a signal when an abnormality has occurred in the second signal source 2.
In FIG. 4, the horizontal axis is time.
In Figure 4, the first signal source 1 is normal shows an example in which abnormality has occurred when the second signal source 2 is a time t _2.
Since the second signal source 2 is normal at the time before the time t ₂ , the frequency of the second signal output from the second signal source 2 is f ₂ .
The time t ₂ subsequent to abnormality in the second signal source 2 is generated, the frequency of the second signal output from the second signal source 2, from _{f 2 (f 2 + Δf 2} ) changes, the initial phase is changed to the theta _{2 'from} theta _2.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and is transmitted to the comparator 17 as a third'signal.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 4, at time _{t 2, the} from _f 1 -f ₂ f 1 - varies _{(f 2} + Δf _2).
On the other hand, the second frequency converter 14, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 a second signal is transmitted with a delay of second delay time tau _B. Then, the spurious signal of the sixth signal output from the second frequency converter 14 is suppressed by the second filter 16 and transmitted to the comparator 17 as the sixth'signal.
Therefore, the frequency of the signal of the 6 ', as shown in FIG. 4, at time _{t 2} + tau _B, from _f 1 -f ₂ f 1 - varies _{(f 2} + Δf _2).

In the time before the time t _2, 'a signal, the sixth' third and signals, in the initial phases are different by a frequency the same. Therefore, the time before the time t _2, the digital signal indicating the phase of the seventh signal, i.e., 'a signal, the sixth' third digital signal indicating the phase difference between the phase of the signal, a constant Is.
In the time from time t ₂ to time t ₂ + τ _B , the frequency of the 3rd signal is f ₁ − (f ₂ + Δf ₂ ), and the frequency of the 6th signal is f ₁ −f ₂ . Therefore, the phase of the digital signal indicating the phase difference changes with the passage of time. The phase of the digital signal changes by frequency Δf ₂ every _second .

In the time after time t ₂ + τ _B , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the digital signal indicating the phase difference between the third'signal and the sixth'signal is constant.
From the above, when an abnormality occurs when the second signal source 2 is at time t ₂ , the change starts from the time Δt output from the change time measuring unit 22, that is, the time t ₂ when the phase change is detected. The time until the time t ₂ + τ _B when the resulting phase returns to the original phase coincides with the second delay time τ _B.
Therefore, if the time Δt output from the change time measuring unit 22 is the second delay time τ _B , the determination unit 23 outputs a determination result indicating that an abnormality has occurred in the second signal source 2. To do.

Here, FIG. 3 shows a time change of the signal when an abnormality occurs in the first signal source 1, and FIG. 4 shows a signal when an abnormality occurs in the second signal source 2. It shows a time change.
If no abnormality has occurred in both the first signal source 1 and the second signal source 2, the frequency of the third signal and the frequency of the sixth signal are constant without change. Is. Therefore, the phase of the digital signal indicating the phase difference between the third signal and the sixth signal does not change with the passage of time.
Therefore, if the time Δt output from the change time measuring unit 22 is zero, the determination unit 23 indicates that there is no abnormality in either the first signal source 1 or the second signal source 2. Is output.

In the first embodiment described above, a first signal is generated from the first signal output from the first signal source 1 and the second signal output from the second signal source 2. The frequency converter 11, the first delay circuit 12 that delays the first signal output from the first signal source 1 and outputs it as a fourth signal, and the second signal source 2 output from the second signal source 2. A second delay circuit 13 that delays the second signal and outputs it as a fifth signal, a fourth signal output from the first delay circuit 12, and a fifth signal output from the second delay circuit 13. From the signal, a second frequency converter 14 that generates a sixth signal having the same frequency as the frequency of the third signal, a phase of the third signal generated by the first frequency converter 11, and The determination circuit 19 includes a comparator 17 that outputs a seventh signal indicating a phase difference from the phase of the sixth signal generated by the second frequency converter 14, and the determination circuit 19 is output from the comparator 17. The phase difference detection circuit 4 is configured to detect the occurrence of an abnormality in the first signal source 1 or the second signal source 2 based on the signal of 7. Therefore, the phase difference detection circuit 4 can prevent erroneous determination of the presence or absence of abnormality in the signal source even if phase jitter is superimposed.

Further, in the first embodiment, the first delay circuit 12 delays the first signal output from the first signal source 1 by the first delay time, and the second delay circuit 13 is the second. The second signal output from the signal source 2 of the above is delayed by a second delay time different from the first delay time, and the determination circuit 19 changes the phase of the seventh signal output from the comparator 17 over time. The phase difference detection circuit 4 is configured so as to determine which of the first signal source 1 and the second signal source 2 has an abnormality based on the above. Therefore, the phase difference detection circuit 4 can identify which signal source the abnormality has occurred in.

In the phase difference detection circuit 4 shown in FIG. 1, the frequencies of the two signals input to the first frequency converter 11 and the frequencies of the two signals input to the second frequency converter 14 are both. It is assumed that f ₁ and f ₂ are the same. However, it is sufficient that the frequencies of the two signals input to the first frequency converter 11 and the frequencies of the two signals input to the second frequency converter 14 are the same, and both frequency converters 11, It is not limited to the case where the frequencies of the two signals input to 14 are both f ₁ and f ₂ .
Therefore, the phase difference detection circuit 4 may include, for example, the four frequency converters (1) to (4) shown below. Each of the four frequency converters (1) to (4) can be realized by a frequency divider, a multiplier, or the like.
Frequency converter (1), the frequency f ₁ of the first signal into a frequency f _3, a converter for outputting a signal of a frequency f ₃ to the first frequency converter 11.
Frequency converter (2), the frequency f ₂ of the second signal into a frequency f _4, a converter for outputting a signal of a frequency f ₄ to the first frequency converter 11.
Frequency converter (3), the frequency f ₁ of the fourth signal into a frequency f _3, a converter for outputting a signal of a frequency f ₃ to the second frequency converter 14.
Frequency converter (4), the frequency f ₂ of the fifth signal into a frequency f _4, a converter for outputting a signal of a frequency f ₄ to the second frequency converter 14.
The frequency of the third'signal output from the first filter 15 is converted by using a frequency divider or a multiplier, and the frequency is converted from the second filter 16 by using a frequency divider or a multiplier or the like. The frequency of the output 6'signal may be converted. However, the frequency of the 3'signal after frequency conversion and the frequency of the 6'signal after frequency conversion are the same frequency.

The clock generator shown in FIG. 1 includes a first signal source 1 and a second signal source 2, and the frequency f ₁ of the first signal output from the first signal source ₁ is the second. It is assumed that the frequency is higher than the frequency f ₂ of the second signal output from the signal source 2 (f ₁ > f ₂ ). However, this is only an example, and the frequency f ₁ of the first signal output from the first signal source ₁ is equal to or less than the frequency f ₂ of the second signal output from the second signal source 2. ₁ ≤ f ₂ ) may be set.

In the clock generator shown in FIG. 1, it is assumed that the desired frequencies of the third signal and the sixth signal are f ₁ − f ₂ . Therefore, it is assumed that the respective output frequencies of the first frequency converter 11 and the second frequency converter 14 are the frequencies when m = n = 1 in the equation (6).
However, this is only an example, and for example, the desired frequencies in the third signal and the sixth signal may be f ₁ + f ₂ . When the desired frequency is f ₁ + f ₂ , the respective output frequencies of the first frequency converter 11 and the second frequency converter 14 are the frequencies when m = n = 1 in the equation (5). is there.
Further, the desired frequency is not limited to the frequency when m = n = 1 in the equations (5) and (6), and the desired frequency is, for example, in the equation (5), m = 1, n = may be frequency _f 1 + 2f ₂ when the 2. Further, desired frequency, for example, in the formula (6), m = 2, n = it may be a frequency _2f 1 -2f ₂ when the 2.

The phase difference detection circuit 4 shown in FIG. 1 includes an ADC 18 that converts a seventh signal output from the comparator 17 from an analog signal to a digital signal and outputs the digital signal to the determination circuit 19.
The phase difference detection circuit 4 may include the following two ADCs (1) and (2) instead of the ADC 18.
The ADC (1) is an ADC that converts a third'signal output from the first filter 15 from an analog signal to a digital signal and outputs the digital signal to the comparator 17.
The ADC (2) is an ADC that converts the sixth'signal output from the second filter 16 from an analog signal to a digital signal and outputs the digital signal to the comparator 17.

In the clock generator shown in FIG. 1, it is assumed that the first signal source 1 outputs the first signal and the second signal source 2 outputs the second signal.
In order to be able to detect a failure in which the first signal source 1 does not output the first signal, the clock generator shown in FIG. 1 implements a measuring circuit for measuring the power or current of the first signal. It may be.
The determination circuit 19 of the first signal source 1 determines that the power of the first signal measured by the measurement circuit is smaller than the threshold Th ₁ or the current of the first signal is smaller than the threshold Th ₂ . Detect a failure.
Further, in order to detect a failure in which the second signal source 2 does not output the second signal, the clock generator shown in FIG. 1 implements a measurement circuit for measuring the power or current of the second signal. You may try to do it.
Judging circuit 19, when the power of the second signal measured by the measuring circuit is smaller than the threshold value Th _1, or a current of the second signal is less than the threshold value Th _2, the second signal source 2 Detect a failure.
The threshold values Th ₁ and Th ₂ may be stored in the internal memory of the determination circuit 19 or may be given from the outside.

In the phase difference detection circuit 4 shown in FIG. 1, it is assumed that each of the first delay circuit 12 and the second delay circuit 13 is a through line. However, this is only an example, and each of the first delay circuit 12 and the second delay circuit 13 may be a filter. However, since the filter has a time constant, when each of the first delay circuit 12 and the second delay circuit 13 is a filter, the abnormality of the first signal source 1 or the second signal source 2 is abnormal. The change in the output signal of the filter due to the generation is delayed from the change in the input signal of the filter.

In FIGS. 3 and 4, when an abnormality occurs in the first signal source 1 or the second signal source 2, the frequency of the third signal and the frequency of the sixth signal change, and the digital signal It shows that the phase changes.
When an abnormality occurs in the first signal source 1 or the second signal source 2, the phase of the third signal and the phase of the sixth signal also change, and the phase of the digital signal changes in FIGS. It changes in the same way as 4. Therefore, in the clock generator shown in FIG. 1, even if the phase of the 3rd signal and the phase of the 6th signal change due to the occurrence of an abnormality, an abnormality occurs in any signal source in the same manner. It is possible to identify whether it is.

In the clock generator shown in FIG. 1, the determination circuit 19 is assigned to either the first signal source 1 or the second signal source 2 based on the time Δt output from the change time measuring unit 22. It is determined whether an abnormality has occurred. In the determination circuit 19, an abnormality occurs in any signal source based on the time Δt output from the change time measurement unit 22 only when the phase change amount calculated by the phase calculation unit 21 is equal to or greater than the threshold value. It may be determined whether or not.
The threshold value may be stored in the internal memory of the determination circuit 19 or may be given from the outside.

The clock generator shown in FIG. 1 includes a first signal source 1 and a second signal source 2, and the determination circuit 19 is any of the first signal source 1 and the second signal source 2. It is determined whether an abnormality has occurred in the signal source.
However, this is only an example, and a clock generator may be provided with a third signal source 5 in addition to the first signal source 1 and the second signal source 2.

FIG. 5 is a configuration diagram showing another clock generator according to the first embodiment. In FIG. 5, the same reference numerals as those in FIG. 1 indicate the same or corresponding parts, and thus the description thereof will be omitted.
The third signal source 5 is a signal source targeted for abnormality detection, and is realized by a crystal oscillator, a rubidium oscillator, a cesium oscillator, a VCO, a DDS, or the like.
The third signal source 5 uses a signal having a frequency of f ₃ and an initial phase of θ ₃ as a clock signal generator 3, a first frequency converter 11 of the phase difference detection circuit 4a, and a third of the phase difference detection circuit 4a. Output to each of the delay circuits 13 of 2.
In the clock generator shown in FIG. 5, the first signal source 1 transmits the first signal to the clock signal generator 3, the first frequency converter 11 of the phase difference detection circuit 4, and the second of the phase difference detection circuit 4. Is output to each of the delay circuits 13 of.
Further, the first signal source 1 outputs to each of the first frequency converter 11 of the phase difference detection circuit 4a and the second delay circuit 13 of the phase difference detection circuit 4a.
The phase difference detection circuit 4a is a circuit having the same configuration as the phase difference detection circuit 4, and inputs a first signal output from the first signal source 1 and a signal output from the third signal source 5. To do.
The determination circuit 19 of the phase difference detection circuit 4a determines which of the first signal source 1 and the third signal source 5 has an abnormality.

The clock signal generation unit 3a is realized by a multiplier, a frequency divider, or the like.
The clock signal generation unit 3a uses the first signal output from the first signal source 1, the second signal output from the second signal source 2, and the signal output from the third signal source 5. To generate a clock signal.
In the clock generation device shown in FIG. 5, the clock signal generation unit 3a generates one clock signal from the first signal, the second signal, and the signal output from the third signal source 5. However, this is only an example, and the clock signal generation unit 3 generates one clock signal from the first signal, generates one clock signal from the second signal, and outputs the clock signal from the third signal source 5. One clock signal may be generated from the signal.
In the clock generator shown in FIG. 5, it is possible to determine which of the first signal source 1, the second signal source 2, and the third signal source 5 has an abnormality.

The clock generator shown in FIG. 1 includes two signal sources, and the clock generator shown in FIG. 5 includes three signal sources. However, these are only examples, and may be a clock generator including N (N is an integer of 4 or more) signal sources.
A clock generator including N signal sources includes N-1 phase difference detection circuits 4n (n = 1, 2, ..., N-1) instead of the phase difference detection circuit 4.
Each phase difference detection circuit 4n is a circuit having the same configuration as the phase difference detection circuit 4, and inputs a first signal output from the first signal source 1 and a signal output from the n + 1 signal source. ..
The determination circuit 19 of the phase difference detection circuit 4n determines which of the first signal source 1 and the n + 1 signal source has an abnormality.

Embodiment 2.
In the clock generator of the first embodiment, the determination circuit 19 determines which of the first signal source 1 and the second signal source 2 is based on the time change of the phase of the digital signal output from the ADC 18. It is determined whether an abnormality has occurred in the source.
In the second embodiment, the determination circuit 19 not only determines which signal source has an abnormality, but also determines whether an abnormality has occurred in both the first signal source 1 and the second signal source 2. A clock generator capable of determining the above will be described.

FIG. 6 is a configuration diagram showing a clock generator including the phase difference detection circuit 4 according to the second embodiment. In FIG. 6, the same reference numerals as those in FIG. 1 indicate the same or corresponding parts, and thus the description thereof will be omitted.
The determination circuit 30 is realized by FPGA or the like.
The determination circuit 30 includes a phase calculation unit 21, a change time measurement unit 22, and a determination unit 31.
The determination circuit 30 detects the occurrence of an abnormality in the first signal source 1 or the second signal source 2 based on the digital signal output from the ADC 18.
Further, the determination circuit 30 determines which of the first signal source 1 and the second signal source 2 has an abnormality based on the time change of the phase of the digital signal output from the ADC 18. Is a circuit that determines whether or not an abnormality has occurred in both signal sources.

FIG. 7 is a configuration diagram showing a determination circuit 30 of the phase difference detection circuit 4 according to the second embodiment. In FIG. 7, the same reference numerals as those in FIG. 2 indicate the same or corresponding parts, and thus the description thereof will be omitted.
The determination unit 31 counts the number of times the time is measured by the change time measurement unit 22, and while the time is being measured by the change time measurement unit 22, the change amount of the phase calculated by the phase calculation unit 21 changes. Determine if it exists.
If the number of measurements is one, the amount of change does not change, and the time output from the change time measurement unit 22 is the first delay time τ _A , the determination unit 31 is the first signal source 1. Outputs the judgment result indicating that an abnormality has occurred in.
If the number of measurements is one, the amount of change does not change, and the time output from the change time measurement unit 22 is the second delay time τ _B , the determination unit 31 is the second signal source 2. Outputs the judgment result indicating that an abnormality has occurred in.
If the number of measurements is two, the determination unit 31 outputs a determination result indicating that an abnormality has occurred in both the first signal source 1 and the second signal source 2.
Further, if the number of measurements is one and the amount of change is changed, the determination unit 31 indicates that an abnormality has occurred in both the first signal source 1 and the second signal source 2. The indicated judgment result is output.
If the number of measurements is 0, the determination unit 31 outputs a determination result indicating that there is no abnormality in either the first signal source 1 or the second signal source 2.

Next, the operation of the phase difference detection circuit 4 shown in FIG. 6 will be described.
However, other than the determination circuit 30, it is the same as the phase difference detection circuit 4 shown in FIG. 1, so only the operation of the determination circuit 30 will be described here.
Of the first signal source 1 and the second signal source 2, the time change of the signal when an abnormality occurs only in the first signal source 1 is as shown in FIG. 3 as in the first embodiment. It is represented by.
In Figure 3, the second signal source 2 is normal shows an example in which abnormality occurs when a first signal source 1 is a time t _1.
Since the first signal source 1 is normal at the time before the time t ₁ , the frequency of the first signal output from the first signal source 1 is f ₁ .
After time t _1, since an abnormality has occurred in the first signal source 1, the frequency of the first signal output from the first signal source 1 changes from f ₁ to (f ₁ + Δf ₁ ). changes, the initial phase is changed to the theta _{1 'from} theta _1.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and is transmitted to the comparator 17 as a third'signal.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 3, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) changes -f _2.
On the other hand, the second frequency converter 14, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 a second signal is transmitted with a delay of second delay time tau _B. Then, the spurious signal of the sixth signal output from the second frequency converter 14 is suppressed by the second filter 16 and transmitted to the comparator 17 as the sixth'signal.
Therefore, as shown in FIG. 3, the frequency of the sixth signal changes from f ₁ −f ₂ to (f ₁ + Δf ₁ ) −f ₂ at time t ₁ + τ _A.

In the time before the time t _1, 'a signal, the sixth' third and signals, in the initial phases are different by a frequency the same. Therefore, in the time before the time t _1, the digital signal indicating the phase of the seventh signal, i.e., 'a signal, the sixth' third digital signal indicating the phase difference between the phase of the signal, a constant Is.
In the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) −f ₂ , and the frequency of the 6th signal is f ₁ −f ₂ . Therefore, the phase of the digital signal indicating the phase difference changes with the passage of time. Digital signal phase, every second, and changed by the frequency Delta] f _1, the amount of change in the phase of the digital signal is constant. Therefore, there is no change in the amount of change during the time being measured by the change time measuring unit 22.
In the time after time t ₁ + τ _A , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the digital signal indicating the phase difference between the third'signal and the sixth'signal is constant.

From the above, when an abnormality occurs when the first signal source 1 is at time t ₁ , the time Δt output from the change time measuring unit 22, that is, the time t ₁ when the phase change is detected, is changed. The time until the time t ₁ + τ _A when the resulting phase returns to the original phase coincides with the first delay time τ _A.
The change time measuring unit 22 measures the time from the time t ₁ to the time t ₁ + τ _A only once.
Therefore, in the determination unit 31, the number of times the time is measured by the change time measurement unit 22 is one, the amount of change does not change, and the time output from the change time measurement unit 22 is the first delay time τ _A. If so, a determination result indicating that an abnormality has occurred in the first signal source 1 is output.

Of the first signal source 1 and the second signal source 2, the time change of the signal when an abnormality occurs only in the second signal source 2 is as shown in FIG. 4 as in the first embodiment. It is represented by.
In Figure 4, the first signal source 1 is normal shows an example in which abnormality has occurred when the second signal source 2 is a time t _2.
Since the second signal source 2 is normal at the time before the time t ₂ , the frequency of the second signal output from the second signal source 2 is f ₂ .
The time t ₂ subsequent to abnormality in the second signal source 2 is generated, the frequency of the second signal output from the second signal source 2, from _{f 2 (f 2 + Δf 2} ) changes, the initial phase is changed to the theta _{2 'from} theta _2.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and is transmitted to the comparator 17 as a third'signal.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 4, at time _{t 2, the} from _f 1 -f ₂ f 1 - varies _{(f 2} + Δf _2).
On the other hand, the second frequency converter 14, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 a second signal is transmitted with a delay of second delay time tau _B. Then, the spurious signal of the sixth signal output from the second frequency converter 14 is suppressed by the second filter 16 and transmitted to the comparator 17 as the sixth'signal.
Therefore, the frequency of the signal of the 6 ', as shown in FIG. 4, at time _{t 2} + tau _B, from _f 1 -f ₂ f 1 - varies _{(f 2} + Δf _2).

In the time before the time t _2, 'a signal, the sixth' third and signals, in the initial phases are different by a frequency the same. Therefore, the time before the time t _2, the digital signal indicating the phase of the seventh signal, i.e., 'a signal, the sixth' third digital signal indicating the phase difference between the phase of the signal, a constant Is.
In the time from time t ₂ to time t ₂ + τ _B , the frequency of the 3rd signal is f ₁ − (f ₂ + Δf ₂ ), and the frequency of the 6th signal is f ₁ −f ₂ . Therefore, the phase of the digital signal indicating the phase difference changes with the passage of time. The phase of the digital signal changes by the frequency Δf ₂ every second, and the amount of change in the phase of the digital signal is constant. Therefore, there is no change in the amount of change during the time being measured by the change time measuring unit 22.
In the time after time t ₂ + τ _B , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the digital signal indicating the phase difference between the third'signal and the sixth'signal is constant.

From the above, when an abnormality occurs when the second signal source 2 is at time t ₂ , the change starts from the time Δt output from the change time measuring unit 22, that is, the time t ₂ when the phase change is detected. The time until the time t ₂ + τ _B when the resulting phase returns to the original phase coincides with the second delay time τ _B.
The change time measuring unit 22 measures the time from the time t ₂ to the time t ₂ + τ _B only once.
Therefore, in the determination unit 31, the number of times the time is measured by the change time measurement unit 22 is one, there is no change in the amount of change, and the time output from the change time measurement unit 22 is the second delay time τ _B. If so, a determination result indicating that an abnormality has occurred in the second signal source 2 is output.

Next, an abnormality has occurred in both the first signal source 1 and the second signal source 2, and the abnormality occurrence time t ₁ of the _first signal source 1 and the abnormality occurrence time t of the second signal source 2 have occurred. The time change of the signal when ₂ is the same (t ₁ = t ₂ ) will be described.
In FIG. 8, an abnormality has occurred in both the first signal source 1 and the second signal source 2, and the abnormality occurrence time t1 of the _first signal source 1 and the abnormality occurrence time of the second signal source 2 have occurred. It is explanatory drawing which shows the time change of a signal when t ₂ is the same (t ₁ = t ₂ ).

In FIG. 8, since the first signal source 1 is normal at the time before the time t ₁ (= t ₂ ), the frequency of the first signal output from the first signal source 1 is f _1. Is.
After time t ₁ (= t ₂ ), since an abnormality has occurred in the first signal source 1, the frequency of the first signal output from the first signal source 1 is changed from f ₁ to (f). ₁ + _{Δf 1)} changes, the initial phase is changed to the theta ₁ 'from theta _1.
Further, in FIG. 8, since the second signal source 2 is normal at the time before the time t ₁ (= t ₂ ), the frequency of the second signal output from the second signal source 2 is set. It is f ₂ .
After time t ₁ (= t ₂ ), since an abnormality has occurred in the second signal source 2, the frequency of the second signal output from the second signal source 2 is changed from f ₂ to (f). ₂ + _{Δf 2)} changes, the initial phase is changed to the theta ₂ 'from theta _2.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and is transmitted to the comparator 17 as a third'signal.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 8, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) - changes to _{(f 2} + Δf _2).
On the other hand, the second frequency converter 14, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 a second signal is transmitted with a delay of second delay time tau _B. Then, the spurious signal of the sixth signal output from the second frequency converter 14 is suppressed by the second filter 16 and transmitted to the comparator 17 as the sixth'signal.
Therefore, as shown in FIG. 8, the frequency of the sixth signal changes from f ₁ −f ₂ to (f ₁ + Δf ₁ ) −f ₂ at time t ₁ + τ _A.
The frequency of the signal of the 6 ', as shown in FIG. 8, at time _{t 1 + τ B, (f} 1 + Δf 1) from _{-f 2 (f 1 + Δf 1} ) - change in _{(f 2} + Δf ₂₎ To do.

At the time before the time t ₁ (= t ₂ ), the 3rd signal and the 6th signal have the same frequency except that the initial phase is different. Therefore, at the time before the time t ₁ (= t ₂ ), the phase of the digital signal indicating the phase difference between the third signal and the sixth signal is constant.
In the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) − (f ₂ + Δf ₂ ), and the frequency of the 6th signal is f ₁ −. Since it is f ₂ , the phase of the digital signal indicating the phase difference changes with the passage of time. The phase of the digital signal changes by the frequency Δf _{1 −} Δf ₂ every _second , and the amount of change in the phase of the digital signal is constant.

In the time from time t ₁ + τ _A to time t ₁ + τ _B , the frequency of the 3rd signal is (f ₁ + Δf ₁ )-(f ₂ + Δf ₂ ), and the frequency of the 6th signal is (f ₂ + Δf ₂ ). Since f ₁ + Δf ₁ ) −f ₂ , the phase of the digital signal indicating the phase difference changes with the passage of time. The phase of the digital signal changes by the frequency Δf ₂ every second, and the amount of change in the phase of the digital signal is constant.
Therefore, in the time from time t ₁ to time t ₁ + τ _B , the amount of change in the phase difference changes once at time t ₁ + τ _A , and the time is being measured by the change time measuring unit 22. , There is a change in the amount of change.
In the time after time t ₁ + τ _B , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the digital signal indicating the phase difference between the third'signal and the sixth'signal is constant.

Thus, when the first abnormality occurrence time t ₁ of the signal source 1 and the abnormality occurrence time t ₂ of the second signal source 2 are the same (t 1 _{= t 2),} is output from the change time measuring unit 22 The time Δt, that is, the time from the time t ₁ when the phase change is detected to the time t ₁ + τ _B when the changed phase returns to the original phase coincides with the second delay time τ _B. In FIG. 8, since τ _A <τ _B , the time Δt coincides with the second delay time τ _B. If τ _A > τ _B , the time Δt coincides with the first delay time τ _A.
The change time measuring unit 22 measures the time from the time t ₁ to the time t ₁ + τ _B only once.
Therefore, if the change time measurement unit 22 measures the time once and the amount of change changes, the determination unit 31 can be used for both the first signal source 1 and the second signal source 2. Outputs the judgment result indicating that an abnormality has occurred.

Next, an abnormality has occurred in both the first signal source 1 and the second signal source 2, and the abnormality occurrence time of the second signal source 2 is higher than the abnormality occurrence time t ₁ of the first signal source 1. The time change of the signal when t ₂ is slow (t ₁ <t ₁ + τ _A <t ₂ <t ₂ + τ _B ) will be described.
In FIG. 9, an abnormality has occurred in both the first signal source 1 and the second signal source 2, and an abnormality has occurred in the second signal source 2 from the abnormality occurrence time t1 of the _first signal source 1. It is explanatory drawing which shows the time change of the signal when the time t ₂ is late (t ₁ <t ₁ + τ _A <t ₂ <t ₂ + τ _B ).

In FIG. 9, since the first signal source 1 is normal at the time before the time t ₁ , the frequency of the first signal output from the first signal source 1 is f ₁ .
After time t _1, since an abnormality has occurred in the first signal source 1, the frequency of the first signal output from the first signal source 1 changes from f ₁ to (f ₁ + Δf ₁ ). changes, the initial phase is changed to the theta _{1 'from} theta _1.
Further, in FIG. 9, since the second signal source 2 is normal at the time before the time t ₂ , the frequency of the second signal output from the second signal source 2 is f ₂ .
The time t ₂ subsequent to abnormality in the second signal source 2 is generated, the frequency of the second signal output from the second signal source 2, from _{f 2 (f 2 + Δf 2} ) changes, the initial phase is changed to the theta _{2 'from} theta _2.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and is transmitted to the comparator 17 as a third'signal.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 9, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) changes -f _2.
The frequency of the signal of the 3 ', as shown in FIG. 9, at time _{t 2, (f 1 + Δf} 1) from _{-f 2 (f 1 + Δf 1} ) - changes to _{(f 2} + Δf _2).

On the other hand, the second frequency converter 14, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 a second signal is transmitted with a delay of second delay time tau _B. Then, the spurious signal of the sixth signal output from the second frequency converter 14 is suppressed by the second filter 16 and transmitted to the comparator 17 as the sixth'signal.
Therefore, as shown in FIG. 9, the frequency of the sixth signal changes from f ₁ −f ₂ to (f ₁ + Δf ₁ ) −f ₂ at time t ₁ + τ _A.
The frequency of the signal of the 6 ', as shown in FIG. 9, at time _{t 2 + τ B, (f} 1 + Δf 1) from _{-f 2 (f 1 + Δf 1} ) - change in _{(f 2} + Δf ₂₎ To do.

In the time before the time t _1, 'a signal, the sixth' third and signals, in the initial phases are different by a frequency the same. Therefore, the phase of the digital signal indicating the phase difference between the third'signal and the sixth'signal is constant.
In the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) −f ₂ , and the frequency of the 6th signal is f ₁ −f ₂ . Therefore, the phase of the digital signal indicating the phase difference changes with the passage of time. Digital signal phase, every second, and changed by the frequency Delta] f _1, the amount of change in the phase of the digital signal is constant.
In the time from time t ₁ + τ _A to time t ₂ , the frequency of the 3rd signal and the 6th signal are the same. Therefore, the phase of the digital signal indicating the phase difference between the third'signal and the sixth'signal is constant.

In the time from time t ₂ to time t ₂ + τ _B , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) − (f ₂ + Δf ₂ ), and the frequency of the 6th signal is (f _1). Since it is + Δf ₁ ) −f ₂ , the phase of the digital signal indicating the phase difference changes with the passage of time. The phase of the digital signal changes by the frequency Δf ₂ every second, and the amount of change in the phase of the digital signal is constant.
In the time after time t ₂ + τ _B , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the digital signal indicating the phase difference between the third'signal and the sixth'signal is constant.
Change time measuring unit 22 is configured to measure the time from time t ₁ to time t _{1 +} tau _A, which measures the time from time t ₂ to time t _{2 +} tau _B, time is measured twice in total ing.
Therefore, if the number of measurements is two, the determination unit 31 outputs a determination result indicating that an abnormality has occurred in both the first signal source 1 and the second signal source 2.

In the second embodiment, examples of the time change of the signal when an abnormality occurs in both the first signal source 1 and the second signal source 2 are shown in FIGS. 8 and 9.
Pattern of temporal changes of the digital signals, as shown in FIG. 10, an abnormality occurrence time t ₁ of the first signal source 1, an abnormality occurrence time t ₂ of the second signal source 2, a first delay time τ _It can be classified into 12 patterns (1) to (12) according to the magnitude relationship between _A and the second delay time τ _B.
FIG. 10 is an explanatory diagram showing the time change of the digital signal in the patterns (1) to (12).
10, conditions are abnormal occurrence time t ₁ of the first signal source 1, an abnormality occurrence time t ₂ of the second signal source 2, a first delay time tau _A, the second delay time tau _It shows the magnitude relationship with _B.
The pattern (1) and the pattern (7) are patterns in which the time is measured twice by the change time measuring unit 22.
In the patterns (2) to (6) and the patterns (8) to (12), the number of times the time is measured by the change time measuring unit 22 is one, and the time is being measured by the change time measuring unit 22. This is a pattern in which there is a change in the amount of change in the phase of the digital signal.

In the pattern (1), t ₁ <t ₁ + τ _A <t ₂ <t ₂ + τ _B.
In the pattern (2), t ₁ <t ₁ + τ _A = t ₂ <t ₂ + τ _B.
In pattern (3), t ₁ <t ₂ <t ₁ + τ _A <t ₂ + τ _B.
In pattern (4), t ₁ <t ₂ <t ₁ + τ _A = t ₂ + τ _B.
In pattern (5), t ₁ <t ₂ <t ₂ + τ _B <t ₁ + τ _A.
In pattern (6), t ₁ = t ₂ <t ₂ + τ _B <t ₁ + τ _A.
In pattern (7), t ₂ <t ₂ + τ _B <t ₁ <t ₁ + τ _A.
In pattern (8), t ₂ <t ₂ + τ _B = t ₁ <t ₁ + τ _A.
In pattern (9), t ₂ <t ₁ <t ₂ + τ _B <t ₁ + τ _A.
In pattern (10), t ₂ <t ₁ <t ₂ + τ _B = t ₁ + τ _A.
In pattern (11), t ₂ <t ₁ <t ₁ + τ _A <t ₂ + τ _B.
In pattern (12), t ₂ = t ₁ <t ₁ + τ _A <t ₂ + τ _B.

In the pattern (2), the amount of change in the phase of the digital signal changes at time t ₂ (= t ₁ + τ _A ), and in the pattern (3), the digital signal changes at time t ₂ and time t ₁ + τ _A. The amount of change in the phase of is changing.
In the pattern (4), at time t _2, the amount of change in the phase of the digital signal has changed, the pattern (5), at time t ₂ and time t _{2 +} tau _B, the amount of change in the phase of the digital signal changes doing.
In the pattern (6), the amount of change in the phase of the digital signal changes at time t ₂ + τ _B , and in the pattern (8), the change in the phase of the digital signal changes at time t ₁ (= t ₂ + τ _B ). The amount is changing.
In the pattern (9), at time t ₁ and time t _{2 +} tau _B, the amount of change in the phase of the digital signal has changed, the pattern (10), at time t _1, the amount of change in the phase of the digital signal changes doing.
In the pattern (11), the amount of change in the phase of the digital signal changes at time t ₁ and time t ₁ + τ _A , and in the pattern (12), the amount of change in the phase of the digital signal changes at time t ₁ + τ _A. Is changing.

In the phase difference detection circuit 4 of the second embodiment, the determination unit 31 counts the number of times the time is measured by the change time measurement unit 22, and the phase calculation unit is in the middle of measuring the time by the change time measurement unit 22. It is determined whether or not there is a change in the amount of change in the phase calculated by 21. If the number of measurements is one, the amount of change does not change, and the time measured by the change time measuring unit 22 is the first delay time τ _A , the determination unit 31 is the first signal source 1. Outputs the judgment result indicating that an abnormality has occurred in. If the number of measurements is one, the amount of change does not change, and the time measured by the change time measuring unit 22 is the second delay time τ _B , the determination unit 31 is the second signal source 2. Outputs the judgment result indicating that an abnormality has occurred in. If the number of measurements is two, the determination unit 31 outputs a determination result indicating that an abnormality has occurred in both the first signal source 1 and the second signal source 2. Further, if the number of measurements is one and the amount of change is changed, the determination unit 31 indicates that an abnormality has occurred in both the first signal source 1 and the second signal source 2. The indicated judgment result is output.
Therefore, the phase difference detection circuit 4 of the second embodiment is used not only for the abnormal occurrence of the first signal source 1 or the second signal source 2 but also for both the first signal source 1 and the second signal source 2. It can be determined that an abnormality has occurred.

Embodiment 3.
In the clock generator of the first embodiment, the first delay time τ _A in the first delay circuit 12 and the second delay time τ _B in the second delay circuit 13 have different delay times. That is, τ _A > τ _B or τ _A <τ _B.
In the clock generator of the first embodiment, when the first delay time τ _A and the second delay time τ _B have the same delay time, the determination unit 23 determines the first signal source 1 and the second signal. It is not possible to determine which of the sources 2 has the abnormality.
In the third embodiment, the first signal source 1 and the second signal, regardless of whether the first delay time τ _A and the second delay time τ _B are different delay times or the same time. A clock generator capable of determining which of the sources 2 the abnormality has occurred will be described.

FIG. 11 is a configuration diagram showing a clock generator including the phase difference detection circuit 6 according to the third embodiment. In FIG. 11, the same reference numerals as those in FIG. 1 indicate the same or corresponding parts, and thus the description thereof will be omitted.
The phase difference detection circuit 6 monitors the first signal output from the first signal source 1 and the second signal output from the second signal source 2, and monitors the first signal source 1 or the second signal source 2. The occurrence of an abnormality in the signal source 2 of the above is detected.
Further, the phase difference detection circuit 6 monitors the first signal output from the first signal source 1 and the second signal output from the second signal source 2, and monitors the first signal source 1 and the first signal source 1 and the second signal. Among the second signal sources 2, the signal source in which the abnormality has occurred is determined.
Further, the phase difference detection circuit 6 determines whether or not an abnormality has occurred in both the first signal source 1 and the second signal source 2.

The second frequency converter 41 is realized by a mixer, a sample hold circuit, or a circuit in which a mixer and a sample hold circuit are combined.
The second frequency converter 41 generates a sixth signal from the second signal output from the second signal source 2 and the fourth signal output from the first delay circuit 12, and the second signal is generated. The signal of 6 is output to the second filter 43.
For example, the second frequency converter 41 uses the second signal to convert the frequency of the fourth signal, and uses the second signal to convert the frequency of the fourth signal into the second filter 43 as the sixth signal. Output.
The frequency of the sixth signal output from the second frequency converter 41 is the same frequency as the frequency of the third signal output from the first frequency converter 11.
Here, the second frequency converter 41 uses the second signal to convert the frequency of the fourth signal, and as the sixth signal, the fourth signal after frequency conversion is used as the second filter 43. Is output to.
However, when the first frequency converter 11 uses the first signal to convert the frequency of the second signal, the second frequency converter 41 uses the fourth signal to convert the frequency of the second signal. The frequency of the second signal is converted, and the second signal after frequency conversion is output to the second filter 43 as the sixth signal.

The third frequency converter 42 is realized by a mixer, a sample hold circuit, or a circuit in which a mixer and a sample hold circuit are combined.
The third frequency converter 42 generates a seventh signal from the first signal output from the first signal source 1 and the fifth signal output from the second delay circuit 13, and the third frequency converter 42 generates a seventh signal. The signal of 7 is output to the third filter 44.
For example, the third frequency converter 42 converts the frequency of the first signal by using the fifth signal, and uses the first signal after frequency conversion as the seventh signal in the third filter 44. Output.
The frequency of the seventh signal output from the third frequency converter 42 is the same frequency as the frequency of the third signal output from the first frequency converter 11.
Here, the third frequency converter 42 converts the frequency of the first signal using the fifth signal, and uses the first signal after frequency conversion as the seventh signal as the third filter 44. Is output to.
However, when the first frequency converter 11 uses the first signal to convert the frequency of the second signal, the third frequency converter 42 uses the first signal to convert the frequency of the second signal. The frequency of the signal 5 is converted, and the fifth signal after frequency conversion is output to the third filter 44 as the seventh signal.

The second filter 43 is realized by a chip inductor, a chip capacitor, an LPF, a BPF, or the like. Further, the second filter 43 may be realized by a microstrip, a coaxial resonator, or the like.
The second filter 43 has a pass band through which the signal component of the sixth signal output from the second frequency converter 41 passes, and is a filter that suppresses signals outside the pass band and unnecessary waves. ..
Therefore, the second filter 43 suppresses the spurious signal contained in the sixth signal output from the second frequency converter 41, and suppresses the spurious signal (hereinafter, "sixth"). (Referred to as'signal') is output to the first comparator 45.

The third filter 44 is realized by a chip inductor, a chip capacitor, an LPF, a BPF, or the like. Further, the third filter 44 may be realized by a microstrip, a coaxial resonator, or the like.
The third filter 44 has a pass band through which the signal component of the seventh signal output from the third frequency converter 42 passes, and is a filter that suppresses signals outside the pass band and unnecessary waves. ..
Therefore, the third filter 44 suppresses the spurious signal contained in the seventh signal output from the third frequency converter 42, and suppresses the spurious signal (hereinafter, "7th"). (Referred to as'signal') is output to the second comparator 46.

The first comparator 45 is realized by a mixer or the like.
The first comparator 45 compares the phase of the third'signal output from the first filter 15 with the phase of the sixth'signal output from the second filter 43, and makes a third'. The phase difference between the phase of the signal of and the phase of the sixth'signal is detected.
The first comparator 45 outputs an eighth signal indicating the detected phase difference to the ADC 47.

The second comparator 46 is realized by a mixer or the like.
The second comparator 46 compares the phase of the third'signal output from the first filter 15 with the phase of the seventh'signal output from the third filter 44, and compares the phase of the third'signal. The phase difference between the phase of the signal of and the phase of the 7th signal is detected.
The second comparator 46 outputs a ninth signal indicating the detected phase difference to the ADC 48.

The ADC 47 is an analog-to-digital converter realized by a delta-sigma type AD converter, a flash type AD converter, or the like.
The ADC 47 converts the eighth signal output from the first comparator 45 from an analog signal to a digital signal (hereinafter, referred to as "first digital signal"), and converts the first digital signal into the determination circuit 49. Output.
For example, the ADC 47 converts the eighth signal from an analog signal to a first digital signal by sampling the eighth signal in synchronization with the clock signal, and converts the first digital signal into the determination circuit 49. Output.
The clock signal may be a clock signal output from the clock signal generation unit 3 or may be given from the outside of the clock generation device.

The ADC 48 is an analog-to-digital converter realized by a ΔΣ type AD converter, a flash type AD converter, or the like.
The ADC 48 converts the ninth signal output from the second comparator 46 from an analog signal to a digital signal (hereinafter, referred to as "second digital signal"), and converts the second digital signal into the determination circuit 49. Output.
For example, the ADC 48 converts the ninth signal from an analog signal to a second digital signal by sampling the ninth signal in synchronization with the clock signal, and converts the second digital signal into the determination circuit 49. Output.
The clock signal may be a clock signal output from the clock signal generation unit 3 or may be given from the outside of the clock generation device.
The ADC 47 includes a memory for storing the first digital signal each time the eighth signal is converted from the analog signal to the first digital signal, and the plurality of first digital signals are averaged and averaged. The digital signal of the above may be output to the determination circuit 49.
The ADC 48 includes a memory for storing the second digital signal each time the ninth signal is converted from the analog signal to the second digital signal, and the plurality of second digital signals are averaged and averaged to the second. The digital signal of the above may be output to the determination circuit 49.

The determination circuit 49 is realized by FPGA or the like.
The determination circuit 49 includes a first phase calculation unit 51, a second phase calculation unit 52, a first change time measurement unit 53, a second change time measurement unit 54, and a determination unit 55 (see FIG. 12). ing.
The determination circuit 49 determines the occurrence of an abnormality in the first signal source 1 or the second signal source 2 based on each of the first digital signal output from the ADC 47 and the second digital signal output from the ADC 48. To detect.
Further, the determination circuit 49 is based on each of the time change of the phase of the first digital signal output from the ADC 47 and the time change of the phase of the second digital signal output from the ADC 48, and the first signal source 1 It is determined which of the signal sources 2 and the second signal source 2 has an abnormality.
Further, the determination circuit 49 is used for both the first signal source 1 and the second signal source 2 based on the time change of the phase of the first digital signal and the time change of the phase of the second digital signal. Determine if an abnormality has occurred.

FIG. 12 is a configuration diagram showing a determination circuit 49 of the phase difference detection circuit 6 according to the third embodiment.
In FIG. 12, the first phase calculation unit 51 calculates the phase of the first digital signal output from the ADC 47, and outputs the calculated phase to the first change time measurement unit 53.
The second phase calculation unit 52 calculates the phase of the second digital signal output from the ADC 48, and outputs the calculated phase to the second change time measurement unit 54.

The first change time measuring unit 53 detects the phase change output from the first phase calculating unit 51.
When the first change time measuring unit 53 detects the change in phase, it measures the time from the time when the change is detected until the changed phase returns to the original phase, and outputs the measured time to the determination unit 55.
The second change time measuring unit 54 detects the phase change output from the second phase calculating unit 52.
When the second change time measuring unit 54 detects the change in phase, it measures the time from the time when the change is detected until the changed phase returns to the original phase, and outputs the measured time to the determination unit 55.

The determination unit 55 is the first signal source 1 or the second signal source based on the time output from the first change time measurement unit 53 and the time output from the second change time measurement unit 54, respectively. The occurrence of an abnormality in 2 is detected.
Further, the determination unit 55 determines that the first signal source 1 and the second signal source 1 and the second signal source 55 are based on the time output from the first change time measurement unit 53 and the time output from the second change time measurement unit 54, respectively. It is determined which of the signal sources 2 has an abnormality.
Further, the determination unit 55 applies to both the first signal source 1 and the second signal source 2 based on the time change of the phase of the first digital signal and the time change of the phase of the second digital signal. Determine if an abnormality has occurred.

Next, the operation of the phase difference detection circuit 6 shown in FIG. 11 will be described.
In the phase difference detection circuit 6 shown in FIG. 11, through lines are used as the first delay circuit 12 and the second delay circuit 13, and the first frequency converter 11, the second frequency converter 41, and the third are used. It is assumed that a mixer is used as the frequency converter 42 of the above.
Further, in the phase difference detection circuit 6 shown in FIG. 11, it is assumed that a mixer is used as the first comparator 45 and the second comparator 46.
Further, among the components of the phase difference detection circuit 6 shown in FIG. 11, in the components other than the first delay circuit 12 and the second delay circuit 13, there is a delay from the input of the signal to the output of the signal. Shall not occur.

The first signal source 1 transfers the first signal represented by the above equation (1) to the clock signal generator 3, the first frequency converter 11, the first delay circuit 12, and the third frequency converter 42. Output to each.
The second signal source 2 transmits the second signal represented by the above equation (2) to the clock signal generator 3, the first frequency converter 11, the second delay circuit 13, and the second frequency converter 41. Output to each.

First delay circuit 12, when the first signal source 1 receives the first signal, delaying the first signal by a first delay time tau _A.
The first delay circuit 12 outputs the fourth signal represented by the above equation (3) to the second frequency converter 41 as the first signal after the delay.
The second delay circuit 13, when the second signal source 2 receives the second signal, delays the second signal by a second delay time tau _B.
The second delay circuit 13 outputs the fifth signal represented by the above equation (4) to the third frequency converter 42 as the second signal after the delay.

The first frequency converter 11 generates a third signal from the first signal output from the first signal source 1 and the second signal output from the second signal source 2, and the third signal is generated. The signal of 3 is output to the first filter 15.
The second frequency converter 41 generates a sixth signal from the second signal output from the second signal source 2 and the fourth signal output from the first delay circuit 12, and the second signal is generated. The signal of 6 is output to the second filter 43.
The third frequency converter 42 generates a seventh signal from the first signal output from the first signal source 1 and the fifth signal output from the second delay circuit 13, and the third frequency converter 42 generates a seventh signal. The signal of 7 is output to the third filter 44.
Here, assuming that the two frequencies input to the mixer used as the frequency converter are _fin1 and _fin2 , the output frequencies of the mixer are shown in the above equations (5) and (6). Will be done.

The two signals input to the first frequency converter 11 are a first signal and a second signal, the frequency of the first signal is f ₁ , and the frequency of the second signal is f ₂ .
Also, the two signals input to the second frequency converter 41 is the second signal and the fourth signal, the frequency of the second signal f _2, the frequency of the fourth signal at f ₁ is there.
The two signals input to the third frequency converter 42 are the first signal and the fifth signal, the frequency of the first signal is f ₁ and the frequency of the fifth signal is f ₂ . is there.
Here, the desired frequency of the third signal, which is the output signal of the first frequency converter 11, is f ₁ − f ₂ , and the output signal of the second frequency converter 41, which is the sixth signal. It is assumed that the desired frequency is f ₁ − f ₂ .
Further, it is assumed that the desired frequency of the seventh signal, which is the output signal of the third frequency converter 42, is f ₁ − f ₂ .
Since the frequencies f ₁ −f ₂ are the frequencies when m = n = 1 in the equation (6), here, the first frequency converter 11, the second frequency converter 41, and the third frequency are used. It is assumed that each desired output frequency in the converter 42 is the frequency when m = n = 1 in the equation (6).

第３の周波数変換器４２から出力される第７の信号は、以下の式（１０）のように表される。

式（６）におけるｍ＝ｎ＝１の場合の周波数以外の周波数を有する信号は、スプリアス信号であるため、第３の信号及び第６の信号のそれぞれは、所望の周波数ｆ_１−ｆ_２を有する信号以外に、多数のスプリアス信号が重畳されている。Therefore, the third signal output from the first frequency converter 11 is expressed by the above equation (7).
The sixth signal output from the second frequency converter 41 is expressed by the following equation (9).

The seventh signal output from the third frequency converter 42 is expressed by the following equation (10).

Since the signal having a frequency other than the frequency in the case of m = n = 1 in the equation (6) is a spurious signal, each of the third signal and the sixth signal has a desired frequency f ₁ − f ₂ . In addition to the included signals, a large number of spurious signals are superimposed.

When the first filter 15 receives the third signal from the first frequency converter 11, the first filter 15 suppresses the spurious signal contained in the third signal.
The third signal, which is the third signal whose spurious signal is suppressed by the first filter 15, is input to each of the first comparator 45 and the second comparator 46.
When the second filter 43 receives the sixth signal from the second frequency converter 41, the second filter 43 suppresses the spurious signal contained in the sixth signal.
The sixth signal, which is the sixth signal whose spurious signal is suppressed by the second filter 43, is input to the first comparator 45.
When the third filter 44 receives the seventh signal from the third frequency converter 42, the third filter 44 suppresses the spurious signal contained in the seventh signal.
The 7th signal, which is the 7th signal whose spurious signal is suppressed by the 3rd filter 44, is input to the 2nd comparator 46.

The first filter 15, the second filter 43, and the third filter 44 are the first comparator 45 as a large number of spurious signals are input to the first comparator 45 and the second comparator 46. And, it is provided in order to prevent the malfunction and failure of each of the 2nd comparator 46.
When the spurious signal contained in each of the third signal, the sixth signal, and the seventh signal is a frequency other than the operable frequency of the first comparator 45 and the second comparator 46, Alternatively, when the power of the spurious signal is low, malfunction and failure do not occur. The first filter 15, the second filter 43, and the third filter 44 may not be mounted on the phase difference detection circuit 6 if no malfunction or failure occurs.

When the first comparator 45 receives the third'signal from the first filter 15 and the sixth'signal from the second filter 43, the phase of the third'signal and the sixth' signal The phase difference between the phase of the 3rd signal and the phase of the 6th signal is detected by comparing with the phase of.
The first comparator 45 outputs an eighth signal indicating the detected phase difference to the ADC 47.
In the first embodiment, it is assumed that the mixer is used as the first comparator 45, and the output signal of the mixer is generally expressed as the equations (5) and (6).
The eighth signal output from the first comparator 45 is a signal having a frequency represented by m = n = 1 in the equation (6), and is a signal other than the frequency represented by m = n = 1. Shall not occur. That is, the frequency of the eighth signal output from the first comparator 45 is DC.

The frequency f _1, f ₂ of the two signals input to the first frequency converter 11, the frequency f _1, f ₂ of the two signals input to the second frequency converter 41, the same ..
Therefore, the phase jitter superimposed on the third signal output from the first frequency converter 11 and the phase jitter superimposed on the sixth signal output from the second frequency converter 41 are the same. Is.
Therefore, when the first comparator 45 detects the phase difference between the phase of the third signal and the phase of the sixth signal, the phase jitter superimposed on the third signal and the sixth signal Since the phase jitter superimposed on the above is canceled out, deterioration of the phase difference detection accuracy in the first comparator 45 can be suppressed.

When the second comparator 46 receives the third'signal from the first filter 15 and the seventh'signal from the third filter 44, the phase of the third'signal and the seventh' signal The phase difference between the phase of the third signal and the phase of the seventh signal is detected by comparing with the phase of.
The second comparator 46 outputs a ninth signal indicating the detected phase difference to the ADC 48.
In the first embodiment, it is assumed that the mixer is used as the second comparator 46, and the output signal of the mixer is generally expressed as the equations (5) and (6).
The ninth signal output from the second comparator 46 is a signal having a frequency represented by m = n = 1 in the equation (6), and is a signal other than the frequency represented by m = n = 1. Shall not occur. That is, the frequency of the ninth signal output from the second comparator 46 is DC.

The frequency f _1, f ₂ of the two signals input to the first frequency converter 11, the frequency f _1, f ₂ of the two signals input to the third frequency converter 42, the same ..
Therefore, the phase jitter superimposed on the third signal output from the first frequency converter 11 and the phase jitter superimposed on the seventh signal output from the third frequency converter 42 are the same. Is.
Therefore, when the second comparator 46 detects the phase difference between the phase of the third signal and the phase of the seventh signal, the phase jitter superimposed on the third signal and the seventh signal Since the phase jitter superimposed on the above is canceled out, deterioration of the detection accuracy of the phase difference in the second comparator 46 can be suppressed.

Upon receiving the eighth signal from the first comparator 45, the ADC 47 converts the eighth signal from the analog signal to the first digital signal, and outputs the first digital signal to the determination circuit 49.
When the ADC 48 receives the ninth signal from the second comparator 46, it converts the ninth signal from the analog signal to the second digital signal, and outputs the second digital signal to the determination circuit 49.

When the determination circuit 49 receives the first digital signal from the ADC 47 and the second digital signal from the ADC 48, the determination circuit 49 monitors the time change of the phase of the first digital signal and the time change of the phase of the second digital signal. ..
The determination circuit 49 determines the occurrence of an abnormality in the first signal source 1 or the second signal source 2 based on the time change of the phase of the first digital signal and the time change of the phase of the second digital signal. To detect.
Further, the determination circuit 49 is among the first signal source 1 and the second signal source 2 based on the time change of the phase of the first digital signal and the time change of the phase of the second digital signal. It is determined which signal source has an abnormality.
Further, the determination circuit 49 is used for both the first signal source 1 and the second signal source 2 based on the time change of the phase of the first digital signal and the time change of the phase of the second digital signal. Determine if an abnormality has occurred.
Hereinafter, the determination process by the determination circuit 49 will be specifically described.

When the first phase calculation unit 51 receives the first digital signal from the ADC 47, the first phase calculation unit 51 calculates the phase of the first digital signal and outputs the calculated phase to the first change time measurement unit 53.
When the second phase calculation unit 52 receives the second digital signal from the ADC 48, the second phase calculation unit 52 calculates the phase of the second digital signal and outputs the calculated phase to the second change time measurement unit 54.

The first change time measuring unit 53 detects the phase change output from the first phase calculating unit 51.
When the first change time measuring unit 53 detects the change in phase, the first change time measuring unit 53 measures the time Δta _a from the time when the change is detected until the changed phase returns to the original phase, and determines the measured time Δta _a . Output to.
The second change time measuring unit 54 detects the phase change output from the second phase calculating unit 52.
When the second change time measuring unit 54 detects the phase change, the second change time measuring unit 54 measures the time Δt _b from the time when the change is detected until the changed phase returns to the original phase, and determines the measured time Δt _b as the determination unit 55. Output to.

If the time Δt _a output from the first change time measuring unit 53 is zero and the time Δt _b output from the second change time measuring unit 54 is zero, the determination unit 55 is the first. A determination result indicating that there is no abnormality is output from both the signal source 1 and the second signal source 2.
In the determination unit 55, the time Δt _a output from the first change time measurement unit 53 is the first delay time τ _A , and the time Δt _b output from the second change time measurement unit 54 is zero. If so, a determination result indicating that an abnormality has occurred in the first signal source 1 is output.
If the time Δt _a is zero and the time Δt _b is the second delay time τ _B , the determination unit 55 outputs a determination result indicating that an abnormality has occurred in the second signal source 2. To do.
Further, in the determination unit 55, if the time Δt _a is the first delay time τ _A and the time Δt _b is the second delay time τ _B , the first signal source 1 and the second signal source Outputs a judgment result indicating that an abnormality has occurred in both of 2.

FIG. 13 is an explanatory diagram showing a time change of the signal when an abnormality occurs in the first signal source 1.
In FIG. 13, the horizontal axis is time.
In Figure 13, the second signal source 2 is normal shows an example in which abnormality occurs when a first signal source 1 is a time t _1.
Since the first signal source 1 is normal at the time before the time t ₁ , the frequency of the first signal output from the first signal source 1 is f ₁ .
After time t _1, since an abnormality has occurred in the first signal source 1, the frequency of the first signal output from the first signal source 1 changes from f ₁ to (f ₁ + Δf ₁ ). changes, the initial phase is changed to the theta _{1 'from} theta _1.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and the first comparator 45 and the second comparator are used as the third'signal. It is transmitted to each of 46.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 13, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) changes -f _2.

The second frequency converter 14, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 2 Signal is transmitted without delay. Then, the spurious signal of the sixth signal output from the second frequency converter 14 is suppressed by the second filter 43, and is transmitted to the first comparator 45 as the sixth'signal.
Therefore, as shown in FIG. 13, the frequency of the sixth signal changes from f ₁ −f ₂ to (f ₁ + Δf ₁ ) −f ₂ at time t ₁ + τ _A.

The first signal output from the first signal source 1 is transmitted to the third frequency converter 42 without delay, and the second signal output from the second signal source 2 has a second delay time. It is transmitted delayed by tau _B. Then, the spurious signal of the seventh signal output from the third frequency converter 42 is suppressed by the third filter 44, and is transmitted to the second comparator 46 as the seventh'signal.
Therefore, the frequency of the signal of the 7 ', as shown in FIG. 13, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) changes -f _2.

In the time before the time t _1, 'a signal, the sixth' third and signals, in the initial phases are different by a frequency the same. Therefore, at a time before time t1, the _first digital signal indicating the phase of the eighth signal, that is, the first digital indicating the phase difference between the third signal and the sixth'signal. The phase of the signal is constant.
Further, the time before the time t _1, 'a signal, the seventh' third and signals, in the initial phases are different by a frequency the same. Thus, in the time before the time t _1, a second digital signal indicating the phase of the ninth signal, i.e., a second digital 'shown a signal, the seventh' third phase difference between the signals The phase of the signal is constant.

In the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) −f ₂ , and the frequency of the 6th signal is f ₁ −f ₂ . Therefore, the phase of the first digital signal changes with the passage of time. Phase of the first digital signal, every second, changes by frequency Delta] f _1.
Further, in the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal and the frequency of the 7th signal are the same. Therefore, the phase of the second digital signal is constant.

In the time after time t ₁ + τ _A , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the first digital signal is constant.
Further, in the time after the time t ₁ + τ _A , the frequency of the 3rd signal and the frequency of the 7th signal are the same. Therefore, the phase of the second digital signal is constant.

From the above, when an abnormality occurs when the first signal source 1 is at time t ₁ , the time Δt _a output from the first change time measuring unit 53, that is, the time t when the phase change is detected. _{The time} from ₁ to the time t ₁ + τ _A when the changed phase returns to the original phase coincides with the first delay time τ _A.
Further, the time Δt _b output from the second change time measuring unit 54 is zero.
Therefore, in the determination unit 55, the time Δt _a output from the first change time measurement unit 53 is the first delay time τ _A , and the time Δt _b measured by the second change time measurement unit 54 is zero. If so, a determination result indicating that an abnormality has occurred in the first signal source 1 is output.

FIG. 14 is an explanatory diagram showing a time change of a signal when an abnormality occurs in the second signal source 2.
In FIG. 14, the horizontal axis is time.
In Figure 14, the first signal source 1 is normal shows an example in which abnormality has occurred when the second signal source 2 is a time t _2.
Since the second signal source 2 is normal at the time before the time t ₂ , the frequency of the second signal output from the second signal source 2 is f ₂ .
The time t ₂ subsequent to abnormality in the second signal source 2 is generated, the frequency of the second signal output from the second signal source 2, from _{f 2 (f 2 + Δf 2} ) changes, the initial phase is changed to the theta _{2 'from} theta _2.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and the first comparator 45 and the second comparator are used as the third'signal. It is transmitted to each of 46.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 14, at time _{t 2, the} from _f 1 -f ₂ f 1 - varies _{(f 2} + Δf _2).

The second frequency converter 41, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 2 Signal is transmitted without delay. Then, the spurious signal of the sixth signal output from the second frequency converter 41 is suppressed by the second filter 43, and is transmitted to the first comparator 45 as the sixth'signal.
Therefore, the frequency of the signal of the 6 ', as shown in FIG. 14, at time _{t 2, the} from _f 1 -f ₂ f 1 - varies _{(f 2} + Δf _2).

The first signal output from the first signal source 1 is transmitted to the third frequency converter 42 without delay, and the second signal output from the second signal source 2 has a second delay time. It is transmitted delayed by tau _B. Then, the spurious signal of the seventh signal output from the third frequency converter 42 is suppressed by the third filter 44, and is transmitted to the second comparator 46 as the seventh'signal.
Therefore, the frequency of the signal of the 7 ', as shown in FIG. 14, at time _{t 2} + tau _B, from _f 1 -f ₂ f 1 - varies _{(f 2} + Δf _2).

In the time before the time t _2, 'a signal, the sixth' third and signals, in the initial phases are different by a frequency the same. Therefore, the time before the time t _2, the phase of the first digital signal indicating the phase of the eighth signal is constant.
Further, the time before the time t _2, 'a signal, the seventh' third and signals, in the initial phases are different by a frequency the same. Therefore, in the time before the time t _2, the phase of the second digital signal indicating the phase of the ninth signal is constant.

In the time from time t ₂ to time t ₂ + τ _B , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the first digital signal is constant.
Further, in the time from time t ₂ to time t ₂ + τ _B , the frequency of the 3rd signal is f ₁ − (f ₂ + Δf ₂ ), and the frequency of the 7th signal is f ₁ −f _2. Therefore, the phase of the second digital signal changes with the passage of time. The phase of the second digital signal changes by frequency Δf ₂ every _second .

In the time after time t ₂ + τ _B , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the first digital signal is constant.
Further, in the time after the time t ₂ + τ _B , the frequency of the 3rd signal and the frequency of the 7th signal are the same. Therefore, the phase of the second digital signal is constant.

From the above, when an abnormality when the second signal source 2 is a time t ₂ is generated, the time Delta] t _a which is output from the first transition time measurement unit 53 is zero.
Further, the time Δt _b output from the second change time measuring unit 54, that is, the time from the time t ₂ when the phase change is detected to the time t ₂ + τ _B when the changed phase returns to the original phase. , Consistent with the second delay time τ _B.
Therefore, in the determination unit 55, the time Δt _a output from the first change time measurement unit 53 is zero, and the time Δt _b measured by the second change time measurement unit 54 is the second delay time. If it is τ _B , a determination result indicating that an abnormality has occurred in the second signal source 2 is output.

In FIG. 15, an abnormality has occurred in both the first signal source 1 and the second signal source 2, and the abnormality occurrence time t1 of the _first signal source 1 and the abnormality occurrence time of the second signal source 2 have occurred. It is explanatory drawing which shows the time change of a signal when t ₂ is the same (t ₁ = t ₂ ).
In FIG. 15, since the first signal source 1 is normal at the time before the time t ₁ (= t ₂ ), the frequency of the first signal output from the first signal source 1 is f _1. Is.
After time t ₁ (= t ₂ ), since an abnormality has occurred in the first signal source 1, the frequency of the first signal output from the first signal source 1 is changed from f ₁ to (f). ₁ + _{Δf 1)} changes, the initial phase is changed to the theta ₁ 'from theta _1.
Further, in FIG. 15, since the second signal source 2 is normal at the time before the time t ₁ (= t ₂ ), the frequency of the second signal output from the second signal source 2 is set. It is f ₂ .
After time t ₁ (= t ₂ ), since an abnormality has occurred in the second signal source 2, the frequency of the second signal output from the second signal source 2 is changed from f ₂ to (f). ₂ + _{Δf 2)} changes, the initial phase is changed to the theta ₂ 'from theta _2.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and the first comparator 45 and the second comparator are used as the third'signal. It is transmitted to each of 46.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 15, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) - changes to _{(f 2} + Δf _2).

The second frequency converter 41, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 2 Signal is transmitted without delay. Then, the spurious signal of the sixth signal output from the second frequency converter 41 is suppressed by the second filter 43, and is transmitted to the first comparator 45 as the sixth'signal.
Therefore, the frequency of the signal of the 6 ', as shown in FIG. 15, at time _{t 1,} from _f 1 -f ₂ f 1 - varies _{(f 2} + Δf _2).
Further, as shown in FIG. 15, the frequency of the 6'signal changes from f ₁ − (f ₂ + Δf ₂ ) to (f ₁ + Δf ₁ ) − (f ₂ + Δf ₂ ) at time t ₁ + τ _A. To do.

The first signal output from the first signal source 1 is transmitted to the third frequency converter 42 without delay, and the second signal output from the second signal source 2 has a second delay time. It is transmitted delayed by tau _B. Then, the spurious signal of the seventh signal output from the third frequency converter 42 is suppressed by the third filter 44, and is transmitted to the second comparator 46 as the seventh'signal.
Therefore, the frequency of the signal of the 7 ', as shown in FIG. 15, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) changes -f _2.
The frequency of the signal of the 7 ', as shown in FIG. 15, at time _{t 1 + τ A, (f} 1 + Δf 1) from _{-f 2 (f 1 + Δf 1} ) - change in _{(f 2} + Δf ₂₎ To do.

At the time before the time t ₁ (= t ₂ ), the 3rd signal and the 6th signal have the same frequency except that the initial phase is different. Therefore, at a time before time t ₁ (= t ₂ ), the phase of the first digital signal indicating the phase of the eighth signal is constant.
Further, at a time before the time t ₁ (= t ₂ ), the third'signal and the seventh'signal have the same frequency except that the initial phase is different. Therefore, at a time before time t ₁ (= t ₂ ), the phase of the second digital signal indicating the phase of the ninth signal is constant.

In the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) − (f ₂ + Δf ₂ ), and the frequency of the 6th signal is f ₁ −. Since (f ₂ + Δf ₂ ), the phase of the first digital signal changes with the passage of time. Phase of the first digital signal, every second, changes by frequency Delta] f _1.
Further, in the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) − (f ₂ + Δf ₂ ), and the frequency of the 7th signal is (f ₂ + Δf ₂ ). Since it is f ₁ + Δf ₁ ) −f ₂ , the phase of the second digital signal changes with the passage of time. The phase of the second digital signal changes by frequency Δf ₂ every _second .

In the time after time t ₁ + τ _A , the frequency of the 3rd signal and the frequency of the 6th signal are the same. Therefore, the phase of the first digital signal is constant.
Further, in the time after the time t ₁ + τ _A , the frequency of the 3rd signal and the frequency of the 7th signal are the same. Therefore, the phase of the second digital signal is constant.

From the above, an abnormality has occurred in both the first signal source 1 and the second signal source 2, and the abnormality occurrence time t1 of the _first signal source 1 and the abnormality occurrence time t of the second signal source 2 have occurred. If ₂ are the same, time Delta] t _a which is output from the first transition time measurement unit 53 matches the first delay time tau _a.
Further, the time Δt _b output from the second change time measuring unit 54 coincides with the second delay time τ _B.
Therefore, if the time Δt _a is the first delay time τ _A and the time Δt _b is the second delay time τ _B , the determination unit 55 of the first signal source 1 and the second signal source 2 Outputs the judgment result indicating that an abnormality has occurred in both.

In FIG. 16, an abnormality has occurred in both the first signal source 1 and the second signal source 2, and an abnormality has occurred in the second signal source 2 from the abnormality occurrence time t1 of the _first signal source 1. It is explanatory drawing which shows the time change of the signal when the time t ₂ is late (t ₁ <t ₁ <t ₂ ). In FIG. 16, τ _A = τ _B <t _2- t ₁ .
In FIG. 16, since the first signal source 1 is normal at the time before the time t ₁ , the frequency of the first signal output from the first signal source 1 is f ₁ .
After time t _1, since an abnormality has occurred in the first signal source 1, the frequency of the first signal output from the first signal source 1 changes from f ₁ to (f ₁ + Δf ₁ ). changes, the initial phase is changed to the theta _{1 'from} theta _1.
Further, in FIG. 16, since the second signal source 2 is normal at the time before the time t ₂ , the frequency of the second signal output from the second signal source 2 is f ₂ .
The time t ₂ subsequent to abnormality in the second signal source 2 is generated, the frequency of the second signal output from the second signal source 2, from _{f 2 (f 2 + Δf 2} ) changes, the initial phase is changed to the theta _{2 'from} theta _2.

At this time, the first signal output from the first signal source 1 is transmitted to the first frequency converter 11 without delay, and the second signal output from the second signal source 2 is transmitted without delay. Be transmitted. Then, the spurious signal of the third signal output from the first frequency converter 11 is suppressed by the first filter 15, and the first comparator 45 and the second comparator are used as the third'signal. It is transmitted to each of 46.
Therefore, the frequency of the signal of the 3 ', as shown in FIG. 16, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) changes -f _2.
The frequency of the signal of the 3 ', as shown in FIG. 16, at time _{t 2, (f 1 + Δf} 1) from _{-f 2 (f 1 + Δf 1} ) - changes to _{(f 2} + Δf _2).

The second frequency converter 41, a first signal output from the first signal source 1 is transmitted delayed by the first delay time tau _A, output from the second signal source 2 2 Signal is transmitted without delay. Then, the spurious signal of the sixth signal output from the second frequency converter 41 is suppressed by the second filter 43, and is transmitted to the first comparator 45 as the sixth'signal.
Therefore, as shown in FIG. 16, the frequency of the sixth signal changes from f ₁ −f ₂ to (f ₁ + Δf ₁ ) −f ₂ at time t ₁ + τ _A.
The frequency of the signal of the 6 ', as shown in FIG. 16, at time _{t 2, (f 1 + Δf} 1) from _{-f 2 (f 1 + Δf 1} ) - changes to _{(f 2} + Δf _2).

The first signal output from the first signal source 1 is transmitted to the third frequency converter 42 without delay, and the second signal output from the second signal source 2 has a second delay time. It is transmitted delayed by tau _B. Then, the spurious signal of the seventh signal output from the third frequency converter 42 is suppressed by the third filter 44, and is transmitted to the second comparator 46 as the seventh'signal.
Therefore, the frequency of the signal of the 7 ', as shown in FIG. 16, at time _{t 1,} from _{f 1 -f 2 (f 1 +} Δf 1) changes -f _2.
The frequency of the signal of the 7 ', as shown in FIG. 16, at time _{t 2 + τ B, (f} 1 + Δf 1) from _{-f 2 (f 1 + Δf 1} ) - change in _{(f 2} + Δf ₂₎ To do.

In the time before the time t _1, 'a signal, the sixth' third and signals, in the initial phases are different by a frequency the same. Therefore, in the time before the time t _1, the phase of the first digital signal indicating the phase of the eighth signal is constant.
Further, the time before the time t _1, 'a signal, the seventh' third and signals, in the initial phases are different by a frequency the same. Therefore, in the time before the time t _1, the phase of the second digital signal indicating the phase of the ninth signal is constant.

In the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) −f ₂ , and the frequency of the 6th signal is f ₁ −f ₂ . Therefore, the phase of the first digital signal changes with the passage of time. Phase of the first digital signal, every second, changes by frequency Delta] f _1.
Further, in the time from time t ₁ to time t ₁ + τ _A , the frequency of the 3rd signal and the frequency of the 7th signal are the same. Therefore, the phase of the second digital signal is constant.

In the time from time t ₁ + τ _A to time t ₂ , the frequency of the 3rd signal and the 6th signal are the same. Therefore, the phase of the first digital signal is constant from time t ₁ + τ _A to time t ₂ .
Further, in the time from time t ₁ + τ _A to time t ₂ , the frequency of the 3rd signal and the frequency of the 7th signal are the same. Therefore, the phase of the second digital signal is constant from time t ₁ + τ _A to time t ₂ .

In time the time t ₂ later, 'a signal, the sixth' third signal of the frequency is the same. Therefore, in the time the time t ₂ after the phase of the first digital signal is a constant.
From time t ₂ to time t ₂ + τ _B , the frequency of the 3rd signal is (f ₁ + Δf ₁ ) − (f ₂ + Δf ₂ ), and the frequency of the 7th signal is (f _1). Since it is + Δf ₁ ) −f ₂ , the phase of the second digital signal changes with the passage of time. The phase of the second digital signal changes by frequency Δf ₂ every _second .
Further, in the time after the time t ₂ + τ _B , the frequency of the 3rd signal and the frequency of the 7th signal are the same. Therefore, after the time t ₂ + τ _B , the phase of the second digital signal is constant.

From the above, an abnormality has occurred in both the first signal source 1 and the second signal source 2, and the abnormality occurrence time of the second signal source 2 is higher than the abnormality occurrence time t1 of the _first signal source 1. If t ₂ is slow, time Delta] t _a which is output from the first transition time measurement unit 53 matches the first delay time tau _a.
Further, the time Δt _b output from the second change time measuring unit 54 coincides with the second delay time τ _B. In Figure 16, a second signal source 2 abnormality occurrence time _{t 2} is later than the abnormality occurrence time _{t 1} of the first signal source 1 shows the case of _{τ A = τ B <t 2} -t 1 However, even if τ _A ≠ τ _B , the time Δt _a coincides with the first delay time τ _A, and the time Δt _b coincides with the second delay time τ _B.
Therefore, if the time Δt _a is the first delay time τ _A and the time Δt _b is the second delay time τ _B , the determination unit 55 has the first signal source 1 and the second signal source. Outputs a judgment result indicating that an abnormality has occurred in both of 2.

In the third embodiment, the phase difference detection circuit 6 has a third signal from the first signal output from the first signal source 1 and the second signal output from the second signal source 2. A sixth signal is obtained from the first frequency converter 11 that generates a signal, the second signal output from the second signal source 2, and the fourth signal output from the first delay circuit 12. A seventh signal is generated from the second frequency converter 41 to be generated, the first signal output from the first signal source 1, and the fifth signal output from the second delay circuit 13. It is provided with a third frequency converter 42.
Further, the phase difference detection circuit 6 outputs the eighth signal indicating the phase difference between the phase of the third signal and the phase of the sixth signal, the first comparator 45, and the phase of the third signal. It includes a second comparator 46 that outputs a ninth signal indicating a phase difference from the phase of the seventh signal.
Then, the determination circuit 49 makes the first signal source 1 or the first signal source 1 or the first based on each of the eighth signal output from the first comparator 45 and the ninth signal output from the second comparator 46. The phase difference detection circuit 6 is configured so as to detect the occurrence of an abnormality in the signal source 2 of 2. Therefore, the phase difference detection circuit 6 can prevent erroneous determination of the presence or absence of abnormality in the signal source even if phase jitter is superimposed.

Further, in the third embodiment, the determination circuit 49 determines the first signal source 1 and the second signal source based on the time change of the phase of the eighth signal and the time change of the phase of the ninth signal, respectively. The phase difference detection circuit 6 is configured so as to determine which of the two signal sources has an abnormality. Therefore, the phase difference detection circuit 6 can identify which signal source the abnormality has occurred in. Further, it can be determined that not only the abnormality of the first signal source 1 or the second signal source 2 but also the abnormality of both the first signal source 1 and the second signal source 2 has occurred.

In the phase difference detection circuit 6 shown in FIG. 11, the frequencies of the two signals input to the first frequency converter 11, the frequencies of the two signals input to the second frequency converter 14, and the third frequency. The frequencies of the two signals input to the frequency converter 42 are both f ₁ and f ₂ , and are assumed to be the same. However, the frequencies of the two signals input to the first frequency converter 11, the frequencies of the two signals input to the second frequency converter 14, and the frequencies of the two signals input to the third frequency converter 42 2 It suffices if the frequencies of the two signals are the same, and the frequencies of the two signals input to the frequency converters 11, 14 and 42 are not limited to f ₁ and f ₂ .
Therefore, the phase difference detection circuit 6 may include, for example, the four frequency converters (1) to (4) shown below. Each of the four frequency converters (1) to (4) can be realized by a frequency divider, a multiplier, or the like.
Frequency converter (1), the frequency f ₁ of the first signal into a frequency f _3, and outputs a signal of the frequency f ₃ in each of the first frequency converter 11 and the third frequency converter 42 It is a converter.
Frequency converter (2), the frequency f ₂ of the second signal into a frequency f _4, and outputs a signal of frequency f ₄ to each of the first frequency converter 11 and second frequency converter 41 It is a converter.
Frequency converter (3), the frequency f ₁ of the fourth signal into a frequency f _3, a converter for outputting a signal of a frequency f ₃ to the second frequency converter 41.
Frequency converter (4), the frequency f ₂ of the fifth signal into a frequency f _4, a converter for outputting a signal of a frequency f ₄ to the third frequency converter 42.

The clock generator shown in FIG. 11 includes a first signal source 1 and a second signal source 2, and the frequency f ₁ of the first signal output from the first signal source ₁ is the second. It is assumed that the frequency is higher than the frequency f ₂ of the second signal output from the signal source 2 (f ₁ > f ₂ ). However, this is only an example, and the frequency f ₁ of the first signal output from the first signal source ₁ is equal to or less than the frequency f ₂ of the second signal output from the second signal source 2. ₁ ≤ f ₂ ) may be set.

In the clock generator shown in FIG. 11, it is assumed that the desired frequencies of the third signal, the sixth signal, and the seventh signal are f ₁ − f ₂ . Therefore, assuming that the output frequencies of the first frequency converter 11, the second frequency converter 41, and the third frequency converter 42 are the frequencies when m = n = 1 in the equation (6). There is.
However, this is only an example, and for example, the desired frequencies in the third signal, the sixth signal, and the seventh signal may be f ₁ + f ₂ . When the desired frequency is f ₁ + f ₂ , the output frequencies of the first frequency converter 11, the second frequency converter 41, and the third frequency converter 42 are set to m = in the equation (5). This is the frequency when n = 1.
Further, the desired frequency is not limited to the frequency when m = n = 1 in the equations (5) and (6), and the desired frequency is, for example, in the equation (5), m = 1, n = may be frequency _f 1 + 2f ₂ when the 2. Further, desired frequency, for example, in the formula (6), m = 2, n = it may be a frequency _2f 1 -2f ₂ when the 2.

The phase difference detection circuit 6 shown in FIG. 11 converts the eighth signal output from the first comparator 45 from an analog signal to a first digital signal, and outputs the first digital signal to the determination circuit 49. It is equipped with an ADC 47.
Further, the phase difference detection circuit 6 shown in FIG. 11 converts the ninth signal output from the second comparator 46 from an analog signal to a second digital signal, and converts the second digital signal into the determination circuit 49. It is equipped with an output ADC 48.
The phase difference detection circuit 6 may include the following three ADCs (1) to (3) instead of the ADC 47 and the ADC 48.
The ADC (1) converts the third'signal output from the first filter 15 from an analog signal to a digital signal, and outputs the digital signal to each of the first comparator 45 and the second comparator 46. ADC to do.
The ADC (2) is an ADC that converts the 6'signal output from the second filter 43 from an analog signal to a digital signal and outputs the digital signal to the first comparator 45.
The ADC (3) is an ADC that converts the 7'signal output from the third filter 44 from an analog signal to a digital signal and outputs the digital signal to the second comparator 46.

In the clock generator shown in FIG. 11, it is assumed that the first signal source 1 outputs the first signal and the second signal source 2 outputs the second signal.
In order to be able to detect a failure in which the first signal source 1 does not output the first signal, the clock generator shown in FIG. 11 implements a measuring circuit for measuring the power or current of the first signal. It may be.
The determination circuit 49 is of the first signal source 1 if the power of the first signal measured by the measurement circuit is smaller than the threshold Th ₁ or the current of the first signal is smaller than the threshold Th ₂ . Detect a failure.
Further, in order to detect a failure in which the second signal source 2 does not output the second signal, the clock generator shown in FIG. 11 implements a measurement circuit for measuring the power or current of the second signal. You may try to do it.
Judging circuit 49, when the power of the second signal measured by the measuring circuit is smaller than the threshold value Th _1, or a current of the second signal is less than the threshold value Th _2, the second signal source 2 Detect a failure.
The threshold values Th ₁ and Th ₂ may be stored in the internal memory of the determination circuit 49 or may be given from the outside.

In the phase difference detection circuit 6 shown in FIG. 11, it is assumed that each of the first delay circuit 12 and the second delay circuit 13 is a through line. However, this is only an example, and each of the first delay circuit 12 and the second delay circuit 13 may be a filter. However, since the filter has a time constant, when each of the first delay circuit 12 and the second delay circuit 13 is a filter, the abnormality of the first signal source 1 or the second signal source 2 is abnormal. The change in the output signal of the filter due to the generation is delayed from the change in the input signal of the filter.

13 to 16 show that when an abnormality occurs in the first signal source 1 or the second signal source 2, the frequency of the third signal, the frequency of the sixth signal, and the frequency of the seventh signal Changes. Then, it is shown that the phase of one or more digital signals among the phase of the first digital signal and the phase of the second digital signal changes.
When an abnormality occurs in the first signal source 1 or the second signal source 2, the phase of the third signal, the phase of the sixth signal, and the phase of the seventh signal also change, and the first The phase of the digital signal and the phase of the second digital signal change in the same manner as in FIGS. 13 to 16. Therefore, the clock generator shown in FIG. 11 similarly changes the phase of the 3rd signal, the phase of the 6th signal, and the phase of the 7th signal due to the occurrence of an abnormality. It is possible to identify which signal source has an abnormality.

The clock generator shown in FIG. 11 includes a first signal source 1 and a second signal source 2, and the determination circuit 49 is any of the first signal source 1 and the second signal source 2. It is determined whether an abnormality has occurred in the signal source.
However, this is only an example, and a clock generator may be provided with a third signal source 5 in addition to the first signal source 1 and the second signal source 2.

FIG. 17 is a configuration diagram showing another clock generator according to the third embodiment. In FIG. 17, the same reference numerals as those in FIGS. 5 and 11 indicate the same or corresponding parts, and thus the description thereof will be omitted.
In the clock generator shown in FIG. 17, the first signal source 1 transmits the first signal to the clock signal generation unit 3, the first frequency converter 11 of the phase difference detection circuit 6, and the third of the phase difference detection circuit 6. Is output to each of the frequency converter 42 and the first delay circuit 12 of the phase difference detection circuit 6.
Further, the first signal source 1 is the first frequency converter 11 of the phase difference detection circuit 6a, the third frequency converter 42 of the phase difference detection circuit 6a, and the first delay circuit 12 of the phase difference detection circuit 6a. Output to each of.
The third signal source 5 uses a signal having a frequency of f ₃ and an initial phase of θ ₃ as a clock signal generator 3, a first frequency converter 11 of the phase difference detection circuit 6a, and a third of the phase difference detection circuit 6a. It is output to each of the frequency converter 41 of 2 and the second delay circuit 13 of the phase difference detection circuit 6a.
The phase difference detection circuit 6a is a circuit having the same configuration as the phase difference detection circuit 6, and inputs a first signal output from the first signal source 1 and a signal output from the third signal source 5. To do.
The determination circuit 49 of the phase difference detection circuit 6a determines which of the first signal source 1 and the third signal source 5 has an abnormality.
Further, the determination circuit 49 of the phase difference detection circuit 6a determines whether or not an abnormality has occurred in both the first signal source 1 and the third signal source 5.

The clock generator shown in FIG. 11 includes two signal sources, and the clock generator shown in FIG. 17 includes three signal sources. However, these are only examples, and may be a clock generator including N (N is an integer of 4 or more) signal sources.
A clock generator including N signal sources includes N-1 phase difference detection circuits 6n (n = 1, 2, ..., N-1) instead of the phase difference detection circuit 6.
Each phase difference detection circuit 6n is a circuit having the same configuration as the phase difference detection circuit 6, and inputs a first signal output from the first signal source 1 and a signal output from the n + 1 signal source. ..
The determination circuit 49 of the phase difference detection circuit 6n determines which of the first signal source 1 and the n + 1 signal source has an abnormality.

In the present invention, within the scope of the invention, it is possible to freely combine each embodiment, modify any component of each embodiment, or omit any component in each embodiment. ..

The present invention is suitable for a phase difference detection circuit and a clock generator for determining a signal source in which an abnormality has occurred.

1 1st signal source, 2nd signal source, 3,3a clock signal generator, 4,4a, 6,6a phase difference detection circuit, 5th signal source, 11 first frequency converter, 12 1st delay circuit, 13 2nd delay circuit, 14 2nd frequency converter, 15 1st filter, 16 2nd filter, 17 comparator, 18 ADC, 19, 30 judgment circuit, 21 phase calculation unit , 22 Change time measurement unit, 23, 31 Judgment unit, 41 Second frequency converter, 42 Third frequency converter, 43 Second filter, 44 Third filter, 45 First comparer, 46th 2 comparer, 47, 48 ADC, 49 judgment circuit, 51 1st phase calculation unit, 52 2nd phase calculation unit, 53 1st change time measurement unit, 54 2nd change time measurement unit, 55 judgment Department.

Claims (14)

A first frequency converter that generates a third signal from the first signal output from the first signal source and the second signal output from the second signal source.
A first delay circuit that delays the first signal output from the first signal source and outputs it as a fourth signal, and
A second delay circuit that delays the second signal output from the second signal source and outputs it as a fifth signal, and
From the fourth signal output from the first delay circuit and the fifth signal output from the second delay circuit, a sixth signal having the same frequency as the frequency of the third signal is generated. The second frequency converter and
Comparison of outputting a seventh signal indicating the phase difference between the phase of the third signal generated by the first frequency converter and the phase of the sixth signal generated by the second frequency converter. With a vessel
A phase difference detection circuit including a determination circuit for detecting the occurrence of an abnormality in the first signal source or the second signal source based on the seventh signal output from the comparator. The first delay circuit delays the first signal output from the first signal source by the first delay time.
The second delay circuit delays the second signal output from the second signal source by a second delay time different from the first delay time.
In the determination circuit, an abnormality occurs in any of the first signal source and the second signal source based on the time change of the phase of the seventh signal output from the comparator. The phase difference detection circuit according to claim 1, wherein the phase difference detection circuit is characterized in that it is determined. The determination circuit
A phase calculation unit that calculates the phase of the seventh signal output from the comparator, and
When the phase change calculated by the phase calculation unit is detected, the change time measurement unit that measures the time from the detection time of the change until the changed phase returns to the original phase,
A determination unit for determining which of the first signal source and the second signal source has an abnormality based on the time measured by the change time measuring unit is provided. 2. The phase difference detection circuit according to claim 2. The determination unit
If the time measured by the change time measuring unit is the first delay time, a determination result indicating that an abnormality has occurred in the first signal source is output and measured by the change time measuring unit. The phase difference detection circuit according to claim 3, wherein if the time is the second delay time, a determination result indicating that an abnormality has occurred in the second signal source is output. The determination unit
While counting the number of times the time is measured by the change time measuring unit, it is determined whether or not there is a change in the phase change amount calculated by the phase calculation unit while the time is being measured by the change time measuring unit. Judge,
If the number of measurements is one, the amount of change does not change, and the time measured by the change time measuring unit is the first delay time, an abnormality occurs in the first signal source. Outputs the judgment result indicating that it is doing
If the number of measurements is one, the amount of change does not change, and the time measured by the change time measuring unit is the second delay time, an abnormality occurs in the second signal source. Outputs the judgment result indicating that it is doing
If the number of measurements is two, a determination result indicating that an abnormality has occurred in both the first signal source and the second signal source is output.
If the number of measurements is one and the amount of change is changed, a determination result indicating that an abnormality has occurred in both the first signal source and the second signal source is output. 3. The phase difference detection circuit according to claim 3. The first frequency converter uses the second signal to convert the frequency of the first signal to generate the third signal.
The phase difference according to claim 1, wherein the second frequency converter uses the fifth signal to convert the frequency of the fourth signal to generate the sixth signal. Detection circuit. The first frequency converter uses the first signal to convert the frequency of the second signal to generate the third signal.
The phase difference according to claim 1, wherein the second frequency converter uses the fourth signal to convert the frequency of the fifth signal to generate the sixth signal. Detection circuit. A first filter that suppresses the spurious signal contained in the third signal output from the first frequency converter to the comparator, and
The phase difference detection according to claim 1, further comprising a second filter that suppresses a spurious signal included in a sixth signal output from the second frequency converter to the comparator. circuit. A first frequency converter that generates a third signal from the first signal output from the first signal source and the second signal output from the second signal source.
A first delay circuit that delays the first signal output from the first signal source and outputs it as a fourth signal, and
A second delay circuit that delays the second signal output from the second signal source and outputs it as a fifth signal, and
From the second signal output from the second signal source and the fourth signal output from the first delay circuit, a sixth signal having the same frequency as the frequency of the third signal is generated. The second frequency converter and
From the first signal output from the first signal source and the fifth signal output from the second delay circuit, a seventh signal having the same frequency as the frequency of the third signal is generated. With a third frequency converter
An eighth signal indicating a phase difference between the phase of the third signal generated by the first frequency converter and the phase of the sixth signal generated by the second frequency converter is output. 1 comparer and
A ninth signal indicating a phase difference between the phase of the third signal generated by the first frequency converter and the phase of the seventh signal generated by the third frequency converter is output. 2 comparators and
Anomalies in the first signal source or the second signal source based on each of the eighth signal output from the first comparator and the ninth signal output from the second comparator. A phase difference detection circuit including a judgment circuit for detecting the occurrence of. The first delay circuit delays the first signal output from the first signal source by the first delay time.
The second delay circuit delays the second signal output from the second signal source by the second delay time.
The determination circuit is based on the time change of the phase of the eighth signal output from the first comparator and the time change of the phase of the ninth signal output from the second comparator. The phase difference detection circuit according to claim 9, wherein it is determined which of the first signal source and the second signal source has an abnormality. The determination circuit
A first phase calculation unit that calculates the phase of the eighth signal output from the first comparator, and
A second phase calculation unit that calculates the phase of the ninth signal output from the second comparator, and
When the phase change calculated by the first phase calculation unit is detected, the first change time measurement unit that measures the time from the detection time of the change until the changed phase returns to the original phase,
When the phase change calculated by the second phase calculation unit is detected, the second change time measurement unit that measures the time from the detection time of the change until the changed phase returns to the original phase,
Which of the first signal source and the second signal source is based on each of the time measured by the first change time measuring unit and the time measured by the second change time measuring unit. The phase difference detection circuit according to claim 10, further comprising a determination unit for determining whether or not an abnormality has occurred in the signal source of the above. The determination unit
If the time measured by the first change time measuring unit is the first delay time and the time measured by the second change time measuring unit is zero, the first signal source Outputs the judgment result indicating that an abnormality has occurred in
If the time measured by the first change time measuring unit is zero and the time measured by the second change time measuring unit is the second delay time, the second signal source The phase difference detection circuit according to claim 11, wherein a determination result indicating that an abnormality has occurred is output. The determination unit
If the time measured by the first change time measuring unit is the first delay time and the time measured by the second change time measuring unit is zero, the first signal source Outputs the judgment result indicating that an abnormality has occurred in
If the time measured by the first change time measuring unit is zero and the time measured by the second change time measuring unit is the second delay time, the second signal source Outputs the judgment result indicating that an abnormality has occurred in
If the time measured by the first change time measuring unit is the first delay time, and the time measured by the second change time measuring unit is the second delay time, the said The phase difference detection circuit according to claim 11, wherein a determination result indicating that an abnormality has occurred in both the first signal source and the second signal source is output. A clock signal generator that generates a clock signal using the first signal output from the first signal source and the second signal output from the second signal source.
It is provided with a phase difference detection circuit that monitors the first signal and the second signal and detects the occurrence of an abnormality in the first signal source or the second signal source.
The phase difference detection circuit is
A first frequency converter that generates a third signal from the first signal output from the first signal source and the second signal output from the second signal source.
A first delay circuit that delays the first signal output from the first signal source and outputs it as a fourth signal, and
A second delay circuit that delays the second signal output from the second signal source and outputs it as a fifth signal, and
From the fourth signal output from the first delay circuit and the fifth signal output from the second delay circuit, a sixth signal having the same frequency as the frequency of the third signal is generated. The second frequency converter and
Comparison of outputting a seventh signal indicating the phase difference between the phase of the third signal generated by the first frequency converter and the phase of the sixth signal generated by the second frequency converter. With a vessel
A clock generation device including a determination circuit for detecting the occurrence of an abnormality in the first signal source or the second signal source based on a seventh signal output from the comparator.

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