JP6708398B2 - Through wiring board manufacturing method and device manufacturing method using the same - Google Patents

Description

The present invention relates to a through wiring board manufacturing method and a device manufacturing method using the same.

Systems such as integrated circuits represented by LSIs (Large Scale Integrations) are required to have high speed and high functionality. In order to further increase the speed and functionality of these integrated circuits and other systems, chip mounting technology using a three-dimensional structure is required. For this reason, conventionally, there has been used a through-substrate wiring board which can electrically connect chips with the shortest distance. The through wiring is generally formed by forming a through hole (also referred to as a through hole) penetrating the substrate and then burying a conductor in the through hole. Then, through the conductor of the through wiring board, the members stacked above and below the board are electrically connected. Electroplating is generally used as a method for embedding a conductor in the through hole. When the aspect ratio of the through hole is high, bottom-up electrolytic plating in which a seed layer is formed at one end of the through hole is effective in order to obtain a highly reliable through wiring. In Patent Document 1, a substrate having a through hole (hereinafter, sometimes referred to as a through substrate) is brought into contact with a substrate having a seed film (hereinafter sometimes referred to as a seed substrate), and the seed film is used as a starting point. A method of electroplating is disclosed. In Patent Document 1, as a seed substrate, an intermediate layer having a lower melting point than the seed film is provided between the seed film and the substrate, and after the conductor is plated in the through hole, the through substrate is used as the seed substrate from the intermediate layer. Separated from the board. With the technique of Patent Document 1, it is possible to manufacture a through wiring with a reduced void even in a through hole having a high aspect ratio with a high yield.

JP, 2006-161124, A

However, as a result of examination by the present inventor, there is room for improvement in the technique disclosed in Patent Document 1 from the viewpoint that the substrate separation after plating the conductor in the through holes is performed while suppressing the stress generated during the separation. It turned out to be. In the technique of Patent Document 1, the intermediate layer having a low melting point is heated to a temperature equal to or higher than the melting point to separate the substrates, but the substrates are separated from each other within the intermediate layer. In this case, a load due to atmospheric pressure is applied to the bonding interface between the seed substrate and the through substrate. Since the peeled area is approximately equal to the area of the intermediate layer, a relatively large stress is required for peeling the substrates from each other, and depending on how the stress is applied, damage or damage to the conductor or the through-substrate due to the stress becomes a problem. The magnitude of this problem becomes more remarkable as the area of the substrate increases. Further, after the substrate is peeled off, the intermediate layer remains on the plating start end face of the conductor and the surface of the through-hole substrate. Then, in order to remove the residual intermediate layer, mechanical polishing, CMP (Chemical Mechanical Polishing) treatment or the like is performed. However, it is not easy to polish or CMP the low melting point material without damaging the end face of the conductor. It is an object of the present invention to provide a method for manufacturing a through wiring board that suppresses the occurrence of damage that occurs when the board is peeled off.

The method for manufacturing a through wiring substrate of the present invention made in view of the above problems provides a laminated body formed by bringing a first substrate having a through hole into contact with a second substrate having a seed film and an intermediate layer. The step of preparing, the step of filling the inside of the through-hole with a conductor by plating with the seed film as a starting point, and the conductor filled in the through-hole after the plating, the intermediate layer and the Separating the second substrate from the interface of the second substrate.

The present invention includes a method of manufacturing a device. A method of manufacturing a device of the present invention is a method of manufacturing a device in which an element portion is provided on a through wiring substrate, and the element portion and the through wiring substrate are electrically connected to each other. Forming the element portion on the first main surface side of the through wiring substrate obtained by the manufacturing method of, and the second main surface of the through wiring substrate located on the side opposite to the first main surface. Forming a wiring portion connected to the conductor on the side.

In the present invention, after the plating treatment, the conductor filled in the through hole is separated from the second substrate at the interface between the intermediate layer and the second substrate. That is, since the separation of the conductor forming the through wiring from the seed substrate (second substrate) occurs at the interface (local) between the intermediate layer corresponding to the end face of the conductor and the second substrate, the separation area Is much smaller than the intermediate layer area. Therefore, the separation stress, which is almost proportional to the separation area, is much smaller than that in the case of separating the entire surface of the intermediate layer, and the damage to the conductor and the through-hole substrate can be significantly suppressed. Further, in the device manufacturing method using the through wiring substrate manufacturing method of the present invention, the through wiring substrate is less damaged and the manufacturing yield is improved. Further, the manufacturing yield of the device using this through wiring board is also improved, and the device with improved electrical reliability can be manufactured.

It is a figure for demonstrating embodiment of the manufacturing method of the penetration wiring board of this invention. It is sectional drawing for demonstrating the Example of the manufacturing method of the penetration wiring board of this invention. It is a figure for demonstrating the device of this invention. It is a figure for demonstrating the Example of the manufacturing method of the device of this invention. It is a figure for demonstrating the application example of the device of this invention.

The present invention provides a step of preparing a laminated body formed by bringing a first substrate having a through hole and a second substrate having a seed film and an intermediate layer into contact with each other, and performing a plating process starting from the seed film. It is a method of manufacturing a through wiring substrate, comprising a step of filling the inside of the through hole with a conductor. Then, after the plating treatment, the step of separating the conductor filled in the through hole from the second substrate at an interface between the intermediate layer and the second substrate is characterized by being included. In addition, the surface of the first substrate having the through hole in which the hole is located is brought into contact with the seed film provided on the second substrate, and the seed film is used as a starting point for plating the inside of the through hole. It is also a method of manufacturing a through wiring substrate obtained by filling with a conductor. Embodiments of the present invention will be described below with reference to the drawings, but the present invention is not limited to such embodiments, and various modifications and changes can be made within the scope of the gist thereof.

(Embodiment)
An embodiment of a method of manufacturing a through wiring substrate according to the present invention will be described with reference to FIG. 1A to 1H are cross-sectional views for explaining the present embodiment. In a manufacturing process of a through wiring board, it is common to form a plurality of through wirings on one through board at the same time, but in FIG. 1, only two through wirings are shown for simplification and clarity. ing.

First, as shown in FIG. 1A, a first substrate 1 having a through hole 13 is prepared. As the first substrate 1, for example, an insulating substrate such as glass or a semiconductor substrate typified by Si can be adopted. The 1st board|substrate 1 has the 1st surface 1a which is a 1st main surface, and the 2nd surface 1b located in the side opposite to this. The thickness of the first substrate 1 can be set in the range of 50 μm to 1000 μm, for example. A through hole 13 is formed in the first substrate 1 so as to penetrate from the first surface 1a side to the second surface 1b side. The shape, number, arrangement, etc. of the through holes 13 are defined by a photoresist pattern according to the application. The through holes 13 have, for example, a circular cross section and a diameter in the range of 20 μm to 100 μm, and are formed in an array having a horizontal period of 200 μm and a vertical period of 2 mm. After the through hole 13 is formed, an insulating film or a diffusion prevention film (hereinafter, also referred to as a barrier layer) that prevents metal diffusion is formed on the side wall 13a of the through hole 13 if necessary. It is also possible to form both the insulating film and the diffusion prevention film. Thus, the through substrate 1s is formed.

Next, the second substrate 50 shown in FIG. 1B is prepared. As the second substrate 50, for example, an insulating substrate typified by glass, a semiconductor substrate typified by Si, or a metal substrate typified by SUS can be adopted. The second substrate 50 has sufficient mechanical strength for the steps performed in this embodiment. The thickness of the second substrate may be in the range of 100 μm to 1000 μm, for example. At least one main surface 50a of the second substrate 50 is preferably flattened, and the surface roughness Ra (arithmetic mean roughness) of the main surface 50a is preferably 50 nm or less. Next, as shown in FIG. 1C, the intermediate layer 51 is formed on the main surface 50a of the second substrate 50. The intermediate layer 51 preferably has lower adhesiveness with the second substrate 50 than adhesiveness with a seed film 52 described later with reference to FIG. That is, when the intermediate layer 51 and the seed film 52 are directly formed on the main surface 50a of the second substrate 50, the adhesion between the intermediate layer 51 and the main surface 50a is determined by the adhesion between the seed film 52 and the main surface 50a. It is desirable that it is lower than the sex. Explaining the reason with reference to FIG. 1(G), the adhesiveness between the intermediate layer 51 and the main surface 50a is that the intermediate layer 51 does not separate from the main surface 50a in the process up to FIG. 1(F). The weaker the better. As a matter of course, the adhesiveness between the intermediate layer 51 and the seed film 52 needs to be stronger than the adhesiveness between the intermediate layer 51 and the second substrate 50. The intermediate layer is preferably composed of a conductive film, and preferably composed of a film containing a metal material. Examples of the metal material include gold (Au), silver (Ag), platinum (Pt), and the like. Since the intermediate layer functions as a peeling layer, it is desirable that the thickness of the intermediate layer 51 is generally in the range of 1 nm to 100 nm. And it is more preferable that the thickness is in the range of 5 nm to 50 nm, and most preferably in the range of 10 nm to 20 nm. In the formation of the intermediate layer 51, if the minimum necessary adhesiveness with the second substrate 50 can be ensured, a forming method with which lower adhesiveness is obtained is desirable. For example, as a method for forming the intermediate layer 51, a vacuum vapor deposition method and a sputtering method can be mentioned, but the vacuum vapor deposition method is preferable to the sputtering method from the viewpoint of obtaining low adhesion. Next, as shown in FIG. 1D, a seed film 52 is formed on the intermediate layer 51. From the viewpoint of the seed film in the electroplating process, the seed film 52 is formed of a conductive film having high conductivity, and is preferably a metal film. More preferably, the main component of the seed film 52 is the same as the main component of the conductor 2 plated in FIG. Examples of the method for forming the seed film 52 include vacuum vapor deposition and sputtering. The thickness of the seed film 52 is preferably set in the range of 10 nm to 200 nm for the reason described later with reference to FIGS. Thus, the seed substrate 50s is formed. Here, in this description, the preparation of the first substrate 1 was described first, and then the preparation of the second substrate 50 was described, but the order of preparation may be either first, or both may be prepared simultaneously.

Next, as illustrated in FIG. 1E, the through-hole substrate 1s that is the first substrate and the seed substrate 50s are brought into contact with each other to prepare a stacked body. At this time, the seed film 52 is exposed at the bottom of the through hole 13. That is, the surface of the first substrate 1s where the holes are located is brought into contact with the seed film 52 provided on the second substrate 50. Further, it is desirable that there is no gap between the through substrate 1s and the seed substrate 50s. Examples of the method of contacting the through substrate 1s and the seed substrate 50s include a mechanical pressure bonding method and an adhesion method using a substance soluble in water or an organic solvent. When the bonding method is used, the bonding substance at the bottom of the through hole 13 is removed after the bonding so that the seed film 52 is exposed.

Next, as shown in FIG. 1(F), a plating process (electroplating) is performed starting from the portion of the seed film 52 exposed at the bottom of the through hole 13 in the first substrate of the laminated body, so that the inside of the through hole 13 is formed. The conductor 2 (including 2-1 and 2-2) is filled. At the time of electroplating, the through substrate 1s and the seed substrate 50s which are in contact with each other are immersed in a plating solution, and the portion of the seed film 52 exposed at the bottom of the through hole 13 is arranged so as to face the anode made of a metal plate. Then, at least the seed film 52 is energized. In order to reduce uneven plating, it is desirable that the current density at the bottoms of all the through holes 13 of the through substrate 1s be uniform. However, in the case where only the seed film 52 can be energized, it is necessary to make the seed film 52 thick in order to obtain a uniform current density over the entire surface of the seed film 52. The larger the size of the through substrate 1s, the larger the area of the seed film 52, and therefore the seed film 52 needs to be thicker. It is not desirable to make the seed film 52 thick because it not only increases the manufacturing cost but also makes it difficult to separate the substrate in FIG. Therefore, in this embodiment, both the intermediate layer 51 and the second substrate 50 are made of metal. Furthermore, in order to reduce the cost, the second substrate 50 is a metal substrate made of a simple substance or a complex of stainless steel (for example, SUS), nickel (Ni), aluminum (Al), copper (Cu), or the like. Is preferred. If the second substrate 50 is a metal, a sufficiently uniform current density can be obtained, so that it does not need to be highly pure. When the second substrate 50 has conductivity, the portion of the second substrate 50 excluding the portion of the seed film 52 exposed at the bottom of the through hole 13 is prevented from coming into contact with the plating solution, and unnecessary plating growth is prevented. It is preferable not to happen. When the through substrate 1s and the seed substrate 50s are brought into contact with each other by the bonding method, the contact interface around the substrate is plated in order to prevent the plating solution from penetrating from the contact interface around the substrate and dissolving the substance used for adhesion. It is preferable to avoid contact with the liquid. In order to ensure the reliability of the electrical connection, the plating process is performed until the plating termination surface 2c of the conductor 2 projects from the first surface 1a of the first substrate 1. The protrusion height of the end surface 2c is determined in consideration of the uniformity of the conductor filled in the substrate by the plating process and the like, and is, for example, 10 μm or more.

Even if the second substrate 50 is made of a metal material, the intermediate layer 51 and the seed film 52 are formed in the present invention. The reason for this has become clear from our research. In the case where the conductor 2 is directly electroplated on the second substrate 50 made of a metal material, first, the conductor 2 and the surface of the second substrate 50 have strong adhesion, and peeling after plating is performed. At, the conductor 2 may be damaged by stress. Therefore, the intermediate layer 51 is necessary from the viewpoint of weakening the adhesion between the conductor 2 and the second substrate 50. That is, the intermediate layer 51 plays the role of a peeling layer. In order to obtain a sufficient effect, the thickness of the intermediate layer 51 may be in the range of 1 nm to 100 nm. In general, it is difficult to control the uniformity of the surface state of the second substrate 50 from an inexpensive metal, and if the conductor 2 is directly formed on the surface by plating, unevenness of plating of the conductor 2 is large. .. Here, the surface state of the second substrate 50 refers to the surface shape, the oxidation state, the impurity attachment state, and the like. The uneven plating of the conductor 2 indicates two things. One is that unevenness in the plating start end surface of the conductor 2 occurs in each through hole. Ideally, the plating is uniformly started on the bottom surface of the through hole, and the conductor 2 is plated with a shape substantially similar to the bottom surface of the through hole. However, when the state of the surface of the second substrate 50 corresponding to the bottom surface of the through hole is non-uniform on a micro order, local unevenness occurs in the plating start timing and speed. As a result, defects such as cavities (also called voids) are formed on the plating start end surface of the conductor 2 and the end surface becomes uneven. The other is that unevenness in height of the plating termination surface 2c of the conductor 2 occurs between the plurality of through holes. For example, the plating termination surface 2c of the conductor 2 in a certain through hole projects higher than the first surface 1a of the first substrate 1, but the plating termination surface 2c of the conductor 2 in another through hole is still the same. It is assumed that it is not exposed from the opening of the through hole. In all the through holes, if the plating termination surface 2c of the conductor 2 protrudes from the first surface 1a of the first substrate 1 and the unevenness of the protrusion height can be reduced, the conductor 2 in FIG. It becomes easy to flatten the plating termination surface 2c.

In the present invention, the plating treatment is not limited to electroplating (electrolytic plating) and does not exclude chemical plating (electroless plating), but in chemical plating, the metal to be deposited is nickel (Ni) or the like. It is easy to adopt electroplating considering that it is limited to the above and that the processing takes a relatively long time and is expensive. In the present invention, the metal filled in the through holes by the plating treatment contains Cu (copper), nickel (Ni), chromium (Cr), iron (Fe), cobalt (Co), and the like, as well as these elements. The alloy can be mentioned. Among them, Cu (copper) has a high electric conductivity, and it is preferable to use Cu (copper) and an alloy containing the same because they are relatively inexpensive.

Generally, the surface of a metal substrate is easily oxidized or adsorbs impurities. Especially when the material purity of the metal substrate is not sufficiently high, it is difficult to control the surface condition uniformly. Moreover, in general, an inexpensive metal substrate has a difficulty in smoothing the surface, and it is more difficult to control the uniformity of the surface state. Therefore, when the conductor 2 is directly electroplated on the surface of the metal substrate, the plating reproducibility between the substrates is low. In the present invention, in order to control the uniformity of the surface condition of the second substrate 50 made of a metal material and realize the uniform plating treatment of the conductor 2, the surface of the second substrate 50 is formed. A seed film 52 whose state is easy to control is provided. In order to obtain a sufficient effect as a seed film, the thickness of the seed film 52 is preferably 10 nm or more. In order to make it easier to start the plating process of the conductor 2, it is desirable that the main component of the seed film 52 be the same as the main component of the conductor 2.

Next, as shown in FIG. 1G, the plated conductor 2 (including 2-1 and 2-2) is separated from the second substrate 50 at the interface between the intermediate layer 51 and the second substrate 50. To do. At this time, the conductor 2 remains in the through hole 13 of the first substrate 1. When the first substrate 1 and the second substrate 50 are brought into contact with each other by a mechanical pressure bonding method for peeling the substrate, the pressure bonding is first released. When the first substrate 1 and the second substrate 50 are brought into contact with each other by an adhesion method using a substance that dissolves in water or an organic solvent, the substance used for adhesion is first dissolved and removed with water or an organic solvent. This dissolution is performed mainly by permeation of water or an organic solvent from the contact interface around the first substrate 1 and the second substrate 50. In order to shorten the melting time, it is effective to insert a thin plate from the periphery of the first substrate 1 and the second substrate 50 into the contact interface to widen the gap of the contact interface. Then, the first substrate 1 and the second substrate 50 are connected only by the intermediate layer 51a corresponding to the plating start end face of the conductor 2 (end face in close contact with the seed film 52). The area to be connected is usually 1/10,000 or less of the area of the entire intermediate layer 51, which is far smaller than the area of the entire intermediate layer 51. Therefore, the conductor 2 can be separated from the second substrate 50 at the intermediate layer 51a with much smaller stress as compared with the case where the substrate is separated from the entire surface of the intermediate layer 51. For example, the connection between the conductor 2 and the second substrate 50 can be cut by inserting thin plates little by little from the periphery of the first substrate 1 and the second substrate 50 into the contact interface and applying a small stress. The magnitude of this stress depends on the connection area, the material of the intermediate layer 51, the seed film 52, and the second substrate 50, the thickness of the intermediate layer 51 and the seed film 52, the forming conditions, and the like, but is 1000 Pa or less. Is possible.

Since the conductor 2 is grown by plating starting from the seed film 52, the adhesion with the seed film 52 is relatively high. Therefore, the separation of the conductor 2 and the second substrate 50 due to stress is more likely to occur at the interface between the intermediate layer 51a and the second substrate 50, which has the lowest adhesiveness, than at the interface between the conductor 2 and the seed film 52. Then, only the 51a portion of the intermediate layer 51 and the 52a portion of the seed film 52 are separated while being attached to the plating start end surface of the conductor 2. Therefore, it is desirable that both the intermediate layer 51 and the seed film 52 are not strong films and are relatively fragile films. In general, when compared with films made of the same material, the thinner the film, the easier the film is to break. Therefore, it is desirable that the intermediate layer 51 has a thickness of 100 nm or less and the seed film 52 has a thickness of 200 nm or less.

If the seed film 52 and the intermediate layer 51 are removed by a method such as polishing or etching after separating the substrates, the seed substrate 50s can be used again as the second substrate 50 (see FIG. 1A).

Next, as shown in FIG. 1H, the end surface of the conductor 2 is flattened. At this time, the end faces 2-1a and 2-2a of the conductor 2 are flattened so that they have substantially the same height as the first surface 1a of the first substrate 1. In addition, the end faces 2-1b and 2-2b of the conductor 2 are flattened so that they have substantially the same height as the second surface 1b of the first substrate 1. The end faces 2-1a and 2-2a are processed from the first surface 1a side, but CMP is used, for example. The flattening of the plating termination surface 2c of the conductor 2 becomes easier as the unevenness of the protrusion height of 2c becomes smaller. Particularly, the smaller the unevenness of the protrusion height of 2c is, the more the flattening is, the more the recessed amount of the end face (including 2-1a and 2-2a) of the conductor 2 from the first surface 1a of the first substrate 1 Hereinafter, it is also referred to as a dishing amount). The processing of the end surfaces 2-1b and 2-2b of the conductor includes removing the 51a portion of the intermediate layer 51 and the 52a portion of the seed film 52, and flattening the plating start end surface of the conductor 2. Mechanical polishing or a CMP method is used to remove the 51a portion of the intermediate layer 51 and the 52a portion of the seed film 52. The CMP method is used to flatten the plating start end surface of the conductor 2. Particularly, when the main material of the seed film 52 is the same as the main material of the conductor 2, the removal of the portion 52a of the seed film 52 can be performed in the same step as the planarization of the plating start end surface of the conductor 2. The smaller the unevenness of plating on the plating start end surface of the conductor 2, the more it is possible to suppress the variations in the dishing amount of the end surfaces 2-1b and 2-2b and the defects due to voids and the like. The conductor 2 whose end face is flattened in this way constitutes a through wiring that is embedded in the first substrate 1 and reaches from the first surface 1a of the substrate 1 to the second surface 1b. That is, the through wiring substrate 3 in which the conductor (through wiring) 2 is formed on the through substrate 1s (see FIG. 1D) is obtained.

Thus, the through wiring substrate 3 shown in FIG. 1(H) can be manufactured. By providing the intermediate layer (separation film) 51 having weak adhesion with the seed substrate 50s between the seed substrate 50s and the seed film 52, the through wiring substrate 3 including the conductor 2 can be easily removed from the seed substrate after plating. Can be separated. Therefore, damage to the conductor 2 due to substrate separation can be reduced. Further, by providing the seed film 52 on the seed substrate 50, the surface condition of the seed substrate 50s can be controlled easily, so that the uneven plating during the formation of the conductor 2 can be reduced. As a result, a high-quality through wiring board 3 with reduced defects can be manufactured with high yield. Further, by providing the seed film 52 and the intermediate layer 51, quality requirements for the base substrate 50 that constitutes the seed substrate 50s are relaxed, and it becomes possible to use and reuse an inexpensive substrate (for example, a metal substrate such as SUS). The manufacturing cost can be reduced. The through wiring board obtained by the method for manufacturing a through wiring board of the present invention is applicable to various devices such as electronic devices, semiconductor devices, and optical devices. Hereinafter, the present invention will be described in detail with reference to specific examples.

(Example 1)
An embodiment of the method for manufacturing a through wiring substrate of the present invention will be described with reference to FIG. FIG. 2 is a sectional view for explaining this embodiment. For ease of viewing, FIG. 2 shows two through holes and two through wirings.

First, as shown in FIGS. 2A and 2B, a first substrate 1 having a through hole 13 (through substrate 1s) is prepared. Here, a Si substrate is used as the first substrate 1, and a through hole 13 is formed in the first substrate 1 as shown in FIG. The first substrate 1 has a first surface 1a and a second surface 1b located on the back side of the first surface 1a, and these two surfaces are mirror-polished to have a surface roughness Ra<2 nm. Has become. The first substrate 1 has a resistivity of about 0.01 Ω·cm and a thickness of about 200 μm. The through hole 13 penetrating between the first surface 1a and the second surface 1b of the first substrate 1 has a substantially cylindrical shape, and the diameter of the opening in the first surface 1a and the second surface 1b is It is about 50 μm. A plurality of through holes 13 are arranged in the first substrate 1 at a cycle of 400 μm. The processing of the through hole 13 is performed by using a Si deep reactive ion etching (RIE: Reactive Ion Etching) technique. After the deep RIE, the inner wall 13a of the through hole 13 is smoothed. The smoothing is performed by repeating the thermal oxidation of the surface of the first substrate 1 made of Si and the removal of the thermal oxide film twice. After the smoothing, the surface roughness Ra of the inner wall 13a of the through hole 13 becomes 100 nm or less. Next, as shown in FIG. 2B, a first substrate including the first surface 1a, the second surface 1b of the first substrate 1 and the inner wall 13a of the through hole 13 (see FIG. 2A). An insulating film 14 is formed on the surface of 1. The insulating film 14 is a thermal oxide film of Si having a thickness of about 1 μm obtained by heating the first substrate 1 in an oxygen atmosphere at about 1000° C. Thus, the through substrate 1s is formed.

Then, a second substrate 50 illustrated in FIG. 2C is prepared. The second substrate 50 is a SUS substrate having a thickness of about 300 μm. The main surface 50a of the second substrate 50 is flattened by mechanical polishing and has a surface roughness Ra of about 20 nm. Next, as shown in FIG. 2D, the intermediate layer 51 is formed on the main surface 50a of the second substrate 50. As the intermediate layer 51, a thin film of Au (gold) is formed by a vacuum evaporation method, and the thin film of Au has a thickness of about 10 nm. Next, as shown in FIG. 2E, a seed film 52 is formed on the intermediate layer 51. A Cu thin film is used as the seed film 52, and a Cu thin film having a thickness of about 50 nm is formed by a vacuum deposition method. Thus, the seed substrate 50s is formed.

Next, as shown in FIG. 2(E), the through substrate 1s shown in FIG. 2(B) and the seed substrate 50s shown in FIG. 2(E) are brought into contact with each other. Here, the surface of the through substrate 1s (first substrate) on which the through hole 13 is located and the seed film 52 provided on the seed substrate 50s (second substrate) are brought into contact with each other. Then, a nonionic surfactant is used as an adhesive layer so that no void is formed between the through substrate 1s and the seed film 52 of the seed substrate 50s. As the nonionic surfactant, for example, polyoxyethylene alkyl ether, polyethylene glycol, polyvinyl alcohol, etc. disclosed in JP 2012-28533 A can be used. The nonionic surfactant used is soluble in water or an organic solvent such as acetone and has a melting point of about 40°C. First, a surfactant is dissolved in an organic solvent, and the surface of the seed film 52 of the seed substrate 50s is spin-coated. When left at room temperature, the organic solvent is evaporated and the surfactant is solidified. Then, the through substrate 1s and the seed film 52 of the seed substrate 50s are bonded to each other via a surfactant. Then, in a state where the surfactant is melted by heating at 40 to 100° C., a load is applied to the through substrate 1s and the seed substrate 50s to bring the through substrate 1s and the seed substrate 50s into close contact with each other. Then, this is cooled to room temperature to complete the adhesion between the through substrate 1s and the seed substrate 50s. In addition, when the through substrate 1s and the seed substrate 50s are bonded to each other, vacuum defoaming is performed and then bonding is performed, whereby bonding with less voids is obtained. In the bonding method using the surface-active material, the surface-active agent somewhat enters the inside of the through-hole 13 from the outermost surface of the through-hole 13. Therefore, before performing the plating step of FIG. 2G, the surface active agent in the vicinity of the bottom of the through hole 13 may be removed to expose the seed film 52 in the state of substrate adhesion (FIG. 2F). desirable. Therefore, immediately before the plating step of FIG. 2G, the bonded through substrate 1s and seed substrate 50s are immersed in water or a plating solution containing water for a short period of time (for example, 5 seconds) to remove the surface active material to be removed. The part of the agent is dissolved in water or a plating solution containing water. Next, as shown in FIG. 2G, electroplating is performed starting from the portion of the seed film 52 exposed at the bottom of the through hole 13, and the conductor 2 (2-1 and 2-2 is provided inside the through hole 13). Including). At the time of electroplating, the bonded through substrate 1s and seed substrate 50s are immersed in a plating solution, and the portion of the seed film 52 exposed at the bottom of the through hole 13 is arranged so as to face the anode made of a metal plate. The conductor 2 is plated with Cu (copper) as a main material. A Cu plating solution containing copper sulfate as a main component is used as the plating solution. At the time of plating, a current is passed through the entire seed substrate 50s. The seed substrate 50s includes the SUS substrate 50, the intermediate layer Au51, and the seed film Cu (copper) 52, and is made of metal, so that the current density at the bottom of the through hole 13 is highly uniform and uniform. It is convenient for forming a conductor. The Cu plating is performed until the plating termination surface 2c of the conductor 2 protrudes from the first surface 1a of the first substrate 1 by about 30 μm.

Next, as shown in FIG. 2H, the plated conductor 2 (including 2-1 and 2-2) is removed from the second substrate 50 at the interface between the intermediate layer 51 and the second substrate 50. To separate. Therefore, first, a thin plate is inserted from the periphery of the first substrate 1 and the second substrate 50 into the contact interface, and the surfactant as an adhesive substance is dissolved and removed with water while forming a gap at the contact interface. Then, a thin plate is gradually inserted from the periphery of the first substrate 1 and the second substrate 50 into the contact interface to apply a small stress. As a result, the connection between the conductor 2 and the second substrate 50 is cut. At this time, since the intermediate layer 51 is Au (gold), the adhesion with the second substrate (SUS) 50 is weak. Further, the seed film 52 is Cu (copper) and has a strong adhesion with the conductor 2 made of plated Cu. Furthermore, since the thickness of Au of the intermediate layer 51 is 10 nm and the thickness of Cu of the seed film 52 is as thin as 50 nm, it is easy to break. Therefore, the separation between the conductor 2 and the second substrate 50 occurs only near the plating start end face of the conductor 2. After the separation, only the portion 51a of the intermediate layer 51 located directly below the conductor 2 and the portion 52a of the seed film 52 also located directly below the conductor 2 adhere to the plating start end surface of the conductor 2.

Next, as shown in FIG. 2I, the end surface of the conductor 2 made of Cu is flattened. At this time, the end faces 2-1a and 2-2a of the conductor 2 are set to have substantially the same height as the thermal oxide film 14 formed on the first surface 1a of the first substrate 1. Also, the end faces 2-1b and 2-2b of the conductor 2 are set to have substantially the same height as the thermal oxide film 14 formed on the second surface 1b of the first substrate 1. The planarization is performed by CMP (chemical mechanical polishing). In flattening the end faces 2-1b and 2-2b of the conductor 2, the 51a portion of the intermediate layer 51 made of Au has a small film thickness, and the 52a portion of the seed film 52 made of Cu and the plating start end face of the conductor 2 are formed. Easily removed by CMP. Therefore, here, it is not necessary to separately remove the 51a portion of the intermediate layer 51 made of Au. The conductor 2 whose end face is flattened in this way constitutes a through wiring penetrating the through wiring substrate 3. As a result, the through wiring substrate 3 in which the through wiring 2 is formed on the through substrate 1s (see FIG. 2B) is formed (FIG. 2(I)).

(Example 2)
In the second embodiment, with reference to the plan view of FIG. 3 and the sectional view of FIG. 4, an example in which the method of manufacturing a through wiring substrate of the present invention is applied to manufacture of a capacitive transducer (hereinafter, also referred to as CMUT). Will be explained. The CMUT is a capacitive type micromachined (CMUT: Capacitive Micromachined Ultrasonic Transducer). The CMUT is a transducer that includes a cell including a pair of electrodes and obtains an electric signal based on a change in capacitance between the pair of electrodes. According to the CMUT, it is possible to transmit and receive an acoustic wave such as an ultrasonic wave using the vibration of the vibrating membrane, and it is possible to easily obtain an excellent wide band characteristic especially in a liquid. Practically, as shown in the plan view of FIG. 3, in one CMUT device, a plurality of vibrating membranes (also referred to as cells) 31 arranged in a two-dimensional array form one element 32. The desired performance is realized by arranging 32 on the substrate to form the element unit 30. In order to control each element 32 independently, a wiring portion is formed corresponding to each element. The sectional structure of FIG. 4 showing the manufacturing process of the CMUT shows a section taken along the line AB in FIG. For the sake of simplicity, in FIG. 4, only one cell (one vibrating membrane) of the CMUT and a pair of through wirings are shown.

In the CMUT of the present embodiment, as shown in FIG. 4(K), the element portion 30 is formed on the first surface 1a side (first main surface side) of the through wiring substrate 3, and the wiring portion (11, 12) is formed. And 24) are formed on the second surface 1b side (second main surface side) of the through wiring substrate 3. The through wiring 2 (including 2-1 and 2-2) has the element portion 30 on the first surface 1a side of the through wiring substrate 3 and the wiring portions 11 and 12 on the second surface 1b side of the through wiring substrate 3. Each is electrically connected. The element section 30 includes a first electrode 4, a second electrode 6 provided with a gap 5 between the first electrode 4 and an insulating film (7, 7) provided above and below the second electrode 6. 8 and 19) and a vibrating membrane 9 capable of vibrating. The first electrode 4 is connected to the wiring 11 via the through wiring 2-1. Then, the second electrode 6 is connected to the wiring 12 via the through wiring 2-2.

Hereinafter, the manufacturing process of the CMUT will be described. First, as shown in FIG. 4A, the through wiring substrate 3 is prepared. The through wiring substrate 3 is manufactured by the method described in the first embodiment. For example, the first substrate 1 is a double-sided mirror-polished Si substrate, has a surface roughness Ra<2 nm, a resistivity of about 0.01 Ω·cm, and a thickness of 250 μm. The through hole 13 (see FIG. 2(A)) has a substantially columnar shape, and the diameter of the opening on the first surface 1a and the second surface 1b of the first substrate 1 is about 20 μm. An insulating film 14 is formed on the surface of the first substrate 1 including the first surface 1a, the second surface 1b of the first substrate 1 and the inner wall 13a of the through hole 13. The insulating film 14 is a thermal oxide of Si having a thickness of about 1 μm. Inside the through hole 13, a conductor containing Cu as a main material is filled by electrolytic plating (electroplating), and a through wiring 2 (including 2-1 and 2-2) is formed. The end faces (including 2-1a, 2-1b and 2-2a, 2-2b) of the through wiring 2 are flattened by CMP. Two through wirings 2 are formed for one element 32 (see FIG. 3).

Next, as shown in FIG. 4B, the first electrode 4 is formed on the first surface 1a side of the through wiring substrate 3. The first electrode 4 is one of the electrodes for driving the vibrating film 9 (see FIG. 4K). Since the first electrode 4 is formed on the insulating film 14, it is insulated from the first substrate 1. The first electrode 4 is located below the vibrating portion (the portion corresponding to the gap 5 in FIG. 4K) of the vibrating membrane 9 of the cell, and extends from the vibrating portion of the vibrating membrane 9 to the periphery. The first electrode 4 is formed to be conductive with respect to each cell in the same element. The first electrode 4 is formed by laminating a Ti (titanium) film having a thickness of about 10 nm and a W (tungsten) film having a thickness of about 50 nm by using metal film formation, photolithography, or the like.

Next, as shown in FIG. 4C, the insulating film 16 is formed. The insulating film 16 covers the surface of the first electrode 4, and its role is to function as an insulating protective film for the first electrode 4. The insulating film 16 is a 200-nm-thick Si oxide film and is formed by a CVD method at a substrate temperature of about 300° C. After forming the Si oxide film, openings 16a, 16b and 16c are formed in the insulating film 16. The openings 16a, 16b, 16c are formed by a dry etching method including etching mask formation including photolithography and reactive ion etching. Next, as shown in FIG. 4D, the sacrificial layer 17 is formed. The sacrificial layer 17 is for forming the cell gap 5, and is made of Cr (chrome). First, a 200 nm-thick Cr film is formed on the first surface 1a of the first substrate 1 by the electron beam evaporation method. Then, the Cr film is processed into a desired shape by a method including photolithography and wet etching. The sacrificial layer 17 has a columnar structure having a diameter of about 30 μm and a height of about 200 nm, and has a structure connected to an etching hole 18 (see FIG. 4H) in a later step. Next, as shown in FIG. 4E, the insulating film 7 is formed. The insulating film 7 is in contact with the lower surface of the second electrode 6, and its role is to function as an insulating protective film for the second electrode 6. The insulating film 7 is Si nitride having a thickness of 400 nm, and is formed by a PE-CVD (Plasma Enhanced Chemical Vapor Deposition) method at a substrate temperature of about 300° C. At the time of film formation, the flow rate of the film forming gas is controlled so that the Si nitride film to be the insulating film 7 has a tensile stress of about 0.1 GPa. Next, as shown in FIG. 4F, the second electrode 6 is formed. The second electrode 6 is formed on the vibrating film 9 (see FIG. 4K) so as to face the first electrode 4, and is one of the electrodes for driving the vibrating film 9. The second electrode 6 is formed by laminating a 10 nm Ti (titanium) film and a 100 nm AlNd (aluminum neodymium) alloy film in this order. The second electrode 6 is formed by a method including metal sputter deposition, formation of an etching mask including photolithography, and metal etching. The film forming conditions of the second electrode 6 are adjusted so as to have a tensile stress of 0.4 GPa or less at the time when the production of the capacitance type transducer is completed. The second electrode 6 is formed to be conductive with respect to each cell in the same element. Next, as shown in FIG. 4G, the insulating film 8 is formed. The insulating film 8 covers the upper surface of the second electrode 6, and its role is to function as an insulating protective film for the second electrode 6. The insulating film 8 has the same structure as the insulating film 7, and is formed by the same method as the insulating film 7.

Next, as shown in FIG. 4H, the etching hole 18 is formed and the sacrifice layer 17 is removed. The etching hole 18 is formed by a method including photolithography and reactive ion etching. Then, by introducing an etching solution through the etching hole 18, the sacrifice layer 17 made of Cr (see FIG. 4G) is removed by the etching solution. As a result, the gap 5 having the same shape as the sacrificial layer 17 is formed. Next, as shown in FIG. 4I, the thin film 19 is formed. The thin film 19 seals the etching hole 18 and, together with the insulating film 7, the second electrode 6, and the insulating film 8, forms a vibrating film 9 that can vibrate above the gap 5. The thin film 19 is Si nitride having a thickness of 800 nm, and is formed by the PE-CVD method at a substrate temperature of about 300° C., like the insulating film 7. The vibrating membrane 9 thus formed has a tensile stress of about 0.7 GPa as a whole, has no sticking or buckling, and has a structure that is difficult to break. Next, as shown in FIG. 4(J), contact holes 20, 21 (including 21a and 21b) and 22 (including 22a and 22b) for electrical connection are formed. The contact hole 20 is an opening that is formed on the second surface 1b side of the first substrate 1 forming the through wiring substrate 3 and partially exposes the surface 1b of the first substrate 1. The contact holes 21 and 22 are formed on the first surface 1a side of the first substrate 1. The contact hole 21a is an opening that partially exposes the end surface 2-2a of the through wiring 2-2, and the contact hole 21b is an opening that partially exposes the surface of the second electrode 6. The contact hole 22a is an opening that partially exposes the surface of the first electrode 4, and the contact hole 22b is an opening that partially exposes the end surface 2-1a of the through wiring 2-1. As a method for forming the contact hole 20, a method including forming an etching mask including photolithography and etching Si oxide with buffered hydrofluoric acid (BHF) is used. As a method of forming the contact holes 21 and 22, a method including formation of an etching mask including photolithography and reactive ion etching of Si nitride is used. The shape of the contact holes 20, 21, 22 is, for example, a cylindrical shape having a diameter of about 10 μm. Next, as shown in FIG. 4K, connection wirings 10, 23 and electrode pads 11, 12, 24 are formed. The connection wirings 10 and 23 are formed on the first surface 1a side of the first substrate 1 and are formed by stacking a Ti film having a thickness of 10 nm and an Al film having a thickness of 500 nm in this order. The connection wiring 10 connects the second electrode 6 and the end surface 2-2a of the penetrating wiring 2-2 through the contact hole 21 (including 21a and 21b. See FIG. 4(J)). The connection wiring 23 connects the first electrode 4 and the end surface 2-1a of the through wiring 2-1 through the contact hole 22 (including 22a and 22b. See FIG. 4(J)). The electrode pads 11, 12, 24 are formed on the second surface 1b side of the first substrate 1 and are made of an Al film having a thickness of about 500 nm. The electrode pad 11 is formed so as to be connected to the end surface 2-1b of the through wiring 2-1. The electrode pad 12 is formed so as to be connected to the end surface 2-2b of the through wiring 2-2. As a result, the first electrode 4 on the first surface 1a side of the first substrate 1 is drawn out to the opposing second surface 1b side of the first substrate 1 via the through wiring 2-1. ing. Similarly, the second electrode 6 on the first surface 1a side of the first substrate 1 is drawn out to the opposing second surface 1b side of the first substrate 1 via the through wiring 2-2. ing. The electrode pad 24 is formed so as to be connected to the first substrate 1. In the above manufacturing process, in order to improve the adhesion between the insulating films 7, 8 and 19, the plasma treatment may be performed on the surface of the lower layer film before forming the upper layer film. This plasma treatment cleans or activates the surface of the lower layer film. Next, the CMUT is connected to another board such as a control circuit board (not shown). The connection is made via the electrode pads 11, 12, 24. As a method of connection, pressure bonding of an anisotropic conductive film (ACF: Anisotropic Conductive Film) is used. In the CMUT manufactured by the manufacturing method described above, at least one of the first electrode 4 and the second electrode 6 (see FIG. 4) is electrically connected within one element 32 (see FIG. 3). Has been done. At the time of driving, a bias voltage is applied to the first electrode 4, and the second electrode 6 is used as a signal application or signal extraction electrode. The signal noise can be reduced by grounding the first substrate 1 via the electrode pad 24.

In the present embodiment, by using the through wiring board 3, it is not necessary to provide wiring for connecting to an external control circuit on the element surface side of the CMUT, and the control circuit board is provided below the through wiring board 3 (second Since it can be arranged (on the main surface side), high density of the CMUT elements can be realized. Further, since the through wiring board obtained by the present invention has few defects and damages, the reliability of electrical connection of the CMUT element is enhanced. Therefore, the reliability of the CMUT is improved and at the same time, the manufacturing yield is improved.

(Example 3)
The CMUT described in the second embodiment can be applied to a subject information acquisition apparatus such as an ultrasonic diagnostic apparatus using an acoustic wave and an ultrasonic image forming apparatus. The acoustic wave from the subject is received by the CMUT, and the electrical signal output is used to examine the subject information that reflects the optical characteristic value of the subject such as the optical absorption coefficient or the subject information that reflects the difference in acoustic impedance. Can be obtained.

FIG. 5(A) shows an example of the object information acquiring apparatus using the photoacoustic effect. The pulsed light emitted from the light source 2010 is applied to the subject 2014 via an optical member 2012 such as a lens, a mirror, or an optical fiber. The light absorber 2016 inside the subject 2014 absorbs the energy of the pulsed light and generates a photoacoustic wave 2018 that is an acoustic wave. A device 2020 including an electromechanical transducer (CMUT) manufactured by using the present invention in a probe (probe) 2022 receives a photoacoustic wave 2018, converts the photoacoustic wave 2018 into an electric signal, and outputs the electric signal to a signal processing unit 2024. To do. The signal processing unit 2024 performs signal processing such as A/D conversion and amplification on the input electric signal and outputs the electric signal to the data processing unit 2026. The data processing unit 2026 acquires the object information (characteristic information reflecting the optical characteristic value of the object such as the light absorption coefficient) as image data using the input signal. Here, the signal processing unit 2024 and the data processing unit 2026 are collectively referred to as a processing unit. The display unit 2028 displays an image based on the image data input from the data processing unit 2026. As described above, the object information acquiring apparatus of this example includes the device according to the present invention, the light source, and the processing unit. Then, the device receives a photoacoustic wave generated by irradiating the subject with light emitted from the light source and converts the photoacoustic wave into an electrical signal, and the processing unit acquires the information of the subject using the electrical signal. ..

FIG. 5B shows an object information acquiring apparatus such as an ultrasonic echo diagnostic apparatus that utilizes reflection of acoustic waves. The acoustic wave transmitted from the device 2120 including the electromechanical transducer (CMUT) of the present invention in the probe (probe) 2122 to the subject 2114 is reflected by the reflector 2116. The device 2120 receives the reflected acoustic wave (reflected wave) 2118, converts the acoustic wave 2118 into an electric signal, and outputs the electric signal to the signal processing unit 2124. The signal processing unit 2124 performs signal processing such as A/D conversion and amplification on the input electric signal and outputs the electric signal to the data processing unit 2126. The data processing unit 2126 acquires subject information (characteristic information reflecting a difference in acoustic impedance) as image data using the input signal. Here again, the signal processing unit 2124 and the data processing unit 2126 are collectively called a processing unit. The display unit 2128 displays an image based on the image data input from the data processing unit 2126. As described above, the object information acquiring apparatus of this example includes the device manufactured by using the present invention and the processing unit that acquires the information of the object by using the electric signal output by the device. Then, the device receives an acoustic wave from the subject and outputs an electric signal.

Note that the probe may be one that mechanically scans, or one that is moved by a user such as a doctor or a technician with respect to the subject (handheld type). In the case of the device using reflected waves shown in FIG. 5B, a probe that transmits an acoustic wave may be provided separately from a probe that receives the acoustic wave. Further, the device having both the functions of the device of FIG. 5A and FIG. 5B is provided, and the object information reflecting the optical characteristic value of the object and the object information reflecting the difference of the acoustic impedance are provided. , May be acquired. In this case, the device 2020 in FIG. 5A may perform not only the reception of photoacoustic waves but also the transmission of acoustic waves and the reception of reflected waves.

The CMUT as described above can also be used in a measuring device or the like for measuring the magnitude of external force. In such devices, the electrical signal from the CMUT subjected to the external force is used to measure the magnitude of the external force applied to the surface of the CMUT.

1 1st board 1s penetration board 2 conductor (penetration wiring)
3 Through Wiring Substrate 13 Through Hole 50 Second Substrate 50s Seed Substrate 51 Intermediate Layer 52 Seed Film

Claims (16)

A step of preparing a laminated body formed by bringing a first substrate having a through hole and a second substrate having a seed film and an intermediate layer into contact with each other; Filling the inside with a conductor, and separating the conductor filled in the through-hole from the second substrate at the interface between the intermediate layer and the second substrate after the plating treatment, have a,
The method for manufacturing a through wiring substrate, wherein the intermediate layer contains any of gold, silver and platinum . The method for manufacturing a through wiring substrate according to claim 1, wherein the stacked body is formed by contacting the first substrate and the seed film. The method of manufacturing a through wiring substrate according to claim 1, wherein the intermediate layer has lower adhesiveness with the second substrate than adhesiveness with the seed film. The intermediate layer, the manufacturing method of the interposer substrate according to any one of claims 1 to 3, characterized in that the thickness is in the range of 1nm to 100 nm. The method of manufacturing a through wiring substrate according to claim 4 , wherein the intermediate layer has a thickness within a range of 5 nm to 50 nm. The method for manufacturing a through wiring substrate according to claim 5 , wherein the intermediate layer has a thickness within a range of 10 nm to 20 nm. The method of manufacturing a through wiring substrate according to claim 1, wherein the second substrate is configured by using any one of an insulating substrate, a semiconductor substrate, and a metal substrate. The method for forming a through wiring substrate according to claim 7 , wherein the second substrate has conductivity. The method for manufacturing a through wiring substrate according to claim 8 , wherein the substrate having conductivity includes any one of stainless steel, nickel, aluminum, and copper. The method of manufacturing a through wiring substrate according to claim 1 , wherein the seed film is made of the same material as the conductor. The method of manufacturing a through wiring substrate according to claim 1 , wherein the seed film has a thickness within a range of 10 nm to 200 nm. The conductor producing method of the through-wiring board according to claim 1 or 10, characterized in that it contains copper. A method of manufacturing a device in which an element section is provided on a through wiring board, and the element section and the through wiring board are electrically connected, which is obtained by the method of manufacturing the through wiring board according to claim 1. Forming the element portion on the first main surface side of the through wiring board, and connecting the conductor to the second main surface side of the through wiring board located on the opposite side of the first main surface. And a step of forming a wiring part for forming the device. 14. The method for manufacturing a device according to claim 13 , wherein the device is a transducer that has a cell having a pair of electrodes and obtains an electric signal based on a change in capacitance between the pair of electrodes. The device manufacturing method according to claim 13 , wherein another substrate is arranged on the second main surface side of the through wiring substrate. The device manufacturing method according to claim 15 , wherein the another substrate is a circuit substrate.

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