JP6704699B2 - Semiconductor light emitting device and manufacturing method thereof - Google Patents

Description

Embodiments of the present invention relate to a semiconductor light emitting device and a method for manufacturing the same.

In a semiconductor light emitting device, improvement in luminous efficiency is required.

Japanese Patent Publication No. 2009-542560

Embodiments of the present invention provide a semiconductor light emitting device capable of improving light emission efficiency and a method for manufacturing the same.

According to an embodiment of the present invention, a semiconductor light emitting device includes a first electrode, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, and a first low impurity concentration layer. , including the. The first electrode includes a first portion extending in the first direction and is made of metal. The first semiconductor layer is provided around the first portion, overlaps with the first portion in a second direction perpendicular to the first direction, and has the first conductivity type. The second semiconductor layer is provided between the first portion and the first semiconductor layer and has a second conductivity type. The third semiconductor layer is provided between the first semiconductor layer and the second semiconductor layer. The first electrode further includes a second portion provided between the first conductive layer and the first portion. The first conductive layer is electrically connected to the second portion. The first low impurity concentration layer is provided between the second semiconductor layer and the first conductive layer. The impurity concentration in the first low impurity concentration layer is lower than the impurity concentration in the second semiconductor layer.

1A to 1C are schematic views illustrating the semiconductor light emitting device according to the first embodiment. 2A and 2B are schematic cross-sectional views of the semiconductor light emitting device. 3A to 3E are schematic cross-sectional views illustrating the method for manufacturing the semiconductor light emitting device according to the first embodiment. 4A to 4D are schematic cross-sectional views illustrating the method for manufacturing the semiconductor light emitting device according to the first embodiment. It is a typical sectional view which illustrates the semiconductor light emitting element concerning a 2nd embodiment. FIG. 9 is a schematic cross-sectional view illustrating a semiconductor light emitting device according to a third embodiment. It is a flowchart figure which illustrates the manufacturing method of the semiconductor light-emitting device which concerns on 4th Embodiment. It is a flowchart figure which illustrates the manufacturing method of the semiconductor light-emitting device which concerns on 5th Embodiment. 9A to 9D are schematic cross-sectional views illustrating the method for manufacturing the semiconductor light emitting device according to the fifth embodiment.

Each embodiment of the present invention will be described below with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each portion, the size ratio between the portions, and the like are not always the same as the actual ones. Even when the same portion is shown, the dimensions and ratios may be different depending on the drawings. In the specification and the drawings of the application, components similar to those described in regard to a drawing thereinabove are marked with like reference numerals, and a detailed description is omitted as appropriate.

(First embodiment)
1A to 1C are schematic views illustrating the semiconductor light emitting device according to the first embodiment.
FIG. 1A is a schematic sectional view. The first (b) is a schematic perspective view illustrating a part of the semiconductor light emitting device. The first (c) is another schematic perspective view illustrating a part of the semiconductor light emitting device.

As shown in FIG. 1A, the semiconductor light emitting device 110 according to the embodiment includes a first electrode 11, a first semiconductor layer 31, a second semiconductor layer 32, and a third semiconductor layer 33.

The first electrode 11 includes a first portion p1. The first portion p1 extends in the first direction. The first electrode 11 contains a metal.

The first direction is the Z-axis direction. One direction perpendicular to the Z-axis direction is the X-axis direction. The direction perpendicular to the Z-axis direction and the X-axis direction is the Y-axis direction.

The first semiconductor layer 31 is provided around the first portion p1. The first semiconductor layer 31 overlaps the first portion p1 in the second direction (eg, the X-axis direction) perpendicular to the first direction. For example, the first semiconductor layer 31 is provided around the first portion p1 with the first portion p1 extending in the first direction as an axis. The first semiconductor layer 31 is located around the first portion p1 when cut along a plane perpendicular to the first direction. The first semiconductor layer 31 has the first conductivity type.

The second semiconductor layer 32 is provided between the first portion p1 and the first semiconductor layer 31. The second semiconductor layer 32 has the second conductivity type.

The first conductivity type is, for example, p-type, and the second conductivity type is, for example, n-type. The first conductivity type may be n-type and the second conductivity type may be p-type. In the following example, the first conductivity type is p-type and the second conductivity type is n-type.

The third semiconductor layer 33 is provided between the first semiconductor layer 31 and the second semiconductor layer 32. The third semiconductor layer 33 is, for example, an active layer. The third semiconductor layer 33 is, for example, a light emitting layer.

The first electrode 11 further includes a second portion p2 and a third portion p3 in addition to the first portion p1. The second portion p2 is one end of the first electrode 11 in the first direction. The third portion p3 is provided between the first portion p1 and the second portion p2.

In the semiconductor light emitting device 110, one light emitting portion is formed by the semiconductor layer provided around the first electrode 11 (first portion p1). In this example, the semiconductor light emitting device 110 includes a plurality of light emitting portions.

That is, the semiconductor light emitting device 110 further includes the second electrode 12, the fourth semiconductor layer 34, the fifth semiconductor layer 35, and the sixth semiconductor layer 36.

The second electrode 12 includes a fourth portion p4. The fourth portion p4 extends in the first direction (Z-axis direction). The fourth portion p4 is aligned with the first portion p1 in the second direction (for example, the X-axis direction). The second electrode 12 contains a metal.

The fourth semiconductor layer 34 is provided around the fourth portion p4. The fourth semiconductor layer 34 overlaps the fourth portion p4 in the second direction (for example, the X-axis direction). The fourth semiconductor layer 34 has the first conductivity type (for example, p type).

The fifth semiconductor layer 35 is provided between the fourth portion p4 and the fourth semiconductor layer 34. The fifth semiconductor layer 35 is of the second conductivity type (for example, n type).

The sixth semiconductor layer 36 is provided between the fourth semiconductor layer 34 and the fifth semiconductor layer 35.

Part of first semiconductor layer 31, part of second semiconductor layer 32, part of third semiconductor layer 33, part of fourth semiconductor layer 34, part of fifth semiconductor layer 35, and sixth semiconductor layer A part of 36 is located between the first portion p1 and the fourth portion p4.

The second electrode 12 further includes a fifth portion p5 and a sixth portion p6 in addition to the fourth portion p4. The fifth portion p5 is one end of the second electrode 12 in the first direction. The sixth portion p6 is provided between the fourth portion p4 and the fifth portion p5.

In the semiconductor light emitting device 110, another one light emitting portion is formed by the semiconductor layer provided around the second electrode 12 (fourth portion p4). As described above, in the semiconductor light emitting device 110, the semiconductor layer is provided around each of the plurality of electrodes (the first electrode 11, the second electrode 12, etc.) arranged in the XY plane. A light emitting portion is formed by this semiconductor layer. In the semiconductor light emitting device 110, the density of the light emitting portion provided in the plane (in the XY plane) can be increased. According to the embodiment, it is possible to provide a semiconductor light emitting device capable of improving light emission efficiency.

In the embodiment, the first portion p1 of the first electrode 11 is in ohmic contact with the second semiconductor layer 32. The fifth portion p5 of the second electrode 12 makes ohmic contact with the fifth semiconductor layer 35. A portion that makes ohmic contact is provided in each of the plurality of light emitting portions. As a result, the uniformity of light emission in the plane (in the XY plane) can be improved. For example, the uniformity of light emission can be improved in one light emitting portion. The semiconductor light emitting device 110 can provide a highly uniform semiconductor light emitting device with high uniformity.

In the semiconductor light emitting device 110, the first conductive layer 21 is further provided. The first conductive layer 21 is electrically connected to the second portion p2 of the first electrode 12. That is, the first electrode 12 includes the second portion p2 provided between the first conductive layer 21 and the first portion p1. The second portion p2 is electrically connected to the first conductive layer 21.

The first conductive layer 21 is electrically connected to the fifth portion p5 of the second electrode 12. That is, the fifth portion p5 of the second electrode 12 is provided between the first conductive layer 21 and the fourth portion p4. The fifth portion p5 is aligned with the second portion p2 in the second direction (for example, the X-axis direction). The fifth portion p5 is electrically connected to the first conductive layer 21.

The first conductive layer 21 includes, for example, a metal. The first conductive layer 21 includes a metal film containing a metal element. The first conductive layer 21 may include an alloy film containing an alloy.

In this example, a first conductivity type first semiconductor region 31r, a second conductivity type second semiconductor region 32r, and a third semiconductor region 33r are further provided. The second semiconductor region 32r is arranged between the first semiconductor region 31r and the first conductive layer 21. The third semiconductor region 33r is arranged between the first semiconductor region 31r and the second semiconductor region 32r. The first semiconductor region 31r is continuous with the first semiconductor layer 31, for example. The second semiconductor region 32r is continuous with the second semiconductor layer 32. The third semiconductor region 33r is continuous with the third semiconductor layer 33. The third semiconductor region 33r is, for example, an active layer (for example, a light emitting layer).

In this example, a fourth semiconductor region 34r of the first conductivity type, a fifth semiconductor region 35r of the second conductivity type, and a sixth semiconductor region 36r are further provided. The fifth semiconductor region 35r is arranged between the fourth semiconductor region 34r and the first conductive layer 21. The sixth conductor region 36r is arranged between the fourth semiconductor region 34r and the fifth semiconductor region 35r. The fourth semiconductor region 34r is continuous with the fourth semiconductor layer 34, for example. The fifth semiconductor region 35r is continuous with the fifth semiconductor layer 35. The sixth semiconductor region 36r is continuous with the sixth semiconductor layer 36. The sixth semiconductor region 36r is, for example, an active layer (for example, a light emitting layer).

As such, a semiconductor layer is provided around each side surface of a plurality of electrodes (eg, the first electrode 11 and the second electrode 12), and a semiconductor region is provided on top of each of the plurality of electrodes. .. By providing these semiconductor regions, the light emitting area is expanded. Thereby, higher luminous efficiency can be obtained.

In this example, the first pad 51, the second pad 52, the second conductive layer 22, and the connecting portion 52v are provided. Further, a conductive base 51s, a first connection conductive layer 51a and a second connection conductive layer 52b are provided.

The first pad 51 is electrically connected to the first conductive layer 21. The first conductive layer 21 (a part thereof) is arranged between the first pad 51 and the first electrode 11. The first conductive layer 21 (a part thereof) is arranged between the first pad 51 and the second electrode 12.

For example, the conductive base 51s is provided on the first pad 51. The conductive base 51s includes, for example, a conductive substrate (for example, a silicon substrate).

The first connection conductive layer 51a is provided on the conductive base 51s. The first conductive layer 21 is provided on the first connection conductive layer 51a. The first connection conductive layer 51a is, for example, a bonding layer. The first connection conductive layer 51a may include, for example, solder or the like.

A plurality of electrodes (for example, the first electrode 11 and the second electrode 12) are provided on the first conductive layer 21. A plurality of semiconductor layers and a plurality of semiconductor regions are provided so as to cover each of the plurality of electrodes. The second conductive layer 22 is provided so as to cover the plurality of semiconductor layers and the plurality of semiconductor regions.

The second conductive layer 22 is electrically connected to the first semiconductor layer 31. The second conductive layer 22 is further electrically connected to the fourth semiconductor layer 34. The first semiconductor layer 31 is located between the second conductive layer 22 and the first portion p1. The fourth semiconductor layer 34 is located between the second conductive layer 22 and the fourth portion p4. The first semiconductor region 31r is located between the second conductive layer 22 and the first conductive layer 21. The fourth semiconductor region 34r is located between the second conductive layer 22 and the first conductive layer 21.

The second conductive layer 22 is, for example, light transmissive. The second conductive layer 22 includes, for example, a metal oxide (for example, indium tin oxide or the like).

The second conductive layer 22 is electrically connected to the second pad 52. The connection portion 52v electrically connects the second pad 52 to the second conductive layer 22. The connecting portion 52v extends along the first direction (Z-axis direction). At least a part of the connecting portion 52v is arranged with the first portion p1 in a direction intersecting the first direction, for example. At least a portion of the connecting portion 52v is arranged with the second portion p2, for example, in the direction intersecting the first direction.

The second connection conductive layer 52b is provided between the connection portion 52v and the second conductive layer 22. The second pad 52 is electrically connected to the first semiconductor layer 31 and the fourth semiconductor layer 34 via the connection portion 52v, the second connection conductive layer 52b, and the second conductive layer 22.

A voltage is applied between the first pad 51 and the second pad. As a result, a current is supplied to the semiconductor layer and the semiconductor region. For example, light is emitted from the third semiconductor layer 33 and the sixth semiconductor layer 36. For example, light is emitted from the third semiconductor region 33r and the sixth semiconductor region 36r.

In this example, the first insulating layer 81 and the second insulating layer 82 are provided. The first insulating layer 81 is provided between the first conductive layer 21 and the first semiconductor layer 31. The first insulating layer 81 is provided between the first conductive layer 21 and the third semiconductor layer 33. The first insulating layer 81 is provided between the first conductive layer 21 and the fourth semiconductor layer 34. The first insulating layer 81 is provided between the first conductive layer 21 and the sixth semiconductor layer 36. By providing the first insulating layer 81, a short circuit between the first conductive layer 21 and these semiconductor layers is suppressed.

The first insulating layer 81 is provided, for example, around the third portion p3 of the first electrode 11. The first insulating layer 81 overlaps the third portion p3 in the second direction, for example. The first insulating layer 81 is provided, for example, around the sixth portion p6 of the second electrode 12. The first insulating layer 81 overlaps the sixth portion p6 in the second direction, for example.

Between the second insulating layer 82 and the first conductive layer 21, the first electrode 11, the second electrode 12, the first to sixth semiconductor layers 31 to 36, the first to sixth semiconductor regions 31r to 36r, and The second conductive layer 22 is arranged. The second insulating layer 82 protects the light emitting portion.

At least one of the first insulating layer 81 and the second insulating layer 82 includes, for example, an oxide, a nitride, or an oxynitride. At least one of the first insulating layer 81 and the second insulating layer 82 may include, for example, silicon oxide.

In this example, the first low impurity concentration layer 41 and the second low impurity concentration layer 42 are further provided.

The first low impurity concentration layer 41 is provided between the second semiconductor layer 32 and the first conductive layer 21. The impurity concentration in the first low impurity concentration layer 41 is lower than the impurity concentration in the second semiconductor layer 32 (for example, n-type impurity concentration).

The second low impurity concentration layer 42 is provided between the fifth semiconductor layer 35 and the first conductive layer 21. The impurity concentration in the second low impurity concentration layer 42 is lower than the impurity concentration in the fifth semiconductor layer 35 (for example, n-type impurity concentration).

The first low impurity concentration layer 41 is provided around a part of the first electrode 11 (for example, the second part p2). The first low impurity concentration layer 41 overlaps with a part (for example, the second part p2) of the first electrode 11 in the second direction. For example, the first low impurity concentration layer 41 does not overlap the first semiconductor layer 31 in the second direction (for example, the Z axis direction).

The second low impurity concentration layer 42 is provided around a part of the first electrode 12 (for example, the fifth part p5). The second low impurity concentration layer 42 overlaps with a part (for example, the fifth part p5) of the first electrode 12 in the second direction. The second low impurity concentration layer 42 does not overlap the fourth semiconductor layer 34 in the second direction.

The first low impurity concentration layer 41 and the second low impurity concentration layer 42 are buffer layers used when forming a semiconductor layer. By providing these low impurity concentration layers, high crystallinity can be obtained in the semiconductor layer. Thereby, higher luminous efficiency can be obtained.

As illustrated in FIG. 1B, in the embodiment, the first electrode 11 has a columnar shape extending in the first direction (Z-axis direction). In the embodiment, as illustrated in FIG. 1C, the first electrode 11 may have a strip shape.

That is, the length L1 of the first electrode 11 in the first direction (Z-axis direction) is longer than the length L2 of the first electrode 11 in the second direction (for example, the X-axis direction). Further, in the example of FIG. 1C, the length L3 of the first electrode 11 in the third direction (Y-axis direction) is smaller than the length L2 of the first electrode 11 in the second direction (for example, the X-axis direction). Is also long. The third direction intersects (for example, is perpendicular to) the first direction and is perpendicular to the second direction.

The length L1 is, for example, 1 μm or more and 20 μm or less. The length L2 is, for example, 0.5 μm or more and 5 μm or less. The length L3 is, for example, 0.5 μm or more and 500 μm or less. The ratio (L1/L2) of the length L1 to the length L2 is, for example, 2 or more and 40 or less. The ratio (L3/L2) of the length L3 to the length L2 is, for example, 1 or more and 500 or less.

In the embodiment, the first to sixth semiconductor layers 31 to 36 and the first to sixth semiconductor regions 31r to 36r include, for example, a nitride semiconductor. These semiconductor layers and semiconductor regions include, for example, GaN. The third semiconductor layer 33, the third semiconductor region 33r, the sixth semiconductor layer 36, and the sixth semiconductor region 36r include, for example, InGaN (eg, well layer). In the embodiment, the material of the semiconductor is arbitrary. For example, Si, Ge, Sn, or the like is used as the n-type impurity. For example, Mg and Zn are used as the p-type impurities.

At least one of the first low impurity concentration layer 41 and the second low impurity concentration layer 42 includes, for example, AlN, AlGaN, GaN, or the like.

At least one of the first electrode 11 and the second electrode 12 contains, for example, Al. If Al is used, good contact properties are obtained, for example. At least one of the first electrode 11 and the second electrode 12 contains, for example, W (tungsten). This W may be formed by CVD, for example. In this case, good embeddability can be obtained.

The first conductive layer 21 contains Al, for example. The first conductive layer 21 includes W, for example. This W may be formed by CVD, for example.

As a reference example, there is an example in which the metal first electrode 11 is not provided. In this reference example, for example, an insulator or a semiconductor is provided at the position of the first electrode 11. For example, a buffer layer when forming a semiconductor layer serves as this insulator. In this case, an electrode is required for electrical connection with the second semiconductor layer 32, which complicates the structure. On the other hand, in the reference example in which the semiconductor is provided at the position of the first electrode 11, this semiconductor is, for example, the second semiconductor layer 32. In this case, since the conductivity of the semiconductor layer is lower than the conductivity of the metal, the current density in the plane (the XY plane) is likely to be uneven. Therefore, the light emission distribution is likely to be non-uniform.

In the semiconductor light emitting device 110 according to the embodiment, since the metal first electrode 11 is provided, the structure is simple. Further, since the conductivity of the first electrode 11 is low, it is easy to obtain uniform light emission.

In the semiconductor light emitting device 110 according to the embodiment, high heat dissipation is obtained. Thereby, high luminous efficiency can be obtained. High luminous efficiency can be obtained even at a large current.

2A and 2B are schematic cross-sectional views of the semiconductor light emitting device.
FIG. 2A corresponds to the semiconductor light emitting device 110 according to the embodiment. The second (b) corresponds to the semiconductor light emitting device 119 of the reference example. In these drawings, the portion of the first electrode 11 is illustrated. The portion of the second electrode 12 is similar to the portion of the first electrode 11.

As shown in FIG. 2A, there is a contact region 11c between the first electrode 11 and the second semiconductor 32. In the semiconductor light emitting device 110, the contact region 11c extends along the first electrode 11. The area of the contact region 11c is wide according to the length of the first electrode 11.

As shown in FIG. 2B, the first electrode 11 is not provided in the semiconductor light emitting device 119 of the reference example. In this case, the contact region 11c is formed between the first conductive layer 21 and the second semiconductor layer 32. In the reference example, the contact region 11c is narrow.

As described above, in the embodiment, the area of the contact region 11c can be increased. In the embodiment, by increasing the height (length L1) of the first electrode 11, the area of the contact region 11c can be increased.

Hereinafter, an example of a method for manufacturing the semiconductor light emitting device 110 will be described.
3A to 3E and FIGS. 4A to 4D are schematic cross-sectional views illustrating the method for manufacturing the semiconductor light emitting device according to the first embodiment.
As shown in FIG. 3A, the first insulating layer 81 is formed on a part of the substrate 71. The substrate 71 is, for example, a silicon substrate. The first insulating layer 81 is, for example, a silicon oxide film. The substrate 71 has a portion which is not covered with the first insulating layer 81.

As shown in FIG. 3B, a semiconductor layer is formed on the portion of the substrate 71 which is not covered with the first insulating layer 81. For example, the buffer layer (the first low impurity concentration layer 41 and the second low impurity concentration layer 42) is grown. The first insulating layer 81 functions as a mask layer. Substantially no buffer layer is formed on the mask layer. A base semiconductor layer (first base semiconductor layer 32a and second base semiconductor layer 35a) is grown on the buffer layer. The first base semiconductor layer 32a becomes the second semiconductor layer 32 and the second semiconductor region 32r. The second base semiconductor layer 35a becomes the fifth semiconductor layer 35 and the fifth semiconductor region 35r. A semiconductor layer is further grown on these base semiconductor layers. That is, the third semiconductor layer 33 and the third semiconductor region 33r are formed on the first base semiconductor layer 32a. The first semiconductor layer 31 and the first semiconductor region 31r are formed on the third semiconductor layer 33 and the third semiconductor region 33r. On the other hand, the sixth semiconductor layer 36 and the sixth semiconductor region 36r are formed on the second base semiconductor layer 35a. The fourth semiconductor layer 34 and the fourth semiconductor region 34r are formed on the sixth semiconductor layer 36 and the sixth semiconductor region 36r.

As shown in FIG. 3C, the second conductive layer 22 is formed on these semiconductor layers and semiconductor regions. Further, the second connection conductive layer 52b is formed on a part of the second conductive layer 22. The second connection conductive layer 52b becomes, for example, a prepad.

As shown in FIG. 3D, the second insulating layer 82 is formed on the second conductive layer 22 and the second connection conductive layer 52b. The second insulating layer 82 is formed of, for example, SOG. The base 88 is formed on the second insulating layer 82. For example, the second insulating layer 82 is connected to the base 88. The base 88 is, for example, a handling board.

As shown in FIG. 3E, the substrate 71 is removed. After this, holes are formed on the surface. That is, the first hole 32h is formed in the first low impurity concentration layer 41 and the first base semiconductor layer 32a. The first hole 32h extends in the first direction (Z-axis direction). A second hole 35h is formed in the second low impurity concentration layer 42 and the second base semiconductor layer 35a. The second hole 35h extends in the first direction (Z-axis direction).

As shown in FIG. 4A, the holes (the first holes 32h and the second holes 35h) are filled with metal, and a metal film is further formed on the first insulating layer 81. As a result, the first electrode 11, the second electrode 12, and the first conductive layer 21 are formed.

As shown in FIG. 4B, a first connection conductive layer 51a (bonding layer) is formed on the first conductive layer 21, and the conductive base 51s is bonded.

As shown in FIG. 4C, the base 88 is removed. After this, holes 82h are formed in the second insulating layer 82. The hole 82h is connected to the second connection conductive layer 52b.

As shown in FIG. 4D, a conductive material (for example, metal) is embedded in the hole 82h. Further, a conductive film (metal film) is formed on part of the second insulating layer 82. The connecting portion 52v is formed of a conductive material. The second pad 52 is formed of the metal film. On the other hand, the first pad 51 is formed on the surface of the conductive base 51s. As a result, the semiconductor light emitting device 110 is formed.

(Second embodiment)
FIG. 5 is a schematic cross-sectional view illustrating the semiconductor light emitting device according to the second embodiment.
As shown in FIG. 5, in the semiconductor light emitting device 120 according to this embodiment, the first insulating layer 81 includes a laminated film. The electrodes, the semiconductor layer, the semiconductor region, and the like are similar to those of the semiconductor light emitting device 110. Hereinafter, the first insulating layer 81 in the semiconductor light emitting device 120 will be described.

The first insulating layer 81 includes a plurality of first layers 81a and a plurality of second layers 81b which are alternately arranged in the first direction (Z-axis direction). One refractive index of the plurality of first layers 81a is different from one refractive index of the plurality of second layers 81b. For example, the respective refractive indexes of the plurality of first layers 81a are different from the respective refractive indexes of the plurality of second layers 81b. The first insulating layer 81 has a DBR (Distributed Bragg Reflector) structure. A high reflectance is obtained in the first insulating layer 81. Thereby, a higher luminous efficiency can be obtained.

As described with reference to FIGS. 3A and 3B, the first insulating layer 81 serves as a selective growth mask during crystal growth. Since the selective growth mask has the DBR structure, high light extraction efficiency can be obtained.

The light emitted from the light emitting portion is reflected by the first insulating layer 81 having the DBR structure. The reflected light goes out from the upper side (the side of the second insulating layer 82) to the outside. Light is extracted from the surface opposite to the first conductive layer 21.

In the example of the semiconductor light emitting device 120, the conductive base 51s is arranged between the first conductive layer 21 and the semiconductor layer. The first insulating layer 81 having the DBR structure is arranged between the conductive base 51s and the first semiconductor layer 31. Therefore, the light emitted from the light emitting portion does not enter the conductive base 51s. Therefore, even when light is absorbed by the conductive base 51s, high light extraction efficiency can be obtained. For example, even when a Si substrate (a substrate made of a material having a small band gap) is used as the conductive base 51s, high light extraction efficiency can be obtained. For example, a semiconductor layer (semiconductor crystal layer) may be grown on the conductive base 51s. For example, the conductive base 51s is the substrate 71. In this example, the manufacturing process can be simplified.

(Third Embodiment)
FIG. 6 is a schematic cross-sectional view illustrating a semiconductor light emitting device according to the third embodiment.
As shown in FIG. 6, in the semiconductor light emitting device 130 according to the present embodiment, the first low impurity region 32i and the second low impurity region 35i are provided. The electrodes, the semiconductor layer, the semiconductor region, and the like are similar to those of the semiconductor light emitting device 110. Hereinafter, the first low impurity region 32i and the second low impurity region 35i will be described.

The first low impurity region 32i is provided between the second semiconductor layer 32 and the first conductive layer 21. The first electrode 11 includes a third portion p3 provided between the first portion p1 and the second portion p2. The first low impurity region 32i is located between the third portion p3 and the first semiconductor layer 31. The third semiconductor layer 33 extends between the first low impurity region 32i and the first semiconductor layer 31. The impurity concentration in the first low impurity region 32i is lower than the impurity concentration in the second semiconductor layer 32.

The second low impurity region 35i is provided between the fifth semiconductor layer 35 and the first conductive layer 21. The second electrode 12 includes a sixth portion p6 provided between the fourth portion p4 and the fifth portion p5. The second low impurity region 35i is located between the sixth portion p6 and the fourth semiconductor layer 34. The sixth semiconductor layer 36 extends between the second low impurity region 35i and the fourth semiconductor layer 34. The impurity concentration in the second low impurity region 35i is lower than the impurity concentration in the fifth semiconductor layer 35.

For example, when the second semiconductor layer 32 and the fifth semiconductor layer 35 include n-type GaN, the first low impurity region 32i and the second low impurity region 35i include undoped GaN. By providing the low impurity region, high crystallinity can be obtained in the semiconductor layer. Thereby, high luminous efficiency can be obtained.

For example, the lower side of the semiconductor layer (nanocolumn core) is undoped GaN and the upper side is n-type GaN. For example, undoped GaN is grown under growth conditions that allow dislocations to escape to the outside of the column. Then, n-type GaN is grown. The first electrode 11 is brought into contact with n-type GaN. A current can be injected above the trench with good crystallinity. As a result, the luminous efficiency is improved.

(Fourth Embodiment)
This embodiment relates to a method for manufacturing a semiconductor light emitting device. In this manufacturing method, for example, the processes described with reference to FIGS. 3A to 3E and FIGS. 4A to 4D are performed.

FIG. 7 is a flow chart illustrating the method for manufacturing the semiconductor light emitting device according to the fourth embodiment.
As shown in FIG. 7, holes are formed in the structure (step S110). This structure includes a second conductivity type base semiconductor layer (first base semiconductor layer 32a), a first conductivity type first semiconductor layer 31, and a third semiconductor layer 33. The base semiconductor layer (first base semiconductor layer 32a) extends in the first direction (Z-axis direction). The first semiconductor layer 31 is provided around the base semiconductor layer (first base semiconductor layer 32a). The first semiconductor layer 31 overlaps with the base semiconductor layer in the second direction (eg, the X-axis direction) perpendicular to the first direction (Z-axis direction). The third semiconductor layer 3 is provided between the base semiconductor layer and the first semiconductor layer 31 (see FIG. 3B). A hole (first hole 32h) extending in the first direction is formed in the base semiconductor layer (first base semiconductor layer 32a) of such a structure (see FIG. 3E).

In this manufacturing method, a metal is embedded in the hole (first hole 32h) to form an electrode (first electrode 11) (step S120) (see FIG. 4A).
According to the present manufacturing method, it is possible to provide a method for manufacturing a semiconductor light emitting device capable of improving light emission efficiency.

(Fifth Embodiment)
FIG. 8 is a flow chart illustrating the method for manufacturing the semiconductor light emitting device according to the fifth embodiment.
9A to 9D are schematic cross-sectional views illustrating the method for manufacturing the semiconductor light emitting device according to the fifth embodiment.
As shown in FIG. 8, the second semiconductor layer 32 is formed (step S210).

For example, a substrate 71 is prepared as shown in FIG. The substrate 71 includes a hole 71h and a surface 71s around the hole 71h.

As shown in FIG. 9B, the second semiconductor layer 32 is formed on the surface 71 s of the substrate 71. In this example, the first insulating layer 81 is formed on the surface 71s of the substrate 71. The first insulating layer 81 functions as a mask layer. For example, the first low impurity concentration layer 41 is formed on the surface 71s that is not covered with the first insulating layer 81. The second semiconductor layer 32 is formed thereon. The second semiconductor layer 32 extends in the first direction (Z-axis direction) intersecting the surface 71s. The second semiconductor layer 32 has the second conductivity type. The first low impurity concentration layer 41 and the second semiconductor layer 32 are not substantially formed on the hole 71h. The second semiconductor layer 32 has a cavity 32x connected to the hole 71h. The second semiconductor layer 32 has a second side surface 32s. The second side surface 32s intersects a second direction (X-axis direction) perpendicular to the first direction (Z-axis direction). The second semiconductor region 32r may be formed when the second semiconductor layer 32 is formed.

As shown in FIG. 8, the third semiconductor layer 33 is formed on the second side surface 32s (step S220). Further, the first semiconductor layer 31 of the first conductivity type is formed on the third semiconductor layer 33 (step S230) (see FIG. 9C). At this time, the third semiconductor region 33r and the first semiconductor region 31r may be formed. Further, the second conductive layer 22 and the second insulating layer 82 are formed as needed.

As shown in FIG. 8, the thickness of the substrate 71 is reduced to expose the cavity 32x (step S240). A metal is embedded in the cavity 32x to form an electrode (first electrode 11) containing metal (step S250).

As shown in FIG. 9C, a part of the substrate 71 is removed and the cavity 32x is exposed. The first electrode 11 is formed by embedding a metal in the cavity 32x. Further, the first conductive layer 21 may be formed.

In this embodiment, a recess (hole 71h) is provided in advance in the growth substrate 71 (eg, silicon substrate). The recesses are provided at the corresponding positions of the openings of the selective growth mask (first insulating layer 81). A semiconductor layer (nanocolumn core) is grown so as to cover the recess. The cavity 32x is formed in the semiconductor layer. By grinding the back surface of the substrate 71, the recess is connected to the back surface. The cavity 32x is exposed. The electrodes can be formed by self-alignment without performing a photolithography process.

According to the embodiment, it is possible to provide a semiconductor light emitting device capable of improving light emission efficiency and a method for manufacturing the same.

Note that the "nitride semiconductor" used _{herein, B x In y Al z Ga} 1-x-y-z N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1, x + y + z ≦ In the chemical formula 1), semiconductors of all compositions in which the composition ratios x, y and z are changed within the respective ranges are included. Furthermore, in the above chemical formula, those further containing a Group V element other than N (nitrogen), those further containing various elements added to control various physical properties such as conductivity type, and unintentionally The “nitride semiconductor” also includes those that further include the various contained elements.

In the specification of the application, “vertical” and “parallel” include not only strict vertical and strict parallel but also variations in a manufacturing process, for example, and are substantially vertical and substantially parallel. Good.

The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific structure of each element such as a semiconductor layer, a semiconductor region, an electrode, a conductive layer, and a substrate included in a semiconductor light emitting element can be similarly implemented by appropriately selecting from a range known to those skilled in the art. However, as long as the same effect can be obtained, it is included in the scope of the present invention.

Further, a combination of any two or more elements of the respective specific examples within a technically possible range is also included in the scope of the present invention as long as the gist of the present invention is included.

In addition, based on the semiconductor light-emitting device described above as an embodiment of the present invention, all semiconductor light-emitting devices that can be appropriately modified and implemented by those skilled in the art are also within the scope of the present invention as long as they include the gist of the present invention. Belong to.

In addition, within the scope of the idea of the present invention, those skilled in the art can think of various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. ..

Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and the scope equivalent thereto.

11... 1st electrode, 12... 2nd electrode, 21... 1st conductive layer, 22... 2nd conductive layer, 31-36... 1st-6th semiconductor layer, 31r-36r... 1st-6th semiconductor region, 32a... 1st base semiconductor layer, 32h... 1st hole, 32i... 1st low impurity area|region, 32s... 2nd side surface, 32x... Cavity part, 35a... 2nd base semiconductor layer, 35h... 2nd hole, 35i... 2 low impurity region, 41...first low impurity concentration layer, 42...second low impurity concentration layer, 51...first pad, 51a...first connection conductive layer, 51s...conductive base, 52...second pad, 52b... Second connection conductive layer, 52v... Connection part, 71... Substrate, 71h... Hole, 71s... Surface, 81... First insulating layer, 81a... First layer, 81b... Second layer, 82... Second insulating layer, 82h ... Holes, 88... Base, 110, 119, 120, 130... Semiconductor light emitting element, L1-L3... Length, p1-p6... First to sixth parts

Claims (18)

A metal first electrode including a first portion extending in a first direction;
A first semiconductor layer of a first conductivity type provided around the first portion, wherein the first semiconductor layer and the first portion pass through an arbitrary plane perpendicular to the first direction , said first semiconductor layer,
A second semiconductor layer of a second conductivity type provided between the first portion and the first semiconductor layer;
A third semiconductor layer provided between the first semiconductor layer and the second semiconductor layer,
A first conductive layer , wherein the first electrode further includes a second portion provided between the first conductive layer and the first portion, and the first conductive layer includes the second portion. The first conductive layer, which is electrically connected and includes a portion protruding from the first electrode along the plane when viewed along the first direction ;
A first low impurity concentration layer provided between the second semiconductor layer and the protruding portion of the first conductive layer;
Equipped with
The impurity concentration in the prior SL first low impurity concentration layer is lower than the impurity concentration in the second semiconductor layer, the semiconductor light emitting element. Further comprising a first low impurity region provided on the first conductive layer,
The first electrode further includes a third portion provided between the first portion and the second portion,
The first low-impurity region is located between the third portion and the first semiconductor layer,
The third semiconductor layer extends between the first low impurity region and the first semiconductor layer,
The semiconductor light emitting device according to claim 1, wherein an impurity concentration in the first low impurity region is lower than an impurity concentration in the second semiconductor layer. A second metal electrode including a fourth portion extending in the first direction and aligned with the first portion in a second direction along the plane ;
A fourth semiconductor layer of the first conductivity type that is provided around the fourth portion and that overlaps the fourth portion in the second direction;
A fifth semiconductor layer of the second conductivity type provided between the fourth portion and the fourth semiconductor layer;
A sixth semiconductor layer provided between the fourth semiconductor layer and the fifth semiconductor layer,
Further equipped with,
Part of the first semiconductor layer, part of the second semiconductor layer, part of the third semiconductor layer, part of the fourth semiconductor layer, part of the fifth semiconductor layer, and the sixth The semiconductor light emitting device according to claim 1, wherein a part of the semiconductor layer is located between the first portion and the fourth portion. Further comprising a second low impurity concentration layer provided between the fifth semiconductor layer and the first conductive layer,
The semiconductor light emitting device according to claim 3, wherein the impurity concentration in the second low impurity concentration layer is lower than the impurity concentration in the fifth semiconductor layer. The second electrode further includes a fifth portion provided between the first conductive layer and the fourth portion and aligned with the second portion in the second direction,
The semiconductor light emitting device according to claim 3, wherein the first conductive layer is electrically connected to the fifth portion. Further comprising a second low impurity region provided on the first conductive layer,
The second electrode further includes a sixth portion provided between the fourth portion and the fifth portion,
The second low impurity region is located between the sixth portion and the fourth semiconductor layer,
The sixth semiconductor layer extends between the second low impurity region and the fourth semiconductor layer,
The semiconductor light emitting device according to claim 5, wherein an impurity concentration in the second low impurity region is lower than an impurity concentration in the fifth semiconductor layer. 7. The semiconductor light emitting element according to claim 1, further comprising a first insulating layer provided between the first conductive layer and the first semiconductor layer. The first insulating layer includes a plurality of first layers and a plurality of second layers arranged alternately in the first direction,
The semiconductor light emitting device according to claim 7, wherein one refractive index of the plurality of first layers is different from one refractive index of the plurality of second layers. A first semiconductor region of the first conductivity type;
A second semiconductor region of the second conductivity type;
A third semiconductor region,
Further equipped with,
The second semiconductor region is disposed between the first semiconductor region and the first conductive layer,
The semiconductor light emitting device according to claim 1, wherein the third semiconductor region is arranged between the first semiconductor region and the second semiconductor region. Further comprising a first pad electrically connected to the first conductive layer,
The semiconductor light emitting device according to claim 1, wherein the first conductive layer is disposed between the first pad and the first electrode. The semiconductor light emitting device according to claim 1, wherein the first conductive layer contains a metal. Further comprising a second conductive layer electrically connected to the first semiconductor layer,
The semiconductor light emitting device according to claim 1, wherein the first semiconductor layer is located between the second conductive layer and the first portion. The semiconductor light emitting device according to claim 12, wherein the second conductive layer is light transmissive. A second pad,
A connecting portion that electrically connects the second pad to the second conductive layer and extends along the first direction;
The semiconductor light emitting device according to claim 12, further comprising: The semiconductor light emitting device according to claim 1, wherein the first portion makes ohmic contact with the second semiconductor layer. Said first electrode, the length of one direction along the plane of the first electrode, shorter than the length of another direction perpendicular to said one direction along the plane, according to claim 1 15. The semiconductor light emitting device according to any one of 15. A second conductivity type base semiconductor layer extending in a first direction, and a first conductivity type first semiconductor layer provided around the base semiconductor layer, wherein the first semiconductor layer and the base semiconductor layer are: A structure including the first semiconductor layer and a third semiconductor layer provided between the base semiconductor layer and the first semiconductor layer, the structure passing through an arbitrary plane perpendicular to the first direction. Prepare,
Forming a hole extending in the first direction in the base semiconductor layer,
A method for manufacturing a semiconductor light emitting device, wherein a metal is embedded in the hole to form an electrode. A second semiconductor layer of a second conductivity type extending in a first direction intersecting the surface on the surface of a substrate including the hole and a surface around the hole, Forming a second semiconductor layer having a second side surface intersecting a vertical second direction and having a cavity connected to the hole,
Forming a third semiconductor layer on the second side surface,
Forming a first semiconductor layer of a first conductivity type on the third semiconductor layer;
Reducing the thickness of the substrate to expose the cavity,
A method of manufacturing a semiconductor light emitting device, wherein a metal is embedded in the cavity to form an electrode containing the metal.

Images