JP6655152B2 - Bus protocol for dynamic lighting applications - Google Patents

Description

  The present invention relates to the field of illumination and signaling systems. More specifically, the present invention relates to controlling LED clusters via data transmission.

  Illumination systems are especially for automotive lighting applications and often use LED technology. It is usually advantageous to use LED technology because the manufacture of LED illumination sources is inexpensive and the energy consumption of LED illumination sources is low.

German Patent Application Publication No. 102015222504

  The control of the illumination system in automotive applications should be robust and fault-tolerant. For example, it should not be affected by external electric fields, electrical peaks or other noise sources. However, the vehicle environment has many electrical noises. Transmission of defective data or unintentional activation of the illumination system can lead to dangerous situations to be avoided.

  Existing systems typically provide a connection between different LEDs via a LIN or CAN system and their controllers. In the case of LIN, the number of controllable LEDs is very limited. On the other hand, setting the illumination system directly on the CAN is complex, difficult to repair or replace in case of failure or accident, and expensive to implement.

  In addition, existing implementations are prone to errors due to, for example, interference, electrostatic discharge or antenna effects. In order to reduce these effects, US Pat. No. 6,077,086 discloses an implementation based on SPI or a unidirectional differential data bus, for example, that reduces the effects of antenna effects due to power line effects or external effects. However, this protection is only partial and cannot be provided due to variations or irregularities in the LED controller.

  It is an object of embodiments of the present invention to provide a system for illumination, a bus protocol, and an automatic addressing method that provides a flexible communication network for robust transmission of instructions for powering electronic devices. is there. An advantage of embodiments of the present invention is that a flexible communication network is provided for the transmission of diagnostic information, and a check is made that the data transmission did not include undesired changes in one or more stages of the data transmission. It is to include.

The present invention is a method of operating a plurality of drive units for powering an electronic unit, the method comprising the steps of: transmitting a data frame including a bit sequence to a master control unit and a plurality of drive units in a slave node. Including exchanging with at least one of the sequences, wherein the sequence is divided into fields of a contiguous bit sequence;
Applying an ID field for addressing at least one drive unit to exchange data between the master control unit and at least one addressed drive unit;
Applying a data field containing information and / or instructions regarding the status of the electronic unit;
Applying the ID field
Indicating an address to a drive unit using a first bit subsequence including N bits, either applying a data field to the addressed drive unit, or if the drive unit is not addressed Indicates that 2 ^N is equal to or greater than the number of drive units in the plurality of drive units to ignore the data field;
Allows the master control unit to identify whether data is to be received from or transmitted to the drive unit, or is assigned to a receive / transmit (R / T) command bit. Using receive / transmit command bits to assign a value to allow each addressed drive unit to decode which action is required by the master control unit, depending on the value When,
Using an additional function bit that includes information in the ID field regarding the type of instruction included in the data frame;
Depending on the value assigned to the function bit, either assign the data bits in the second bit subsequence to a different electronic unit, or use the second bit subsequence to determine the length of the bit sequence in the data field And performing a length decoding step to indicate

  An advantage of embodiments of the present invention is that simultaneously setting up a fast and robust communication with a predictable bit sequence length between the MCU and each of the plurality of drive units, including the addressing of a particular drive unit. Is what you can do. An advantage of embodiments of the present invention is that multiple slave nodes can be addressed, for example, up to 60 slave nodes. An advantage of embodiments of the present invention is that a differential bus can be used. An advantage of embodiments of the present invention is that a fast system is obtained. For example, in some applications, speeds up to 750 kilobauds (kBaud) are obtained, and the update cycle of the electronic unit is 10 ms. The electronic unit mentioned may be an LED, but embodiments of the present invention are not limited thereto, and the unit may be, for example, any type of lighting device, and more generally It may be any type of electronic device that needs to be done.

  The method may further include a cyclic redundancy check to detect any unintended changes in the ID and data fields.

  An advantage of an embodiment of the present invention is that it provides strong protection against noise and accidental bit fluctuations in the transmitted data at the level of the bus protocol, which is particularly important in an automotive environment.

  A master control unit sending a bit sequence to at least one of the drive units, the sequence including an acknowledgment field including a predetermined bit sequence sent by the slave node to the master control unit immediately before the end of the frame field; If the predetermined bit sequence matches one or more expected values stored in the master control unit, the received data sequence is signaled to at least one of the drive units as being correct.

  An advantage of embodiments of the present invention is that not only drive information but also diagnostic information is exchanged. Thus, the system operates in both directions, providing information from the master control unit to the drive unit, and vice versa. An advantage of an embodiment of the present invention provides a diagnostic step on the data received by the driver, which allows the MCU to signal any problem in real time if a defective data transmission is sent to the driver unit. Is to make it possible. The method may further use the end of frame, which is the stop bit of the transmission, for example, a UART transmission. The end of a frame may be a longer bit time, for example a 12 bit time.

  An advantage of embodiments of the present invention is that the sequence can be explicitly terminated, reducing the risk of crosstalk between the MCU and the unaddressed drive unit.

  The method further includes applying a break field having a predetermined length before the ID field. An advantage of embodiments of the present invention is that any accidental voltage peaks or surges in the communication bus do not cause any undesirable response in the drive unit.

  The method may further include storing the plurality of data frames in different data buffers.

  An advantage of embodiments of the present invention is that data overwriting is avoided by writing the bit sequence of each data frame to a different data buffer, for example, a RAM data buffer of at least 38 bytes.

  The method may further include exchanging a predetermined one or more sequences of bits on the first bit substring of the ID field while simultaneously addressing all drive units.

  An advantage of embodiments of the present invention is that the bus protocol can include one or more valid IDs for all drive units, and thus can simultaneously address all drive units acting as slave nodes, It is possible to broadcast to all drive units.

  The method further includes ignoring one or more predetermined bits of an address for at least one of the plurality of drive units to simultaneously address one or more of the drive units.

  An advantage of embodiments of the present invention is that the bus protocol can include one or more valid IDs for some LED drive units, for example, by applying a mask to a register in the register of the drive unit. It is. The predetermined bit or bits that are ignored are fixed by the mask.

The drive units each include an input connection and an output connection for receiving address information and providing status information, the output connection of the drive unit being connected to the input connection of one different drive unit, and The input connections of the drive units are connected to the active voltage information, the output connections of the last of the plurality are not connected, and each drive unit further comprises a direct communication bus to the master control unit , Setting the maximum value of the counter n equal to the number of drive units,
Checking the state of the input connection of the drive unit corresponding to the value of the counter n, and if the state is active,
Providing a unique address to the drive unit at the corresponding value of the counter n by the master control unit, and subsequently returning the address to the master control unit by the drive unit;
Verifying the programmed address of the drive unit for the value of the counter n and, if there is an error, starting an error handling routine;
Setting a flag to signal that programming for that drive unit at that corresponding value of counter n has been completed, and subsequently switching the output connection of the drive unit to the active state;
Increasing the value of the counter n by one;
Repeating the steps until the counter n reaches its maximum value.

  An advantage of embodiments of the present invention is that the bus protocol can include one or more valid IDs for some LED drive units, for example, by applying a mask to a register in the register of the drive unit. It is. The predetermined bit or bits that are ignored are fixed by the mask.

  The method may include setting the address of the first slave to a value of one for counter n.

  An advantage of embodiments of the present invention is that the MCU can initialize the setting or resetting of addresses to each node at any required moment. It is a further advantage that the acknowledgment of the address setting is performed by the LED drive unit, reducing the risk of mislabeling. It is a further advantage that flexible addressing is provided independent of the physical location and distance of each LED drive unit relative to the MCU.

  The method may be a method of driving a plurality of drive units for a lighting device.

  The method may be a method for driving a plurality of drive units for a lighting device in a vehicle lighting application.

The present invention also provides a plurality of drive units, each for driving at least one electronic unit, and a single communication for establishing an exchange of data sequences between the master control unit and each of the plurality of drive units. A master control unit comprising a bus, wherein each drive unit is connected in parallel to the same communication bus, the drive unit comprises a controller, and the controller comprises:
At least one bus protocol processing unit for processing data exchanged over the communication bus;
At least one control unit for controlling the power supply of the electronic unit according to any data sequence transmitted by the master control unit,
At least one bus protocol processing unit (33)
An ID field for addressing at least one drive unit for exchanging data between the master control unit and at least one addressed drive unit;
A data field containing information and / or instructions relating to the status of the electronic unit; and
ID field is
A drive unit address using a first bit sub-sequence containing N bits, either applying the data field to the addressed drive unit or, if the drive unit is not addressed, the data field A drive unit address, where 2 ^N is equal to or greater than the number of drive units in the plurality of drive units, to ignore;
Receive / transmit command bits, which allow the master control unit to identify whether data is to be received or transmitted, or which action, depending on the value of the receive / transmit command bits, Receive / transmit command bits to enable each addressed drive unit to decode what is required by the control unit;
An additional function bit in the ID field to include information about the type of instruction included in the data frame;
A second bit subsequence for assigning the data bits to different electronic units or indicating the length of the bit sequence in the data field, depending on the value assigned to the further function bit. And

  The controller has a timing unit to check the length of any data sequence received from the master control unit, and if data exchange is performed less than a predetermined minimum time interval or beyond a predetermined maximum time interval Means for generating an error signal.

  In one embodiment, the RC oscillator simply sends out a time axis, ie, a clock. The timing unit may be a timer that uses the clock as a time axis, measures the time between given events, and acts on signal information if the predicted timing between events is not preserved.

  In one embodiment, the timing unit itself can include a standalone programmable RC oscillator.

  In one embodiment, the timing unit itself is a stand-alone programmable RC oscillator.

  An advantage of embodiments of the present invention is that the controller itself provides the real-time error identifier and assessment. A further advantage of embodiments of the present invention is that error assessment is integrated into the controller, reducing the risk of interference.

  The master control unit further comprises a common voltage supply line for powering at least one of the plurality of drive units, and the system includes at least one drive line for suppressing at least electrostatic discharge on the supply line. At least one protection unit is further provided between the unit and the common voltage power supply.

  An advantage of embodiments of the present invention is that the drive unit is shielded from electrical surges or voltage peaks from the power supply.

  The single communication bus of the master control unit may be a differential communication bus. An advantage of embodiments of the present invention is that the communication bus is robust against external electromagnetic fields and antenna effects.

  The system may further comprise a diagnostic unit for measuring and collecting voltage values from the controller.

  An advantage of embodiments of the present invention is that voltage variations due to parasitic resistance of the connection can be diagnosed and calibrated.

  The diagnostic unit can include a temperature sensor.

  An advantage of embodiments of the present invention is that variations in data transmission and / or voltage supply at the LED drive unit level due to temperature changes can be calibrated.

  The driver may include a processing unit for triggering an error handling routine in response to any error results provided by the diagnostic unit.

  It is an advantage of embodiments of the present invention that instead of sending a signal from the diagnostic unit to the MCU to trigger an error signal, an error notification can be made directly from the controller.

  The timing unit may be an RC oscillator.

  A further advantage is that it can be implemented in a cost-effective manner.

  The system may be for lighting applications in vehicles.

  The electronic unit may be an LED.

The present invention also relates to a bus protocol for exchanging a data frame comprising a bit sequence between a master control unit and at least one of a plurality of drive units in a slave node, wherein the sequence comprises a continuous bit sequence. Are split in the field of
An ID field for addressing at least one drive unit for exchanging data between the master control unit and at least one addressed drive unit;
A data field containing information and / or instructions relating to the status of the electronic unit;
ID field is
A drive unit address using a first bit subsequence containing N bits, either applying the data field to the addressed drive unit or ignoring the data field if the drive unit is not addressed Address, where 2 ^N is equal to or greater than the number of drive units in the plurality of drive units;
Allows the master control unit to identify whether data is to be received from or transmitted to the drive unit, or depends on the value assigned to the receive / transmit command bits Receive / transmit command bits to allow each addressed drive unit to decode which action is required by the master control unit;
Further function bits including information in the ID field regarding the type of instruction included in the data frame;
A second bit subsequence for assigning the data bits to different electronic units or indicating the length of the bit sequence in the data field, depending on the value assigned to the further function bit.

  Particular preferred aspects of the invention are set out in the accompanying independent and dependent claims. Features of the dependent claims may be combined with features of the independent claims and with features of other dependent claims as appropriate, and not merely as explicitly set out in the claims.

  These and other aspects of the invention will be apparent with reference to the embodiments described below.

FIG. 2 illustrates a dynamic lighting system for exchanging data between a plurality of LED units and a master control unit according to an embodiment of the present invention. 4 illustrates a possible LED drive unit according to an embodiment of the present invention. 4 illustrates a possible LED drive unit according to an embodiment of the present invention. FIG. 3 illustrates a controller subsystem showing the path of exchanged data within the controller according to an embodiment of the present invention. 4 illustrates a scheme for automatic addressing control according to an embodiment of the present invention. FIG. 4 illustrates a flowchart of possible actions taken by a bus protocol processing unit, according to one embodiment of the present invention. 4 illustrates a flowchart using an automatic addressing method according to one embodiment of the present invention. 4 shows different data formats for a data frame, the upper being a prior art UART data format, the second and third being an optical bus data frame according to an embodiment of the invention, and the fourth being an ID field according to an embodiment of the invention. It is details of the data frame which shows a bit sequence.

  The drawings are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes.

  Any reference signs in the claims shall not be construed as limiting the scope.

  In the different drawings, the same reference signs refer to the same or analogous elements.

  The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not correspond to actual reductions to practice of the invention.

  Furthermore, the terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements, not necessarily temporally, spatially, ranked or sequenced in any other way. It is not used to describe The terms so used are interchangeable under appropriate circumstances, and the embodiments of the invention described herein are operable in an order other than that described or illustrated herein. Please understand that there is.

  Furthermore, the terms, above, below, etc. in the specification and claims are used for descriptive purposes and not necessarily for describing relative positions. The terms so used are interchangeable under appropriate circumstances, and embodiments of the invention described herein may operate in concepts other than those described or illustrated herein. Please understand what you can do.

  It is to be noticed that the term "comprising", used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. Please note. Thus, it is to be construed as specifying the presence of the recited feature, integer, step or component, but the presence or addition of one or more other features, integers, steps or components, or groups thereof. Does not exclude. Therefore, the scope of the expression "device comprising means A and B" should not be limited to devices consisting only of components A and B. That means that, in the context of the present invention, the optimal relevant components of the device are A and B.

  Throughout this specification, references to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. means. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments, as will be apparent to one skilled in the art from this disclosure.

  Similarly, in describing exemplary embodiments of the present invention, various features of the present invention may be combined into a single unit in order to streamline the disclosure and to assist in understanding one or more of the various inventive aspects. It should be understood that they may be collected together in embodiments, figures, or descriptions thereof. However, the method of this disclosure should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.

  Furthermore, some of the embodiments described herein include some, except for other features not included in other embodiments, but as will be appreciated by those skilled in the art, Combinations of features are within the scope of the invention and are meant to form different embodiments. For example, in the following claims, any of the claimed embodiments can be used in any combination.

  In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

  In the description, the methods and systems are illustrated by reference to an LED. Nevertheless, embodiments of the present invention apply equally to driving other types of electronic devices, such as other types of lighting devices.

  When embodiments of the present invention refer to "PWM", reference is made to pulse width modulation. However, in the framework of the present invention, other pulse modulation techniques, such as pulse density modulation, pulse frequency modulation, can be used to control the LED.

  When embodiments of the present invention are referred to as “slave nodes,” those drive units (eg, LED drive units) that are connected to a master control unit (MCU) are referenced. The drive unit can include one or more electronic device clusters, such as LED clusters, and a controller that controls powering of the electronic device clusters.

In a first aspect, the invention provides a plurality of drive units, each for driving at least one electronic unit, and an exchange of data sequences between a master control unit and each of the plurality of drive units. And a master control unit with a single communication bus, wherein each drive unit is connected in parallel to the same communication bus. This system may be, for example, a lighting system for a vehicle or an automobile, but embodiments of the present invention are not limited thereto. This system has the advantage of increasing the safety by the precise actuation of the electronic unit. The drive unit includes a controller that controls the plurality of clusters. The controller comprises at least one bus processing unit for processing data exchanged over the communication bus, ie at least one control unit for controlling the power supply of the electronic units of the cluster according to any data sequence transmitted by the master control unit. . The at least one bus processing unit processes an ID field for addressing the at least one drive unit and is adapted to exchange data between the master control unit and the at least one addressed drive unit. The data field contains information and / or instructions regarding the status of the electronic unit. Thus, the ID field is a drive unit address using the first bit sub-sequence containing N bits, either applying the data field to the addressed drive unit, or if the drive unit is not addressed In order to ignore the data field, data should be received using an address and R / T command bits where 2 ^N is equal to or greater than the number of drive units in the plurality of drive units. In the ID field relating to the type of instruction contained in the data frame, which is to be transmitted or which allows each addressed drive unit to decode which action is required by the master control unit Information, and bit subsequences to different electronic units Contains data bits indicating the length of the bit string assigned or in the data field. The system is adapted to have a flexible and configurable automatic addressing system for assigning different addresses to drive units. In some embodiments, the system is typically used at one or more stages of data exchange, for example, at the level of addressing, at the level of power or information transmission to or from the MCU, or at the beginning or end of data exchange. Even at this level, several registers may be provided to provide checkpoints. Typically, checkpoints are based on comparing the length of a particular column of bits to the expected length of the column at a particular stage of data transmission. For example, if the communication bus suddenly drops the voltage, but this occurs less than 12 bits in length, the system may ignore this event as noise. If this happens with a length of 12 bits, the drive unit can start reading the data sequence. This can be applied to several stages of data transmission, including termination of transmission. This provides a very robust shield against electromagnetic interference, surges, electrostatic discharges and other undesirable phenomena that occur in the automotive environment, resulting in a very stable and robust drive of electronic units such as LEDs, for example. Bring.

  In embodiments of the present invention, instead of a single wire bus, a differential bus (e.g., having two wires) may be used. It has the advantage that low voltages can be used for data transmission and the use of relatively expensive Local Interconnect Network (LIN) configurations can be avoided.

  The bus is bidirectional and can exchange optical and diagnostic information.

  In some embodiments, up to 60 slave nodes can be addressed without requiring a LIN.

  In some embodiments, the data transmission rate may reach a high rate (750 kBaud, 10 ms update cycle). When referring to high speed, a speed comparable to or higher than that available on the LIN bus is referred to. Reachable speeds can be up to 2 Mbits within the CAN physical layer. The rate used may depend on the amount of data transferred and the update rate to be reached. The target speed is the minimum speed at which all necessary data can be transferred. These high speeds are obtained thanks to the parallel layout of the bus. For example, the nodes are preferably connected in parallel to the MCU via a bus. Since the communication is based on an inexpensive and compact oscillator, the accuracy requirements when the UART uses the start and stop bits to resynchronize every byte are low. An advantage is that a large number of drivers, for example LED drivers, can be implemented as slave nodes in an inexpensive way, since there is no need to implement the invention in a CAN or with a SPI bus.

  The present invention provides functional security at the system level, provided that it provides safety functions and diagnostic elements at the hardware level (functional safety level B) within the bus protocol and / or nodes. The invention can be made robust against voltage drops on the supply lines. The present invention can advantageously present protection measures and safety measures in an automotive environment, such as, for example, electrostatic discharge (ESD), and improve electromagnetic compatibility.

  In particular, the invention can be used for dynamic lighting systems in an automotive environment, for example for ambient light as well as signal information for drivers. Thus, the system can include functional safety requirements. Embodiments of the present invention may include security measures in the bus implementation HW and protocols.

  The present invention can provide a dedicated command language for dimming, a dedicated hardware (HW) memory and register approach. In addition, open configuration means can be applied to protocols and HWs.

  The nodes can be calibrated by automatic setting of the bus node address and / or by implementing a calibration means for each node over the network. Automatic configuration can be repeated at any time.

  Referring to FIG. 1, which illustrates an exemplary system based on LEDs, standard and optional features are further illustrated. FIG. 1 shows a dynamic lighting system comprising a master control unit (MCU) 10 and several LED drive units 11, which are slave nodes of the MCU and are interconnected between them and to the MCU by a bus. . Further, one or more protection units 12 may be connected to the power supply of the drive unit. The protection unit can protect against surge or reverse polarity and the like. In some embodiments, one or more protection units may include voltage protection element 13, reverse polarity protection element 14, or a combination thereof. These protection units can suppress high voltage or ESD disturbances on the supply lines and avoid damage to the system when reverse polarity of the supply lines VS and GND is applied. The one or more protection units may be connected between the power supply and the at least one LED drive unit, or between some of the units from the plurality of units. For example, it may be connected between a power supply and all LED drive units, as shown in FIG.

  Light information, such as luminosity, light color or related PWM ratio, may be transmitted from the master control unit 10 to the LED unit 11 via a bus. The invention is not limited to light information and diagnostic information that can be exchanged between the LED unit and the MCU and via the bus. The diagnostic information may include information as to whether all LEDs carry a given current. Further, the bus can also support an address allocation method from the MCU to all slave nodes. In such a case, communication within the bus is bidirectional.

  The system may include a number of LED drive units as slave nodes of the MCU, for example, 60 slave nodes. This system allows for a high speed of information transmission, for example to drive LEDs with a 10 ms update cycle for all LEDs and to update information about the illumination in a very fast and smooth manner, e.g. (bit Enables (in form) 750 kilobaud to transmit the pulse. As is known in the art, systems based on LIN buses or solutions based on shift registers interconnected between slave nodes are too slow. Furthermore, in systems based on the LIN bus, only 16 slave nodes can be used.

  The communication bus may be of any kind, but a differential bus having two wires (eg, COM_P, COM_N) is a preferred implementation. Such a bus can provide the required communication speed, as well as communication with a large number of slave nodes, especially in automotive applications involving embodiments of the present invention.

  FIG. 2 shows an LED drive unit 11 suitable for the illumination system according to the first embodiment of the present invention. It comprises an LED controller 20 and one or more LEDs 37 distributed in one or more clusters 38. The cluster may be, for example, an RGB unit including a red LED, a green LED, and a blue LED connected to three pins of the LED controller 20. The LED drive unit further includes connections to ground (GND) and power supply (VS), and typically AIN and AOUT connections, to allow for node addressing (automatic addressing as described below). Furthermore, connections to the differential bus (COM_P, COM_N) are included in the LED drive unit and controller. In embodiments of the present invention, communication with the MCU may be based on a clock derived from the transferred data. For example, the controller 20 can include the oscillator 41.

  The communication interface (not shown) of the MCU 10, together with the communication interfaces 32, 33, 34 of the controller 20 of each LED unit acting as a slave node, can form a differential bidirectional bus. Optical information, calibration data, diagnostic information, and other types of data can be transmitted over this bus.

  The LED unit controller 20 may be included in an integrated circuit (IC). A compact controller can advantageously be provided. This can include, for example, one or more switch element controls 21. These can be used to provide power supply voltage to one or more external consumers via one or more switch elements 40. Switch element 40 may be, for example, a transistor. The switch element control is controlled by, for example, the microcontroller 27.

  The controller 20 may further include a current source, a switch element, and a pulse width modulation (PWM) control 22. One control 22 can be provided for each cluster, or a single control 22 can be provided to control multiple clusters 22, for example, via multiplexing as shown in FIG. 2b. Microcontroller 27 can provide information regarding frequency and duty cycle to included PWM registers. The frequency and duty cycle may be different for all PWM registers and may be static on / off. In other words, the driver can be driven to a constant on or constant off value. Current source 39 and switch element 40 can be connected to each PWM register, which can include provided PWM or static on / off. The microcontroller further provides information and instructions for one or more different current sources. This information can include, for example, the DC current value applied by the connected current source. Each current source can carry a different DC current. Each current source can further be modulated with, for example, PWM provided via a connected PWM resistor. Each switch element 40 and current source 39 are interconnected and can be connected to light emitting diodes LED 37 of cluster 38. Therefore, both the switch element 40 and the current source 39 can drive the LED 37. Each LED can be individually controlled via a switch element and a current source, both can be modulated with PWM, or can be driven statically using DC current, so that each LED is , The individual light intensity that can reach a light output in the range of 0% to 100% per LED can be conveyed. The combination of the switch element and the current source makes it possible to optimally control the LED under the mode of power loss in the LED unit controller.

  However, the present invention is not limited to this. The driver may alternatively or additionally comprise only one or more current sources and a current source 39 connected to the PWM control 23. Microcontroller 27 can provide frequency and duty cycle information to included PWM registers. The frequency and duty cycle can be different for all PWM registers, which may be static on / off, and each PWM register is a current source that can deliver the provided PWM (or static on / off) 39 is controlled. The microcontroller further provides different current source information and instructions as described above. Each current source can carry a different DC current and is modulated with PWM provided via a connected PWM resistor. Since the LEDs are individually controlled via a current source and then controlled by PWM or in a static manner using direct current, each LED can convey individual light intensity and Light outputs of 0% to 100% can be reached.

  This implementation allows for linear control of the LED under the use of an adjustable DC current in the current source (or static power supply) provided by the switching element. It can be PWM driven, or a combination of both.

  The type of switch is advantageously a transistor, and the current source is also advantageously a transistor controlled in a current supply mode. The transistor and current source can be associated with ground or a power supply.

  The controller 20 of the LED unit 11 further includes a voltage regulator 26 for adjusting an external supply voltage (for example, a car battery power supply voltage VS) and adapting it to a voltage required by the LED driving unit. For example, the voltage regulator can regulate the power supply voltage VS to a low voltage required for the built-in controller. The driver may for example comprise at least one oscillator 41 connected to a regulator. The oscillator may be an oscillator having an adjustable frequency, for example a microcontroller 27, a control unit 22 for the switch element, a current source and PWM, a control unit 23 for the current source and PWM, a timer (not shown) ) Can be provided with a system clock for all elements of the controller 20 that may require a time base. The oscillator 41 may be an RC oscillator 41. These are compact and inexpensive (at least less than the crystal oscillators typically used in CAN implementations), which advantageously reduces the cost of the controller, and thus allows a large number of slave nodes to be connected to the MCU at low cost. it can.

  Microcontroller 27 may include a central processing unit (CPU) 28 that performs calculations and receives and / or provides information to connected units of the controller via an address or data bus. The CPU may be adapted to receive interrupt instructions that may have an immediate or future effect on the processes handled by the CPU. The microcontroller may be provided by the MCU 10, e.g., a PWM ratio for different PWM registers, and is calculated immediately as a response to the light intensity request, typically provided ("on the fly"). "Computed"), a data storage device that can be used during data processing for PWM ratio data processing. Data storage device 29 may be a random access memory (RAM) including several data buffers.

  The microcontroller can further include a data memory 30 and / or a program memory 31. The essence of these memories is that they do not lose data when the power goes down. For example, these memories may be non-volatile (NV) memories. Program memory 31 may be an NV memory in which instructions for the CPU can be stored. Such a memory can be, for example, a read-only memory (ROM) or a flash memory. The microcontroller 27 can further include a data memory 30, such as an EEPROM, which can include data such as, for example, calibration data, address information, status information, and the like.

  In some embodiments of the present invention where the LED controller is an integrated circuit, the PWM control and the ADC measurement can be synchronized between each other, so that measurement errors due to PWM switching can be eliminated. However, a diagnostic unit 35 may be included, for example, to measure and collect voltage from one or more pins of the LED unit controller. This unit 35 can include an analog-to-digital converter (ADC). It can also measure, for example, the current flowing through the connected LEDs. The diagnostic unit 35 may further comprise a temperature sensor for providing a temperature measurement of the integrated circuit. The diagnostic unit 35 can be read at any time by the CPU. The CPU may check the measurement results and compare them with predicted values (thresholds), for example, in NV data memory or provided via an MCU. If the measurement is above or below a given threshold, the CPU may trigger, for example, for an error handling routine, or may initiate an adjustment process so that the system can return to normal operating conditions. it can. If the temperature of the integrated circuit is, for example, too high (e.g., high enough to start affecting the resistance of the bus and connections), the CPU may start switching to a current saving mode or start dimming the connected LEDs. Can be. All security measures of the designated slave node are then communicated to the MCU which can trigger other LED drive units for other measures, so the overall system performance may be reduced to protect the system There is.

  As already explained, the signals are transmitted via the communication bus. FIG. 3 shows a possible implementation of the signal path in the controller. In embodiments of the present invention that include a differential communication bus, the controller 20 converts these external bus signals to internal receive (RX) and / or transmit (TX) signals used by the LED unit controller. A differential physical layer 34 connected to the differential bus signals COM_P and COM_N can be provided. The differential physical layer protects the integrated circuit against the effects of ESD and EMC from the automotive harness and provides for overall EMC compliance. Data is exchanged between the physical layer 34 and the universal asynchronous receiver transmitter UART 32.

  A bus protocol processing unit (BPPU) 33 performs processing of the received / transmitted data, applies functional security measures, and / or triggers error handling when needed. The BPPU can also generate interrupt and control signals and send them to the CPU and UART 32. The overall implementation reduces the need for CPU resources. The BPPU 33 may include, for example, a digital state machine, or any other type of unit for handling bus protocols for dynamic lighting applications.

  A timer or timing unit 55 can be used to check the length of the data sequence. If the length of the sequence, or a portion thereof, does not match the expected value, an error signal can be generated.

  At least one direct memory access controller (DMA) 50, 51 may be included to provide direct access to one or more data buffers 52, 53, 54 of the data storage device 29. This is because the UART sets the reception data in the reception mode through the BPPU data processing via the direct reception (DMA_RX) direct memory access control to the first reception data storage buffer 52 or the second reception data storage buffer 53. This provides the advantage of minimizing the CPU load on communication needs with the MCU. The BPPU selects which data storage buffer is to be used, for example, according to the address information provided by RX_Address.

  In one embodiment, the data frames may be stored in the data storage buffer, for example, alternately, for example, each first data frame may be stored in the first received data storage buffer 52, for example, and each second data frame may be stored in the first data storage buffer 52. The frame is stored, for example, in the second reception data storage buffer 53. This avoids overwriting data in each new incoming data frame.

  The reception mode and the transmission mode can be triggered by the CPU and UART, for example, by the BPPU, depending on the bus protocol. In the transmission mode, the CPU can bring data to the transmission data storage buffer 54 via the common address and data bus. The BPPU can receive this data from the transmit data storage buffer 54 and use the data, for example, using the address information provided by the TX_Address, and using direct memory access control for the transmission (DMA_TX) 51. To the UART, and the BPPU may process the data.

  The data storage buffer has a size of, for example, 38 or 40 bytes in order to handle the bus protocol in an optimal manner. Several data storage devices and buffers can be included. For example, an error register can be included as a data buffer in the data storage device 29.

  In addition, a timing unit for checking the length of the exchanged data sequence in the MCU or in a different unit of the controller may be included. Further, for example, a comparator 70, a unit for setting an adjustable reference voltage 71, a debounce unit 72, different registers 73, 74, and input and output pins that can be connected to other LED drive units. And automatic addressing controls and connections.

  The connection of the LED cluster to the pins of the controller in the LED unit 11 can be adapted in any suitable way. In one embodiment, the controller 20 can drive four RGB units 38, for example, as demonstrated in FIG. 2A. In this embodiment, each LED cluster 38 is connected to the power supply VS and at least the current source of the controller 20. In another embodiment, the controller 20 can drive six RGB units, for example, as demonstrated in FIG. 2B. In this particular embodiment, the LED clusters are connected to different pins of the controller, none of which is connected to a power supply. Some clusters have a switch and their LED anode connected to the current source or only to the switch, while the cathode can be connected to the current source.

  In a further aspect, the invention also relates to a method of operating a plurality of drive units for powering an electronic unit. The method comprises exchanging a data frame between a master control unit (MCU) and at least one of a plurality of drive units in a slave node, the data frame comprising a bit sequence divided into a field of a continuous bit sequence. Including.

The method includes applying an ID field for addressing at least one drive unit to exchange data between the master control unit and at least one addressed drive unit; Applying a data field containing information and / or instructions regarding the status of the Applying the ID field is to indicate an address to the drive unit using a first bit sub-sequence including N bits, either applying the data field to the addressed drive unit, or Use the R / T command bit to indicate that 2 ^N is equal to or greater than the number of drive units in the plurality of drive units to ignore the data field if is not addressed. The master control unit is able to identify whether data is to be received or transmitted, or to specify which action is required by the master control unit. Using the F function bit to enable the drive unit to decode Performing a length decoding step to include information about the type of instruction in the ID field, assigning the data bits to different electronic units, or using the second bit subsequence to determine the sequence of bits in the data field. Indicating the length. In another aspect, the invention also relates to a corresponding bus protocol.

  Further standard and optional features of the method and bus protocol for operating the drive unit are illustrated as specific examples as described below. The following describes an exemplary bus protocol and addressing method. For comparison, the protocol UART is shown in the drawing 700 above FIG. According to an exemplary embodiment of the present invention, a bus protocol for a dynamic lighting system is provided for exchanging data between an MCU and a plurality of LED drive units operating as slave nodes. The disclosed bus protocol for dynamic lighting systems generally does not conform to a standard bus protocol such as the UART protocol. The proposed bus protocol involves a data frame containing a sequence of consecutive bits grouped into columns or fields. The data frame includes an ID field and a data field. In the exemplary embodiment shown in the second drawing 710 of FIG. 7, the bus protocol of the dynamic lighting system is, for example, active low (low voltage as opposed to high voltage when the bus is inactive). Includes certain break fields. The break field may include any number of bits, eg, 1 bit, or eg, 12 bits, which are, for example, active low at the beginning of the data frame. The 12-bit time length has the advantage that this length is longer than a complete UART data frame (10 bits in total, see diagram 700 above FIG. 7). This leaves enough headroom in the automotive environment to recognize the start of a data frame at the break field.

  The bus protocol for dynamic lighting applications may further include a variable data length data field after the ID field as described above. The nature of the byte may be of any type.

  For example, in one embodiment, it can include, for example, optical information. The light information can be direct information for a PWM register that controls the LEDs in the RGB unit. It is also just the luminosity or light color information of the RGB units. In this case, the CPU of the LED unit controller can calculate the PWM setting of the PWM register using the provided information.

  In another embodiment, the data may be merely information for the switch element 40, for example, to power a consumer.

  In another embodiment, the data field may include slave node diagnostic information for the MCU. This may be, for example, temperature information of the lighting unit controller.

In another embodiment, the data may be, for example, a broadcast command for all slave nodes. For example, it may be a command that instructs all slave nodes to switch off all LEDs. In one or more embodiments, other commands may also be defined in one or more combinations, for example, as follows.
enter, for example, enter application mode.
enter, for example, enter a calibration mode to preset a defined light output to all LEDs.
enter, for example, an automatic addressing mode as described further below.
enter, for example, a programming mode for the NV program memory (31).
send For example, send color information to the LED and / or LED unit.
Enables the drive mode of the enable LED (eg, linear drive or PWM drive).
request For example, a diagnosis is requested when all LEDs transmit current.
request For example, a slave address is requested.
request For example, request color information for an LED RGB unit.
request Requests temperature information.
write Write data to a given memory location.
read For example, read data from a given memory location.
enter For example, entering the stand by operation such as sleep mode.

  Some other commands can be implemented as well. Data fields are flexible.

  In some embodiments, a bus protocol for dynamic lighting applications may optionally include a data field followed by a cyclic redundancy check (CRC) field, for example, of 16 bits. CRC generation and CRC checking can be performed over the ID and data fields. The CRC calculation follows the state-of-the-art CRC calculation and will not be described further.

  At the end of a data frame, for example, an end of frame (End of Frame) may follow the CRC field. According to portion 700 of FIG. 7, the end of the frame may be, in one embodiment, just a stop bit that is actively high, similar to a UART transmission. The end of the frame can indicate other lengths. For example, many longer bit times can be presented, eg, 12 bit times.

  In a further embodiment, shown in the third drawing 720 of FIG. 7, the CRC field may be followed by an acknowledgment (ACK) field and, as described above, by an end-of-frame field. The acknowledgment field only affects received data frames and is performed by the slave node. The acknowledgment field may include one byte sent by the slave node immediately after the CRC field. The slave may send a predefined byte if the reception of the data was OK and no error occurred. The bytes may be predefined at, for example, 01111110. Since the acknowledgment information is known by the MCU (e.g., can be programmed there), the received information different from this will lead to the identification of the disturbed communication channel, and the MCU will diagnose this error, Allows further measures to be taken in error handling.

  In one embodiment, the acknowledgment field may be 00000000 if the reception of the data is not complete and correct. In another embodiment, if the reception of the data is incomplete or incorrect, an ACK may not be sent.

  In all such cases, the MCU can diagnose if there was an error while receiving the data.

  In one embodiment of the present invention, the next data frame starting from the break field may immediately follow the stop bit of the UART transmission.

  The following paragraphs describe exemplary ID fields that include security protocols and checks in embodiments of the present invention. In an embodiment of the present invention, the ID field includes, for example, a plurality of bits following the break field. At least one bit of the ID field is allocated to address the LED drive unit acting as a slave node. Preferably, a first substring of bits is assigned to a slave node address. Further, the ID field includes at least one additional bit, which is a command bit, including information on whether the data frame includes a data field for transmission or reception. Further, the ID field includes a function bit indicating a function of the data frame and at least one, preferably a plurality of further bits for assigning a value corresponding to the specified function of the data frame. For example, if the data frame includes a command from the MCU to power on the illumination system, multiple bits may be assigned to the designated address of each LED in the LED drive unit. For example, the plurality of bits can include a value representing the number of bits present in a subsequent data field.

  The fourth drawing 730 of FIG. 7 illustrates an exemplary embodiment of an ID field according to an embodiment of the present invention. For example, the bus protocol for dynamic lighting applications further includes a 16-bit ID field following the break field.

  The upper 6 bits (ID15, ID14, ID13, ID12, ID11, ID10) of the ID field may indicate the slave address designation. Thereby, 64 slaves can be handled. In some embodiments, some addresses may be fixed. For example, in the definition of the optical bus protocol, the four lowest addresses 000000, 000001, 0000010, 000011 (or the four highest addresses 111111, 111110, 111101, 111100, or any other predetermined addressing or set of addressing). , Can be regarded as valid IDs of all slave nodes. This particular embodiment has the advantage that the MCU can address all slave nodes simultaneously in a broadcast manner. In other words, all slave nodes (all LED drive units) interpret these IDs as valid IDs. This leaves instance space for applications, for example, where each individual slave node receives the lighting setting information and only stores this setting. Using the broadcast command, all slave nodes apply this lighting setting once and simultaneously, so that the entire system shows an even change in lighting setting. In certain embodiments having a 6-bit ID field and using four addressing for broadcast, the selected implementation allows addressing 60 slave nodes.

  Further, ID9 in the ID field includes a receive (R) or transmit (T) command bit. For example, since ID9 = 0 is equivalent to reception, the data frame includes a data field sent from the MCU to the driver. For example, since ID9 = 1 is equivalent to transmission, the data frame is a data frame sent from the driver to the MCU. is there. This allows the master to control each slave in an individual manner when data is to be received or data is to be transmitted. Further, the slave nodes can interpret which actions are required by the master control unit. The value assigned to ID9 can be different.

  The next bit ID8 of the ID field can contain further function information F.

  For example, when ID8 = 1, the reception data in the reception mode has a length determined by the number of bits obtained by multiplying the sub-addresses (SubAddress) ID7, ID6, ID5, ID4, ID3, and ID2 by 6 bytes. This leaves space for a variable data length between 0 bytes (no bit set: ID [7: 2] = 000000) and 36 bytes (all bit sets: ID [7: 2] = 111111).

  Since the LED clusters of the LED drive unit can be numbered, they can be addressed. For example, the RGB units 38 of the LED unit 11 (eg, as shown in FIG. 2B) may be randomized as, for example, RGB unit 0, RGB unit 1, RGB unit 2, RGB unit 3, RGB unit 4, and RGB unit 5. Can be numbered in any order, or in an order selected by the MCU.

Further, the bit positions of the sub address [7: 2] may be assigned to the numbered RGB units. This can, for example, lead to the next assignment.
ID7-RGB unit 5 When ID7 = 1, 6 data bytes are allocated to the RGB unit 5, and when ID7 = 0, 0 data bytes are allocated to the RGB unit 5.
ID6-RGB unit 4 When ID6 = 1, 6 data bytes are allocated to the RGB unit 4, and when ID6 = 0, 0 data bytes are allocated to the RGB unit 4.
ID5 to RGB unit 3 When ID5 = 1, 6 data bytes are allocated to the RGB unit 3, and when ID5 = 0, 0 data bytes are allocated to the RGB unit 3.
ID4-RGB unit 2 When ID4 = 1, 6 data bytes are allocated to the RGB unit 2, and when ID4 = 0, 0 data bytes are allocated to the RGB unit 2.
ID3-RGB unit 1 When ID3 = 1, 6 data bytes are allocated to the RGB unit 1, and when ID3 = 0, 0 data bytes are allocated to the RGB unit 1.
ID2-RGB unit 0 When ID2 = 1, 6 data bytes are allocated to the RGB unit 0, and when ID2 = 0, 0 data bytes are allocated to the RGB unit 0.

  It can be seen that each RGB unit 38 includes, for example, three individual LEDs 37 (FIGS. 2A, 2B). One PWM register included in the control 22 for switch elements, current sources and PWM may be, for example, 16 bits (2 bytes) wide. Each LED is controlled by a PWM register. Thus, 2 bytes multiplied by 3 LEDs per RGB unit is equal to 6 bytes. Therefore, 6 bytes are required for setting the optical information of one RGB unit. Obviously, the selected implementation makes it possible to transmit the complete light information settings for an LED unit such as that shown in FIG. 2B.

On the other hand, if ID8 = 0, some bits of the ID field can be used instead to include information about future data fields. For example, the bits of the ID field, eg, ID4, ID3, ID2, are decoded as the number of bytes in the data field following the ID field. For example, the following bits can be set.
000, and thus no bit set, indicates a data length of 0 bytes.
001, 010, 100, and thus one bit set, indicates a data length of 6 bytes.
011, 101, 110, and thus the 2-bit set, indicates a data length of 12 bytes.
111, and thus the 3-bit set indicates a data length of 18 bits.

  These settings can be made inline even with the setting selected with ID8 = 1 as described above. This advantageously simplifies the hardware for decoding the data length and provides a cost-effective and flexible implementation.

The ID field may further include a double parity check using the last two bits. For example, ID1 and ID0 can include parity information p1 and p0. The definition of the parity can be, for example, as follows.
p1: Even parity bits related to ID [15: 2] (when the number of bits on ID [15: 2] set to 1 is even, for example, p1 = 1)
p0: Even parity bits related to ID [7: 2] (when the number of bits on ID [7: 2] set to 1 is even, for example, p0 = 1)

  This implementation provides security for bits ID [15: 8], especially for the slave addresses of bits ID15-ID10, and provides particularly high security with double parity for the length information of ID7-ID2. The data length is extra protected to prevent an error code from being sent in the acknowledgment field, which could interfere with bus traffic.

  The order of the bits in the exemplary embodiment is not limiting, and other orders may apply. For example, the order of the described bits can be changed during transmission. For example, in the exemplary UART transmission of the first drawing 700 starting at bit 7 and ending at bit 0, it may also start at bit 0 and end at bit 7. Similarly, the ID field, data field, or any other fields of the present invention can include different bit orders. However, the assigned functionality of the bits does not change.

  FIG. 5 shows a flowchart of a method of a data path in the LED driving unit of FIGS. 2A, 2B and 3. Some or all of these steps may be performed in the BPPU 33. In a first step, the BPPU may detect a break field, for example, on a received signal (RX) (eg, received from the MCU through the physical layer and the UART). Thus, data frame processing starts at the start of the frame (210). Timer 55 checks, for example, whether the break field is too long or too short, and may generate a break field error in such cases. Break field errors are handled in an error routine 228. If no error is detected, a receive address RX_Address is defined and passed to the DMA_RX 50 so that data can be stored in one of the receive data storage buffers 52,53.

  As described above, a data frame can start with an ID field ID [15: 0] (drawing 730 in FIG. 7), in particular, a slave address ID [15:10]. The slave address is further processed in the ID filter (211).

The ID filter can be configured to include, for example, the effective address of the slave node via a control signal CTRL from the CPU to the BBPU, for example. Alternatively or additionally, it may be further configured to allow the LED drive unit to respond to multiple addresses. This can be done by a mask operation. In one implementation, the mask information may reside in register IDMASK [5: 0] (not shown). The valid and predefined address of the slave node may be in another register ADDRESS [5: 0] (not shown). The reception ID slave address information ID [15:10] is compared with the ADDRESS [5: 0] information by the comparator depending on the IDMASK [5: 0] information. In one embodiment, certain bits of ID [15: 0] are not compared if the corresponding bit of IDMASK [5: 0] is active high. This leads, for example, to the following example.
IDMASK [5: 0] 000000
ADDRESS [5: 0] 001001
ID [15:10] 11110

In this given example, all bits are compared and the slave node is not addressed because the received ID address does not match the predefined slave address.
IDMASK [5: 0] 000000
ADDRESS [5: 0] 001001
ID [15:10] 001001

In this given example, all bits are compared and the slave node is addressed because the received ID address matches the predetermined slave address.
IDMASK [5: 0] 000001
ADDRESS [5: 0] 001001
ID [15:10] 001000

  In this given example, bit 0 of ID [15:10] (ID10 = 0) is not compared (IDMASK has 1 in the corresponding position) and the received ID address is the remaining bit ID [15 : 11], the slave node is also addressed since it matches the predefined slave address.

  This implementation allows multiple slave nodes to be addressed simultaneously at one time. As already explained, as well as broadcasting comments, co-addressed slave nodes can take on a given lighting setting operating simultaneously at one time, for example allowing a smooth scene To In embodiments, as described above, masking does not act on addresses defined during broadcast as addresses that are valid for all slave nodes.

  Next, the validity of the ID address is checked (212). If the slave node is not addressed, the slave node can ignore the further data stream of the current data frame. The BPPU of this designated slave node may wait for the next data frame.

  On the other hand, if the slave node identifies a valid ID, bits ID9 (R, T) and ID8 (F) are decrypted (213). In this embodiment, at this point, bytes have been received that can be transferred to the receive data storage buffer via DMA_RX 50. RX_Address increases accordingly, so that the next byte can be received and stored in the receive data storage buffer. In this step, an interface signal to the UART is also generated. These interface signals may include information that the reception is correct (RX_OK) and that the next byte can be received.

  The decrypted bits R / T / F can be processed according to the method described above.

  Depending on the value of bits F and ID [7: 2], length decoding step 214 can be processed. In this step, it is known how many bytes of the data frame continue as a data field.

  Next, the parity of the ID field can be checked to detect any errors in the ID (215). As described above, the method used may be a double parity check, as previously shown, adding a higher security level, eg, ID [7: 2]. The error can be further processed in an error routine 228. In this embodiment, at this step, the second byte is received and stored in the receive data storage buffer, and RX_Address is again incremented, and a signal to the UART, eg, RX_OK, is generated accordingly.

  Depending on bit ID 9 (T, F), the receiving or transmitting step is started (216). In this state, an interrupt signal to the CPU (for example, an FR header reception IRQ) may also be generated. Depending on the state of ID9, the CPU may be triggered for sending or receiving data. Hereinafter, the data reception processing (ID9 = 0) will be described, and then the data transmission processing (ID9 = 1) will be described.

  For example, if ID9 = 0, a further step 217 for receiving data is performed, where n bytes are received depending on the available length of the data field. The length is always encoded in the ID field. It is protected by two parity bits and a CRC. After each received byte, the byte is stored in one of the receive data storage buffers, RX_Address is incremented, and a signal to the UART is generated accordingly.

  Over the entire data stream (ID and data fields), a 16-bit (2-byte) CRC is generated by the BPPU using the state-of-the-art method (218).

  Thereafter, a CRC as part of the data frame may be received (219). Since the CRC includes two bytes, after each received byte, that byte can also be stored in one of the received data storage buffers, increasing RX_Address and generating a signal to the UART.

  The exemplary embodiment presents a 2-byte ID field, a maximum 36-byte data field, and a 2-byte CRC field. Therefore, the size of the reception data storage buffer of each reception data storage buffer (52, 53) is 40 bytes. If the received CRC is not stored in the received data storage buffer, the size of the buffer may be 38 bytes. These values are not limiting and other values of the field can be used.

  Next, a CRC check is performed on the received CRC and the previously generated CRC (step 220). If the results do not match, the error can be handled by error routine 228.

  At the end of the data frame, the BPPU may generate a signal to the CPU (221). These signals include, for example, a FR Received IRQ interrupt, to notify the CPU that a data frame in one of the data storage buffers is available.

  When the complete data stream is stored in the data storage buffer, the CPU recognizes the data length, e.g., to which LED the data belongs, decodes the data into a command, e.g. Can be processed.

  The next data frame can then be processed.

  On the other hand, if ID9 = 1, the step of data transmission is triggered, and n bytes corresponding to the available length information are transmitted (222). First, TX_Address is set from the transmission data storage buffer 54 to DMA_TX 51, and indicates the start address of the data field to be transmitted. After each transmission byte, the TX_Address byte is incremented and a signal to the UART, eg, TX_OK (the transmission was correct), or TX_REQ (the transmission of the requested byte to the UART) is generated accordingly.

  The transmitted information may be checked for errors (223). For example, bytes transmitted at the physical layer for the differential bus 34 are read back and compared with the bytes stored in the transmit data storage buffer 54. In the case of a mismatch, an error can be generated using an error routine that can be further processed (228).

  A 16 bit = 2 byte CRC is generated by the BPPU using the state-of-the-art method over the entire data stream (ID field and transmitted data field) (step 224). This generated CRC (2 bytes) is transmitted (225) for further processing.

  The transmitted information is, for example, the same as before (the bytes transmitted in the physical layer 34 are read back and compared with the bytes stored in the transmission data storage buffer 54, and in the case of a mismatch, the process 228 under error routing is executed. Can be checked again for errors (226).

  At the end of the data frame, the BPPU may generate a signal to the CPU (221). These signals are, for example, FR transmission IRQ interrupts, and notify the CPU that a data frame has been transmitted. The next data frame can be processed.

  The communication flow may be further observed via the timing unit (55). For example, a time interval having a minimum and maximum length can be defined. Transmission or reception of a bit, byte or data frame must be performed within a defined time interval. If this time is shorter than expected and / or longer than expected, an error signal can be generated (eg, by the time unit 55) that can also be handled in an error routine.

  The disclosed protocol has some checking possibilities included to operate robustly in automotive harnesses. Possible generated errors may be further processed in an error handling step (228). For example, when an error occurs, an error interrupt error IRQ is generated, which can cause the CPU to suspend normal operation and react to the error.

  Errors can be collected in an error register 53 that can be updated at any time when an error occurs.

  If an error occurs in the receiving operation, the slave node may ignore the data frame and generate an error message to the MCU. In the transmission operation, the data frame may not be transmitted. A slave node may generate an error message to the MCU.

  In one embodiment, the error IRQ is processed immediately when one error occurs. In another embodiment, the error IRQ is processed after the data frame is completed or after another interrupt instruction having a higher priority has been processed.

  In order to control each cluster 38 individually, each controller 20 requires a unique address. This unique address is used to determine the physical location of each LED unit 11 in the light chain (see FIG. 1) so that the light information provided by the MCU 10 arrives at the correct LED unit located at the given physical location of the light. Must match. For example, position 1 = address “a”, position 2 = address “b”, and the like.

  By way of example, an exemplary method for setting and storing the address of each slave node is disclosed. In an exemplary embodiment of the invention, the address is provided by MCU 10 at network power up.

  This method can be applied to the system of the first aspect of the present invention, particularly to a plurality of LED driving units connected to the MCU. In particular, the LED unit states that a serial differential communication interface formed by a differential PHY (Diff PHY) 34, a UART 32 and a BPPU 33, and that a given slave node is ready to receive address information programmed from the MCU. An input pin AIN for receiving information, an output pin AOUT for providing state information (eg, that the address programming of a given slave node has been performed), and when programming has been performed, the address information and the ID flag are output. A configuration memory for storing (which may be, for example, RAM or NV memory). As shown in FIG. 1, an input pin AIN1 of a first slave is connected to an active voltage level (eg, a power supply voltage) for programming, and an output AOUT1 of the first slave is connected to an input AIN2 of a second slave. The slaves form a daisy chain such that the output AOUT2 of the second slave is connected to the input AIN3 of the third slave.

  In one embodiment (eg, FIGS. 2A and 2B), the address and ID flags may be stored locally in NV data memory 30 by each controller 20 or used in an application. Powering off does not reset the provided address.

  In another embodiment, these addresses and ID flags can be stored in a volatile manner in a data storage device 29, such as RAM, for example. In this case, it is necessary to repeat the unique address assignment after each power supply of the system.

  The address assignment method must be reversible, because during the garage operation of the vehicle these individual addresses may need to be reprogrammed.

  The communication interface is always available between the MCU unit 10 and the controller 20 of each unit 11 acting as a slave node and should not be enabled / disabled during the individual assignment process, Advantageous in relation to the functional safety of the vehicle.

  The scheme of FIG. 4 illustrates an exemplary embodiment of the automatic addressing control 36 of FIGS. 2A and 2B. The information provided on pin AIN is read by a comparator 70 having a threshold adjustable by a Schmitt trigger that can be set by CPU 28 in register 71. Next, information is further provided to the debounce unit 72 using an adjustable debounce time (which can be adjusted by the CPU 28). After the debounce time, the information arrives at the automatic addressing ready register 73, which can be read by the CPU 28. CPU 28 can then write to automatic addressing end register 74. This triggers pin driver 75 to provide a voltage level on pin AOUT. This is read by the controller 20 of the subsequent LED unit 11 as a trigger to start the same process in that subsequent unit 11.

  The pin AIN of the first LED unit 11 (and the corresponding controller 20) shown in FIG. 1 is connected to an external active voltage level. Together with the unprogrammed ID flag in the NV data memory 30, the address assignment of this first LED unit is possible.

  If individual addresses are not assigned to the LED units, the ID flags are not programmed and the pins AOUT of these LED units do not carry an active voltage level, so these units cannot be assigned addresses.

  In the embodiment of the invention shown in FIG. 6, as shown in FIG. 1, of an equal number of slave nodes connected via an automatic address connection to a single master unit, for example in a daisy chain network configuration A method 100 for providing a unique address to each slave node (LED drive unit) is shown.

  First, the network is turned on (110). Thereafter, all slave nodes check the state of their AIN and ID flags in the NV data memory (111).

  The first slave node automatically enters the addressing mode because its input AIN1 has an active voltage level (tied to VSV as shown in FIG. 1) and the ID flag is not programmed. The MCU sets the general variable or counter n = 1 and indicates the LED unit under address assignment (112).

  In one embodiment, slave node n may send a "READY FOR PROGRAMMING" message to the MCU, for example, via a bidirectional communication bus.

  The MCU sends the unique address to the slave node n (113). Slave node n enters the unique address into the program (114).

  In one embodiment, slave node n can return its programmed address to the MCU (115). The MCU can verify the address (116).

  In another embodiment, the LED unit acting as slave node n verifies the address provided by the MCU against the programmed address and, if the verification is successful, sends an acknowledgment signal to the MCU, and the MCU will do so. Check for the presence of any signals. For example, automatic addressing may be performed once and the address may be stored in a non-volatile memory (eg, an EEPROM). For the second power up, a fully automatic addressing procedure is not required, since the master can detect that the slave is correctly programmed. Another possibility is to program the slave externally before embedding it in the module. For example, assuming that slave number 2 is defective, the system can then be programmed with this in mind.

  Any timeouts or errors are checked at this point (117). If programming was not successful during verification, or if the LED unit did not return a programmed address or response signal within a given time, the programming sequence may trigger an error handling routine (125). .

  In one embodiment of error handling, programming may be repeated for LED unit n or all LED units.

  In one embodiment, the MCU sets the ID flag of slave node n to "PROGRAMMING DONE" if programming is successful (118).

  In another embodiment, if programming is successful, the LED unit n can set its ID flag to "programmed".

  When the ID flag of the LED unit n is set to “programming completed”, the CPU of the slave node n sets the end of register automatic addressing (119). As a result, the pin driver AOUT switches to the active state, and the LED unit n leaves the programming mode (120).

All LED units continuously check the status of the AIN and the ID flag in the NV data memory (121). The next LED unit detects a valid active voltage level on AIN and checks if the ID flag has been programmed.

  Next, the master control unit increases the counter n to n + 1 (122).

  The MCU checks whether the last slave is programmed (123). If this condition is reached, the automatic addressing routine ends (124). The MCU can then switch the system from automatic addressing to functional mode.

  In one embodiment, the MCU checks whether the LED unit is operating with a counter n less than or equal to the last known LED unit number (or the maximum value of the counter).

  In another embodiment, a "programming ready" message is sent by LED unit n within the time frame. If there are no messages within this time frame, automatic addressing is also interpreted as complete.

  It is an advantage of embodiments that automatic addressing can be used to assign addresses to LED units taking into account location and masking. For example, applying a mask may require that two different units be powered on simultaneously. The MCU may decide to assign appropriate addresses to some LED units so that they are affected by the masking.

  In some embodiments of the invention, the length of the network may be taken into account. In some long chains of LED units, the voltage drops on the power lines VS and GND can affect the effective power supply of the LEDs. Typically, the LED unit includes four clusters (eg, RGB units), but also includes a power consuming controller. For example, if dozens of LED units are used, for example 50 LED units, 50 controllers must also be considered. In the normal case where the controller is an IC and typically has an operating current of 10 mA per controller, 0.5 mA flows through the power and GND lines with all LEDs in the "off" state. The standard maximum of 50 mA per LED is fixed. In this example, the network has 50 LED units, with 4 LEDs per unit (and thus 200 LEDs), so a maximum current of 10 A can flow through the chain. The MCU may be adapted to reduce the effects of possible overload, so that the chain may be dimmed so as not to exceed a given current (eg, up to 1.5A). Even if the MCU sets the maximum value to 1.5 A, assuming that a current of 0.5 A + 1.5 A = 2 A exists in the power supply line and the GND line, and a reasonable value of the wire harness resistance, for example, 1 ohm, It produces a voltage drop of 2V over the entire length of the light chain. This voltage drop needs to be calibrated. For example, embodiments of the present invention may take into account the individual calibration of slave nodes depending on the physical location of a given slave node in the network. Such individual calibration may be, for example, the threshold voltage of comparator 70 or the debounce time of debounce unit 72. In addition, individual properties of the controller 20 that depend on the physical location within the light chain can be foreseen. For example, the physical layer of the differential bus 34 may have a calibrator that adjusts the characteristics of this physical layer.

  An advantage of embodiments of the present invention is that communication is always provided to all slaves, not just some of the slaves in the daisy chain, providing an advantage in simplifying communication protocols for malfunctions or disturbances to EMC. This also provides functional safety requirements.

  The MCU always has access to the ID flags and AOUT pins of all slave nodes, so the entire configuration can be re-initialized at any time.

  Since control of the automatic addressing sequence is always provided by the MCU, the process can be restarted whenever a malfunction is detected.

List of reference numbers 10 Master Control Unit (MCU)
Reference Signs List 11 LED unit, slave node 12 protection unit 13 voltage protection element 14 reverse polarity protection element 20 LED unit controller 21 switch element control 22 switch element, current source and PWM control 23 current source and PWM control 26 voltage regulator 27 microcontroller (μC )
28 Central Processing Unit (CPU)
29 Data storage device (RAM)
30 Volatile data memory, eg, EEPROM
31 Non-volatile data memory, for example, ROM, Flash
32 Universal Asynchronous Receiver Transmitter (UART)
33 Bus Protocol Processing Unit (BPPU)
34 Physical layer differential bus 35 Analog to digital converter (ADC) / diagnosis unit 36 Automatic addressing control (AA)
37 Light Emitting Diode (LED)
38 Red Green Blue LED Unit (RGB Unit)
39 Controllable current source 40 Controllable switch element 41 RC oscillator 50 Direct access memory control for reception (DMA_RX)
51 Direct access memory control for transmission (DMA_TX)
52 Reception RAM buffer 1
53 Receive RAM buffer 2
54 Transmission RAM buffer 55 Timing unit 70 Comparator with adjustable threshold 71 Register for adjustable threshold setting 72 Debouncing unit with adjustable debouncing time 73 Automatic addressing ready register 74 Automatic addressing end register 75 Pin driver AOUT

Claims (18)

A method of operating a plurality of drive units for supplying power to an electronic unit,
The method includes exchanging a data frame including a bit sequence between a master control unit and at least one of a plurality of drive units in a slave node;
The sequence is included in the data frame, and the sequence is divided in a continuous bit string field;
At least one of said fields is an ID field, at least another field is a data field,
The ID field includes a first bit subsequence, a function bit, a receive / transmit command bit, and at least a second bit subsequence;
The method comprises:
Applying an ID field to indicate an address of the at least one drive unit to exchange data between the master control unit and at least one addressed drive unit;
Applying a data field containing information and / or instructions regarding the status of the electronic unit;
Applying the ID field,
Indicating an address to the drive unit using a first bit sub-sequence including N bits, wherein the data field is applied to the addressed drive unit or the drive unit is addressed. Indicating that 2 ^N is equal to or greater than the number of drive units in the plurality of drive units to ignore the data field if not.
(A) assigning a value to allow the master control unit to identify whether a bit sequence of the data field is to be received from or transmitted to a drive unit; Using receive / transmit command bits, or (B) depending on the value assigned to the receive / transmit command bits, which information and / or instructions in the data field are requested by the master control unit Using the receive / transmit command bits to assign a value to allow each addressed drive unit to decode the
Using an additional function bit that includes information in the ID field for information contained in the data field and / or instructions ;
Depending on the value assigned to the function bit , a data bit may be assigned to a different electronic unit in a second bit sub-sequence of the ID field or may be used in the data field using the second bit sub-sequence. characterized in that it comprises a performing a length decryption step for indicating the length of the bit string, a further method.   The method of claim 1, further comprising a cyclic redundancy check to detect any unintended changes in the ID and data fields.   The master control unit sends the bit sequence to at least one of the drive units, wherein the sequence matches a predetermined bit sequence with one or more expected values stored in the master control unit. Including an acknowledgment field, including the predetermined bit sequence sent to the master control unit by a slave node immediately prior to the end of a data frame to signal the master control unit that the received data sequence is correct; The method of claim 1. The method further comprises further comprising an end of frame field, which is a stop bit for transmission to signal the end of the frame, and / or the method comprises adding a predetermined length before the ID field. The method of claim 1, further comprising applying a break field having, and / or the method further comprises storing a plurality of data frames in different data buffers.   Exchanging a predetermined one or more sequences of bits on the first bit substring of the ID field further comprises addressing all drive units simultaneously, and / or the method comprises: The method of claim 1, further comprising ignoring one or more predetermined bits of the address for at least one of the plurality of drive units to simultaneously address the plurality of drive units. The drive units each include an input connection and an output connection for receiving address information and providing status information;
The output connection of a drive unit is connected to the input connection of one different drive unit, the input connection of a first drive unit is connected to an active voltage, and the output of the last drive unit of the plurality The method wherein the connection is not connected and each drive unit further comprises a direct communication bus to the master control unit, comprising setting a maximum value of a counter n equal to the number of drive units.
Checking the state of the input connection of the drive unit corresponding to the value of the counter n, if the state is active,
Providing, by the master control unit, a unique address to the drive unit at its corresponding value of counter n, and subsequently returning the address to the master control unit by the drive unit;
Verifying the programmed address of the drive unit for the value of the counter n and, if there is an error, starting an error handling routine;
Setting a flag to signal that programming for that drive unit at that corresponding value of the counter n has been completed, and subsequently switching the output connection of the drive unit to an active state;
Increasing the value of the counter n by one;
Repeating the steps until the counter n reaches its maximum value.   7. The method of claim 6, further comprising setting an address of a first slave node to a value of one for said counter n.   The method according to claim 1, wherein the method is a method of driving a plurality of drive units for a lighting device and / or lighting application of a vehicle. A plurality of drive units each for driving at least one electronic unit, and a single unit for establishing an exchange of a data frame including a bit sequence between a master control unit and each of the plurality of drive units. A master control unit comprising a communication bus,
Each drive unit is connected in parallel to the same communication bus, the drive unit comprises a controller, the controller
At least one bus protocol processing unit for processing data exchanged through said communication bus;
At least one control unit for controlling the power supply of said electronic unit according to any data sequence transmitted by said master control unit,
The at least one bus protocol processing unit is adapted to process the sequence;
The sequence is divided into consecutive fields of bit strings, at least one of the fields is an ID field, at least another field is a data field,
The ID field is for exchanging data between said master control unit and the at least one addressed drive unit, the address of the at least one drive unit,
The data field, in including system information and / or instructions regarding the state of the electronic unit,
The ID field includes a first bit subsequence, a function bit, a receive / transmit command bit, a further function bit, and at least a second bit subsequence;
The first bit sub-sequence is a drive unit address using a first bit sub-sequence including N bits, wherein the data field is applied to the addressed drive unit, or If not addressed , include the drive unit address where 2 ^N is equal to or greater than the number of drive units in the plurality of drive units to ignore the data field ;
The receive / transmit command bits allow (A) the master control unit to identify whether a bit sequence of the data field is to be received from or transmitted to a drive unit. Or (B) which information and / or instructions in the data field are requested by the master control unit, depending on the value assigned to the receive / transmit command bits Provided to assign a value to allow each addressed drive unit to decode the
The further function bits include information contained in the data field and / or information about the instruction ;
The second bit subsequence is characterized in that, depending on the value assigned to the further function bit, a data bit is assigned to a different electronic unit or indicates the length of a bit sequence in the data field. ,system.   A timing unit for the controller to check the length of any data sequence received from the master control unit, and wherein the exchange of data is performed below a predetermined minimum time interval or over a predetermined maximum time interval Means for generating an error signal if performed.   The master control unit further includes a common voltage supply line for supplying power to at least one of the plurality of drive units, and the system further includes: The system according to claim 9, further comprising at least one protection unit between the at least one drive unit and the common voltage power supply. (1) the single communication bus of the master control unit is a differential communication bus;
(2) the system further comprises a diagnostic unit for measuring and collecting a voltage value from the controller;
(3) the system comprises a diagnostic unit for measuring and collecting a voltage value from the controller, and comprises a temperature sensor, and / or a driver as a response to any error result provided by the diagnostic unit. , Comprising a processing unit for triggering an error handling routine,
The system of claim 9, wherein the system is one of:   The system of claim 10, wherein the timing unit is or may comprise an RC oscillator.   10. The system according to claim 9, wherein the system is for lighting applications in a vehicle and / or the electronic unit is an LED. When executed on one or more processors based on a bus protocol for exchanging data frames containing bit sequences between the master control unit and at least one of the plurality of drive units in the slave node. A non-transitory computer-readable medium storing executable instructions for configuring a system to perform a method of operating a plurality of drive units to power an electronic unit, the method comprising:
The sequence is included in the data frame;
The sequence is divided into consecutive bit string fields;
At least one of said fields is an ID field, at least another field is a data field,
The method comprises:
Applying an ID field to indicate an address of the at least one drive unit to exchange data between the master control unit and at least one addressed drive unit;
Applying a data field containing information and / or instructions regarding the status of the electronic unit;
The ID field is
A first bit sub-string comprising a drive unit address having N bits , wherein the data field is applied to the addressed drive unit, or if the drive unit is unaddressed, Said first bit substring, wherein 2 ^N is equal to or greater than the number of drive units in said plurality of drive units, to ignore a data field ;
(A) receiving for assigning a value to enable the master control unit to identify whether a bit sequence of the data field is to be received from or transmitted to a drive unit. Depending on the value assigned to the / transmit command bit or (B) the receive / transmit command bit, each information address and / or instruction in the data field is requested by the master control unit. Said receive / transmit command bits for assigning a value to enable said drive unit to decode it;
Information about the information and / or instructions contained in the data field, and further function bits within the ID field,
A second bit subsequence for assigning data bits in the first bit subsequence to different electronic units, depending on the value assigned to the further function bit, or the length of the bit sequence in the data field further comprising a non-transitory computer readable medium and a second bit subsequence, the to indicate.   13. The system of claim 12, wherein the single communication bus of the master control unit is a differential communication bus.   The system according to claim 12, wherein the system further comprises a diagnostic unit for measuring and collecting voltage values from a controller.   The system may include a diagnostic unit for measuring and collecting voltage values from a controller, and may include a temperature sensor, and / or the driver may execute an error handling routine in response to an error result provided by the diagnostic unit. 13. The system according to claim 12, comprising a processing unit for triggering.

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