JP6650800B2 - Bias circuit, class AB amplifier, and bias voltage generation method - Google Patents

Description

  The present invention relates to a bias circuit, a class AB amplifier, and a bias voltage generation method, and relates to a technique for suppressing a variation in a current value of an output stage circuit of a class AB amplifier.

  Class AB amplifiers are widely used as power efficient amplifiers. However, the output stage circuit of the class AB amplifier does not generate a bias voltage with a current mirror unlike the class A amplifier, but arranges the output stage transistor of the class AB amplifier as a replica transistor in the bias circuit, and specifies the specified replica transistor. Current is supplied to generate a bias voltage. For this reason, there has been a problem that the current value of the output stage circuit of the class AB amplifier varies due to variations in process, temperature, power supply voltage, and the like.

  Therefore, a bias circuit has been proposed in which the drain voltage of the replica transistor 12 is made equal to that of the output stage transistor of the class AB amplifier (for example, Patent Document 1). In the bias circuit disclosed in Patent Document 1, by applying feedback using an amplifier element, the drain voltage of the replica transistor is made equal to the drain voltage of the output stage transistor of the class AB amplifier. Suppress variations in the current value.

US Pat. No. 6,369,653 JP-A-59-23124 JP-A-56-40524 JP-A-5-191167 JP 2010-124408 A JP-A-6-204838 JP 2007-059024 A

  However, the circuit configuration of Patent Literature 1 has a problem that the area and power consumption increase because an amplifier element is used. Another problem is that the current value of the output stage circuit of the class AB amplifier varies due to the finite gain and offset of the amplifier element.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a bias circuit that suppresses a variation in current value of an output stage circuit of a class AB amplifier, for example.

The bias circuit of the present invention includes:
A replica transistor of the output stage transistor,
A resistor connected to a drain terminal of the replica transistor,
The resistor is a resistor that generates a voltage drop that makes the drain voltage of the replica transistor equal to the drain voltage of the output stage transistor.

  According to the present invention, since the drain voltage of the replica transistor is controlled by the resistance connected to the drain terminal of the replica transistor, it is possible to suppress variations in the current value.

FIG. 3 is a block diagram illustrating generation of a bias voltage according to the first embodiment of the present invention. FIG. 9 is a block diagram illustrating bias voltage generation according to a second embodiment of the present invention.

Embodiment 1 FIG.
*** Configuration description ***
FIG. 1 is a block diagram illustrating a bias voltage generation circuit of class AB amplifier 200 according to the first embodiment.
Although the bias circuit of the output stage transistor 11 of the output stage circuit 120 of the class AB amplifier 200 will be described with reference to FIG. 1, the same applies to the output stage transistor 21.
The first embodiment is characterized in that a resistor 18 for controlling the drain voltage of the replica transistor is provided. The resistor 18 is an example of a voltage drop element that generates a voltage drop.

The class AB amplifier 200 shown in FIG. 1 includes a bias circuit 100, a load stage circuit 110, and an output stage circuit 120.
The bias circuit 100 of the class AB amplifier 200 includes a replica transistor 12 of the output stage transistor 11, a bias transistor 13, a current source 15, a current source 16, a current source 17, and a resistor 18. The current source 16 may be a diode-connected transistor. The replica transistor 12 and the bias transistor 13 are n-type MOS transistors.

  The load stage circuit 110 includes a bias transistor 14, a bias transistor 24, a current source 26, and a current source 27.

The output stage circuit 120 has an output stage transistor 11 and an output stage transistor 21. The output stage transistor 11 is an n-type MOS transistor, and the output stage transistor 21 is a p-type MOS transistor.
An output terminal OUT is provided between the output transistor 11 and the output transistor 21.

<<<< Description of bias circuit of output stage transistor 11 >>>>
The connection relation of the bias transistor 13 of the bias circuit 100 is as follows.
The drain terminal of the bias transistor 13 and the current source 16
The connection relationship between the source terminal of the bias transistor 13, the current source 17, and the gate terminal of the replica transistor 12, the gate terminal of the bias transistor 13, the current source 15, the gate terminal of the bias transistor 14, and one end of the resistor 18 It is as follows.
Drain terminal of replica transistor 12 and the other end of resistor 18 Gate terminal of replica transistor 12, current source 17 and source terminal of bias transistor 13 Source terminal of replica transistor 12 and ground

The connection relation of the bias transistor 14 of the load stage circuit 110 is as follows.
Drain terminal of bias transistor 14 and current source 26
The source terminal of the bias transistor 14, the current source 27, and the gate terminal of the output stage transistor 11. The gate terminal of the bias transistor 14, the current source 15, the gate terminal of the bias transistor 13, and one end of the resistor 18.

The connection relationship between the output stage transistors 11 of the output stage circuit 120 is as follows.
Drain terminal of output stage transistor 11, drain terminal of output stage transistor 21, and output terminal OUT
Source terminal of output stage transistor 11 and ground Gate terminal of output stage transistor 11, current source 27 and source terminal of bias transistor 14

*** Explanation of operation ***
Hereinafter, a method of generating a bias voltage will be described.
The bias voltage in the first embodiment is a voltage output from the bias circuit 100 to the load stage circuit 110.
In the bias circuit 100, a replica transistor 12 having the same characteristics (gain, threshold voltage Vth, temperature characteristics, etc.) as the output stage transistor 11 is selected and used. In this configuration, even if the gain, the threshold voltage Vth, and the like of the replica transistor 12 change due to variations in the manufacturing process, the gain, the threshold voltage Vth, and the like of the output stage transistor 11 also change due to the same characteristics. I do. This is the same for the temperature fluctuation.
Similarly, in the bias circuit 100, a bias transistor 13 having the same characteristics (gain, threshold voltage Vth, temperature characteristics, etc.) as the bias transistor 14 of the load stage circuit 110 is selected and used. In this configuration, even if the gain, the threshold voltage Vth, and the like of the bias transistor 13 change due to factors such as variations in the manufacturing process, the gain, the threshold voltage Vth, and the like of the bias transistor 14 also change due to the same characteristics. . This is the same for the temperature fluctuation.

The bias transistor 13 generates a gate voltage of the replica transistor 12 so that the same current as the current supplied from the current source 15 flows through the replica transistor 12.
As described above, the output stage transistor 11 and the replica transistor 12 have the same characteristics, and the bias transistor 13 and the bias transistor 14 have the same characteristics. Since the gate terminal of the bias transistor 13 is connected to the gate terminal of the bias transistor 14, the same current as the replica transistor 12 flows through the output stage transistor 11 by the bias transistor 14.

The drain terminal of the output stage transistor 11 is connected to the output stage transistor 21 of the output stage circuit 120, and the drain voltage of the output stage transistor 11 is determined based on system requirements.
On the other hand, the drain terminal of the replica transistor 12 is connected to the current source 15 and the gate terminal of the bias transistor 13 via the resistor 18, and the drain voltage of the replica transistor 12 is equal to the gate voltage of the bias transistor 13 and the voltage drop of the resistor 18. Determined from.

  The following equation shows the relationship between the drain current Id in the “saturation region”, the gate-source voltage Vgs generated between the gate terminal and the source terminal, and the drain-source voltage Vds generated between the drain terminal and the source terminal. Is shown. The “saturation region” refers to a region where the current value of the drain current Id does not change even when the drain-source voltage Vds of the transistor changes.

Id = (1/2) (W / L) μCox (Vgs−Vth) ² (1 + λVds)
Vth: threshold voltage Cox: gate oxide film capacity per unit area μ: electron mobility for n-type MOS, hole mobility for n-type MOS λ: channel modulation effect coefficient W / L: Coefficient determined by MOSFET structure

As shown in the above equation, even if the gate voltage Vgs connected to the gate terminal of the transistor is the same, the current flowing through the transistor is different if the drain voltage Vds is different. The current value of the stage circuit fluctuates.
The drain terminal of the output stage transistor 11 is connected to the output stage transistor 21. On the other hand, if the resistor 18 is not provided, the drain terminal of the replica transistor 12 is connected to the current source 15, and the drain voltage of the output transistor 11 and the drain voltage of the replica transistor 12 are not always the same.

Usually, the gate voltage of the bias transistor 13 is higher than the drain voltage of the output stage transistor 11. Therefore, without the resistor 18, a voltage higher than the drain voltage of the output-stage transistor 11 is applied to the drain terminal of the replica transistor 12.
Therefore, the drain voltage of the replica transistor 12 is controlled by reducing the voltage supplied by the current supplied from the current source 15 and the voltage determined by the resistance value of the resistor 18 connected to the drain terminal of the replica transistor 12.

The current value of the current source 15 is designed not to vary depending on the process, temperature, power supply voltage, and the like. By appropriately setting the resistance value of the resistor 18, the drain voltage of the replica transistor 12 is changed to the drain voltage of the output stage transistor 11. Make it equal to voltage.
At this time, as the resistor 18, a resistor 18 that moves in a direction opposite to the characteristics of the replica transistor 12 with respect to variations in process, temperature, power supply voltage, and the like is selected.

  As described above, the bias circuit 100 according to the first embodiment includes the resistor 18 at the drain terminal of the replica transistor 12, and the voltage drop due to the resistor 18 makes the drain voltage of the replica transistor 12 equal to the drain voltage of the output stage transistor 11. Control as described above.

*** Explanation of effects of Embodiment 1 ***
According to the first embodiment, the variation in the current value of the output stage circuit can be suppressed by the resistor 18.

  Further, even if the characteristics of the replica transistor 12 fluctuate due to the process, the temperature, the power supply voltage, and the like, the drain voltage of the replica transistor 12 can be made equal to the drain voltage of the output stage transistor 11.

  Further, since the drain voltage of the replica transistor is controlled by the resistance connected to the drain terminal of the replica transistor, it is not necessary to add an amplifier element, and it is possible to suppress the variation without increasing the power consumption while suppressing the area increase. .

*** Other configuration ***
If the drain voltage of the replica transistor 12 cannot be made equal to the drain voltage of the output-stage transistor 11 with a single resistor, the resistor 18 is formed by combining a plurality of resistors having different characteristics to form the drain voltage of the replica transistor 12. Is equal to the drain voltage of the output stage transistor 11. For example, the resistor 18 is configured by a combination of resistors having different temperature coefficients.

Embodiment 2 FIG.
*** Configuration description ***
FIG. 2 is a block diagram illustrating generation of a bias voltage according to the second embodiment of the present invention. Hereinafter, the bias circuit of the output stage transistor 11 of the output stage circuit 120 of the class AB amplifier 200 will be described. The same applies to the output stage transistor 21.
Mainly, differences from FIG. 1 will be described.
The bias circuit shown in FIG. 2 is characterized in that a transistor 29 is provided instead of the resistor 18.

*** Explanation of operation ***
Usually, the gate voltage of the bias transistor 13 is higher than the drain voltage of the output stage transistor 11. For this reason, the transistor 29 is connected to the drain terminal of the replica transistor 12, and the voltage is reduced by a voltage determined by the current supplied from the current source 15 and the resistance between the drain and the source of the transistor 29. Control the voltage. The transistor 29 is an example of a resistor.

  The current value of the current source 15 is designed so as not to vary depending on the process, temperature, power supply voltage, and the like. It can be made equal to the drain voltage of the output stage transistor 11. Thus, the variation in the current value of the output stage circuit 120 can be suppressed.

The voltage between the drain and the source of the transistor 29 moves in the opposite direction to the voltage between the gate and the source of the replica transistor 12 with respect to variations in process, temperature, power supply voltage, and the like. If the gate length, gate width, and gate voltage of the transistor 29 are set to move in the opposite direction to the gate-source voltage of the replica transistor 12, the characteristics of the replica transistor 12 fluctuate depending on the process, temperature, power supply voltage, and the like. Thus, the drain voltage of the replica transistor 12 can be made equal to the drain voltage of the output stage transistor 11.
As described above, the bias circuit according to the second embodiment is characterized in that the resistor is realized by the transistor 29. The drain voltage of the replica transistor 12 is controlled by controlling the gate voltage of the transistor 29.

*** Effect of Embodiment 2 ***
According to the second embodiment, the transistor 29 allows the drain voltage of the replica transistor 12 to be equal to the drain voltage of the output stage transistor 11 even if the characteristics of the replica transistor 12 fluctuate due to the process, temperature, power supply voltage, and the like. .
Also, by applying feedback using the transistor 29, it is possible to suppress variations in the current value of the output stage circuit.

*** Other configuration ***
The transistor 29 and the resistor 18 may be combined to form a resistor.

In the first and second embodiments, the class AB amplifier has been described. However, the present invention is not limited to this, and these configurations may be appropriately combined or may be used without departing from the spirit of the present invention. Can be partially modified or the configuration can be partially omitted.
For example, the present invention is not limited to the class AB amplifier and may be used for other amplifiers. The present invention is not limited to the amplifier, and may be used for generating a bias voltage of a transistor.

  11 output stage transistor, 12 replica transistor, 13 bias transistor, 14 bias transistor, 21 output stage transistor, 24 bias transistor, 29 transistor, 15 current source, 16 current source, 17 current source, 26 current source, 18 resistance, 100 bias Circuit, 110 load stage circuit, 120 output stage circuit, 200 AB class amplifier.

Claims (6)

In a bias circuit connected to a load stage circuit having a bias transistor having a source terminal connected to a gate terminal and a current source of an output stage transistor of an output stage circuit,
The source terminal connected to ground, and the replica transistor of the output stage transistor and the same characteristics of the output stage circuit,
A bias transistor having the same characteristics as the bias transistor of the load stage circuit , wherein a gate terminal is connected to a gate terminal of the bias transistor of the load stage circuit , and a source terminal is connected to a current source and a gate terminal of the replica transistor. Bias transistor,
A resistor connected to a drain terminal of the replica transistor,
The resistor generates a voltage drop that causes the drain voltage of the replica transistor to be equal to the drain voltage of the output stage transistor by dropping a voltage determined by a current supplied from a current source and a resistance value of the resistor. A bias circuit that is a resistor.   The bias circuit according to claim 1, wherein the resistor has a combination of a plurality of resistors having different characteristics.   The bias circuit according to claim 1, wherein the resistor is realized by a transistor.   4. The bias circuit according to claim 3, wherein a drain voltage of the replica transistor is controlled by a gate voltage of the transistor.   A class AB amplifier having the bias circuit according to claim 1. A bias circuit connected to a load stage circuit having a bias transistor having a source terminal connected to a gate terminal and a current source of an output stage transistor of an output stage circuit, wherein the source terminal is connected to ground, wherein the replica transistor of the output stage transistor and the same characteristics of a bias transistor of said bias transistor of the same characteristics of the load stage circuit, a gate terminal connected to the gate terminal of the bias transistor of said load stage circuit, the source In a bias voltage generating method of a bias circuit including a bias transistor having a terminal connected to a current source and a gate terminal of the replica transistor, and a resistor connected to a drain terminal of the replica transistor,
A bias voltage generating method for making a drain voltage of the replica transistor equal to a drain voltage of the output stage transistor by dropping a voltage determined by a current supplied from a current source by the resistor and a resistance value of the resistor.

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