JP6639675B2 - Image processing apparatus, image processing method, and program - Google Patents

Description

  The present invention relates to an image processing device, an image processing method, and a program.

  2. Description of the Related Art Conventionally, a technique for performing a connected component extraction (labeling) process on a binary image has been disclosed.

  Here, a technology is disclosed in which labeling processing on a block image obtained by dividing a binary image is performed in parallel based on a division and conquer method, and the labeling result is recursively integrated (see Patent Document 1).

JP 2014-203134 A

  However, in the conventional image processing apparatus (Patent Document 1), labeling of block images or waiting for completion of integration processing performed before the start of each integration processing, and updated label information performed at the completion of each integration processing However, there is a problem that the overhead caused by writing back to the memory cannot be ignored.

  The present invention has been made in view of the above problems, and eliminates the multi-step synchronization processing required for recursive integration processing, thereby reducing the overhead of memory access, computation, and synchronization processing, and reducing labeling. It is an object of the present invention to provide an image processing apparatus, an image processing method, and a program that can execute processing at high speed and with low power consumption.

  In order to achieve such an object, an image processing apparatus according to the present invention includes a dividing unit that divides a binary image into a plurality of block images of a predetermined size, and selects the block images in an arbitrary order, and selects the block image. Temporary labeling means for executing the assignment of a unique temporary label to the connected component composed of 0-pixels or 1-pixels, and the reference block image in the block image to which the temporary label has been added as a reference. Merging means for performing a process of merging the temporary label with the connected component and the connected component in an adjacent block image that is the block image adjacent to the reference block image and having the provisional label added thereto, Based on the merging process on the block image, for the connected component, a representative element having the same value as the connected component is determined. And a true labeling means for applying a label, the temporary labeling means and the merging means may be executed in parallel to the plurality of block images.

  The image processing method according to the present invention further includes a dividing step of dividing the binary image into a plurality of block images of a predetermined size, selecting the block images in an arbitrary order, and selecting 0-pixel or 1-pixel in the block image. A temporary labeling step of executing the assignment of a unique temporary label to the connected component composed of pixels; and the connected component in a reference block image that is the block image to which the temporary label has been added as a reference, and the reference block. A merge step of performing a process of merging the temporary label with the connected component in an adjacent block image which is the block image to which the temporary label has been added, and merging all the block images in the merge step Based on the processing, for the connected component, a representative element having an equivalent relationship with the connected component is referred to as a true label. Anda true labeling step of imparting Te, the process in the temporary labeling step and the merging step is characterized by being performed in parallel for a plurality of the block images.

  Also, the program according to the present invention includes a dividing step of dividing a binary image into a plurality of block images of a predetermined size, selecting the block images in an arbitrary order, and selecting 0-pixels or 1-pixels in the block images. For the configured connected components, a temporary labeling step of executing the assignment of a unique temporary label, and the connected components in the reference block image, which is the block image to which the temporary label has been applied as a reference, and the reference block image A merge step of performing a merge process of the temporary label with the connected component in the adjacent block image that is the block image to which the adjacent temporary label has been added; and performing the merge process on all the block images in the merge step. Based on the connected component, a representative element having an equivalent relation to the connected component is regarded as a true label. And true labeling step of imparting, cause the computer to execute the processing in the temporary labeling step and the merging step, characterized in that to execute in parallel to the plurality of block images.

  According to the present invention, high-speed and low-power-consumption labeling processing can be realized by implementing a parallel algorithm that eliminates overhead that may cause a practical problem.

  Further, according to the present invention, since the integration process is performed only once for each block, the synchronization process required to start the integration process is only waiting for the completion of the labeling process for each block image, Processing costs can be reduced.

  Further, according to the present invention, since recursive integration processing and multi-stage synchronization processing (queuing) required for recursive integration processing are not required, overhead of memory access, calculation, and synchronization processing is reduced. , Performance degradation can be eliminated.

FIG. 1 is a block diagram illustrating an example of a configuration of the image processing apparatus according to the present embodiment. FIG. 2 is a block diagram illustrating an example of a hardware configuration of the image processing apparatus according to the present embodiment. FIG. 3 is a flowchart illustrating an example of processing in the image processing apparatus according to the present embodiment. FIG. 4 is a diagram illustrating an example of an input image according to the present embodiment. FIG. 5 is a diagram illustrating an example of a block image according to the present embodiment. FIG. 6 is a diagram illustrating an example of temporary labeling completion standby according to the present embodiment. FIG. 7 is a diagram illustrating an example of the merge process according to the present embodiment. FIG. 8 is a diagram illustrating an example of true labeling according to the present embodiment. FIG. 9 is a diagram illustrating an example of an input image according to the present embodiment. FIG. 10 is a diagram illustrating an example of temporary labeling according to the present embodiment. FIG. 11 is a diagram illustrating an example of true labeling according to the present embodiment. FIG. 12 is a diagram illustrating an example of a label image according to the present embodiment. FIG. 13 is a diagram illustrating an example of an input image according to the present embodiment. FIG. 14 is a diagram illustrating an example of an input image according to the present embodiment. FIG. 15 is a diagram illustrating an example of a measurement result in the present embodiment. FIG. 16 is a diagram illustrating an example of a measurement result according to the present embodiment. FIG. 17 is a diagram illustrating an example of a measurement result according to the present embodiment. FIG. 18 is a diagram illustrating an example of a measurement result according to the present embodiment. FIG. 19 is a diagram illustrating an example of a measurement result according to the present embodiment. FIG. 20 is a diagram illustrating an example of a measurement result according to the present embodiment.

  Hereinafter, embodiments of an image processing apparatus, an image processing method, and a program according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited by this embodiment.

[Configuration of the present embodiment]
Hereinafter, an example of the configuration of the image processing apparatus 100 according to the embodiment of the present invention will be described with reference to FIGS. 1 and 2, and then the processing of the present embodiment will be described in detail. FIG. 1 is a block diagram illustrating an example of a configuration of an image processing apparatus 100 according to the present embodiment.

  However, the embodiment described below exemplifies the image processing apparatus 100 for embodying the technical idea of the present invention, and is not intended to specify the present invention in the image processing apparatus 100. The present invention can be equally applied to the image processing apparatus 100 of another embodiment included in the claims.

  The form of function distribution in the image processing apparatus 100 exemplified in the present embodiment is not limited to the following, and is configured to be functionally or physically distributed / integrated in arbitrary units within a range where similar effects and functions can be exhibited. can do.

  As shown in FIG. 1, the image processing apparatus 100 is schematically configured to include a control unit 102 and a storage unit 106. Each unit of the image processing apparatus 100 is communicably connected via an arbitrary communication path.

  Here, the image processing apparatus 100 may further include an input / output unit. Here, the input / output unit performs data input / output (I / O).

  The input / output unit may be, for example, an input unit such as a key input unit, a touch panel, a control pad (for example, a touch pad and a game pad), a mouse, a keyboard, and / or a microphone.

  Further, the input / output unit outputs a display unit (for example, a display, a monitor, a touch panel, or the like including a liquid crystal or an organic EL) that displays a display screen of an application or the like, and / or outputs audio information as audio. An output unit such as an audio output unit (for example, a speaker or the like) may be used.

  Further, the image processing apparatus 100 may further include an interface unit. Here, the image processing device 100 may be communicably connected to an external device (for example, an image reading device or the like) via an interface unit.

  The interface unit may be an interface (NIC or the like) connected to a communication device such as an antenna and / or a router connected to a communication line and / or a telephone line. It may be a communication interface that performs communication control between them.

  Here, the network includes remote communication such as wired communication and / or wireless communication (for example, WiFi or the like). Further, the interface unit may be an input / output interface for performing input / output control between the image reading device or the like and the control unit 102.

  Note that the control unit 102 may control the interface unit and the input / output unit.

  The storage unit 106 stores various databases, tables, and / or files. Further, the storage unit 106 may store various application programs (for example, a user application or the like).

  The storage unit 106 is a storage unit, for example, a memory such as a RAM / ROM, a fixed disk device such as a hard disk, a tangible storage device such as an SSD (Solid State Drive), a flexible disk, and / or an optical disk. Alternatively, a memory circuit can be used.

  The storage unit 106 stores a computer program or the like for giving instructions to a controller or the like and performing various processes.

  Among the components of the storage unit 106, the image data file 106a stores image data. Here, the image data may be binary image data, block image data, label image data, or the like.

  The equivalence label management table 106b stores equivalence label management data relating to equivalence relations between labels assigned to connected components composed of 0-pixels or 1-pixels in a binary image. Here, the equivalence label management table 106b may be a table for the union find algorithm.

  Here, the label may be a temporary label. Further, the size of the equivalent label management table 106b may be proportional to the upper limit of the number of temporary labels.

  In addition, the control unit 102 includes a tangible main processor 102-1 including a CPU (Central Processing Unit) that controls the image processing apparatus 100 and / or an FPGA (Field-Programmable Gate Array) and the like (FIG. 1). And a tangible accelerator 102-2 (not shown in FIG. 1) including a GPU (Graphics Processing Unit), a DSP (Digital Signal Processor), an FPGA, and / or a many-core CPU that can be executed in parallel with the main processor 102-1. ).

  The control unit 102 has an internal memory for storing a control program, a program defining various processing procedures and the like, and required data, and performs information processing for executing various processes based on these programs.

  Here, the control unit 102 roughly includes an image acquisition unit 102a, a division unit 102b, a temporary labeling unit 102c, a merge unit 102d, and a true labeling unit 102e.

  The image acquisition unit 102a acquires image data. Here, the image acquisition unit 102a may acquire binary image data of a binary image. Further, the image acquisition unit 102a may store the image data in the image data file 106a.

  The dividing unit 102b divides the binary image into a plurality of block images of a predetermined size.

  The temporary labeling unit 102c performs provision of a temporary label on a connected component including 0-pixels or 1-pixels in the binary image.

  Here, the temporary labeling unit 102c selects a block image, and assigns a unique temporary label to a connected component including 0-pixels or 1-pixels in the block image.

  Further, the temporary labeling unit 102c may select a block image in an arbitrary order, and may assign a unique temporary label to a connected component including 0-pixels or 1-pixels in the block image. Good.

  The merging unit 102d temporarily divides a connected component in a reference block image, which is a block image to which a temporary label has been added, as a reference and a connected component in an adjacent block image, which is a block image to which a temporary label has been added, adjacent to the reference block image. Perform label merging.

  Here, the merging unit 102d performs a process of merging the temporary label between the connected component in the reference block image and the connected component in the adjacent block image based on the union find algorithm based on the equivalence label stored in the equivalence label management table 106b. It may be executed by updating the management data using a compare and swap instruction.

  In addition, when the provisional labeling unit 102c completes the provision of the temporary label to the predetermined block image adjacent to the reference block image, the merging unit 102d outputs a connected component in the reference block image, a connected component in the predetermined block image, May be executed.

  Here, the adjacent block image may be a block image to which a temporary label has been added in four directions of left, upper left, upper, and upper right adjacent to the reference block image.

  Also, the merging unit 102d determines that the pixel at the upper left of the reference block image forms a connected component, the pixel at the upper left of the upper left pixel is adjacent to the pixel at the upper left of the reference block image, and May exist, merge processing of temporary labels may be performed.

  Also, the merging unit 102d determines that the pixels forming the top row of the reference block image form connected components, and are adjacent to the pixels forming the top row and adjacent to the reference block image. If there is a pixel constituting a connected component in the adjacent block image, a temporary label merging process may be executed.

  In addition, the merging unit 102d determines that the pixel at the upper right of the reference block image constitutes a connected component, the pixel at the upper right of the upper right pixel is adjacent to the pixel at the upper right of the reference block image, May exist, merge processing of temporary labels may be performed.

  In addition, the merging unit 102d determines that the pixels forming the leftmost column of the reference block image form a connected component, are adjacent to the left of the pixels forming the leftmost column, and are adjacent to the left of the reference block image. If there is a pixel constituting a connected component in the adjacent block image, a temporary label merging process may be executed.

  Here, the temporary labeling unit 102c and the merging unit 102d execute the processing on a plurality of block images in parallel. That is, the merging unit 102d may execute a process of merging temporary labels on a plurality of block images in parallel.

  The provision of the provisional label by the provisional labeling unit 102c and the process of merging the provisional label by the merging unit 102d may be performed in parallel on a plurality of block images.

  The true labeling unit 102e assigns, as a true label, a representative element having an equivalence relation to the connected component to the connected component based on the merging process performed on all the block images by the merging unit 102d.

  Here, the true labeling unit 102e performs a raster scan on the binary image on which the merging process has been performed, and performs a merging process on all the block images performed by the merging unit 102d to determine the connected component as a connected component. A representative element having an equivalence relationship may be given as a true label.

  Further, the true labeling unit 102e performs a raster scan in parallel on the plurality of block images on which the merge processing has been performed, and performs a merging process on the connected components based on the merge processing performed on all the block images by the merge unit 102d. , A representative element having the same value as the connected component may be assigned as a true label.

  Here, the plurality of block images may be arbitrarily selected block images.

  Further, an example of a hardware configuration of the image processing apparatus 100 according to the present embodiment will be described with reference to FIG. FIG. 2 is a block diagram illustrating an example of a hardware configuration of the image processing apparatus 100 according to the present embodiment.

  As shown in FIG. 2, the image processing apparatus 100 includes a main processor 102-1 that executes information processing in the image processing apparatus 100, an accelerator 102-2 that can execute information processing in parallel with the main processor 102-1, and And a memory 106 as a storage means.

[Processing of this embodiment]
An example of processing executed by the image processing apparatus 100 having the above-described configuration will be described with reference to FIGS. FIG. 3 is a flowchart illustrating an example of processing in the image processing apparatus 100 according to the present embodiment.

  As shown in FIG. 3, first, the image acquisition unit 102a acquires binary image data of a binary image to be an input image (step SA-1).

  Here, an example of an input image in the present embodiment will be described with reference to FIG. FIG. 4 is a diagram illustrating an example of an input image according to the present embodiment.

  As shown in FIG. 4, the input image (input example 1) may be a binary image in which black is represented by 0-pixels and white is represented by 1-pixels.

  Returning to FIG. 3, the dividing unit 102b divides the input image into M × N block images (step SA-2).

  Here, in the present embodiment, an equivalence label management table 106b (the size is proportional to the upper limit of the number of temporary labels) for the union-find algorithm may be prepared.

  Here, an example of a block image in the present embodiment will be described with reference to FIG. FIG. 5 is a diagram illustrating an example of a block image according to the present embodiment.

  As shown in FIG. 5, in the present embodiment, the input example 1 shown in FIG. 4 is divided into 4 × 4 blocks.

  Returning to FIG. 3, the temporary labeling unit 102c selects a block image in an arbitrary order, and assigns a unique temporary label (temporary labeling) to a connected component including one pixel in the block image. (Step SA-3).

  That is, in the present embodiment, in the local temporary labeling processing of the block image, a unique temporary label is given to the connected component in the entire parallel processing.

  Specifically, in the present embodiment, when performing local temporary labeling of a block image, a temporary number assigned to a connected component may be a unique number in the entire parallel processing.

  Here, the unique number in the entire parallel processing may be, for example, a number obtained by using an atomic addition instruction or a subtraction instruction for a shared integer resource.

  In this embodiment, when the temporary labeling of the block image is completed, the completion flag may be set to 1.

  Here, an example of temporary labeling in the present embodiment will be described with reference to FIG.

  In the temporary labeling shown in FIG. 5, labeling using ascending numbers starting from 1 may be performed on a connected component composed of one pixel in a block image selected in an arbitrary order.

  Referring back to FIG. 3, the merging unit 102d completes the temporary labeling of the block images in the four directions of left, upper left, upper, and upper right adjacent to the reference block image, which is the block image to which the temporary label has been added, by the temporary labeling unit 102c. (Step SA-4).

  Here, an example of temporary labeling completion standby according to the present embodiment will be described with reference to FIG. FIG. 6 is a diagram illustrating an example of temporary labeling completion standby according to the present embodiment.

  As shown in FIG. 6, in the present embodiment, the process waits for the completion of temporary labeling in four directions (left / upper left / upper / upper right) for performing a merge process on each block image.

  Here, "-" shown in FIG. 6 indicates a pixel constituting a connected component to which no temporary label is assigned.

  Returning to FIG. 3, the merging unit 102 d performs a merge process of the temporary label of the connected component in the reference block image and the connected components in the adjacent block images in the four directions of left, upper left, upper, and upper right with a union finding algorithm. Based on this, the equivalent label management data stored in the equivalent label management table 106b is updated by using a compare-and-swap (CAS) instruction (step SA-5).

  That is, in the present embodiment, the equivalence label management table 106b is updated in parallel using the CAS instruction.

  Here, an example of the merge processing according to the present embodiment will be described with reference to FIG. FIG. 7 is a diagram illustrating an example of the merge process according to the present embodiment.

  As shown in FIG. 7, in the third block image from the top and the third block image from the left, merge processing of the temporary labeling results is performed as shown by arrows between the block images in the surrounding four directions.

  Specifically, in the present embodiment, the upper left pixel p of the block image is 1-pixel, the upper left pixel q of the pixel p is present, and the pixel q is 1-pixel. For example, union (label (p), label (q)) may be performed.

  Further, in the present embodiment, if the pixel p included in the top row of the block image is one pixel, the pixel p belongs to the block image one level higher than the 8-neighbor pixels of the pixel p. For each pixel q, if pixel q is one pixel, union (label (p), label (q)) may be performed.

  In the present embodiment, if the pixel p at the upper right of the block image is one pixel, the pixel q at the upper right of the pixel p exists, and if the pixel q is one pixel, union (label (label ( p), label (q)) may be performed.

  In the present embodiment, as for the pixel p included in the leftmost column of the block image, if the pixel p is 1-pixel, it belongs to the block image on the left of the 8-neighbor pixels of the pixel p. For each pixel q, if pixel q is one pixel, union (label (p), label (q)) may be performed.

  Here, in the present embodiment, the update of the equivalence label management table 106b performed by union () during the merge processing may be performed atomically using a CAS instruction because of collision between block images.

  Further, in the present embodiment, when it is detected from the return value of the CAS instruction that the update has collided, the process may be restarted from obtaining the root node with find ().

  Note that arrows shown in FIG. 7 indicate target positions of union () performed in the merge processing.

  Here, as shown in FIG. 3, the processing from the provisional labeling by the temporary labeling unit 102c in step SA-3 to the temporary label merging processing by the merging unit 102d in step SA-5 is performed by the image processing apparatus 100. By providing the main processor 102-1 and the accelerator 102-2, it is executed in parallel on a plurality of block images.

  For example, in the present embodiment, when it is determined that the two temporary labels t1 and t2 have the same value, union (t1, t2) may be executed in parallel with the temporary labeling.

  Here, in the present embodiment, the update of the equivalent label management table 106b performed by union () during the temporary labeling does not collide between block images, so that exclusive control may not be performed.

  Then, the true labeling unit 102e waits for the merge process of all the block images by the merge unit 102d to be completed (step SA-6).

  Then, the true labeling unit 102e performs a raster scan in parallel on any of the plurality of block images on which the merge process has been performed, and generates a connected component based on the merge process performed on all the block images by the merge unit 102d. On the other hand, a representative element having the same value as the connected component is assigned as a true label (true labeling) (step SA-7).

  As described above, in the present embodiment, the representative element of the equivalent label set obtained by performing raster scan in parallel for each block image and finding (v) the temporary label value v assigned to each 1-pixel. It may be replaced by v '.

  Here, the true labeling unit 102e performs a raster scan on the binary image (the entire input image) on which the merging process has been performed, and performs a merging process on the connected components based on the merging process on all the block images by the merging unit 102d. Thus, a representative element having the same value as the connected component may be assigned as a true label.

  Here, an example of true labeling when raster scanning is performed on the entire input image on which the merge processing has been executed in the present embodiment will be described with reference to FIG. FIG. 8 is a diagram illustrating an example of true labeling according to the present embodiment.

  FIG. 8 shows an example of transition of an equivalent label set by executing union () in the temporary labeling process and the merge process with respect to the input example 1 shown in FIG.

  Specifically, in the case of the input example 1 shown in FIG. 4, in the final step, the tree is aggregated into a tree whose root node is 1, and find () returns 1 in all the nodes.

  In general, since the operation for obtaining the union satisfies the exchange rule and the association rule, the finally obtained label set does not change even if the order in which union () is executed changes. Here, in the tree structure shown in FIG. 8, a tree composed of only the root node is omitted.

  In FIG. 8, the nodes shown in bold letters indicate the nodes referenced or updated in each step, and the edges shown in bold letters show the edges referenced or updated in each step.

  Here, an example of implementation of union () and find () using a CAS instruction in the present embodiment will be described using pseudo code of find () and union () described below.

<Pseudo code>
def find (x)
parent = A-LOAD (x.parent)
if (parent == x) / * x is the root node? * /
return x
else
return find (parent)
def union (x, y)
do ｛
rx = find (x)
ry = find (y)
min = min (rx, ry)
max = max (rx, ry)
if (min == max)
break
old = CAS (max. parent, max, min)
$ While (old! = Max) / * Retry until successful * /

  Here, in the union-find algorithm, an update of an atomic value by a CAS instruction is indicated by CAS (pt, cmp, val), and reading of an atomic value is indicated by A-LOAD (pt).

  Here, CAS (pt, cmp, val) receives a pointer pt indicating an integer value and two integer values cmp and val, and when the value indicated by the pointer pt is old, the old and cmp match. , Set the value pointed to by the pointer pt to val, and return cmp.

  On the other hand, CAS (pt, cmp, val) returns old without changing the value indicated by the pointer pt when old and cmp do not match.

  Here, in the union-find algorithm, find () finds which set the input node belongs to, and union () is used to merge the two sets.

  Therefore, the union-find algorithm assumes a method in which a set is represented by a tree structure.

  At this time, in the union-find algorithm, it is assumed that the root node of the tree is a node representing a set, and it is assumed that in the initial state, there exists a tree consisting of only root nodes by the number of labels.

  In the union-find algorithm, it is assumed that the temporary label is not deleted from the set. (Note that this labeling process is sufficient if it is sufficient to obtain the equivalence relation between the labels. ).

  With this premise, in the union-find algorithm, it is guaranteed that the node to which the union () is updated belongs to the same set even if another union () has already become a descendant of another node.

  Here, in the above pseudo code, find () is implemented as a function that returns the root node of the tree including the input node, and the parent node of the input node is recursively referred to by A-LOAD (). .

  In the above pseudo code, union () receives two input nodes x and y, finds root nodes of x and y, respectively, and determines the parent node of the root node having the larger label number by CAS (). Updating to the root node with the smaller number.

  In the above pseudo code, if the label numbers of the root nodes x and y match, nothing is performed.

  Further, in the pseudo code, it is determined whether or not the update is successful by checking whether the return value old of CAS () matches the expected value. If the update is unsuccessful, the root node is changed. They start over from where they want.

  Referring back to FIG. 3, the image acquisition unit 102a waits until the true labeling of all connected components by the true labeling unit 102e is completed (step SA-8).

  Then, the image acquiring unit 102a acquires the label image data of the label image that is the binary image to which the true label is added, stores the label image data in the image data file 106a (Step SA-9), and ends the process.

  Here, in the present embodiment, in the case of the input example 1 shown in FIG. 4, since the find () returns 1 in all the nodes, the label image to which the true label is assigned is the same as that in FIG. .

  Here, an example of true labeling when raster scanning is performed on the entire input image on which the merge processing has been executed in the present embodiment will be described with reference to FIGS. 9 to 12. FIG. 9 is a diagram illustrating an example of an input image according to the present embodiment. FIG. 10 is a diagram illustrating an example of temporary labeling according to the present embodiment. FIG. 11 is a diagram illustrating an example of true labeling according to the present embodiment. FIG. 12 is a diagram illustrating an example of a label image according to the present embodiment.

  In the present embodiment, when the binary image (input example 2) shown in FIG. 9 is acquired as an input image, the input example 2 shown in FIG. 9 is divided into 4 × 4 blocks as shown in FIG. Temporary labeling using ascending numbers starting from 1 is performed on the connected components composed of one pixel in the block image selected in an arbitrary order.

  Then, in the present embodiment, as shown in FIG. 11, since the root nodes are aggregated into three trees of 1, 2, or 3 in the final step, as shown in FIG. A label image in which 1, 2, or 3 is assigned as a true label can be obtained.

[Example]
Here, an example of a performance comparison experiment in the present embodiment will be described with reference to FIGS. 13 and 14 are diagrams illustrating an example of an input image according to the present embodiment. 15 to 20 are diagrams illustrating an example of a measurement result according to the present embodiment.

  First, as the measurement environment in the present embodiment, the CPU as the main processor 102-1: ARM Cortex-A9 800MHz 1core, the GPU as the accelerator 102-2: ARM Mari T-624 GPU 600MHz 4cores, the memory: 2GB DDR3 1333MHz, OS: Linux (registered trademark) (Linaro 14.04 kernel v3.10.41) and GPU operating environment: OpenCL1.1 Full Profile.

  As the measurement time in the present embodiment, the time from the start of the labeling process to the completion of the storage of the true label is measured, and the time required for image input / output, memory reservation, and memory release is not included in the measurement.

  The input image in the present embodiment is an image A (http://sipi.usc.edu/database/database.php?volume=arials&image=33#top) of a size: N × Npixel shown in FIG. An image B of size: N × N pixels shown in FIG. 14 (http://sipi.usc.edu/database/database.php?volume=textures&image=40#top) is used (N = 256, 512, 1024). , 2048, or 4096).

  Further, the block size of the parallel processing in the present embodiment is set to 16 × 16 pixels. The measurement in this example was performed five times each, and the average value was obtained as the measured value.

  In the present embodiment, the labeling for each block image in the implementation example of the present application and in the implementation example of Patent Document 1 is performed by a 2-pass algorithm of Kesheng et al. An algorithm implementing SPIE medical imaging conference 2005) in the C ++ language is used.

  In the present embodiment, the parallel programming framework when the accelerator 102-2 executes the labeling process in parallel is OpenCL (http://www.kronos.org/registry/cl/specs/opencl-1.2. pdf).

  Then, when the labeling process for the image A was measured with these settings, as shown in FIG. 15, the execution time of the implementation example of Patent Document 1 was 10 times the execution time of the implementation example of the present application for all image sizes, as shown in FIG. That's all.

  Further, as shown in FIG. 16, for all image sizes of the image A, the frame rate of the implementation example of the present application was significantly higher than the frame rate of the implementation example of Patent Document 1.

  Further, as shown in FIG. 17, as for the change in the execution time with respect to the number of pixels of the image A, the difference between the implementation example of the present application and the implementation example of Patent Document 1 increases as the image size increases.

  In addition, when the labeling process for the image B was measured with these settings, as shown in FIG. 18, the execution time of the implementation example of Patent Literature 1 was 10 times the execution time of the implementation example of the present application for all image sizes. That's all.

  Further, as shown in FIG. 19, for all image sizes of the image B, the frame rate of the implementation example of the present application was significantly higher than the frame rate of the implementation example of Patent Document 1.

  Further, as shown in FIG. 20, as for the change in the execution time with respect to the number of pixels of the image B, the difference between the implementation example of the present application and the implementation example of Patent Document 1 increases as the image size increases.

  As described above, in the present embodiment, as the image size increases, the number of operations and the number of memory accesses increase in the implementation example of Patent Document 1 as compared with the implementation example of the present application, so that the performance difference is remarkable.

  In this embodiment, the performance difference between the implementation example of the present application and the implementation example of Patent Document 1 is larger in the measurement for the image A than in the image B.

  This is because the number of 1-pixels in the image A is about three times as large as that in the image B, and the labeling of the integration processing for only 1-pixel in the implementation example of Patent Document 1 is compared with the implementation example of the present application. This is because memory access by return increases.

  As described above, in the present embodiment, the parallel algorithm solving the practical problem of the invention described in Patent Literature 1 by sharing the equivalence label management table 106b indicating the equivalence relation of labels between the parallel execution units. Has been proposed.

  Thus, in the present embodiment, it is possible to maintain the equivalence relation between labels across image blocks without performing recursive integration processing and without writing back integrated label information for each image block. .

  Therefore, in the present embodiment, when a temporary label is newly assigned to a connected component in the local temporary labeling process of each block image, a unique label is assigned to the connected component in the entire parallel processing.

  Accordingly, in the present embodiment, since the temporary labels used in each block image are relatively prime, it is sufficient to perform the integration processing once (not recursively) for each block, and the integration processing is completed. Sometimes it is not necessary to write back the label information to the memory.

  In the present embodiment, the amount of memory required for the equivalent label management table 106b can be reduced in proportion to the total number of temporary labels.

  Further, in the present embodiment, when integrating the provisional labeling results of each block image in parallel, the equivalence label between the labels included in the connected components across the block boundaries is reflected in the equivalence label management table 106b. Updating of the management table 106b may conflict.

  Therefore, in the present embodiment, the parent node of the root node (representation source) of the label set may be updated using a CAS instruction.

  Accordingly, in the present embodiment, it is possible to determine whether or not the update of the equivalence label management table 106b has collided. If the update has collided, the label integration omission is performed by starting again from obtaining the root node of the label set. The degree of parallelism can be increased while preventing this.

  The connected component extraction (labeling) process is a process of giving a unique label to a connected 1-pixel (or 0-pixel) region in a binary image, and has conventionally been performed by a region segmentation (Image Segmentation) and an optical system. It is used as an important process that is the basis of a wide range of image processing such as character recognition (Optical Character Recognition).

  However, since the calculation of the labeling process takes a time proportional to the cube of the number of pixels, the load is large, and it is not realistic to execute the labeling process on the high-resolution image by the low-speed CPU of the embedded device. .

  Therefore, in the present embodiment, in order to execute the labeling process at high speed and with low power consumption inside the embedded device, the parallel processing for parallel processing executed in the embedded device equipped with the accelerator 102-2 such as a DSP is performed. Provides a labeling processing algorithm.

[Other embodiments]
Although the embodiments of the present invention have been described above, the present invention may be embodied in various different embodiments within the scope of the technical idea described in the claims other than the above-described embodiments. Things.

  For example, the image processing apparatus 100 may perform the processing in a stand-alone form, perform the processing in response to a request from a client terminal (having a separate housing from the image processing apparatus 100), and report the processing result. It may be returned to the client terminal.

  Further, among the processes described in the embodiment, all or some of the processes described as being performed automatically can be manually performed, or all of the processes described as being performed manually can be performed. Alternatively, a part thereof can be automatically performed by a known method.

  In addition, information including parameters such as processing procedures, control procedures, specific names, registration data of each processing or search conditions, screen examples, or database configurations shown in the specification and drawings, when specially described. Can be changed arbitrarily except for

  Also, regarding the image processing apparatus 100, each illustrated component is a functional concept, and does not necessarily need to be physically configured as illustrated.

  For example, with respect to the processing functions included in each device of the image processing apparatus 100, particularly, each processing function performed by the control unit 102, all or any part thereof is executed by the CPU and a program interpreted and executed by the CPU. It may be realized, or may be realized as hardware by wired logic.

  Note that the program is recorded on a non-transitory computer-readable recording medium that includes programmed instructions for causing a computer to execute the method according to the present invention, which will be described later. 100 is read mechanically. That is, a computer program for giving instructions to the CPU in cooperation with an OS (Operating System) and performing various processes is recorded in the storage unit 106 such as a ROM or an HDD. The computer program is executed by being loaded into the RAM, and forms a control unit in cooperation with the CPU.

  Further, this computer program may be stored in an application program server connected to the image processing apparatus 100 via an arbitrary network, and it is also possible to download all or part of the computer program as needed. is there.

  Further, the program according to the present invention may be stored in a computer-readable recording medium, or may be configured as a program product. Here, the “recording medium” refers to a memory card, USB memory, SD card, flexible disk, magneto-optical disk, ROM, EPROM, EEPROM, CD-ROM, MO, DVD, and Blu-ray (registered trademark). It shall include any “portable physical medium” such as Disc.

  The “program” is a data processing method described in an arbitrary language or description method, and may be in any format such as a source code or a binary code. The "program" is not necessarily limited to a single program, but may be distributed as a plurality of modules or libraries, or may achieve its function in cooperation with a separate program represented by an OS. Including things. It should be noted that a known configuration or procedure can be used as a specific configuration for reading the recording medium in each apparatus described in the embodiment, a reading procedure, an installation procedure after reading, and the like.

  Various databases and the like stored in the storage unit 106 are storage devices such as a memory device such as a RAM or a ROM, a fixed disk device such as a hard disk, a flexible disk, and / or an optical disk. Various programs, tables, databases, and / or web page files to be used may be stored.

  The image processing device 100 may be configured as an information processing device such as a known personal computer, or may be configured by connecting an arbitrary peripheral device to the information processing device. Further, the image processing apparatus 100 may be realized by implementing software (including programs, data, and the like) for realizing the method of the present invention in the information processing apparatus.

  Further, the specific form of the distribution / integration of the apparatus is not limited to the illustrated one, and all or a part of the apparatus may be functionally or physically arbitrarily determined according to various additions or the like, or according to a functional load. It can be configured to be distributed / integrated. That is, the above-described embodiments may be arbitrarily combined and implemented, or the embodiments may be selectively implemented.

  As described above, the image processing apparatus, the image processing method, and the program can be implemented in many industrial fields, particularly, in the field of image processing that handles images, and are extremely useful.

REFERENCE SIGNS LIST 100 Image processing device 102 Control unit 102a Image acquisition unit 102b Division unit 102c Temporary labeling unit 102d Merge unit 102e True labeling unit 106 Storage unit 106a Image data file 106b Equivalent label management table

Claims (13)

Dividing means for dividing the binary image into a plurality of block images of a predetermined size,
A temporary labeling unit that selects the block image in an arbitrary order, and performs assignment of a unique temporary label to a connected component composed of 0-pixels or 1-pixels in the block image;
Equivalent label management storage means for storing equivalence label management data related to the equivalence relationship between the temporary labels,
The connected components in the reference block image that is the block image that has been provisionally labeled as a reference, and the connected components in the adjacent block image that is the block image that has been provisionally labeled and adjacent to the reference block image, Merging means for executing the merge processing of the temporary label, by updating the equivalent label management data stored in the equivalent label management storage means using a compare and swap instruction, based on a union finding algorithm ,
True labeling means for giving, as a true label, a representative element having an equivalent relation to the connected component to the connected component, based on the merging process for all the block images by the merging means,
The image processing apparatus Ru comprising a. The merging means includes:
By the temporary labeling means, when the provision of the temporary label to the predetermined block image adjacent to the reference block image is completed, the connected component in the reference block image, the connected component in the predetermined block image, The image processing apparatus according to claim 1, wherein the temporary label merging process is performed. The adjacent block image is
3. The image processing device according to claim 1, wherein the block image is a block image adjacent to the reference block image to which temporary labels in four directions of left, upper left, upper, and upper right have been added. The merging means includes:
The upper left pixel of the reference block image constitutes the connected component, and the pixel constituting the connected component in the adjacent block image adjacent to the upper left of the upper left pixel and adjacent to the upper left of the reference block image exists. to case, the executing merge processing of the temporary label image processing apparatus according to any one of claims 1 to 3. The merging means includes:
The pixels constituting the uppermost row of the reference block image constitute the connected components, and the adjacent block images adjacent to the pixels constituting the uppermost row and above the reference block image when said pixels constituting the connected component is present in said executes the merge processing of the temporary label image processing apparatus according to any one of claims 1 to 3. The merging means includes:
The upper right pixel of the reference block image constitutes the connected component, and the pixel constituting the connected component in the adjacent block image adjacent to the upper right of the upper right pixel and adjacent to the upper right of the reference block image exists. to case, the executing merge processing of the temporary label image processing apparatus according to any one of claims 1 to 3. The merging means includes:
The pixels constituting the leftmost column of the reference block image constitute the connected component, and the adjacent block images adjacent to the left of the pixels constituting the leftmost column and adjacent to the left of the reference block image. when said pixels constituting the connected component is present in said executes the merge processing of the temporary label image processing apparatus according to any one of claims 1 to 3. The true labeling means,
Performing a raster scan on the binary image on which the merge processing has been executed, and based on the merge processing for all the block images by the merging unit, the connected component has an equivalence relationship with the connected component. imparting certain the representative source as the true label, image processing apparatus according to any one of claims 1 to 7. The true labeling means,
A raster scan is performed in parallel on the plurality of block images on which the merge processing has been executed, and the connected component is connected to the connected component based on the merge processing on all the block images by the merge unit. The image processing apparatus according to any one of claims 1 to 7 , wherein the representative element having the same value as a component is assigned as the true label. The plurality of block images are
The image processing device according to claim 9 , wherein the block image is an arbitrarily selected block image. Accelerators,
Further comprising, an image processing apparatus according to any one of claims 1 10. A dividing step of dividing the binary image into a plurality of block images of a predetermined size,
A temporary labeling step of selecting the block image in an arbitrary order, and performing the assignment of a unique temporary label to a connected component composed of 0-pixels or 1-pixels in the block image;
The connected components in the reference block image that is the block image that has been provisionally labeled as a reference, and the connected components in the adjacent block image that is the block image that has been provisionally labeled and adjacent to the reference block image, Based on a union finding algorithm, the temporary label merging process uses a compare-and-swap instruction to compare the equivalent label management data stored in the equivalent label management storage unit that stores equivalent label management data related to the equivalent relationship between the temporary labels. A merge step to be performed by updating
A true labeling step of assigning, as a true label, a representative element having an equivalent relationship to the connected component to the connected component, based on the merging process for all the block images in the merging step;
Including image processing methods. A dividing step of dividing the binary image into a plurality of block images of a predetermined size,
A temporary labeling step of selecting the block image in an arbitrary order, and performing the assignment of a unique temporary label to a connected component composed of 0-pixels or 1-pixels in the block image;
The connected components in the reference block image that is the block image that has been provisionally labeled as a reference, and the connected components in the adjacent block image that is the block image that has been provisionally labeled and adjacent to the reference block image, Based on a union finding algorithm, the temporary label merging process uses a compare-and-swap instruction to compare the equivalent label management data stored in the equivalent label management storage unit that stores equivalent label management data related to the equivalent relationship between the temporary labels. A merge step to be performed by updating
A true labeling step of assigning, as a true label, a representative element having an equivalent relationship to the connected component to the connected component, based on the merging process for all the block images in the merging step;
A program for causing a computer to execute.

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