JP6634940B2 - Dimmable lighting device and lighting device - Google Patents

Description

  The present invention relates to a dimming lighting device and a lighting device using the same.

  Examples of the dimming signal input to the lighting device for dimming include an AC dimming signal using a commercial power supply or the like, a PWM dimming signal using a low-voltage high-frequency PWM signal, and the like. The AC dimming signal is used for stepwise dimming lighting, and the lighting device selects all-light lighting or dimming lighting according to the presence or absence of the AC dimming signal input. For example, as disclosed in Patent Document 1, when an AC dimming signal is input, the AC dimming signal is subjected to full-wave rectification by a rectifier circuit, smoothing by a capacitor, voltage division by a resistance voltage dividing circuit, and photo The reference potential is converted by the coupler, and dimming lighting is applied according to the logic high output of the photocoupler. The PWM dimming signal is mainly used for continuous dimming lighting, and in the lighting device, the dimming rate is determined according to the on-duty of the PWM dimming signal. For example, as disclosed in Patent Document 2, an input PWM dimming signal is subjected to full-wave rectification by a rectifier circuit, reference potential conversion by a photocoupler, and integration processing by an integration circuit, and according to the integrated value. Dimming lighting is performed according to the dimming rate.

JP-A-13513595 Japanese Patent No. 5528143

  However, when a PWM dimming signal line is erroneously connected to the lighting device for an AC dimming signal as in Patent Document 1, or when the lighting device for a PWM dimming signal as in Patent Document 2 has an AC dimming signal. A problem occurs if the connection is incorrect. If the PWM dimming signal line is incorrectly connected to the lighting device for the AC dimming signal, no dimming is performed because the AC signal is not detected in the dimming circuit. Further, if the AC dimming signal is erroneously connected to the lighting device for the PWM dimming signal, the dimming is not performed because the PWM signal is not detected in the dimming circuit. Since the AC voltage is applied to the circuit, the lighting device breaks down due to overvoltage. Also, even if the lighting device is equipped with both a dimming input terminal and a dimming circuit for an AC dimming signal and a dimming input terminal and a dimming circuit for a PWM dimming signal, Misconnection is not always avoided, and the size and cost of the lighting device also increase.

  Therefore, the present invention provides a dimming lighting device that receives both an AC dimming signal and a PWM dimming signal as dimming signals from the same dimming input terminal, and enables dimming lighting according to each dimming signal, and a dimming lighting device. It is an object to provide a lighting device used.

  A dimming lighting device according to an embodiment of the present disclosure includes a power supply circuit that supplies an output current according to a dimming target value to a light source, an AC dimming signal including a commercial power supply, and a PWM dimming signal having a lower peak voltage than the AC dimming signal. And a rectifying circuit connected to the pair of dimming input terminals, and outputting a first logic when the peak voltage of the rectified output of the rectifying circuit is equal to or higher than a predetermined value. An amplitude discrimination circuit that outputs a second logic when the peak voltage of the rectified output is less than a predetermined value; and an analog conversion circuit that generates an analog value from the rectified output according to the duty ratio of the PWM dimming signal. When the first logic is outputted by the amplitude discriminating circuit, a dimming target value corresponding to a preset dimming rate for step dimming is outputted to the power supply circuit, and the second logic is outputted by the amplitude discriminating circuit. If the analog input is And a configuration dimming control circuit to output the corresponding dimming target dimming rate corresponding to the power supply circuit.

  According to the dimming lighting device of the present disclosure, the rectifier circuit dims the AC dimming signal with the relatively high peak voltage and the PWM dimming signal with the relatively low peak voltage via the pair of dimming input terminals. The signal is accepted as a signal, and the amplitude discrimination circuit can output the first logic when the AC dimming signal is input, and can output the second logic when the PWM dimming signal is input. On the other hand, when the PWM dimming signal is input, the analog conversion circuit outputs an analog value according to the duty ratio of the PWM dimming signal from the rectified output. When the first logic is output, the dimming control circuit outputs a dimming target value for step dimming to the power supply circuit regardless of the output of the analog conversion circuit, and the second logic is input. In this case, a dimming target value corresponding to the analog value is output to the power supply circuit. In this manner, a dimming lighting device that receives both an AC dimming signal and a PWM dimming signal as dimming signals from the same dimming input terminal and realizes dimming lighting according to each dimming signal is realized.

  In the first embodiment, the amplitude determining circuit generates a voltage regulator circuit that generates an output voltage having a set voltage as an upper limit from a rectified output, and executes a first logic when the output voltage of the voltage regulator circuit is the set voltage. And a selection circuit configured to output the second logic when the output voltage of the voltage regulator circuit is equal to or lower than the peak voltage of the PWM dimming signal. Thereby, the amplitude discriminating circuit is configured with a simple configuration.

  In a first embodiment, an analog conversion circuit includes a voltage regulator circuit that generates an output voltage having a set voltage as an upper limit from a rectified output, and an integration conversion that generates the analog value based on integration of an output voltage of the voltage regulator circuit. And a circuit. Thus, an analog conversion circuit is configured with a simple configuration.

  Here, it is preferable that the amplitude discrimination circuit and the analog conversion circuit share a voltage regulator circuit. This ensures a simple circuit configuration.

  In a second embodiment, an amplitude discriminating circuit includes a voltage regulator circuit that generates an output voltage having a set voltage as an upper limit from a rectified output, and a photocoupler that converts a reference potential of the voltage regulator circuit into a reference potential of a power supply circuit. And a selection circuit configured to output the first logic when the output voltage of the photocoupler is equal to or higher than the threshold, and to output the second logic when the output voltage of the photocoupler is lower than the threshold. The analog conversion circuit includes an integration circuit that generates the analog value based on the integration of the output voltage of the photocoupler. According to this configuration, the amplitude determination circuit and the analog conversion circuit can share one photocoupler, so that the circuit configuration can be further simplified.

  In the third mode, the rectifier circuit includes first and second rectifier circuits connected in parallel to a pair of dimming input terminals, and the amplitude discriminating circuit divides and smoothes the rectified output of the first rectifier circuit. The first logic is output when the output of the voltage dividing and smoothing circuit is equal to or greater than the threshold value, and the second logic is output when the output of the voltage dividing and smoothing circuit is less than the threshold value. The analog conversion circuit is configured to generate an output voltage having a set voltage as an upper limit from a rectified output of the second rectifier circuit, and an output voltage of the voltage regulator circuit. And an integral conversion circuit for generating the analog value. According to this configuration, since the amplitude discrimination circuit and the analog conversion circuit are independently designed, the degree of freedom in their design is increased.

  A lighting device according to an embodiment of the present disclosure includes any one of the dimming lighting devices described above and a light source. This realizes a lighting device that receives both an AC dimming signal and a PWM dimming signal as dimming signals from the same dimming input terminal and enables dimming lighting according to each dimming signal.

It is a figure showing the dimming lighting device and the lighting device by a 1st embodiment. FIG. 2 is a diagram illustrating the operation of the dimming circuit in FIG. 1. FIG. 2 is a diagram illustrating the operation of the dimming circuit in FIG. 1. FIG. 5 is a diagram illustrating a modification of the amplitude discrimination circuit according to the first embodiment. FIG. 5 is a diagram illustrating a modification of the amplitude discrimination circuit according to the first embodiment. FIG. 5 is a diagram illustrating a modification of the amplitude discrimination circuit according to the first embodiment. FIG. 5 is a diagram illustrating a modification of the amplitude discrimination circuit according to the first embodiment. FIG. 5 is a diagram illustrating a modification of the amplitude discrimination circuit according to the first embodiment. FIG. 6 is a diagram illustrating a modification of the analog conversion circuit according to the first embodiment. It is a figure showing a dimming circuit in a 2nd embodiment. FIG. 6 is a diagram illustrating the operation of the dimming circuit of FIG. 5. FIG. 6 is a diagram illustrating the operation of the dimming circuit of FIG. 5. It is a figure showing a dimming circuit by a 3rd embodiment. It is a figure showing a dimming lighting device and a lighting device by a modification of the present invention.

<First embodiment>
FIG. 1 shows a dimming lighting device 100 according to a first embodiment and a lighting device 150 using the same. The lighting device 150 is an LED lighting device, and includes the dimming lighting device 100 and the LED (LED unit) 50. An input power supply voltage from an AC power supply AC (for example, commercial power supply) is supplied to the dimming lighting device 100 via input terminals T1 and T2, and a DC output current generated by the dimming lighting device 100 is output terminal T3. And T4, wirings W1 and W2, and terminals T5 and T6. The LED 50 includes an array of a plurality of LED elements connected in series or in series / parallel.

A dimming signal from an external dimmer (not shown) is input to the dimming lighting device 100 via dimming input terminals T7 and T8. As the dimming signal, an AC dimming signal and a PWM signal may be input, and these signal lines may be connected to the dimming input terminals T7 and T8. The AC dimming signal is composed of a commercial power supply voltage. The absence of the AC dimming signal instructs all-light lighting, and the presence of the AC dimming signal instructs stepwise dimming lighting. The PWM dimming signal is a low-voltage high-frequency signal (in comparison with an AC dimming signal) having an amplitude of about 5 to 15 V and a frequency of about 500 Hz to 10 kHz, and instructs dimming lighting at a dimming rate based on its on-duty. Is what you do. In each embodiment, as an example, a PWM dimming signal having an amplitude of 12V _0-peak and a frequency of 1 kHz is adopted. In the PWM dimming signal, a lower dimming rate (that is, dark lighting) is instructed as the on-duty is larger, and a higher dimming rate (that is, brighter lighting) is instructed as the on-duty is smaller. Therefore, when neither the AC light control signal nor the PWM light control signal is input, all-light lighting is performed.

  The dimming lighting device 100 includes a power supply circuit 200 and a dimming circuit 300. The power supply circuit 200 includes an input circuit 210, a DC / DC converter 220, a detection circuit 230, and a control circuit 240, and the dimming circuit 300 includes a rectifying circuit 310, an amplitude determination circuit 320, an analog conversion circuit 330, and a dimming control circuit 340. .

  The input circuit 210 includes current fuses 1 and 2, a diode bridge 3, an input capacitor 4, and, if necessary, a noise filter. The AC voltage from the AC power supply AC is input to the input circuit 210, and the full-wave rectified output by the diode bridge 3 is slightly smoothed by the input capacitor 4 and input to the DC / DC converter 220.

  The DC / DC converter 220 is an insulated flyback converter in the present embodiment, and constitutes a so-called one-converter flyback circuit having a power factor improving function. The DC / DC converter 220 includes a switching element 5, a transformer 6, a current detection resistor 7, a diode 8, and an output capacitor 9. In the present embodiment, since the switching element 5 is formed of a MOSFET, the switching element 5 is hereinafter also referred to as FET5. The reference point on the primary winding side of the transformer 6 (that is, the low-potential electrode node of the input capacitor 4) is referred to as the primary ground G1, and the reference point on the secondary winding side (that is, the low potential electrode of the output capacitor 9). The electrode side node) is referred to as a secondary side ground G2.

  In the PWM control of the DC / DC converter 220, energy is accumulated in the primary winding of the transformer 6 during the ON period of the FET 5, and the energy is output from the secondary winding side of the transformer 6 via the diode 8 during the OFF period of the FET 5. The capacitor 9 is charged. The output of the DC / DC converter 220 is determined by the on-duty (ON width) of the FET 5, the turn ratio of the secondary winding to the primary winding of the transformer 6, and the like. The FET 5 is driven by a PWM gate signal output from the control IC 15. In the following description, the output current of the DC / DC converter 220 is called “output current”, and the output voltage (LED current) of the DC / DC converter 220 is called “load voltage”.

  The detection circuit 230 includes a current detection circuit including the current detection resistor 10 and a voltage detection circuit including the resistors 11, 12, and 13, and uses the secondary-side ground G2 as a reference potential. The current detection resistor 10 includes a low resistance element inserted between the secondary ground G2 and the cathode end of the LED 50, and a voltage proportional to the output current is generated in the current detection resistor 10. The voltage detecting circuit (resistors 11, 12 and 13) is composed of a voltage dividing resistor circuit connected in parallel to the output capacitor 9, and a voltage proportional to the load voltage is generated at the resistor 13.

  The control circuit 240 includes a capacitor 14, a control IC 15, operational amplifiers 16 and 17, diodes 18 and 19, voltage sources 20 and 21, resistors 22 and 23, and a photocoupler 24 (photodiode 24d and phototransistor 24t). The photodiode 24d side of the photocoupler 24 operates based on the secondary ground G2, and the phototransistor 24t operates based on the primary ground G1. It is assumed that the control power supply Vcc1 having the primary ground G1 as a reference potential and the control power supply Vcc2 having the secondary ground G2 as a reference potential are appropriately supplied to the control circuit 240 by an auxiliary power supply circuit (not shown). The auxiliary power supply circuit generates each control power supply from a voltage drop of the voltage of the input capacitor 4, a voltage drop of the voltage of the output capacitor 9, a rectified smoothed voltage of a voltage generated in an auxiliary winding (not shown) of the transformer 6, and the like.

  The control IC 15 may be a general-purpose switching control IC for driving a flyback converter, and includes at least a control power supply terminal (VCC terminal), a ground terminal (GND terminal), a gate output terminal (OUT terminal), and a current sense terminal. (ISNS terminal) and a feedback terminal (FB terminal). The VCC terminal receives power from the control power supply Vcc1. The FB terminal is connected to the collector terminal of the phototransistor 24t and the capacitor 14. The ISNS terminal is connected to a connection point between the current detection resistor 7 and the source terminal of the FET 5 and receives a voltage corresponding to the FET current generated in the current detection resistor 7. The control IC 15 PWM-drives the FET 5 with an ON width corresponding to the input to the FB terminal while optimizing the switching operation of the FET 5 by the inputs of the MUL terminal (not shown) and the ISNS terminal. Specifically, in the present embodiment, the ON width of the PWM drive increases / decreases with respect to the increase / decrease of the FB terminal voltage.

  The detected current value detected by the detection circuit 230 (current detection resistor 10) is input to the inverting input terminal (-) of the operational amplifier 16 for constant current control, and the target value of the output current is input to the non-inverting input terminal (+). The voltage corresponding to (the target current value) is input from the dimming control circuit 340. It is assumed that a feedback element (a resistor, a capacitor, or a series circuit or a parallel circuit thereof) (not shown) is connected between the inverting input terminal and the output terminal of the operational amplifier 16. The operational amplifier 16 amplifies and outputs an error between a detected current value input to the inverting input terminal and a target current value input to the non-inverting input terminal.

  The detection voltage value detected by the detection circuit 230 (resistors 11, 12, and 13) is input to the inverting input terminal (-) of the operational amplifier 17 for constant voltage control, and the load voltage of the load voltage is input to the non-inverting input terminal (+). A voltage corresponding to the target voltage value (upper limit voltage value) is input from the voltage source 20. It is assumed that a feedback element (not shown) is connected between the inverting input terminal and the output terminal of the operational amplifier 17. The operational amplifier 17 amplifies and outputs an error between the detected voltage value input to the inverting input terminal and the upper limit voltage value input to the non-inverting input terminal. The voltage source 20 may be any voltage dividing point of the control power supply Vcc2.

  The diode OR circuit including the diodes 18 and 19 turns on with respect to the lower one of the output terminal voltage of the operational amplifier 16 and the output terminal voltage of the operational amplifier 17. The common anode of the diode OR circuit is connected to the cathode side of the photodiode 24d. The anode of the photodiode 24d is connected to the voltage source 21 via the resistor 22, and the resistor 23 is connected in parallel to the photodiode 24d. The voltage source 21 may be a control power supply Vcc2 or the like. An output current corresponding to the current (light emission) flowing through the photodiode 24d flows through the phototransistor 24t. Thus, when the diode 18 is turned on and the constant current control by the operational amplifier 16 is selected, the detected current value matches the target current value, and the diode 19 is turned on and the constant voltage control by the operational amplifier 17 is selected. In this case, the detected voltage value matches the upper limit voltage value.

  For example, in the constant current control, when the detected current value is higher than the target current value, the current of the photodiode 24d and the phototransistor 24t increases due to the error amplification effect of the operational amplifier 16. As a result, the FB terminal voltage of the control IC 15 decreases, the ON width in PWM driving of the FET 5 decreases, and the output current decreases. Conversely, when the detected current value is lower than the target current value, the currents of the photodiode 24d and the phototransistor 24t decrease due to the error amplification of the operational amplifier 16. As a result, the FB terminal voltage of the control IC 15 increases, the ON width in PWM driving of the FET 5 increases, and the output current increases.

  Hereinafter, the dimming circuit 300 will be described. The rectifier circuit 310 includes a diode bridge connected to the dimming input terminals T7 and T8, and has a withstand voltage corresponding to the AC dimming signal. The rectifier circuit 310 outputs a full-wave rectified voltage of the AC dimming signal as a rectified output when the AC dimming signal is input, and outputs the PWM dimming signal when the PWM dimming signal is input. Pass the rectified output as it is. Note that the reference potential of the rectifier circuit 310 (that is, the low potential output terminal of the rectifier circuit 310) is referred to as a ground G3.

  The amplitude determination circuit 320 includes a transistor 25, a voltage regulator circuit VR including a resistor 26 and a Zener diode 27, a switch circuit S including a Zener diode 28, a smoothing circuit C including a resistor 29 and a capacitor 30, and a photocoupler 31. As an outline, when the peak voltage of the rectified output of the rectifier circuit 310 is equal to or higher than a predetermined value, the amplitude determination circuit 320 generates a logic high with the secondary ground G2 as a reference potential, and the peak voltage of the rectified output becomes the predetermined voltage. If the value is less than the value, a logic low with the secondary ground G2 as a reference potential is generated. The switch circuit S, the smoothing circuit C, and the photocoupler 31 may be collectively referred to as a selection circuit as needed.

  The voltage regulator circuit VR is composed of a series regulator, and generates, from the rectified output, an output voltage Vr whose upper limit is the Zener voltage ZV1 (set voltage) of the Zener diode 27. As the Zener voltage ZV1, a voltage that is equal to or larger than the amplitude of the PWM dimming signal (that is, the peak voltage (12V in the present embodiment)) is applied in a voltage range (for example, 30V or less) that can be handled as a small signal circuit.

  Thus, when the AC dimming signal is input, the output voltage Vr becomes the Zener voltage ZV1 during the period (substantially most of the period) in which the rectified output is equal to or higher than the Zener voltage ZV1, and the period in which the rectified output is lower than the Zener voltage ZV1. In the period near the zero cross, the rectified output becomes the output voltage Vr as it is. When a PWM dimming signal is input, a rectified output equal to the PWM dimming signal appears as the output voltage Vr as it is. Note that a three-terminal regulator, a shunt regulator, or the like may be employed as the voltage regulator circuit VR instead of the series regulator.

  The switch circuit S turns on / off according to the output voltage Vr of the voltage regulator circuit VR to generate an output voltage Vs. In the switch circuit S, the cathode of the Zener diode 28 is connected to the emitter of the transistor 25, and the anode is connected to the resistor 29. The zener voltage ZV2 of the zener diode 28 is selected to be higher than the peak voltage of the PWM dimming signal and lower than the zener voltage ZV1. Therefore, when the output voltage Vr is equal to or higher than the zener voltage ZV2, a voltage obtained by lowering the zener voltage ZV2 from the output voltage Vr is generated at the anode of the zener diode 28 as the output voltage Vs. On the other hand, when the output voltage Vr is lower than the Zener voltage ZV2, the Zener diode 28 turns off, and the output voltage Vs becomes zero.

  That is, when the AC dimming signal is input, the output voltage Vs is equal to the output voltage Vr and the zener voltage ZV2 during a period in which the output voltage Vr is equal to or higher than the zener voltage ZV2 (most of the time when the rectified output is clamped by the zener voltage ZV1). And the output voltage Vs becomes zero during a period in which the output voltage Vr is lower than the zener voltage ZV2 (a period near the zero crossing). Also, when the PWM dimming signal is input, as described above, the peak voltage of the PWM dimming signal is lower than the zener voltage ZV2, so that the zener diode 28 is turned off and the output voltage Vs becomes zero.

  For example, as one design example, the zener voltage ZV1 is 22 V and the zener voltage ZV2 is 15 V (in the present embodiment, the amplitude of the PWM dimming signal is 12 V). In this case, when the AC dimming signal is input, a voltage having a peak of 7 V (= 22 V−15 V) is generated as the output voltage Vs of the switch circuit S. When the PWM dimming signal is input, the zener diode 28 is turned off and the output voltage Vs becomes It becomes 0V.

  The smoothing circuit C has a time constant capable of smoothing a frequency component (100 Hz or 120 Hz) twice as high as the commercial power frequency, and smoothes the output voltage Vs of the switch circuit S to generate a smoothed output voltage Vc. As described above, when the AC dimming signal is input, the difference between the Zener voltage ZV1 and the Zener voltage ZV2 is input to the smoothing circuit C during most of the period, so that the smoothed output voltage Vc becomes ZV1−ZV2 during the entire period. . Further, when the PWM dimming signal is input, the output voltage Vs of the switch circuit S is not input, so that the smoothed output voltage Vc becomes zero.

Photocoupler 31 outputs the output voltage V ₃₁ and level converting the smoothed output voltage Vc of the smoothing circuit C. The resistor 32 is connected in series to the photodiode 31d of the photocoupler 31, the resistor 33 is connected in parallel, the control power supply Vcc2 is connected to the collector of the phototransistor 31t of the photocoupler 31, and the emitter and the secondary-side ground G2 are connected. A resistor 34 is connected between them. With the input current of the photo diode 31d is determined by the resistors 32 and 33, the output voltage _{V 31} of the photocoupler 31 is determined by the resistor 34. As described above, the voltage level of the smoothed output voltage Vc is converted by the photocoupler 31 with reference to the secondary-side ground G2. Therefore, the output voltage V ₃₁ of the photocoupler 31, AC dimming signal at the time of input voltages corresponding to the smoothed output voltage Vc (i.e., logic high), and zero when the PWM dimming signal input (i.e., logic low) becomes. The logic corresponding to the output voltage V ₃₁ is input to the port P1 of the dimming control circuit 340. The output logic of the photocoupler 31 and the processing logic of the dimming control circuit 340 may be inverted by changing the connection relationship between the phototransistor 31t, the resistor 34, and the port P1.

  The analog conversion circuit 330 includes the above-described voltage regulator circuit VR, the photocoupler 35, and the integration circuit RC including the resistor 39 and the capacitor 40, and shares the voltage regulator circuit VR with the amplitude determination circuit 320. As an outline, the analog conversion circuit 330 generates, from the rectified output, an analog value corresponding to the on-duty of the PWM dimming signal and having the secondary ground G2 as a reference potential. The photocoupler 35 and the integration circuit RC are collectively referred to as an integration conversion circuit as needed.

Photocoupler 35 outputs the output voltage V ₃₅ and the output voltage Vr level conversion of the voltage regulator circuit VR. The resistor 36 is connected in series to the photodiode 35d of the photocoupler 35, the resistor 37 is connected in parallel, the control power supply Vcc2 is connected to the collector of the phototransistor 35t of the photocoupler 35, and the emitter and the secondary ground G2 are connected. A resistor 38 is connected between them. With the input current of the photo diode 35d is determined by the resistor 36 and 37, the output voltage _{V 35} of the photocoupler 35 is determined by the resistor 38. Thus, the photocoupler 35 converts the voltage level of the output voltage Vr with reference to the secondary-side ground G2.

Integrating circuit RC integrates the output voltage _{V 35} of the photocoupler 35. A similar waveform of the full-wave rectified waveform of the AC dimming signal clamped by the Zener voltage ZV1 or a similar waveform of the PWM dimming signal is input to the integrating circuit RC with the secondary ground G2 as a reference potential. The integration circuit RC has a time constant capable of smoothing a frequency component (1 kHz in the present embodiment) of the PWM dimming signal. Therefore, the integrating circuit RC may not be able to smooth the frequency component (100 Hz or 120 Hz) twice the commercial power frequency unlike the smoothing circuit C. Rather, it is preferable that the time constant of the integrating circuit RC be as small as possible in order to ensure the responsiveness of the dimming operation in the power supply circuit 200 to the change operation of the PWM dimming signal. The integration output of the integration circuit RC corresponds to the above analog value, and this analog value is input to the port P2 of the dimming control circuit 340. The output logic of the photocoupler 35 and the processing logic in the dimming control circuit 340 may be inverted by changing the connection relationship between the phototransistor 35t, the resistor 38, and the port P2.

  The dimming control circuit 340 includes, for example, a microcomputer and its peripheral circuits, and operates on the basis of the secondary-side ground G2 while being supplied with power from the control power supply Vcc2. When a logical high is input to the port P1, the dimming control circuit 340 sets the dimming rate (for example, 50%, 75%, etc.) for the preset dimming regardless of the input to the port P2. Is output from the port P3 to the control circuit 240 (the operational amplifier 16). On the other hand, when a logic low is input to the port P1, the dimming control circuit 340 sets the dimming target value corresponding to the dimming rate corresponding to the analog value input to the port P2 from the port P3 to the control circuit 240. (The operational amplifier 16). That is, when an AC dimming signal is input, a logical high is input to the port P1, and a dimming target value for stepwise dimming lighting is output from the port P3. On the other hand, when a PWM dimming signal is input, a logic low is input to the port P1, and a dimming target value corresponding to the analog value input to the port P2 is output from the port P3.

  It is assumed that the relationship between the analog value and the dimming rate is stored in a memory (not shown) of the dimming control circuit 340 in advance. Specifically, small / large on-duty of the PWM dimming signal, low / high analog value, and high (bright) / low (dark) dimming rate correspond to each. The CPU (not shown) of the dimming control circuit 340 refers to the memory according to the input analog value or the digital value converted from the analog value via the A / D converter (not shown). To generate and output a dimming target value.

  2A and 2B show an operation of the dimming circuit 300 according to the present embodiment. FIG. 2A shows the waveform of each part when an AC dimming signal is input, and FIG. 2B shows the waveform of each part when a PWM dimming signal is input. In each figure, from the upper stage, (a) the dimming signal, (b) the output voltage Vr of the voltage regulator circuit VR, (c) the output voltage Vs of the switch circuit S (Zener diode 28), and (d) the smoothing circuit C The output voltage Vc, (e) the input voltage of the port P1, and (f) the input voltage of the port P2, the horizontal axis is time. The figures are not to scale with respect to voltage and time.

  As shown in FIG. 2A, when the AC dimming signal shown in the waveform (a) is input, the full-wave rectified output of the AC voltage is clamped by the voltage regulator circuit VR as shown in the waveform (b). As shown in the waveform (c), the output voltage Vs is the difference between the output voltage Vr shown in the waveform (b) and the Zener voltage ZV2. As shown in the waveform (d), the smoothed output voltage Vc is a smoothed voltage of the output voltage Vs. Then, as shown in the waveform (e), the level of the smoothed output voltage Vc is converted by the photocoupler 31, and a logical high is input to the port P1. Thereby, the dimming control circuit 340 generates a dimming target value for step dimming. Since the integration circuit RC has a time constant for high-frequency integration, the low-frequency waveform of the output voltage Vr shown in the waveform (b) directly appears at the port P2 as shown in the waveform (f). Therefore, although a high voltage appears at the port P2, since the logic input to the port P1 is high, the voltage at the port P2 does not affect the dimming rate determination in the dimming control circuit 340.

  As shown in FIG. 2B, when the PWM dimming signal shown in the waveform (a) is input, as shown in the waveform (b), the amplitude of the PWM dimming signal is less than the Zener voltage ZV1, so that the PWM dimming is performed. The signal waveform becomes the output voltage Vr as it is. As described above, since the Zener diode 28 does not turn on and the output voltage Vs becomes zero, no voltage is generated after the switch circuit S as shown in waveforms (c) and (d). Therefore, as shown in the waveform (e), a logic low is input to the port P1. As shown in the waveform (f), an analog value obtained as a result of level conversion and integration of the PWM dimming signal shown in the waveform (b) is input to the port P2. Thereby, the dimming control circuit 340 generates a dimming target value corresponding to the dimming rate according to the analog value.

  Various modifications of the dimming circuit 300 are possible. In FIG. 1, in the amplitude discrimination circuit 320, a selection circuit is connected from the voltage regulator circuit VR to the dimming control circuit 340 in the order of the Zener diode 28 (switch circuit S), the smoothing circuit C, and the photocoupler 31. The configuration is shown. This connection configuration (and the configuration shown in FIG. 3A to be described later) is advantageous in terms of cost in that components having relatively low withstand voltage can be used for the smoothing circuit C and the photocoupler 31 due to a voltage drop in the Zener diode 28. . However, the connection order of the selection circuit is not limited to this.

  For example, as shown in FIG. 3A, the selection circuit may be configured in the order of the switch circuit S, the photocoupler 31, and the smoothing circuit C. Further, as shown in FIG. 3B, the selection circuit may be configured in the order of the smoothing circuit C, the switch circuit S, and the photocoupler 31, or as shown in FIG. 3C, the smoothing circuit C, the photocoupler 31, and the switch. The circuits S may be configured in this order. Further, as shown in FIG. 3D, the selection circuit may be configured in the order of the photocoupler 31, the switch circuit S, and the smoothing circuit C, or as shown in FIG. 3E, the photocoupler 31, the smoothing circuit C, and the switch. The circuits S may be configured in this order.

Here, as shown in FIG. 3E, instead of the Zener diode 28, the switch circuit S operates with the secondary ground G2 as the reference potential by receiving the control power supply Vcc2, and operates as the comparison threshold V _cmp (the same as the Zener voltage ZV2). May be employed. The same applies to FIGS. 3C and 3D. Hereinafter, the comparison threshold V _cmp and the zener voltage ZV2 are collectively referred to as a threshold Vth. In particular, as shown in FIG. 3E, when the switch circuit S is arranged at the last stage, it is possible to make the logic high at the port P1 coincide with the voltage of the control power supply Vcc2 by using the switch circuit S as a comparator. Therefore, signal processing in the dimming control circuit 340 becomes easy.

  That is, to summarize the above, the amplitude discrimination circuit 320 generates a voltage regulator circuit VR that generates an output voltage Vr whose upper limit is the set voltage (Zener voltage ZV1) from the rectified output, and a case where the output voltage Vr is the set voltage. Outputs a logic high signal, and outputs a logic low signal when the output voltage Vr is equal to or lower than the peak voltage of the PWM dimming signal. The selection circuit (the switch circuit S, the smoothing circuit C, and the photocoupler 31) outputs the logic low signal. You only need to have it. Thus, the amplitude determination circuit 320 is formed with a simple configuration.

  In addition, as shown in FIG. 4, the integration conversion circuit (photocoupler 35 and integration circuit RC) of the analog conversion circuit 330 converts the integration circuit RC and the photocoupler 35 from the voltage regulator circuit VR to the dimming control circuit 340. They may be configured in order. That is, the analog conversion circuit 330 generates, from the rectified output, an output voltage Vr whose upper limit is the set voltage (Zener voltage ZV1), and an integral conversion that generates an analog value based on the integration of the output voltage Vr. What is necessary is just to have a circuit (photocoupler 35, integration circuit RC). Thus, the analog conversion circuit 330 is formed with a simple configuration.

  As described above, the dimming lighting device 100 according to the present embodiment includes the power supply circuit 200 that supplies an output current according to the dimming target value to the LED 5 and the dimming circuit 300 that outputs the dimming target value to the power supply circuit 200. Is provided. The dimming circuit 300 includes a pair of dimming input terminals T7 and T8 capable of receiving an AC dimming signal and a PWM dimming signal, a rectifying circuit 310 connected to the pair of dimming input terminals T7 and T8, and a rectifying output. And a PWM dimming circuit that outputs a logical high when the peak voltage of the rectified output is equal to or higher than a predetermined value, and outputs a logical low when the peak voltage of the rectified output is lower than the predetermined value. An analog conversion circuit 330 that outputs an analog value according to the duty ratio of the signal; and a dimming target corresponding to a preset dimming rate for step dimming when a logic high is output by the amplitude determination circuit 320. Output a value to the power supply circuit 200, and output a dimming target value corresponding to a dimming rate corresponding to the analog value to the power supply circuit 200 when a logic low is input by the amplitude determination circuit 320. Comprising a light control circuit 340.

  Accordingly, the input terminals T7 and T8 and the rectifier circuit 310 receive the AC dimming signal having a relatively high peak voltage and the PWM dimming signal having a relatively low peak voltage as the dimming signal, and the amplitude discrimination circuit 320 When an AC dimming signal is input, a logical high can be output, and when a PWM dimming signal is input, a logical low can be output. On the other hand, when the PWM dimming signal is input, the analog conversion circuit 330 outputs an analog value according to the duty ratio of the PWM dimming signal from the rectified output. Then, when a logical high is output, the dimming control circuit 340 outputs the dimming target value for step dimming to the power supply circuit 200 regardless of the output of the analog conversion circuit 330, and a logical low is input. In this case, a dimming target value corresponding to the analog value is output to the power supply circuit 200. As described above, the dimming lighting device 100 that receives both the AC dimming signal and the PWM dimming signal from the same input terminals T7 and T8 as the dimming signal and enables the dimming lighting according to the respective dimming signals, and the The lighting device 150 used is realized.

<Second embodiment>
In the above-described first embodiment, the configuration in which the amplitude discrimination circuit 320 and the analog conversion circuit 330 have the respective photocouplers 31 and 35 has been described. In the present embodiment, however, the amplitude discrimination circuit 320 and the analog conversion circuit 330 include one photocoupler. The structure which shares a coupler is shown. In the present embodiment, the same reference numerals are given to the same or corresponding components as in the first embodiment, and the overlapping description will be omitted.

  FIG. 5 shows a dimming circuit 300 according to the present embodiment. The amplitude determination circuit 320 has a voltage regulator circuit VR, a photocoupler 41, a smoothing circuit C, and a switch circuit S. The analog conversion circuit 330 has a voltage regulator circuit VR, a photocoupler 41, and an integration circuit RC. That is, the amplitude determination circuit 320 and the analog conversion circuit 330 share the voltage regulator circuit VR and the photocoupler 41.

Photocoupler 41 outputs the output voltage V ₄₁ and the output voltage Vr level conversion of the voltage regulator circuit VR. A resistor 42 is connected in series to a photodiode 41d of the photocoupler 41, a resistor 43 is connected in parallel, a control power supply Vcc2 is connected to a collector of a phototransistor 41t of the photocoupler 41, and an emitter and a secondary ground G2 are connected. A resistor 44 is connected between them. With the input current of the photo diode 41d is determined by the resistors 42 and 43, the output voltage _{V 41} of the photocoupler 41 is determined by the resistor 44. Thus, the photocoupler 41 converts the voltage level of the voltage regulator circuit VR with reference to the secondary side ground G2.

  The switch circuit S may be a Zener diode or a comparator. Further, as shown in FIG. 3E in the first embodiment, the switch circuit S may be arranged at the subsequent stage of the smoothing circuit C. The integrating circuit RC operates in the same manner as in the first embodiment.

6A and 6B show the operation of the dimming circuit 300 in the present embodiment. FIG. 6A shows the waveform of each part when an AC dimming signal is input, and FIG. 6B shows the waveform of each part when a PWM dimming signal is input. In each figure, from the upper stage, (a) a dimming signal, (b) an output voltage Vr of a voltage regulator circuit VR, (c) an output voltage V _{41 of} a photocoupler ₄₁ , (d) a smoothed output voltage Vc of a smoothing circuit C, (E) shows the input voltage of the port P1 and (f) shows the input voltage of the port P2. The figures are not to scale with respect to voltage and time.

As shown in FIG. 6A, when the AC dimming signal shown in the waveform (a) is input, the full-wave rectified output of the AC voltage is clamped by the voltage regulator circuit VR as shown in the waveform (b). As shown in waveform (b) and waveform (c), the output voltage _{V 41} and the output voltage Vr is similar in shape. Waveform (d), the smoothed output voltage Vc is higher than the threshold Vth (so Zener voltage VZ1, and the Zener voltage ZV2 or comparison threshold _{V cmp} is set). Therefore, by the operation of the switch circuit S, a logical high is input to the port P1 as shown in the waveform (e), and the dimming control circuit 340 generates a dimming target value for the step dimming. Since the integration circuit RC has a time constant for high frequency integration, a low frequency waveform of the output voltage Vr shown in the waveform (c) appears at the port P2 as shown in the waveform (f). Therefore, although a high voltage appears at the port P2, since the logic input to the port P1 is high, the voltage at the port P2 does not affect the dimming rate determination in the dimming control circuit 340.

As shown in FIG. 6B, when the PWM dimming signal shown in the waveform (a) is input, the amplitude of the PWM dimming signal is less than the zener voltage ZV1, so that the PWM dimming is made as shown in the waveform (b). The signal waveform becomes the output voltage Vr as it is. As shown in waveform (b) and waveform (c), the output voltage Vr and the output voltage V ₄₁ becomes similar shape, as shown in the waveform (d), the smooth output voltage Vc is lower than the threshold Vth (so The Zener voltage ZV2 or the comparison threshold V _cmp is set). Therefore, a logic low is input to the port P1 by the operation of the switch circuit S, as shown in the waveform (e). As shown in the waveform (f), an analog value obtained by level-converting and integrating the PWM dimming signal is input to the port P2. Thereby, the dimming control circuit 340 generates a dimming target value corresponding to the dimming rate according to the analog value.

As described above, in the present embodiment, the amplitude discriminating circuit 320 uses the rectified output to generate the output voltage Vr whose upper limit is the set voltage and the reference voltage on the voltage regulator circuit VR side to the secondary voltage. photocoupler 41 for converting the side ground G2, in case the output voltage V ₄₁ of the photocoupler 41 is greater than or equal to the threshold Vth and outputs a logic high, when the output voltage V ₄₁ of the photocoupler 41 is less than the threshold value Vth Includes a selection circuit (switch circuit S, smoothing circuit C) configured to output a logic low. Analog conversion circuit 330 is provided with the voltage regulator circuit VR, and the photocoupler 41, an integrating circuit RC which generates an analog value from the output voltage _{V 41} of the photocoupler 41. Thus, the amplitude discrimination circuit 320 and the analog conversion circuit 330 can share one photocoupler 41, and the circuit configuration can be further simplified.

<Third embodiment>
In the first and second embodiments, the configuration in which the amplitude determination circuit 320 and the analog conversion circuit 330 are connected to one rectifier circuit 310 has been described. In the present embodiment, however, the amplitude determination circuit 320 and the analog conversion circuit 330 Shows a configuration connected to individual rectifier circuits. In the present embodiment, the same reference numerals are given to the same or corresponding components as those in the first or second embodiment, and the overlapping description will be omitted.

  FIG. 7 shows a dimming circuit 300 of the present embodiment. The light control circuit 300 includes rectifier circuits (diode bridges) 311 and 312 connected in parallel to the light control input terminals T7 and T8. The amplitude discrimination circuit 320 is connected to the rectifier circuit 311, and the analog conversion circuit 330 is connected to the rectifier circuit 312. The analog conversion circuit 330 has the same configuration as that of the above-described first embodiment.

  The amplitude discriminating circuit 320 includes a voltage dividing / smoothing circuit D including a resistor 45, a resistor 46, and a capacitor 47, a switch circuit S including a Zener diode 48, and the photocoupler 31. The time constant of the voltage dividing / smoothing circuit D may be the same as the time constant of the above-described smoothing circuit C. The voltage dividing / smoothing circuit D, for example, divides the input voltage to about 1/20, smoothes the divided voltage, and outputs a smoothed output voltage Vd. Thus, when an AC dimming signal of AV100V or AC200V is input, the smoothed output voltage Vd becomes about 7V (= 141V / 20) or about 14V (= 282V / 20), and the PWM dimming signal is input. In this case, the maximum voltage is 0.6 V (= 12 V / 20).

The difference in the smoothed output voltage Vd is selected by the switch circuit S (Zener diode 48). Therefore, the Zener voltage ZV3 of the Zener diode 48 that becomes the threshold value Vth may be several volts. Thus, in the case of AC dimming signal is a logic high corresponding to the difference between the smoothed output voltage Vd and the Zener voltage ZV3 is outputted as the output voltage V ₃₁ of the photocoupler 31, when the PWM dimming signal, Zener a logic low corresponding to the oFF state of the diode 48 is output as the output voltage V _31, the output voltage V ₃₁ is input to the port P1. The dimming control circuit 340 compares the smoothed output voltage Vd (for example, 7 V or 14 V) when the AC dimming signal is input and the smoothed output voltage Vd (for example, a voltage of 0.6 V or less) when the PWM dimming signal is input. If it can be distinguished between a logic high and a logic low, the switch circuit S is unnecessary. Further, also in the present embodiment, the switch circuit S may be connected to the subsequent stage of the photocoupler 31.

  Thus, as in the first and second embodiments, when an AC dimming signal is input, a logic high is input to the port P1, and the dimming control circuit 340 performs step dimming regardless of the input of the port P2. Generate a corresponding dimming target value. On the other hand, when a PWM dimming signal is input, a logic low is input to the port P1, and the dimming control circuit 340 generates a dimming target value corresponding to the dimming rate according to the analog value input to the port P2.

  As described above, in the present embodiment, the rectifier circuit includes the rectifier circuits 311 and 312 connected in parallel to the dimming input terminals T7 and T8, and the amplitude discrimination circuit 320 divides and smoothes the rectified output of the rectifier circuit 311. And outputs a logic high when the smoothed output voltage Vd of the voltage division smoothing circuit D is equal to or higher than the threshold value Vth, and outputs a logic low when the smoothed output voltage Vd is less than the threshold value Vth. (A photocoupler 31 and, if necessary, a switch circuit S), the analog conversion circuit 330 outputs an output from the rectified output of the rectifier circuit 312 up to a set voltage (zener voltage ZV1). A voltage regulator circuit VR for generating the voltage Vr and an integration conversion circuit (photocoupler 35, integration circuit RC) for generating an analog value based on the integration of the output voltage Vr are provided. That. As described above, one additional rectifier circuit is required as compared with the configurations of the first and second embodiments. However, since the amplitude discrimination circuit 320 and the analog conversion circuit 330 are independently designed, each circuit has Design flexibility increases.

<Modification>
The preferred embodiments of the present invention have been described above. However, the present invention can be modified into various modes as described below, for example.

(1) Modifications Regarding Control Circuit 240 In the above embodiments, the configuration in which the output current or the load voltage is feedback-controlled by the control circuit 240 has been described. However, a configuration in which the output current is feed-forward controlled is also possible. For example, as shown in FIG. 8, a configuration may be adopted in which the dimming target value from the dimming control circuit 340 is directly input to the control IC 15, and the control IC 15 performs feedforward control on the PWM driving of the FET5. In this case, the phototransistors 31t, 35t and 41t, and the dimming control circuit 340 operate with the primary ground G1 as the reference potential, receiving the power supply from the control power supply Vcc1.

(2) Modifications Regarding Light Source In the above embodiment, the dimming lighting device 100 using the LED 5 as a light source is shown. However, the configuration of the present invention provides a light source such as a discharge lamp by appropriately configuring the power supply circuit 200. The present invention can also be applied to a dimming lighting device and a lighting device for dimming and lighting.

31, 35, 41 Photocoupler 50 LED (light source)
REFERENCE SIGNS LIST 100 dimming lighting device 150 lighting device 200 power supply circuit 300 dimming circuit 310, 311, 312 rectifying circuit 320 amplitude discriminating circuit 330 analog converting circuit 340 dimming control circuit C smoothing circuit D voltage dividing smoothing circuit RC integrating circuit S switch circuit T7 , T8 Dimming input terminal VR Voltage regulator circuit

Claims (7)

A dimmable lighting device,
A power supply circuit for supplying an output current corresponding to the dimming target value to the light source;
A pair of dimming input terminals capable of receiving an AC dimming signal composed of a commercial power supply and a PWM dimming signal having a lower peak voltage than the AC dimming signal;
A rectifier circuit connected to the pair of dimming input terminals,
An amplitude for outputting a first logic when the peak voltage of the rectified output of the rectifier circuit is equal to or higher than a predetermined value, and for outputting a second logic when the peak voltage of the rectified output is lower than the predetermined value. A determination circuit;
An analog conversion circuit that generates an analog value according to a duty ratio of the PWM dimming signal from the rectified output;
When the first logic is output by the amplitude discriminating circuit, the dimming target value corresponding to a preset dimming rate for step dimming is output to the power supply circuit, and the amplitude discriminating circuit outputs A dimming control circuit configured to output the dimming target value corresponding to a dimming rate corresponding to the analog value to the power supply circuit when the second logic is input. Lighting device. The dimming lighting device according to claim 1,
The amplitude discrimination circuit,
From the rectified output, a voltage regulator circuit that generates an output voltage having a set voltage as an upper limit,
The first logic is output when the output voltage of the voltage regulator circuit is the set voltage, and the second logic is output when the output voltage of the voltage regulator circuit is equal to or less than the peak voltage of the PWM dimming signal. Dimming lighting device comprising a selection circuit configured to output the logic of The dimming lighting device according to claim 1,
The analog conversion circuit,
From the rectified output, a voltage regulator circuit that generates an output voltage having a set voltage as an upper limit,
A dimming lighting device comprising: an integration conversion circuit that generates the analog value based on integration of an output voltage of the voltage regulator circuit. The dimming lighting device according to claim 1,
The amplitude discrimination circuit,
From the rectified output, a voltage regulator circuit that generates an output voltage having a set voltage as an upper limit,
The first logic is output when the output voltage of the voltage regulator circuit is the set voltage, and the second logic is output when the output voltage of the voltage regulator circuit is equal to or less than the peak voltage of the PWM dimming signal. A sorting circuit configured to output the logic of
The analog conversion circuit,
A dimming lighting device comprising an integration conversion circuit that generates the analog value based on integration of an output voltage of the voltage regulator circuit. The dimming lighting device according to claim 1,
The amplitude discrimination circuit,
From the rectified output, a voltage regulator circuit that generates an output voltage having a set voltage as an upper limit,
A photocoupler that converts a reference potential on the voltage regulator circuit side to a reference potential on the power supply circuit side,
It is configured to output the first logic when the output voltage of the photocoupler is equal to or higher than a threshold, and to output the second logic when the output voltage of the photocoupler is lower than the threshold. With a sorting circuit,
The analog conversion circuit,
A dimming lighting device comprising an integration circuit for generating the analog value based on integration of an output voltage of the photocoupler. 2. The dimming lighting device according to claim 1, wherein the rectifying circuit includes first and second rectifying circuits connected in parallel to the pair of dimming input terminals, 3.
The amplitude discrimination circuit,
A voltage dividing and smoothing circuit for dividing and smoothing a rectified output of the first rectifying circuit;
The first logic is output when the output of the voltage dividing and smoothing circuit is equal to or greater than a threshold, and the second logic is output when the output of the voltage dividing and smoothing circuit is less than the threshold. With a configured sorting circuit,
The analog conversion circuit,
A voltage regulator circuit that generates an output voltage having a set voltage as an upper limit from a rectified output of the second rectifier circuit;
A dimming lighting device comprising: an integration conversion circuit that generates the analog value from an output voltage of the voltage regulator circuit. A lighting device comprising: the dimming lighting device according to claim 1; and the light source.

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