JP6589275B2 - Signal processing apparatus and method, and imaging apparatus - Google Patents

Description

  The present invention relates to a signal processing apparatus and method, and an imaging apparatus including the signal processing apparatus.

  In an image pickup device circuit represented by a CMOS image sensor, as a signal processing means for A / D converting a current signal from the image pickup device, a pixel signal is converted into a voltage by using a current-voltage conversion circuit. An apparatus for inputting to a D converter is already known.

  For example, Patent Document 1 discloses a configuration of a light detection device for the purpose of providing a light detection device having a large dynamic range of light detection, excellent light detection accuracy, and a small circuit scale. This photodetection device compares the magnitude of the output voltage value from the integration circuit and the reference voltage value with an integration circuit that converts a current signal that changes according to the amount of received light into a voltage signal, and the output voltage value is greater than or equal to the reference voltage value If so, a comparison circuit that outputs a saturation signal indicating the fact is provided. The photodetection device counts the reset circuit that resets the integration circuit based on the saturation signal output from the comparison circuit, and the event that the value of the integration signal is equal to or higher than the reference voltage value based on the saturation signal, A counting circuit that outputs the count value as a first digital signal. The photodetection device performs A / D conversion on the output voltage value of the integration circuit, and uses the result as a second digital signal, and uses the first and second digital signals as output signals of the photodetection device. . Therefore, a configuration is disclosed in which the dynamic range of light detection (the number of bits of the output digital signal) can be increased, the light detection accuracy is excellent, and a weak light amount can be detected.

  In Patent Document 1, a reset circuit having a reset capacitance element is required as reset means for the integration circuit, and the problem of suppressing an increase in area cannot be solved.

  An object of the present invention is to provide a signal processing device that converts an imaging current signal from an image sensor into a voltage and has high current-voltage conversion accuracy while suppressing an increase in circuit area.

A signal processing circuit according to the present invention includes:
Current-voltage conversion means for converting a pixel signal from the imaging unit into a voltage;
Voltage detection means for detecting that the output voltage from the current-voltage conversion means has reached a first reference voltage;
Counting means for counting the number of detections of the voltage detection means;
And a control means for controlling to input a constant current to the current-voltage conversion means based on the detection result of the voltage detection means.

  According to the signal processing circuit of the present invention, it is possible to provide a signal processing device with high current-voltage conversion accuracy while suppressing an increase in circuit area.

FIG. 11 is a block diagram illustrating a circuit configuration example of a general imaging device. It is a circuit diagram which shows the circuit example of the current-voltage conversion part 2 of FIG. 3 is a graph showing an output voltage Vout over time showing a first operation of the current-voltage converter 2 of FIG. 2. 3 is a graph showing an output voltage Vout over time showing a second operation of the current-voltage converter 2 of FIG. 2. 1 is a block diagram illustrating a configuration of an imaging apparatus including a signal processing circuit 10 and an imaging unit 1 according to Embodiment 1 of the present invention. 5 is a timing chart of each signal showing the operation of the signal processing circuit 10 and the like of FIG. 4. 5 is a timing chart showing each voltage of the signal processing circuit 10 of FIG. 4. It is a block diagram which shows the structure of 10 A of signal processing circuits which concern on Embodiment 2 of this invention. It is a block diagram which shows the structure of the image sensor provided with several signal processing circuit 10A of FIG. It is a block diagram which shows the structure of signal processing circuit 10B which concerns on Embodiment 3 of this invention. It is a block diagram which shows the structure of the image sensor provided with the several signal processing circuit 10B of FIG.

  Hereinafter, embodiments according to the present invention will be described with reference to the drawings. In addition, in each following embodiment, the same code | symbol is attached | subjected about the same component. In the embodiment according to the present invention, a current-voltage converter that converts a pixel signal from an image sensor such as an image sensor into a voltage will be described below.

  FIG. 1 is a block diagram illustrating a circuit configuration example (comparative example) of a general imaging apparatus. In FIG. 1, the imaging apparatus includes an imaging unit 1 that captures a predetermined image, a current-voltage conversion unit 2, a control unit 3 that controls the operation of the current-voltage conversion unit 2, and an A / D conversion unit 4. Configured. The pixel signal output from the imaging unit 1 is converted into a voltage by performing a certain time integration operation by the current-voltage conversion unit 2 under the control of the control unit 3. The pixel signal converted into the voltage is input to the A / D conversion unit 4, and the A / D conversion unit 4 converts the analog pixel signal into a digital value and outputs it as imaging data.

  FIG. 2 is a circuit diagram showing a circuit example of the current-voltage converter 2 of FIG. 3A is a graph showing the time-lapse output voltage Vout showing the first operation of the current-voltage converter 2 of FIG. 2, and FIG. 3B shows the second operation of the current-voltage converter 2 of FIG. It is a graph which shows the output voltage Vout of passage of time.

  In FIG. 2, the current-voltage conversion unit 2 includes an operational amplifier circuit 6, an integration capacitor Cap <b> 1 provided in a feedback circuit from the output terminal to the inverting input terminal of the operational amplifier circuit 6, and a feedback circuit SW <b> 1. And a reference voltage source 6R connected to the inverting input terminal of the circuit 6. Here, the reference voltage source 6R has a reference voltage Vref1. The current-voltage converter 2 is a circuit that converts an input current Iin input to the input terminal 2a into an output voltage Vout and outputs it from the output terminal 2b.

  In the reset period of FIG. 3A, the feedback switch SW1 is on, and the output terminal 2b outputs an output voltage Vout equal to the reference voltage Vref1 by the operation of the operational amplifier circuit 6. In the pixel signal sampling period, the feedback switch SW1 is controlled to be turned off by the control unit 3. When the feedback switch SW1 is turned off, the input current Iin of the pixel signal input from the input terminal 2a is charged to the integration capacitor Cap1. As a result, the output voltage Vout decreases from the reference voltage Vref1. The change voltage Vchange of the output voltage Vout at time t at this time is expressed by the following equation.

Vchange = Iin × t / Cap1

  Thereafter, the hold period is entered, and the output voltage Vout at this time is input to the A / D converter 4 as a result of current-voltage conversion of the pixel signal. At this time, if the output voltage Vout has a capacitance value large enough to fall within the output dynamic range of the current-voltage conversion unit 2 during the sampling period, the characteristics of “when Cap1 is large” in FIG. 3A As shown, the input voltage of the A / D converter 4 is used as it is. On the other hand, when the value of the integration capacitor Cap1 is insufficient, the characteristic is the same as “when Cap1 is small”, and the output is saturated during the sampling period, and an accurate A / D conversion result is obtained. Absent. Therefore, even if the integration capacitor Cap1 has a value such as “when Cap1 is small”, it is possible to avoid saturation of the output during the sampling period as shown in FIG. 3B. Further, by counting the number of times the output voltage Vout is turned back during the sampling period, the resolution of the imaging data is increased, and high-accuracy imaging can be realized.

Embodiment 1. FIG.
FIG. 4 is a block diagram illustrating a configuration of an imaging apparatus including the signal processing circuit 10 and the imaging unit 1 according to the first embodiment of the present invention. 5 is a timing chart of each signal showing the operation of the signal processing circuit 10 and the like of FIG. 4, and FIG. 6 is a timing chart showing each voltage of the signal processing circuit 10 of FIG.

  In FIG. 4, the imaging unit 1 includes a light receiving element 7 and a selection switch SW0 that is turned on in response to a selection signal SEL. The signal processing circuit 10 includes a current / voltage conversion unit 2, an A / D conversion unit 4, a voltage detection unit 11, a constant current source 12, a constant current output control unit 13, And a detection number counting unit 14. Here, the voltage detector 11 compares the input voltage with the reference voltage Vref2 from the reference voltage source 11R, and changes the output voltage from the low level to the high level when the input voltage becomes equal to or lower than the reference voltage Vref2.

  In FIG. 5, the circuit including the signal processing circuit 10 and the imaging unit 1 is reset in the initial state. At this time, the selection switch SW0 for transmitting the pixel signal from the light receiving element 7 is off, the feedback switch SW1 of the current-voltage converter 2 is on, and the output control switch SW2 for transmitting the current signal from the constant current source 12 is off. . The output voltage Vout of the current-voltage converter 2 is equal to the reference voltage Vref1.

  Next, when the reset is released, the selection switch SW0 is turned on, the feedback switch SW1 is turned off, the charge of the pixel signal is accumulated in the feedback capacitor Cap1 of the current-voltage converter 2, and the output voltage Vout starts to fall. When the output voltage Vout continues to decrease and reaches the reference voltage Vref2, the output voltage of the voltage detector 11 changes from the low level to the high level. The output voltage of the voltage detection unit 11 is input to the voltage detection number counting unit 14, and the number of voltage detections that is the number of detections of the reference voltage Vref2 is counted. At the same time, the output voltage from the voltage detector 11 is also input to the constant current output controller 13. When receiving the output voltage from the voltage detection unit 11, the constant current output control unit 13 outputs a control signal for turning on the output control switch SW2 for a predetermined time period Tpre. The constant current from the constant current source 12 charges the integration capacitor Cap1 via the output control switch SW2. Thereby, the output voltage Vout of the current-voltage converter 2 becomes the reference voltage Vref1. This is equivalent to a state where the feedback switch SW1 is turned on and the current-voltage converter 2 is reset. This operation is repeated within a “row signal selection time” by the row selection circuit 22 of FIG. The output voltage Vout of the current-voltage conversion unit 2 at the time when the “row signal selection period” ends is input to the A / D conversion unit 4 and converted into a digital value to obtain imaging data n. On the other hand, data based on the number of times counted by the voltage detection number counting unit 14 is referred to as data m. The sum of the data m + data n is the imaging data (m + n).

  Here, the voltage | Vref1−Vref2 | may be equal to or lower than the full scale voltage of the A / D converter 4. It is clarified how much the corresponding digital value when the voltage | Vref1-Vref2 | is A / D converted, and a value obtained by multiplying the corresponding digital value by the number of times counted by the voltage detection number counting unit 14 Is added to the data n of the A / D conversion result. Thereby, correct imaging data can be obtained. That is, the voltage detection number counting unit 14 counts the number of detections of the reference voltage Vref2 by the input voltage detection unit 11, multiplies it by the corresponding digital value, and outputs the multiplication result as data m.

  Further, in the charging operation of the feedback capacitor Cap1 by the constant current source 12, since the capacitance value of the feedback capacitor Cap1 is known, the charging time can be arbitrarily set by controlling the ON time and the constant current value of the output control switch SW2. Can be set. As a result, the maximum value of the digital data can be determined. Digital data may overflow when bright light enters, but this can be prevented by setting the data value arbitrarily. Conversely, the detection voltage can be set so that the output data value is constant.

  Furthermore, according to this method, the reset time can be shortened, and the integration can be performed immediately after the reset operation of the current-voltage converter 2.

  In this way, a wider dynamic range than that of the comparative example shown in FIG. 1 is obtained without increasing the number of bits of the A / D conversion unit 4 and without increasing the integration capacitance Cap1 of the current-voltage conversion unit 2. Can be obtained. Further, according to this method, the voltage input to the A / D conversion unit 4 can be increased when the integration capacitance Cap1 of the current-voltage conversion unit 2 is reduced, so that the capacitance area in the semiconductor integrated circuit can be reduced.

  FIG. 6 is a timing chart showing each voltage of the signal processing circuit 10 in FIG. 4, and FIG. 6 is an explanatory diagram for explaining the states of the reference voltages Vref1 and Vref2 according to the present embodiment.

  6 shows the relationship between the reference voltages Vref1 and Vref2 of the signal processing circuit 10 shown in FIG. 4 and the reference voltages Vadr1 and Vadr2 of the A / D converter 4. Here, the signal processing circuit 10 is configured so that the output voltage Vout from the current / voltage conversion unit 2 input to the A / D conversion unit 4 is between the reference voltages Vadr1 and Vadr2 of the A / D conversion unit 4. Operate.

  In FIG. 6A, | Vref1-Vref2 | = | Vadr1-Vadr2 |. In such a case, since the potential difference between the reference voltages Vref1 and Vref2 becomes the full-scale voltage of the A / D conversion unit 4, the imaging data n is obtained by adding the full-scale data to the A / D conversion data for the number of times. .

  On the other hand, FIG. 6B shows | Vref1-Vref2 | <| Vadr1-Vadr2 |. In this case, the data for one voltage detection is not the full scale data of the A / D converter 4. When the voltage | Vref1−Vref2 | takes the correspondence of the A / D conversion data, correct imaging data can be obtained.

  By setting as shown in FIG. 6B, even when there is an offset error between the reference voltages Vref1 and Vref2 and the reference voltages Vadr1 and Vadr2. A / D conversion data can be obtained accurately.

  In the first embodiment described above, the output control switch SW2 is turned on, and the feedback capacitor Cap1 is charged and reset by a constant current output. On the other hand, in FIG. 2 according to the comparative example, the feedback switch SW1 is turned on and reset. Here, switching noise is generated by turning on / off the output control switch SW1, but this noise causes an error in the conversion accuracy of the current-voltage conversion unit 2 circuit, and as a result, the detection accuracy of the optical signal deteriorates. On the other hand, when the output control switch SW2 is turned on / off, such switching noise is not mixed, so that current-voltage conversion can be performed with high accuracy.

  Further, when the feedback capacitance Cap1 of the current-voltage conversion unit 2 is reduced, the change in the output voltage is increased with respect to the change in the input current as compared with the case where the feedback capacitance Cap1 is large. That is, the input voltage signal to the A / D converter 4 can be increased. Thereby, the signal-to-noise ratio (S / N ratio) can be improved.

  Furthermore, when the output data value corresponding to one voltage detection can be arbitrarily set, the maximum value of the digital data can be determined. Digital data may overflow when bright light enters, but this can be prevented by setting the data value arbitrarily. The detection voltage may be set so that the output data value is constant.

Embodiment 2. FIG.
FIG. 7 is a block diagram showing a configuration of a signal processing circuit 10A according to Embodiment 2 of the present invention. FIG. 8 is a block diagram showing a configuration of an image sensor provided with a plurality of signal processing circuits 10A of FIG. As illustrated in FIG. 7, the signal processing circuit 10 </ b> A according to the second embodiment is configured to reduce the input voltage between the current-voltage conversion unit 2 and the voltage detection unit 11 as compared with the signal processing circuit 10 of FIG. 4. It is characterized by having a correlated double sampling calculation unit 15 for performing known correlated double sampling (CDS). As a result, the reset noise of the floating diffusion (FD) can be removed.

  In FIG. 8, the image sensor is provided corresponding to each column of the light receiving element array 20 in which a plurality of light receiving elements 21 are arranged in a lattice shape (matrix shape), a row selection circuit 22, and the plurality of light receiving elements 21. The plurality of signal processing circuits 20 </ b> A, the column selection circuit 23, and the control circuit 30 are provided. The row selection circuit 22 selects the light receiving elements 21 in one row among the plurality of light receiving elements 21 based on the control signal from the control circuit 30. The column selection circuit 23 selects the signal processing circuit 10 </ b> A in one column among the plurality of signal processing circuits 10 </ b> A based on the control signal from the control circuit 30. Each signal processing circuit 10A outputs imaging data (n bits) and a count value (m bits) as an A / D conversion result.

  In FIG. 8, the plurality of signal processing circuits 10A may be the signal processing circuit 10 of FIG.

Embodiment 3. FIG.
FIG. 9 is a block diagram showing a configuration of a signal processing circuit 10B according to Embodiment 3 of the present invention. The signal processing circuit 10B according to the third embodiment is characterized in that the A / D conversion unit 4 is an external circuit of the signal processing circuit 10B as compared with the signal processing circuit 10 of FIG. The configuration is the same as that of the signal processing circuit 10 of FIG.

FIG. 10 is a block diagram showing a configuration of an image sensor including a plurality of signal processing circuits 10B of FIG. 10 differs from the image sensor of FIG. 8 in the following points.
(1) A plurality of signal processing circuits 10B are provided instead of the plurality of signal processing circuits 10A.
(2) Accordingly, the A / D conversion unit 4 is an external circuit of the signal processing circuit 10B.

  In each of the above embodiments, the constant current output control unit 13 controls the output current of the constant current by turning on / off the switch SW2 for switching whether or not to output the constant current from the constant current source 12. However, the present invention is not limited to this, and the constant current output control unit 13 may be configured to control the output current value of the constant current source 12.

Summary of embodiments.
As described above, the signal processing circuit according to the present embodiment is
(1) a current-voltage conversion unit 2 that converts a pixel signal from the imaging unit 1 into a voltage;
(2) a voltage detector 11 for detecting that the output voltage from the current-voltage converter 2 has reached the first reference voltage;
(3) a voltage detection number counting unit 14 for counting the number of detections of the voltage detection unit 11;
(4) A constant current output controller 13 and a constant current source 12 that control to input a constant current to the current-voltage converter 2 based on the detection result of the voltage detector 11 are provided. According to the signal processing circuit according to the present embodiment, in the signal processing device that converts the imaging current signal into a voltage, without increasing the capacity for voltage conversion and without increasing the number of bits of the A / D converter, Compared to the prior art, it can have a wide dynamic range.

  In addition, the feature is that the smaller the integral capacitance Cap1 of the current-voltage conversion unit 2 is, the better the light detection accuracy is, and also suitable for detecting the amount of weak light.

  In the signal processing circuit, the constant current output control unit 13 controls the output current from the constant current source 12 that outputs a constant current according to the voltage detection result from the voltage detection unit 11. As a result, a reset capacitor element is not required to initialize the current-voltage conversion unit 2, and the circuit area can be reduced.

  In the signal processing circuit, the output voltage of the current-voltage conversion unit 2 is controlled by controlling the current value of the constant current from the constant current source 12 and the constant current output control by the constant current output control unit 13. Thereby, since the range in which the voltage detection unit 11 outputs the voltage detection signal can be arbitrarily set, an output data value corresponding to one voltage detection by the voltage detection number counting unit 14 can be arbitrarily set.

1 ... Imaging unit,
2 ... current-voltage converter,
3 ... control part,
4 A / D converter,
5 ... Imaging data,
6: operational amplifier circuit,
6R: Reference voltage source,
7: Light receiving element,
10, 10A, 10B ... signal processing circuit,
11 ... Voltage detector,
11R: Reference voltage source,
12 ... Constant current source,
13: Constant current output control unit,
14: Voltage detection frequency counting unit,
15: Correlated double sample calculation unit,
20 ... light receiving element array,
21. Light receiving element,
22: Row selection circuit,
23 ... Column selection circuit,
30 ... control circuit,
Cap1 ... integral capacity,
SW0 ... selection switch,
SW1 ... feedback switch,
SW2: Output control switch.

Japanese Patent No. 4550957

Claims (7)

Current-voltage conversion means for converting a pixel signal from the imaging unit into a voltage;
Voltage detection means for detecting that the output voltage from the current-voltage conversion means has reached a first reference voltage;
Counting means for counting the number of detections of the voltage detection means and outputting detection number data m based on the counted number of detections;
A signal processing device comprising a signal processing circuit comprising: a control means for controlling to input a constant current to the current-voltage conversion means based on a detection result of the voltage detection means;
The signal processing device includes:
An AD conversion unit that AD-converts the output voltage from the current-voltage conversion means into imaging data n that is a digital value,
The signal processing device, wherein the detection number data m and the imaging data n are added to generate imaging data (m + n). The control means includes a constant current output means for outputting a constant current as an output current;
2. The signal processing apparatus according to claim 1, further comprising: a constant current output control unit that controls an output current of the constant current output unit according to a detection result of the voltage detection unit.   The control means controls the output voltage of the current-voltage conversion means by controlling a current value of an output current from the constant current output means and an output current by the constant current output control means. 2. The signal processing device according to 2. An imaging unit that captures a predetermined image and outputs a pixel signal;
An imaging apparatus comprising: the signal processing apparatus according to claim 1. A signal processing method executed by a signal processing circuit including current-voltage conversion means for converting a pixel signal from an imaging unit into a voltage,
Detecting that the output voltage from the current-voltage conversion means has reached a first reference voltage;
Counting the number of detections, and outputting detection number data m based on the counted number of detections;
Controlling to input a constant current to the current-voltage converter based on a detection result of detecting that the output voltage from the current-voltage converter has reached a first reference voltage ;
AD output the output voltage from the current-voltage conversion means to the imaging data n which is a digital value,
Adding the detection frequency data m and the imaging data n to generate imaging data (m + n). Outputting a constant current as an output current;
6. The signal processing according to claim 5, further comprising the step of controlling the output current in accordance with a detection result for detecting that an output voltage from the current-voltage conversion means has reached a first reference voltage. Method. 7. The signal processing method according to claim 6, further comprising the step of controlling the output voltage of the current-voltage conversion means by controlling the current value of the output current and the output current.

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