JP6579310B2 - Power amplification module - Google Patents

Description

  The present invention relates to a power amplification module.

  In a mobile communication device such as a mobile phone, a power amplification module is used to amplify the power of a radio frequency (RF) signal transmitted to a base station. In the power amplification module, a bias circuit for supplying a bias current to the transistor for power amplification is used.

  For example, Patent Document 1 discloses a power amplification module including a compound semiconductor integrated circuit including an amplification transistor and a silicon semiconductor integrated circuit including a bias circuit that outputs a bias current to the amplification transistor.

JP 2007-221490 A

  In the configuration disclosed in Patent Document 1, a bias current is generated in a bias circuit based on a reference current output from a current source. In order to generate such a reference current, a resistor is generally used. When this resistor is formed in a silicon semiconductor integrated circuit, the resistance value may fluctuate during manufacture. Then, the fluctuation of the resistance value causes the fluctuation of the bias current, and changes the characteristics of the power amplification module. Moreover, in order to suppress the fluctuation | variation of resistance value, although the structure which uses this resistor as a chip resistor is also considered, it causes the increase in the mounting area of a power amplification module.

  The present invention has been made in view of such circumstances, and an object thereof is to suppress fluctuations in the characteristics of a power amplification module caused by variations in resistance values during manufacturing without increasing the mounting area.

  A power amplification module according to an aspect of the present invention includes an amplification transistor that amplifies a radio frequency signal, and a bias circuit that supplies a bias current corresponding to a bias control voltage to a base of the amplification transistor. A first resistor having a predetermined resistance value for generating a first current corresponding to the control voltage; a first transistor for supplying a second current corresponding to the first current to the collector; A second resistor having a predetermined resistance value for generating a first voltage corresponding to the base current of one transistor, and an output circuit for outputting a bias current corresponding to the first voltage, The voltage of 1 decreases as the resistance value of the first resistor increases, and increases as the resistance value of the second resistor increases.

  According to the present invention, it is possible to suppress fluctuations in the characteristics of the power amplification module caused by variations in resistance values during manufacturing without increasing the mounting area.

It is a figure which shows the structural example of the transmission unit containing the power amplification module which is one Embodiment of this invention. It is a figure which shows the structure of power amplification module 112A which is an example of the power amplification module 112. FIG. It is a figure which shows the structure of the power amplification module 300 which is a comparative example of the power amplification module 112. FIG. It is a simulation result which shows the dispersion | variation in bias current in the power amplification module 112A and the power amplification module 300. It is a figure which shows the structure of the power amplification module 112B which is an example of the power amplification module 112. FIG. It is a figure which shows the structure of power amplification module 112C which is an example of the power amplification module 112. FIG. It is a simulation result which shows the dispersion | variation in bias current in the power amplification module 112C and the power amplification module 300.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram illustrating a configuration example of a transmission unit including a power amplification module according to an embodiment of the present invention. The transmission unit 100 is used for transmitting various signals such as voice and data to a base station in a mobile communication device such as a mobile phone. In addition, although a mobile communication apparatus is also provided with the receiving unit for receiving a signal from a base station, description is abbreviate | omitted here.

  As shown in FIG. 1, the transmission unit 100 includes a baseband unit 110, an RF unit 111, a power amplification module 112, a front end unit 113, and an antenna 114.

  The baseband unit 110 modulates an input signal such as voice or data based on a modulation scheme such as HSUPA or LTE, and outputs a modulated signal. In the present embodiment, the modulation signal output from the baseband unit 110 is output as an IQ signal (I signal and Q signal) whose amplitude and phase are expressed on the IQ plane. The frequency of the IQ signal is, for example, about several MHz to several tens of MHz.

The RF unit 111 generates an RF signal (RF _IN ) for performing wireless transmission from the IQ signal output from the baseband unit 110. The RF signal is, for example, about several hundred MHz to several GHz.

The power amplification module 112 amplifies the power of the RF signal (RF _IN ) output from the RF unit 111 to a level necessary for transmission to the base station, and outputs an amplified signal (RF _OUT ).

The front end unit 113 performs filtering on the amplified signal (RF _OUT ), switching with a reception signal received from the base station, and the like. The amplified signal output from the front end unit 113 is transmitted to the base station via the antenna 114.

  FIG. 2 is a diagram illustrating a power amplification module 112 </ b> A that is an example of the power amplification module 112. As shown in FIG. 2, the power amplification module 112A includes a compound semiconductor integrated circuit 200 formed of GaAs or the like, and a silicon semiconductor integrated circuit 210 formed of silicon.

  The compound semiconductor integrated circuit 200 includes transistors TR0, TR1, and TR2, a capacitor C0, resistors R1, R2, and R3, and an inductor L0.

  The silicon semiconductor integrated circuit 210 includes an operational amplifier OP, field effect transistors (FETs) F1 and F2, and a resistor R4.

  In the power amplification module 112A, a bias circuit 220A is configured by the transistors TR1, TR2, FETs (F1, F2), the operational amplifier OP, and the resistors R1, R2, R3.

The transistor TR0 (amplification transistor) is, for example, a bipolar transistor such as a heterojunction bipolar transistor (HBT). The power supply voltage V _CC is supplied to the collector of the transistor TR0 via the inductor L0. An RF signal (RF _IN ) is input to the base of the transistor TR0 through the capacitor C0. The emitter of the transistor TR0 is grounded. The transistor TR0 outputs an amplified signal (RF _OUT ) obtained by amplifying the RF signal (RF _IN ) from the collector.

  The bias circuit 220A supplies a bias current to the base of the transistor TR0. Details of the configuration of the bias circuit 220A will be described. As a precondition, the resistor R1 and the resistor R2 are formed on the same integrated circuit in order to compensate for the variation in the resistance value of the resistor, and the variation in the resistance value of the resistor R1 and the resistor R2 The variation in resistance value is the same. For example, the resistance value (R1-1) of the resistor R1 and the resistance value (R2-1) of the resistor R2 formed in one integrated circuit, and the resistance value (R1) of the resistor R1 formed in another integrated circuit. -2) and the resistance value (R2-2) of the resistor R2, if R1-1 <R1-2, then R2-1 <R2-2.

In the operational amplifier OP, the bias control voltage V _CONT is supplied to the non-inverting input terminal, the inverting input terminal is connected to the first terminal of the resistor R1, and the output terminal is connected to the first terminal of the resistor R4.

  The resistor R4 has a first terminal connected to the output terminal of the operational amplifier OP and a second terminal connected to the base of the transistor TR2.

  The resistor R1 (first resistor) has a first terminal connected to the inverting input terminal of the operational amplifier OP and a second terminal grounded.

In the FET (F1) (first FET), the power supply voltage V _CC is supplied to the source, and the drain is connected to the first terminal of the resistor R1. The gate of the FET (F1) is connected to the gate of the FET (F2). In the FET (F2) (second FET), the power supply voltage V _CC is supplied to the source, and the drain is connected to the collector of the transistor TR1. The gate of the FET (F2) is connected to its own drain and the gate of the FET (F1). That is, the FETs (F1, F2) are current mirror connected.

  The transistor TR1 (first transistor) has a collector connected to the drain of the FET (F2) and an emitter grounded. The base of the transistor TR1 is connected to the first terminal of the resistor R2.

  The resistor R2 (second resistor) has a first terminal connected to the base of the transistor TR1, and a second terminal connected to the first terminal of the resistor R3 and the emitter of the transistor TR2.

In the transistor TR2 (second transistor), the power supply voltage V _CC is supplied to the collector, and the emitter is connected to the second terminal of the resistor R2 and the first terminal of the resistor R3. The base of the transistor TR2 is connected to the second terminal of the resistor R4.

  The resistor R3 (third resistor) has a first terminal connected to the second terminal of the resistor R2 and the emitter of the transistor TR2. The second terminal of the resistor R3 is connected to the base of the transistor TR0.

  The operation of the bias circuit 220A in the power amplification module 112A will be described.

The operational amplifier OP operates such that the voltage at the inverting input terminal is equal to the voltage at the non-inverting input terminal. Accordingly, the voltage at the first terminal of the resistor R1 is the bias control voltage V _CONT . When the resistance value of the resistor R1 is R1, a current I1 (first current) flowing through the resistor R1 is expressed by the following equation (1).
I1 = V _CONT / R1 (1)

Since the FETs (F1, F2) are current mirror connected, assuming that the size ratio of the FETs (F1, F2) is 1: A, the current I2 (second current) flowing through the FET (F2) is 2).
I2 = (A × V _CONT ) / R1 (2)

When the current amplification factor of the transistor TR1 is hFE, the base current I3 of the transistor TR1 is expressed by the following equation (3).
I3 = I2 / hFE = (A × V _CONT ) / (R1 × hFE) (3)

When the saturation current is I _S , the thermal voltage is V _T , the Boltzmann coefficient is k, the absolute temperature is T, and the base-emitter voltage of the transistor TR1 is V _BE , the collector current I2 of the transistor TR1 is expressed by the following equation (4). Can be represented.
_{I2 = I S exp (q (} V BE -V T) / kT) ··· (4)

When the resistance value of the resistor R2 is R2, the voltage V1 (first voltage) generated at the second terminal of the resistor R2 is expressed by the following equation (5).
V1 = _VBE + R2 * I3 = _VBE + (R2 * A * _VCONT ) / (R1 * hFE) (5)

From the equations (3), (4), and (5), the voltage V1 can be expressed by the following equation (6).
V1 = V _T + (kT / q) × ln {(A × V _CONT ) / (R1 × I _S )} + (R2 × A × V _CONT ) / (R1 × hFE) (6)

In Expression (6), the first term V _T on the right side is constant.

Further, in the expression (6), the second term (kT / q) × ln {(A × V _CONT ) / (R1 × I _S )} on the right side is a logarithm, and therefore the influence of the numerical variation of R1 at the time of manufacture Can be ignored.

In the formula (6), the third term (R2 × A × V _CONT ) / (R1 × hFE) on the right side includes R1 in the denominator and R2 in the numerator. Therefore, fluctuations in R1 and R2 due to manufacturing variations are canceled out.

  Therefore, the bias circuit 220A can generate a stable voltage V1 that is not affected by fluctuations in the resistance value. Thereby, fluctuations in the bias current supplied to the transistor TR0 can be suppressed. In addition, an increase in mounting area can be suppressed as compared with the case where a chip resistor is used to suppress fluctuations in the resistance value.

  FIG. 3 is a diagram illustrating a configuration of a power amplification module 300 that is a comparative example of the power amplification module 112. In addition, the same code | symbol is attached | subjected to the element equivalent to 112 A of power amplification modules, and description is abbreviate | omitted.

  The power amplification module 300 includes a bias circuit 310. Bias circuit 310 includes transistors TR11, TR12, TR13 and resistors R11, R12.

The resistor R11 is supplied with the bias control voltage V _{CONT at} the first terminal. The second terminal of the resistor R11 is connected to the collector of the transistor TR11 and the base of the transistor TR13.

  The transistor TR11 has a collector and a base connected to form a diode. Hereinafter, this configuration is referred to as diode connection. Transistor TR11 has a collector connected to the second terminal of resistor R11, and an emitter connected to the collector of transistor TR12.

  The transistor TR12 is diode-connected. The transistor TR12 has a collector connected to the emitter of the transistor TR11, and the emitter is grounded.

In the transistor TR13, the power supply voltage V _CC is supplied to the collector, and the emitter is connected to the first terminal of the resistor R12. The base of the transistor TR13 is connected to the second terminal of the resistor R11.

  Resistor R12 has a first terminal connected to the emitter of transistor TR13 and a second terminal connected to the base of transistor TR0.

The bias circuit 310 supplies a bias current corresponding to the bias control voltage V _CONT to the base of the transistor TR0. In the bias circuit 310, when the resistance value of the resistor R11 varies due to manufacturing variations, the base voltage of the transistor TR13 varies. Then, the bias current supplied to the transistor TR0 varies due to the variation of the base voltage of the transistor TR13.

  FIG. 4 is a simulation result showing variations in bias current in the power amplification module 112A and the power amplification module 300. In FIG. 4, the horizontal axis indicates the collector current of the transistor TR0. The vertical axis represents the bias current fluctuation when the design value of the bias current is 1.0 and the resistance value fluctuation due to manufacturing variations is ± 10%.

  As shown in FIG. 4, in the region where the collector current is 0.4 A or more, the fluctuation of the bias current in the power amplification module 112A is smaller than the fluctuation of the bias current in the power amplification module 300. Therefore, also from this simulation result, it can be seen that the power amplification module 112A can suppress fluctuations in the bias current supplied to the transistor TR0.

  FIG. 5 is a diagram illustrating a configuration of a power amplification module 112 </ b> B that is an example of the power amplification module 112. In addition, the same code | symbol is attached | subjected to the element equivalent to 112 A of power amplification modules, and description is abbreviate | omitted.

  The power amplification module 112B includes a bias circuit 220B instead of the bias circuit 220A of the power amplification module 112A.

  In the bias circuit 220B, the first terminal of the resistor R2 is connected to the emitter of the transistor TR1, and the second terminal of the resistor R2 is grounded. The other configuration of the bias circuit 220B is the same as that of the bias circuit 220A.

In the bias circuit 220B, the voltage V1 generated at the base of the transistor TR1 is expressed by the following equation (7).
V1 = _VBE + I2 * R2 = _VBE + (R2 * A * _VCONT ) / R1 (7)

From the expressions (4) and (7), the voltage V1 can be expressed by the following expression (8).
V1 = V _T + (kT / q) × ln {(A × V _CONT ) / (R1 × I _S )} + (R2 × A × V _CONT ) / R1 (8)

  According to the equation (8), the power amplification module 112B can generate a stable voltage V1 regardless of the change in the resistance value due to manufacturing variations, as in the case of the power amplification module 112A. Thereby, fluctuations in the bias current supplied to the transistor TR0 can be suppressed.

  FIG. 6 is a diagram illustrating a configuration of a power amplification module 112 </ b> C that is an example of the power amplification module 112. In addition, the same code | symbol is attached | subjected to the element equivalent to 112 A of power amplification modules, and description is abbreviate | omitted.

  The power amplification module 112C includes a bias circuit 220C instead of the bias circuit 220A of the power amplification module 112A.

  The bias circuit 220C includes a transistor TR3 in addition to the configuration of the bias circuit 220A. The transistor TR3 is a bipolar transistor such as HBT, for example.

In the transistor TR2, the power supply voltage V _CC is supplied to the collector, and the emitter is connected to the base of the transistor TR1. The base of the transistor TR2 is connected to the first terminal of the resistor R2.

  The resistor R2 has a first terminal connected to the base of the transistor TR2, and a second terminal connected to the second terminal of the resistor R4 and the base of the transistor TR3.

In the transistor TR3 (third transistor), the power supply voltage V _CC is supplied to the collector, and the emitter is connected to the first terminal of the resistor R3. The base of the transistor TR3 is connected to the second terminal of the resistor R2 and the second terminal of the resistor R4.

  The other configuration of the bias circuit 220C is the same as that of the bias circuit 220A.

When the base-emitter voltage of the transistors TR1 and TR2 is V _BE and the current amplification factor of the transistors TR1 and TR2 is hFE, the voltage V1 generated at the second terminal of the resistor R2 is expressed by the following equation (9). .
V1 = 2 × V _BE + (I3 × R2) / hFE (9)

From the equations (3), (4), and (9), the voltage V1 can be expressed by the following equation (10).
V1 = 2 × V _T + (kT / q) × [2 × ln {(A × V _CONT ) / (R1 × I _S )} + ln (1 / hFE)] + (R2 × A × V _CONT ) / ( R1 × hFE ² ) (10)

  According to Expression (10), the power amplification module 112C can generate a stable voltage V1 regardless of the change in resistance value due to manufacturing variations, as in the case of the power amplification module 112A. Thereby, fluctuations in the bias current supplied to the transistor TR0 can be suppressed.

  FIG. 7 is a simulation result showing variations in bias current in the power amplification module 112C and the power amplification module 300. In FIG. 7, the horizontal axis indicates the collector current of the transistor TR0. The vertical axis represents the bias current fluctuation when the design value of the bias current is 1.0 and the resistance value fluctuation due to manufacturing variations is ± 10%.

  As shown in FIG. 7, in the region where the collector current is 0.2 A or more, the fluctuation of the bias current in the power amplification module 112 </ b> C is smaller than the fluctuation of the bias current in the power amplification module 300. Therefore, also from this simulation result, it can be seen that the power amplification module 112C can suppress the fluctuation of the bias current supplied to the transistor TR0.

The exemplary embodiments of the present invention have been described above. According to the power amplification module 112A of the present embodiment, the bias circuit 220A includes a resistor R1 that generates a current I1 corresponding to the bias control voltage V _CONT , and a transistor TR1 that supplies a current I2 corresponding to the current I1 to the collector. And a resistor R2 that generates a voltage V1 according to the base current of the transistor TR1 and an output circuit that outputs a bias current according to the voltage V1, and the voltage V1 increases as the resistance value of the resistor R1 increases. And rises as the resistance value of the resistor R2 increases.

  Specifically, for example, when the resistance value of the resistor R1 increases due to manufacturing variations, the current I1 decreases. When the current I1 is reduced, the current I2 is also reduced. When the current I2 is reduced, the base current of the transistor TR1 is also reduced. If the resistance value of the resistor R2 is fixed, the voltage V1 also decreases as the base current decreases. However, the resistance value of the resistor R2 also increases due to manufacturing variations similar to the resistor R1, so that fluctuations in the voltage V1 are suppressed. Is done.

  In particular, the larger the collector current of the transistor TR0, the smaller the current fluctuation due to manufacturing variations. Therefore, in a configuration having a plurality of amplifiers, it is effective to adopt the configuration of the power amplification module 112 in the output amplifier.

  As a result, it is possible to suppress fluctuations in the characteristics of the power amplification module due to manufacturing variations. The same applies to the power amplification modules 112B and 112C.

  In the power amplification module 112B, the resistor R2 is connected to the emitter of the transistor TR1. The emitter current of the transistor TR1 is hFE times the base current of the transistor TR1. Therefore, the resistance value of the resistor R2 can be reduced as compared with the case where the resistor R2 is connected to the base of the transistor TR1 as in the power amplification module 112A.

  Further, in the power amplification module 112C, in the expression (10), 1 / hFE is included in the second term on the right side that is affected by the fluctuations in the resistance values R1 and R2, and therefore, compared with the power amplification modules 112A and 112B. The influence of fluctuations in resistance values of the resistors R1 and R2 is small. Therefore, it is possible to further suppress fluctuations in the characteristics of the power amplification module due to manufacturing variations, compared to the power amplification modules 112A and 112B.

  Each embodiment described above is for facilitating understanding of the present invention, and is not intended to limit the present invention. The present invention can be changed / improved without departing from the spirit thereof, and the present invention includes equivalents thereof. In other words, those obtained by appropriately modifying the design of each embodiment by those skilled in the art are also included in the scope of the present invention as long as they include the features of the present invention. For example, each element included in each embodiment and its arrangement, material, condition, shape, size, and the like are not limited to those illustrated, and can be changed as appropriate. In addition, each element included in each embodiment can be combined as much as technically possible, and combinations thereof are included in the scope of the present invention as long as they include the features of the present invention.

DESCRIPTION OF SYMBOLS 100 Transmission unit 110 Baseband part 111 RF part 112,112A, 112B, 112C Power amplification module 113 Front end part 114 Antenna 200 Compound semiconductor integrated circuit 210 Silicon semiconductor integrated circuit 220A, 220B, 220C Bias circuit TR0, TR1, TR2, TR3 Transistor L0 Inductor C0 Capacitor R1, R2, R3, R4 Resistor F1, F2 FET
OP operational amplifier

Claims (5)

An amplification transistor for amplifying the radio frequency signal;
A bias circuit for supplying a bias current corresponding to a bias control voltage to the base of the amplification transistor;
With
The bias circuit includes:
A first resistor having a predetermined resistance value that generates a first current according to the bias control voltage;
A first transistor in which a second current corresponding to the first current is supplied to a collector;
A second resistor having a predetermined resistance value, which generates a first voltage according to a base current of the first transistor;
An output circuit that outputs the bias current according to the first voltage;
An operational amplifier in which the bias control voltage is supplied to one input terminal and the other input terminal is connected to one end of the first resistor;
A first FET for supplying the first current to the one end of the first resistor;
A second FET connected in a current mirror with the first FET and supplying the second current to the first transistor;
With
The second resistor has one end connected to the base of the first transistor and the other end generating the first voltage,
The output circuit includes a third resistor and a second transistor;
The third resistor has one end supplied with the first voltage and the other end connected to the base of the amplification transistor.
The second transistor has an emitter connected to the one end of the third resistor, a base connected to the output terminal of the operational amplifier,
The first and second resistors are formed on the same integrated circuit;
The first voltage decreases as the resistance value of the first resistor increases, and increases as the resistance value of the second resistor increases.
Power amplification module. An amplification transistor for amplifying the radio frequency signal;
A bias circuit for supplying a bias current corresponding to a bias control voltage to the base of the amplification transistor;
With
The bias circuit includes:
A first resistor having a predetermined resistance value that generates a first current according to the bias control voltage;
A first transistor in which a second current corresponding to the first current is supplied to a collector;
A second resistor having a predetermined resistance value, which generates a first voltage according to a base current of the first transistor;
An output circuit that outputs the bias current according to the first voltage;
A first FET for supplying the first current to one end of the first resistor;
A second FET connected in a current mirror with the first FET and supplying the second current to the first transistor;
With
The second resistor has one end connected to the emitter of the first transistor, the other end grounded, and generates the first voltage at the base of the first transistor;
The output circuit includes a third resistor;
The third resistor has one end supplied with the first voltage and the other end connected to the base of the amplification transistor .
The first and second resistors are formed on the same integrated circuit;
The first voltage decreases as the resistance value of the first resistor increases, and increases as the resistance value of the second resistor increases.
Power amplification module. The power amplification module according to claim 2 ,
The bias circuit is one of the bias control voltage to the input terminal supplied, further comprising a op amp and the other input terminal being connected to said one end of said first resistor,
The output circuit further includes a second transistor;
The second transistor has an emitter connected to the one end of the third resistor and a base connected to the output terminal of the operational amplifier.
Power amplification module. An amplification transistor for amplifying the radio frequency signal;
A bias circuit for supplying a bias current corresponding to a bias control voltage to the base of the amplification transistor;
With
The bias circuit includes:
A first resistor having a predetermined resistance value that generates a first current according to the bias control voltage;
A first transistor in which a second current corresponding to the first current is supplied to a collector;
A second resistor having a predetermined resistance value, which generates a first voltage according to a base current of the first transistor;
A second transistor that outputs the base current of the first transistor ;
An output circuit that outputs the bias current according to the first voltage;
A first FET for supplying the first current to one end of the first resistor;
A second FET connected in a current mirror with the first FET and supplying the second current to the first transistor;
With
The second resistor has one end connected to the base of the second transistor and the other end generating the first voltage,
The output circuit includes a third transistor and a third resistor,
The third transistor is supplied with the first voltage at a base,
The third resistor has one end connected to the emitter of the third transistor and the other end connected to the base of the amplification transistor .
The first and second resistors are formed on the same integrated circuit;
The first voltage decreases as the resistance value of the first resistor increases, and increases as the resistance value of the second resistor increases.
Power amplification module. The power amplification module according to claim 4 ,
The bias circuit is one of the bias control voltage to the input terminal supplied, is connected to the one end of the other input terminal of the first resistor, and the other end of the output terminal is the second resistor further comprising a op amp that is connected,
Power amplification module.

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