JP6538145B1 - Orthogonal voltage controlled oscillator (QVCO) and communication device using the same - Google Patents

Abstract

A transformer feedback quadrature voltage controlled oscillator (QVCO) is provided.
Kind Code: A1 Embodiments of the present disclosure include a first VCO, a second VCO, and a plurality of coupling capacitors between first and second VCOs to provide a first phase error of a quadrature output local oscillator (LO) signal. And a transformer feedback quadrature voltage controlled oscillator (QVCO) including a dynamic phase error correction circuit, wherein the capacitance of the coupling capacitor changes in accordance with the digital control signal corrected by the second VCO.
[Selected figure] Figure 2

Description

  The present disclosure relates to a local oscillator for use in communication equipment, and in particular, a transformer feedback quadrature voltage controlled oscillator (QVCO) for correcting dynamic phase errors by connecting a network of transformer feedback QVCOs. , And a communication device using a transformer feedback QVCO.

  As the development of communication technology advances, communication devices used at home are gradually being replaced by mobile communication devices such as smartphones and pad-type computers, and smart devices are also installed in the communication devices. An instrument can be included. Mobile communication devices and smart devices perform wireless communication for data transmission purposes, and the age of the Internet of Things (IoT) has thus come to people's lives.

  Wireless communication is performed by the transceiver to transmit and receive wireless signals over the air. The transceiver usually comprises a frequency synthesizer for switching the carrier frequency. With respect to the need for high accuracy communication, a stable and accurate local oscillation (LO) signal is inexorably needed because the wireless signal can be precisely transmitted to the wireless receiver. Thus, a voltage controlled oscillator (VCO) with low phase noise is an important electrical component in a transceiver.

Currently, fifth generation (5G) mobile communication standards are being developed, and compared to previous generation mobile communication, 5G mobile communication has larger network capacity, faster data transmission rate, stronger communication capability and more Provide low wireless transmission delay. Furthermore, the 5G mobile communication standard specifies a radio frequency (RF) of 38.6 GHz to 40 GHz.

  Referring to FIG. 1, FIG. 1 is a block diagram of a conventional transceiver used in 5G mobile communications. The conventional transceiver 1 includes a modulator 11, sub-harmonic mixers 12 and 17, a power amplifier (PA) 13, a transmit / receive switch (TR-SW) 14, an antenna 15, a low noise amplifier (LNA) 16, A demodulator 18 and a phase locked loop (PLL) 19 are provided. The subharmonic mixer 12 is connected to the modulator 11, the PLL 19 and the PA 13. The TR-SW 14 is connected to the PA 13, the LNA 16 and the antenna 15. The subharmonic mixer 17 is connected to the demodulator 18, the PLL 19 and the LNA 16.

  The modulator 11 receives and modulates the first data signal Din to generate a first intermediate frequency (IF) signal of about 3.5 GHz. PLL 19 provides the LO signal to sub-harmonic mixers 12 and 17. The subharmonic mixer 12 mixes the first IF signal and the LO signal to generate a first RF signal to the PA 13. The PA 13 receives and amplifies the first RF signal so that the antenna 15 radiates the first amplified RF signal into the air, and the TR-SW 14 is switched to the PA 13.

  The antenna 15 receives the first RF signal from the air and the TR-SW 14 is switched to the LNA 16 so that the LNA 16 can amplify the first RF signal. The subharmonic mixer 17 mixes the second amplified RF signal and the LO signal to generate a second IF signal of about 3.5 GHz. Demodulator 18 receives and demodulates the second IF signal to generate a second data signal Dout.

  In the 5G mobile communication standard, RF is specified as 38.6 GHz to 40 GHz, and RF can be expressed as RF = 2LO + IF. Therefore, LO must be specified within the range of 17.55 GHz to 18.25 GHz. The LO range can be extended from 17.5 GHz to 18.6 GHz to prevent process variations or other affecting factors to meet the 5G mobile communication criteria.

  In addition to the PPL being used to generate the LO signal, the conventional QVCO can also be used to generate the quadrature phase LO signal, but the conventional QVCO with connected network has its output terminal , Which increases the output load and reduces the maximum operating frequency. It should be noted that the current passively coupled network produces phase shifts at different frequencies due to the ultra-wideband operating band.

  An object of the present disclosure is to provide a transformer feedback QVCO having a dynamic phase error correction circuit that is for a transformer feedback QVCO coupling network.

  Another object of the present disclosure is to provide a transformer feedback that generates a quadrature LO signal of about 18 GHz to reduce the output load of the transformer feedback QVCO and at the same time increase the maximum operating frequency of the transformer feedback QVCO. It is to provide QVCO. Transformer feedback QVCO meets the requirements of frequency synthesizers for 5G mobile communications and is also installed in portable devices.

  In order to achieve at least the above objects, the present disclosure provides a transformer feedback quadrature voltage controlled oscillator (QVCO) comprising a first half circuit, a second half circuit electrically connected to the first half circuit, and And each of the first and second half circuits includes a first coupling capacitor, a second coupling capacitor, an inductive inductor, an NMOS transistor, a PMOS transistor, and a variable frequency circuit, the first end of which is the inductive inductor. A first terminal of the PMOS transistor, the drain of the PMOS transistor and the gate of the NMOS transistor, and a second terminal of the first terminal of the inductive inductor, the drain of the NMOS transistor and the gate of the PMOS transistor; And the inductive inductor of the second half circuit forms a transformer, and the PMOS transistor body of the first half circuit The NMOS transistor body of the first half circuit is connected to the PMOS transistor source of the second half circuit via the first coupling capacitor of the half circuit, and the NMOS transistor body of the first half circuit is connected to the second half circuit via the second coupling capacitor of the first half circuit. The NMOS transistor source of the second half circuit is connected to the NMOS transistor source, and the PMOS transistor body of the second half circuit is connected to the NMOS transistor source of the first half circuit via the first coupling capacitor of the second half circuit, and the NMOS of the second half circuit The transistor body is connected to the PMOS transistor source of the first half circuit through the second coupling capacitor of the second half circuit, and the drains of the PMOS transistor and the NMOS transistor output local oscillation (LO) signals of quadrature phase The frequency variable voltage used and applied to the frequency variable circuit causes the LO frequency to be based on the frequency-voltage curve There are determined.

  In order to achieve at least the above objective, the present disclosure provides a communication device comprising the above transformer feedback QVCO and a front end circuit connected to the transformer feedback QVCO.

  The first and second coupling capacitors of the first and second half circuits are variable coupling capacitors forming a dynamic phase error correction circuit, and the NMOS transistor, PMOS transistor and inductive inductor of the first half circuit are The one half VCO circuit and the inductive inductor form a second VCO.

  In an embodiment of the present disclosure, each of the first and second half circuits has its first terminal connected to the first terminal of the frequency variable circuit and its second terminal is the second of the frequency variable circuit. A capacitor switching device connected to the terminal and provided to switch the capacitor is used to change the frequency-voltage curve.

  In an embodiment of the present disclosure, each of the first half circuit and the second half circuit includes a first inductor in which a PMOS transistor source is connected to a system voltage via a first inductor, and an NMOS transistor source is a second inductor. And a second inductor connected to ground.

In an embodiment of the present disclosure, the frequency variable circuit includes first and second variable capacitors, first and second resistors, and first and second capacitors, wherein the frequency variable voltage is the first and second frequency capacitors. applied to the first terminal of the second variable capacitor, the second terminal of the first variable capacitor is connected to the second terminal of the first resistor and the first capacitor, the second variable capacitance the second terminal of the capacitor is connected to the second terminal of the second resistor and a second capacitor, a bias voltage is applied to the first terminal of the first and second resistors, also first capacitor And the first terminal of the second capacitor are connected to the drain of the PMOS transistor and the drain of the NMOS transistor, respectively.

  In the embodiments of the present disclosure, when the frequency variable voltage increases, the capacitance of the first variable capacitor increases and the capacitance of the second variable capacitor decreases.

  In embodiments of the present disclosure, the switchgear devices are such that each of the switchgear switches is connected between two capacitors, and each set of switchgear switches and corresponding capacitors is connected in parallel to the other set The switch comprises a switch and a capacitor, the cord being used to activate or deactivate at least one of the switches.

  In the embodiments of the present disclosure, the LO frequency is 17.2 GHz to 18.6 GHz.

  In the embodiment of the present disclosure, at a frequency shift of 1 MHz, the phase noise is about -110 dBc / Hz.

  In an embodiment of the present disclosure, the communication device further comprises an antenna connected to the front end circuit, wherein the front end circuit is a transceiver circuit, a receiver circuit or a transmitter circuit.

  In summary, compared to the conventional QVCO, the transformer feedback QVCO can correct the phase error of the quadrature phase LO signal because of the transformer feedback QVCO's coupling network. Note that the transformer feedback QVCO can have lower output load, higher operating frequency, and lower phase noise, and can also have a wider operating band while using capacitor switching devices.

FIG. 1 is a block diagram of a conventional transceiver used in 5G mobile communications. FIG. 6 is a block diagram of a transformer feedback QVCO in accordance with an embodiment of the present disclosure. FIG. 6 is a circuit diagram of a transformer feedback QVCO according to an embodiment of the present disclosure. FIG. 6 is a plot showing the quadrature phase LO signal associated with a transformer feedback QVCO at different ratios of coupling capacitors in accordance with an embodiment of the present disclosure. FIG. 6 is a plot showing the quadrature phase LO signal associated with a transformer feedback QVCO at different ratios of coupling capacitors in accordance with an embodiment of the present disclosure. FIG. 6 is a plot showing the quadrature phase LO signal associated with a transformer feedback QVCO at different ratios of coupling capacitors in accordance with an embodiment of the present disclosure. FIG. 6 is a plot showing the quadrature phase LO signal associated with a transformer feedback QVCO at different ratios of coupling capacitors in accordance with an embodiment of the present disclosure. FIG. 6 is a plot showing the quadrature phase LO signal associated with a transformer feedback QVCO at different ratios of coupling capacitors in accordance with an embodiment of the present disclosure. FIG. 5 is a plot of phase noise and shift frequency (or relative frequency) associated with a transformer feedback QVCO operated at a minimum operating frequency. FIG. 5 is a plot of phase noise and shift frequency (or relative frequency) associated with a transformer feedback QVCO operated at maximum operating frequency. FIG. 6 is a plot of operating frequency and variable frequency voltage associated with a transformer feedback QVCO without a capacitor switching device. FIG. 6 is a curve diagram showing the relationship between the operating frequency and the variable frequency voltage associated with a transformer feedback QVCO having a capacitor switching device given different codes. FIG. 1 is a block diagram of a communication device in accordance with an embodiment of the present disclosure.

  BRIEF DESCRIPTION OF THE DRAWINGS The purpose, features and advantages of the present disclosure, as well as the accompanying drawings, are provided so that an examiner's understanding of the best mode for carrying out the invention of the present disclosure may be easier.

  Embodiments of the present disclosure provide a transformer feedback QVCO comprising a first half circuit and a second half circuit. Each of the first and second half circuits has a transformer inductive inductor that forms a transformer feedback structure. The frequency variable circuit in each of the first and second half circuits is formed inside the circuit of the transformer feedback QVCO instead of on the output terminal of the transformer feedback QVCO.

  The PMOS transistor main body of the first half circuit is connected to the PMOS transistor source of the second half circuit via the first connection capacitor of the first half circuit, and the NMOS transistor main body of the first half circuit is the first half circuit. It is connected to the NMOS transistor source of the second half circuit via the second coupling capacitor of the circuit. The PMOS transistor body of the second circuit is connected to the NMOS transistor source of the first circuit through the first connection capacitor of the second circuit, and the NMOS transistor body of the second circuit is the second circuit of the second circuit. It is connected to the PMOS transistor source of the first half circuit via a two coupling capacitor.

  The body-to-source capacitor coupling scheme allows the transformer feedback QVCO to generate a quadrature LO signal. The frequency variable circuit is in fact the circuit component of the connection network. Since the variable frequency circuit is formed inside the transformer feedback QVCO circuit instead of on the output terminal of the transformer feedback QVCO, the maximum operating frequency of the transformer feedback QVCO is increased, and the output load of the transformer feedback QVCO is increased. Decrease.

  The first half circuit inductive inductor, PMOS and NMOS transistors actually form a VCO, the second half circuit inductive inductor, PMOS and NMOS transistors actually form another VCO, and the first and second half circuits It should be noted that the first and second coupling transistors of form a dynamic phase error correction circuit for the coupling network of the transformer feedback QVCO.

  Furthermore, according to the frequency variable voltage applied to the frequency variable circuit based on the frequency-voltage curve, the LO frequency is measured using the frequency variable circuit. Each of the first half circuit and the second half circuit may further comprise a capacitor switching device which is a circuit component of a connection network formed in the circuit of the transformer feedback QVCO. Due to the ultra-wideband operating band by moving the frequency-voltage curve according to the code given to the capacitor switching device, the current passive coupling network causes phase shifts at different frequencies.

  The details of the transformer feedback QVCO are illustrated as follows. Referring to FIG. 2, FIG. 2 is a block diagram of a transformer feedback QVCO according to an embodiment of the present disclosure. The transformer feedback QVCO 7 has two VCOs 71 and 72 and a dynamic phase error correction circuit 73, and the dynamic phase error correction circuit 73 has a coupling capacitor connected between the two VCOs 71 and 72. And the capacitance of the coupling capacitor can be controlled by the digital control signal DCTRL.

  Two different signal outputs from the two VCOs 71, 72 can be used to generate the quadrature phase LO signal via the transformer feedback QVCO connection network. However, due to process tolerances, the two VCOs 71, 72 may have a mismatch such that there is a shift in quadrature to form a steady state phase error.

  While high accuracy is required, steady state phase errors must be corrected. While the capacitance of the coupling capacitor changes, the phase error of the quadrature LO signal increases or decreases, thereby correcting the phase error of the quadrature LO signal.

  Referring now to FIG. 3, FIG. 3 is a circuit diagram of a transformer feedback QVCO according to an embodiment of the present disclosure. The transformer feedback QVCO 2 is formed by the first half circuit 21 and the second half circuit 22, the second half circuit 22 is connected to the first half circuit 21, and the circuit components of the first half circuit 21 are the second It is identical to that of the half circuit 22.

  Each of the first and second half circuits 21 and 22 includes a PMOS transistor M1, an NMOS transistor M2, inductors L1 and L2, an inductive inductor LIND, a capacitor switching device SC, a frequency variable circuit FT, and coupling capacitors C1 and C2. . In each of the first and second half circuits 21 and 22, the PMOS and NMOS transistor sources M1 and M2 are connected to the system voltage VDD and the ground GND via the inductors L1 and L2, respectively, and the PMOS and NMOS transistor bodies M1 and M2 M2 is connected to the first end of the coupling capacitors C1 and C2, respectively, and the drain of the PMOS transistor M1 is connected to the gate of the NMOS transistor M2 and the first end of the induction inductor LIND, the capacitor switching device SC and the frequency variable circuit FT The drain of the NMOS transistor M2 is connected to the gate of the PMOS transistor M1 and the second terminal of the induction inductor LIND, the capacitor switching device SC and the frequency variable circuit FT. The inductive inductors LIND of the first half circuit 21 and the second half circuit 22 are coupled to one another (ie, the inductive inductor LIND forms a transformer) in the manner described above, forming a transformer feedback structure.

  The transformer feedback structure increases the output amplitude to reduce phase noise, and the connection scheme described above reduces the phase noise to eliminate the second harmonic signal of the PMOS and NMOS transistor sources M1, M2. The reuse structure is further formed.

  The PMOS and NMOS transistor sources M1 and M2 of the second half circuit 22 are respectively connected to the second terminals of the connection transistors C1 and C2 of the first half circuit, and the PMOS and NMOS transistor sources M1 of the first half circuit 21 are also connected. , M2 are respectively connected to the second terminals of the connection transistors C1 and C2 of the first half circuit, so that the capacitor connection mode of the body-source makes it possible for the transformer feedback QVCO to generate the quadrature LO signal I +, I-. , Q +, Q- can be generated.

  According to the above connection mode, the capacitor switching device SC and the frequency variable circuit FT form a connection network inside the circuit of the transformer feedback QVCO2 instead of on the output terminal of the transformer feedback QVCO2, whereby the transformer feedback QVCO2 is formed. It should be noted that the output load of V.sub.CO.sub.2 decreases and the maximum operating frequency of transformer feedback Q.sub.VCO.sub.2 increases.

  Using the frequency variable circuit FT, for example, according to the frequency-variable voltage Vtune based on the frequency-voltage curve, which is substantially logarithmic linear in the 17.7 GHz to 18.6 GHz operating band for 5 G mobile communication, The LO frequency of the phase LO signal I +, I-, Q +, Q- is determined. This means that the LO frequency is increased when the frequency variable voltage Vtune is increased.

  The capacitor switching device SC is used to move the frequency-voltage curve in accordance with the code given to the capacitor switching device SC (i.e. the control signals of the switching switches S1, S2, S3). The capacitor switching device SC can increase the logarithmic straight line of the range of the frequency-voltage curve, and can correct the phase shift at different frequencies because of the wide band operating band.

  Details of each of the variable frequency circuits FT are illustrated as follows, and the following implementations of the variable frequency circuits FT do not limit the present disclosure. The frequency variable circuit FT comprises capacitors C3 and C4, resistors R1 and R2, a first variable capacitor CVAR + and a second variable capacitor CVAR-. The variable frequency voltage Vtune is applied to the first end of the first and second variable capacitance capacitors CVAR + and CVAR-, and the bias voltage Vbias is applied to the first end of the resistors R1, R2. The second end of the resistor R1 is connected to the second end of the first variable capacitor CVAR + and the capacitor C3, and the second end of the resistor R2 is the second end of the second variable capacitor CVAR- and the capacitor C4. Connected to The first terminals of the capacitors C3 and C4 are respectively connected to the first and second terminals of the frequency variable circuit FT (ie, the drain terminals of the PMOS and NMOS transistors M1 and M2).

  The first variable capacitance capacitor CVAR + and the second variable capacitance capacitor CVAR- can change their capacitances according to the frequency variable voltage Vtune, thereby changing the LO frequency according to the frequency variable voltage Vtune. Note that the second variable capacitance capacitor CVAR- decreases its capacitance when the frequency variable voltage Vtune increases, while the first variable capacitance capacitor CVAR + increases its capacitance when the frequency variable voltage Vtune increases. I want to be However, the design of the first variable capacitance capacitor CVAR + and the second variable capacitance capacitor CVAR- does not limit the present disclosure.

  Details of each of the capacitor switching devices SC are illustrated as follows, and the following implementations of the capacitor switching devices SC do not limit the present disclosure. The capacitor switching device SC can comprise a plurality of capacitors C4 to C6 and a plurality of switching switches S1 to S3. Switching switch S1 is connected between the two first terminals of two capacitors C4, switching switch S2 is connected between the two first terminals of two capacitors C5, and switching switch S3 is It is connected between two terminals of two capacitors C6. The second terminals of the upper capacitors C4 to C6 are connected to the first terminal of the capacitor switching device SC (ie the drain terminal of the PMOS transistor M1), and the second terminals of the lower capacitors C4 to C6 are connected to the capacitor switching device SC It is connected to the second terminal (that is, the drain terminal of the NMOS transistor M2).

  The code formed by the control signal is used to activate or deactivate at least one of the switching switches S1 to S3 so that the equivalent capacitance of the capacitor switching device SC can be changed. Because the equivalent capacitance of the capacitor switching device SC can be changed, the frequency-voltage curve of the transformer feedback QVCO 2 can be moved and, in a similar sense, a plurality of frequency-voltage curves are provided. It should be noted that the capacitor switching device SC can be removed from the transformer feedback QVCO 2 without requiring a wide logarithmic linear range.

  It is to be noted that the inductive inductor LIND and the PMOS transistor M1 and the NMOS transistor M2 of the first half circuit 21 form a VCO (such as the VCO 71 of FIG. 2). The inductive inductor LIND of the first half circuit 21 and the PMOS transistor M1 and the NMOS transistor M2 form a VCO (such as the VCO 72 of FIG. 2), and the inductive inductor LIND and the PMOS transistor M1 and the NMOS transistor M2 of the second half circuit 22 Another VCO (such as CO 72 in FIG. 2) is formed, and the coupled capacitors C1 and C2 of the first circuit 21 and the second circuit 22 are used to correct the dynamic phase error correction circuit (dynamic phase error correction in FIG. It should be noted that the circuit 73 etc. are formed. Two different signal outputs from the two VCOs can be used to generate the quadrature LO signals I +, I-, Q +, Q- through the concatenation network. However, due to process tolerances, the two VCOs may have a mismatch such that there is a quadrature shift to form a steady state phase error.

  While high accuracy is required, steady state phase errors must be corrected. The coupling capacitors C1 and C2 of the first circuit 21 and the second circuit 22 are variable coupling capacitors that form a dynamic phase error correction circuit for a transformer feedback QVCO coupling network. While the ratio of the coupling capacitors C1 and C2 changes, the phase error of the quadrature LO signal I +, Q + (or I-, Q-) increases or decreases.

  With reference to FIGS. 4A-4E, FIGS. 4A-4E illustrate quadrature LO signals associated with transformer feedback QVCO at different proportions of the first and second coupling capacitors according to one embodiment of the present disclosure. FIG. For example, in FIG. 4A, the ratio of coupling capacitors C1 and C2 is about 1 (i.e., 157 fF / 157 fF) for operation at 18.69 GHz, and the phase error is about 0.168, and in FIG. 4B, coupling capacitors C1 and C2 are The ratio is about 2 for operation at 18.69 GHz (ie 314 fF / 157 fF), and the phase error is about 1.514, and in FIG. 4C the ratio of coupling capacitors C1 and C2 is about 1 for operation at 18.69 GHz. / 2 (i.e. 157 fF / 314 fF), and the phase error is about -1.85, the ratio of coupling capacitors C1 and C2 is about 4 (i.e. 628 fF / 314 fF) at 18.69 GHz in FIG. 4D. And the phase error is about 4.206, and in FIG. 4E the ratio of coupling capacitors C1 and C2 is about 1/4 (i.e., 157 fF /) for operation at 18.69 GHz. 28fF), and the phase error is approximately -3.196. Thus, adjusting the ratio of coupling capacitors C1 and C2 can correct for steady state phase errors due to the mismatch of the two VCOs.

  Referring to FIGS. 5A and 5B, FIG. 5A is a curve diagram showing the relationship between phase noise and shift frequency (or relative frequency) associated with transformer feedback QVCO operated at minimum operating frequency, FIG. 5B is also a plot of phase noise and shift frequency (or relative frequency) as it relates to transformer feedback QVCO operated at maximum operating frequency.

In FIG. 5A, when the transformer feedback QVCO operates at the minimum operating frequency, the phase noise is −111.75 dBc / Hz (ie, approximately −110 dBc / Hz) at a frequency shift of 1 MHz, and in FIG. If the unit feedback QVCO operates at the minimum operating frequency, the phase noise is -11.055 dBc / Hz (i.e., about -110 dBc / Hz) at a frequency shift of 1 MHz.
This means that the phase noise of the pressure regulator feedback QVCO 2 of FIG. 3 is reduced as compared to the conventional QVCO.

  Next, referring to FIGS. 6A and 6B, FIG. 6A is a curve diagram showing the relationship between the operating frequency and the variable frequency voltage associated with the transformer feedback QVCO having no capacitor switching device, and FIG. 6B is a different code. FIG. 6 is a curve diagram showing the relationship between the operating frequency and the variable frequency voltage associated with a transformer feedback QVCO having a capacitor switching device given.

  In FIG. 6A, if the capacitor switching device is not used for transformer feedback QVCO, the frequency-voltage curve can not be moved and the logarithmic linear range is not wide. In FIG. 6B, the code of 3 bits (ie, control signals for switches S1 to S3) can be 000 to 111, and thus, the code (ie, in a similar sense, 8 frequencies) The frequency-voltage curve can be moved according to the voltage curve can be selected, and the log linear range is increased (ie approximately 4 times compared to FIG. 6A).

  Finally, referring to FIG. 7, FIG. 7 is a block diagram of a communication device in accordance with an embodiment of the present disclosure. The communication device 5 can be used in 5G mobile communication, and the present disclosure does not limit the application of the communication device 5. The communication device 5 comprises a transformer feedback QVCO 51, a front end circuit 52 and an antenna 53, and the front end circuit 52 is connected to the transformer feedback QVCO 51 and the antenna 53.

  The transformer feedback QVCO 51 can be the transformer feedback QVCO 7 or 2 of FIG. 2 or FIG. 3, and the present disclosure is not limited thereto. Transformer feedback QVCO 51 provides quadrature LO signals I +, I −, Q +, Q − to front end circuit 52. The front end circuit 52 of the present embodiment is a transceiver circuit for generating an RF signal of the data signal Din into the air and receiving an RF signal of the data signal Dout from the air through the antenna 53. However, the present disclosure does not limit the type of front end circuit 52, and in other embodiments, the front end circuit 52 may be a receiver circuit or a transmitter circuit.

  In rigging, embodiments of the present disclosure provide a transformer feedback QVCO and a communication device using the same, and the transformer feedback QVCO uses a body-source capacitor coupling scheme to generate a quadrature LO signal. The coupling capacitor can form a dynamic phase error correction circuit to correct the phase error of the quadrature LO signal due to the coupling network of the transformer feedback QVCO.

  Note that the transformer feedback QVCO has a connection network installed inside the transformer feedback QVCO circuit in place of the output terminal of the transformer feedback QVCO, which reduces the output load and increases the operating frequency. , And phase noise is reduced. In addition, the transformer feedback QVCO can further include a capacitor switching device, which moves the frequency-voltage curve of the transformer feedback QVCO to increase the logarithmic linear range and correct the phase shift at different frequencies can do.

  While the present disclosure has been described using certain embodiments, numerous changes and modifications may be made by those skilled in the art without departing from the spirit and scope of the present disclosure as set forth in the claims. It can be carried out.

Claims (10)

A quadrature voltage controlled oscillator (QVCO),
A first half circuit and a second half circuit electrically connected to the first half circuit,
Each of the first and second half circuits is
First coupling capacitor,
Second coupling capacitor,
Inductive inductor,
NMOS transistor,
A PMOS transistor, and its first end is connected to the first end of the inductive inductor, the drain of the PMOS transistor and the gate of the NMOS transistor, and its second end is the second end of the inductive inductor, the NMOS And a frequency variable circuit connected to the drain of the transistor and the gate of the PMOS transistor,
The inductive inductors of the first and second half circuits form a transformer, and the body of the PMOS transistor of the first half circuit is connected to the second half circuit via the first coupling capacitor of the first half circuit. And the body of the NMOS transistor of the first half circuit is connected to the source of the NMOS transistor of the second half circuit via the second coupling capacitor of the first half circuit. Connected, the body of the PMOS transistor of the second half circuit being connected to the source of the NMOS transistor of the first half circuit via the first coupling capacitor of the second half circuit; The main body of the NMOS transistor of the two half circuit is connected to the PMOS transistor of the first half circuit through the second coupling capacitor of the second half circuit. The drain of the PMOS transistor and the drain of the NMOS transistor are used to output a LO signal of quadrature phase, and the frequency-voltage according to the frequency variable voltage applied to the frequency variable circuit. QVCO where the LO frequency is determined based on the curve.   The first and second coupling capacitors of the first and second half circuits are variable coupling capacitors that form a dynamic phase error correction circuit, and the NMOS transistor and the PMOS transistor of the first half circuit. The QVCO according to claim 1, wherein the inductive inductor forms a first VCO, and the NMOS transistor, the PMOS transistor and the inductive inductor of the second half circuit form a second VCO. Each of the first half circuit and the second half circuit is
The first terminal is connected to the first terminal of the variable frequency circuit, and the second terminal is connected to the second terminal of the variable frequency circuit, and the code given to switch a capacitor A QVCO according to claim 1, comprising a capacitor switching device used to change the frequency-voltage curve. Each of the first half circuit and the second half circuit is
The first inductor further includes a first inductor having a source of the PMOS transistor connected to the system voltage via a first inductor, and a second inductor having a source of the NMOS transistor connected to ground via a second inductor. The QVCO according to claim 1. The frequency variable circuit is
First and second variable capacitors,
Comprising first and second resistors, and first and second capacitors,
The variable frequency voltage is applied to a first end of the first and second variable capacitors,
The second end of the first variable capacitor is connected to the first resistor and the second end of the first capacitor,
The second end of the second variable capacitor is connected to the second resistor and the second end of the second capacitor,
A bias voltage is applied to the first end of the first and second resistors,
The QVCO according to claim 1, wherein the first terminal of the first capacitor and the first terminal of the second capacitor are respectively connected to the drain of the PMOS transistor and the drain of the NMOS transistor.   The QVCO according to claim 5, wherein when the frequency variable voltage increases, the capacitance of the first variable capacitor increases and the capacitance of the second variable capacitor decreases. The capacitor switching device is
Each of the switching switches is connected between the two capacitors,
Each set of the switching switches and two capacitors connected to the switching switches and corresponding to the switching switches are connected in parallel to the other set,
A QVCO according to claim 3, comprising a switch and a capacitor, the code being used to activate or deactivate at least one of the switch. Orthogonal voltage controlled oscillator (QVCO),
A front end circuit connected to the QVCO;
The QVCO comprises a first half circuit and a second half circuit electrically connected to the first half circuit;
Each of the first and second half circuits is
First coupling capacitor,
Second coupling capacitor,
Inductive inductor,
NMOS transistor,
A PMOS transistor, and its first end is connected to the first end of the inductive inductor, the drain of the PMOS transistor and the gate of the NMOS transistor, and its second end is the second end of the inductive inductor, the NMOS And a frequency variable circuit connected to the drain of the transistor and the gate of the PMOS transistor,
The inductive inductors of the first and second half circuits form a transformer, and the body of the PMOS transistor of the first half circuit is connected to the second half circuit via the first coupling capacitor of the first half circuit. And the body of the NMOS transistor of the first half circuit is connected to the source of the NMOS transistor of the second half circuit via the second coupling capacitor of the first half circuit. Connected, the body of the PMOS transistor of the second half circuit being connected to the source of the NMOS transistor of the first half circuit via the first coupling capacitor of the second half circuit; The main body of the NMOS transistor of the two half circuit is connected to the PMOS transistor of the first half circuit through the second coupling capacitor of the second half circuit. The drain of the PMOS transistor and the drain of the NMOS transistor are used to output a LO signal of quadrature phase, and the frequency-voltage according to the frequency variable voltage applied to the frequency variable circuit. Communication equipment in which the LO frequency is determined on the basis of a curve.   The first and second coupling capacitors of the first and second half circuits are variable coupling capacitors that form a dynamic phase error correction circuit, and the NMOS transistor and the PMOS transistor of the first half circuit. 9. The communication device according to claim 8, wherein the inductive inductor forms a first VCO, and the NMOS transistor, the PMOS transistor and the inductive inductor of the second half circuit form a second VCO. Each of the first half circuit and the second half circuit is
The first terminal is connected to the first terminal of the variable frequency circuit, and the second terminal is connected to the second terminal of the variable frequency circuit, and the code given to switch a capacitor 10. A communication device according to claim 9, comprising a capacitor switching device used to change the frequency-voltage curve.

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