JP6534814B2 - INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM - Google Patents

Description

  The present invention relates to an information processing apparatus, an information processing method, and an information processing program which search, extract and output information.

  In software development, information on hardware components that operate or incorporate the software may be required.

  As representative information on hardware components, there is a value (hereinafter referred to as a "RAM value") input to a RAM (random access memory). When acquiring a RAM value, due to system or hardware restrictions, often only a simple RAM monitor (hereinafter referred to as a device for monitoring a RAM value) that can acquire only a RAM value at a specified address can be used. . In this case, in order to obtain the state of software operating on the system from the RAM monitor, it is necessary to correctly set the address, size, etc. of the variable arranged in the RAM.

  Also, the address and size of the variable are also used to check if the program compiles correctly. For example, confirmation that the variable size is the correct size, confirmation that the structure member is arranged at the specified alignment (arrangement of the structure member address to the optimum boundary for the processing system), etc. .

  Therefore, it is important to reliably obtain information such as the address and size of a variable.

  Generally, in C program development, the address and size of a variable declared in a static area can be known by outputting a map file at program link time. The map file describes the addresses and sizes of the variables defined in the program, and when the variable type is a simple type such as char, int or long, the address and size of the variable can be obtained from the map file .

  On the other hand, according to Patent Document 1, even if the variable has a structure, the address of the final access target is calculated using the variable symbol name, the type symbol name, and the type field name by providing the arithmetic operation means of values to the debugger. It is stated that it can be described in the form of a formula.

  Here, in the context of the present invention, pattern matching of character strings using regular expressions will be described below. For example, as described in Non-Patent Document 1, regular expression is one of the methods of expressing a set of character strings by one character string, and pattern matching is performed by application software such as a text editor and word processor. Used to represent strings. In most programming languages, syntax or libraries allow you to use regular expressions. Programming languages and utilities that provide regular expressions in syntax and libraries include grep, AWK, sed, Perl, and Tc. Also, lex used for programming language development etc. also uses regular expressions. Character strings using regular expressions can be searched by pattern matching.

  In addition, the term "symbol" in the present specification is a term used in information engineering and software engineering, and represents a block of symbols included in data or content used in programming, named as a symbol name. .

Japanese Patent Application Publication No. 08-006812

Wikipedia Free encyclopedia, "regular expression", [search November 25, 2014], Internet (URL: http://en.wikipedia.org/wiki/%E6%AD%A3%E8%A6%8F% E8% A1% A8% E7% 8F% BE)

  However, in the above-described method generally used in C program development described above, when the type of the variable is a structure, union, bit field or array, the map file contains the start address of the variable and the size of the entire variable. Is output. Therefore, the address and size of each element (members of structures and unions, and array elements) contained in variables can not be known from the map file. Therefore, in such a case, it is necessary to read the source code, manually calculate the offset address (relative address) of each element, and add the start address of the variable to be output to the map file and the offset address. did not become.

  Further, in the method described in Patent Document 1, even if the address of the final access target can be specified symbolically in the form of an arithmetic expression when the variable has a structure, this work is technically difficult. It is a high and difficult task.

  An object of the present invention is to provide an information processing apparatus, an information processing method, and an information processing program capable of acquiring information about symbols such as variables reliably, easily, and in a short time.

  The apparatus comprises debug information input means for converting the input debug information into a signal for subsequent processing, and search condition input means for converting the input search condition used when performing a search into a signal for subsequent processing. Then, from the offset address for the symbol contained in the debug information, an address for the symbol is obtained, and preprocessing is provided to generate address information including information in which the address is associated with the symbol. Furthermore, search extraction means for performing the search for the debug information according to the search condition and for extracting the extraction information corresponding to the contents searched for by the search for the item; and extraction information for outputting the extraction information It has an output means.

  The information processing apparatus according to the present embodiment can reliably and easily obtain information on symbols such as variables in a short time.

It is a conceptual diagram showing the structure and operation | movement of the information processing apparatus of 1st embodiment. It is a conceptual diagram showing the structure of the information processing apparatus of 2nd embodiment. It is an example of input of search conditions using a regular expression. It is a conceptual diagram showing the flow of the information processing in the information processing apparatus of 2nd embodiment. It is a conceptual diagram showing the composition of the information processor of a third embodiment. It is a conceptual diagram showing the flow of the information processing in the information processing apparatus of 3rd embodiment. It is a conceptual diagram showing the example of the process in the step of S304 of FIG. It is a conceptual diagram (the 1) which shows the example of the condition of the data after a process. It is a conceptual diagram (the 2) which shows the example of the condition of the data after a process. It is a conceptual diagram (the 3) which shows the example of the condition of the data after a process. It is a conceptual diagram (the 4) which shows the example of the condition of the data after a process. It is a conceptual diagram (the 5) which shows the example of the condition of the data after a process. It is a conceptual diagram (the 6) which shows the example of the condition of the data after a process. It is a conceptual diagram (the 7) which shows the example of the condition of the data after a process. It is a conceptual diagram showing the structure of the information processing apparatus of 4th embodiment. It is a conceptual diagram which shows the example of the source code input. It is a conceptual diagram showing the flow of the information processing in the information processing apparatus of 4th embodiment.

The first embodiment is an embodiment related to the information processing apparatus with the minimum configuration of the present invention.
[Configuration and operation]
FIG. 1 is a conceptual diagram showing the configuration and operation of the information processing apparatus of this embodiment.

  The information processing device 1 of the present embodiment includes an extraction information output device 90.

  The extraction information output device 90 includes a debug information input unit 100, a search condition input unit 110, an extraction item designation unit 160, a preprocessing unit 150, a search extraction unit 120, and an extraction information output unit 140.

  The debug information input unit 100 outputs information used for debugging by a debugger (not shown) (hereinafter referred to as “debug information”) output by compiling / linking by a compiler / linker (not shown) as a signal for subsequent processing. Do. A signal including debug information is sent to the preprocessing unit 150.

  The search condition input unit 110 sets the input search condition as a signal for subsequent processing. The signal including the search condition is sent to the search extraction unit 120.

  The preprocessing unit 150 obtains the address of the symbol using the offset address of the symbol included in the debug information input unit 100, and associates the address with the symbol. Then, address information including an address associated with the symbol is generated. The signal including the address information is sent to the search extraction unit 120.

  The search extraction unit 120 searches the address information sent from the pre-processing unit 150 according to the search condition sent from the search condition input unit 110, and extracts the corresponding information from the searched contents. The signal including the extracted information is sent to the extraction information output unit 140.

The extraction information output unit 140 outputs the extracted information based on the information sent from the search extraction unit 120.
[effect]
The information processing apparatus according to the present embodiment can acquire information on symbols reliably, easily, and in a short time.
Second Embodiment
In the second embodiment, the character string included in the debug information is searched for one that matches the character string described by the regular expression input as the search condition, and the information corresponding to the searched character string is extracted This embodiment relates to an information processing apparatus.
[Configuration and operation]
FIG. 2 is a conceptual diagram showing the configuration of the information processing apparatus of the present embodiment.

  The information processing device 1 of the present embodiment includes an extraction information output device 90.

  The extraction information output unit 90 includes a debug information input unit 100, a search condition input unit 110, an extraction item designation unit 160, a preprocessing unit 150, a search extraction unit 120, a processing unit 130, and an extraction information output unit 140. And

  The debug information input unit 100 uses the input debug information as a signal for subsequent processing. The signal is sent to the pre-processing unit 150.

  The search condition input unit 110 sets the input search condition as a signal for subsequent processing. The signal is sent to the search extraction unit 120.

  The extraction item designation unit 160 designates the extraction item including the address calculated using the offset address, which is extracted for the content to be searched in the search and extraction unit 120. The signal including the designated extraction item is sent to the search extraction unit 120.

  The preprocessing unit 150 obtains the address of the symbol using the offset address of the symbol included in the debugging sent from the debug information input unit 100, and associates the address with the symbol. In addition, a part of the information other than the offset address included in the debug information is associated with the symbol. A signal including information associated with these symbols is sent to the search extraction unit 120.

  The search extraction unit 120 searches for the address information sent from the preprocessing unit 150 according to the search condition sent from the search condition input unit 110. Then, for the extraction item designated in the extraction item designation unit 160, information corresponding to the searched content is extracted. The extracted information is sent to the processing unit 130.

  The processing unit 130 processes the information sent from the search extraction unit 120. The processed signal is sent to the extraction information output unit 140.

  The extraction information output unit 140 outputs the extracted information based on the information sent from the processing unit 130.

  The debug information input from the debug information input unit 100 is input from a debugger (not shown), a recording device (not shown) that records debugger information, etc.

  The debugging information varies depending on the type of debugger used. The debugging information is typically symbol information, type information, source code, and line number information when debugging is performed using a symbolic debugger that performs debugging using symbol names. The symbol information includes the symbol name, address, size, type, and scope of the symbol. Type information includes type name, type, size, other linked types, child types, offsets, function calling conventions, and so on.

  The debugging information is basically described in binary format, but the symbol name is stored as a string in the debugging information.

  The search conditions input from the search condition input unit 110 may be input by a signal from an external recording device (not shown) in which the search conditions are recorded, even if the search conditions are input by the operation of the operator using a keyboard such as a computer. Absent.

  The search target in the search condition is described by a character string. The search target uses the name (variable name, member name, array element, etc.) of the symbol to be output described by a regular expression in C language notation. FIG. 3 shows an example of search target input using a regular expression. The figure shows an example of input when a variable beginning with var1 is specified by a regular expression.

  The search and extraction in the search and extraction unit 120 are performed after all the debug information sent from the debug information input unit 100, the search condition sent from the search condition input unit 110, and the extraction item sent from the extraction item designation unit 160 are complete. These pieces of information are typically recorded in a recording unit (not shown) and read by reading the recorded information.

  The search in the search extraction unit 120 is performed by determining whether the character string representing the search target matches the character string stored in the debug information. If they match, the information corresponding to the matched character string is extracted. By describing a character string representing a search target by using a regular expression, it is possible to use a character string matching search program commonly used widely in software development and generally used. As a result, it is possible to easily search the character string of the search condition from the debug information which looks like a list of information, and to extract the information corresponding to the character string.

  Extraction and output of extraction information for an extraction item can be performed, for example, as follows.

  If the type of the variable is a simple type, an address etc. is extracted and output for a symbol name whose character string matches the symbol name of the character string representing the variable input as the search target.

  If the type of the variable is a structure, union or bit field, the offset address (relative address) of the member they possess is obtained from the information extracted about them, and the address of the member is automatically calculated and output. If the structure is composed of structures and is nested, then the members and offsets of the child structures are obtained, and the address is automatically calculated and output.

  If the variable or its member is an array, an address is output for each array element.

  The member name and element name (symbol name) of the array are output in C language notation, detailed address information (address and size, bit position and bit width in the case of bit field) are output for each element, and the developer Form that can be intuitively understood. Also, the extraction information may be enormous. In such a case, it is more preferable to have a search by symbol name and a narrowing function. The search condition at this time can be described by a regular expression. The narrowing function can narrow down and output only necessary variable information. Even when the structure information is nested in multiple layers, information on variables including the members can be acquired by giving the member name at the end as a search condition.

  Since the extraction information is described in binary format, it is converted to a character string and output. For conversion at this time, generally used conversion software is used.

The extraction item designated in the extraction item designation unit 160 may be designated by input or may use a preset value. The input at this time may be performed by the operator using a keyboard such as a computer, or may be performed by a signal from a recording device (not shown) in which extraction items are recorded in advance.
Processing flow
FIG. 4 is a conceptual diagram showing the flow of information processing in the information processing apparatus of the present embodiment.

  First, the debug information input unit 100 sets the input debug information as a signal Va for subsequent processing (S201). The signal Va is sent to the pre-processing unit 150.

  Next, the search condition input unit 110 sets the input search condition as a signal Vb for subsequent processing (S202). The signal Vb is sent to the search extraction unit 120.

  Then, the extraction item designation unit 160 designates an extraction item to be extracted for the search object in the search and extraction unit 120 (S203). The signal Vc including the designated extraction item is sent to the search extraction unit 120.

  The preprocessing unit 150 uses the offset address of the symbol included in the debugging sent from the debug information input unit 100, obtains the address of the symbol (S204), and associates the address with the symbol. In addition, a part of information other than the offset address included in debug information is associated with the symbol. Then, address information including an address associated with the symbol is generated. The signal Vd including the address information is sent to the search extraction unit 120.

  The search extraction unit 120 searches the address information sent from the pre-processing unit 150 based on the search condition sent from the search condition input unit 110, and finds the content that matches the search condition. If there is a content that matches, for the extraction item sent from the extraction item designation unit 160, information corresponding to the content that matches is extracted. (S205). The signal Ve including the extracted information is sent to the processing unit 130.

  The processing unit 130 processes the information sent from the search and extraction unit 120 into a signal Vf for output (S206). The signal Vf is sent to the extraction information output unit 140.

  The extraction information output unit 140 outputs the extracted information based on the signal sent from the processing unit 130 (S207).

In the figure, the steps of S201 to S203 can be switched in order.
[effect]
The information processing apparatus according to the present embodiment can acquire information on symbols such as variables reliably and easily in a short time, as in the information processing apparatus according to the first embodiment.

  The information processing apparatus according to the present embodiment does not require a manual operation and does not have the difficulty of operation as in the method described in Patent Document 1. Therefore, among these effects, information about symbols can be easily It does not supplement in particular about the point which can be acquired in a short time. In the following, among these effects, the point that information on symbols can be reliably acquired will be supplementarily described.

  First, the information processing apparatus according to the present embodiment can reliably know the address of a variable that is a symbol and its address even when the element is a structure. For example, the offset addresses of structure members may be aligned to address boundaries depending on compile time options. As a result, unexpected padding may occur between members, but it is difficult to predict the occurrence of padding only by reading the source code. Since offset addresses after alignment are recorded in the structure information in the debug information used in the information processing apparatus of the present embodiment, a reliable member address can be acquired. Therefore, the address acquired by the information processing apparatus of the present embodiment has much higher reliability than the address acquired by the conventional manual operation.

  In addition to that, since the information processing apparatus according to the present embodiment performs a search based on a character string match, even when the structure information further includes structure information and is nested in multiple layers, the end member name By using as the search condition, it is possible to obtain the address of the variable including the member.

  The effects will be specifically described below in comparison with the method described in Patent Document 1 and the case of using a general symbolic debugger.

  In a general symbolic debugger, for example, var1. m_union. m_bitf. If m_bitf1 is input, the address etc. of the symbol can be acquired. Also, if var1 is known, it is possible to derive "var1.m_union" from "var1", derive "var1.m_union.m_bitf" from it, and further derive "var1.m_union.m_bitf.m_bitf1" from it. is there. However, in a situation where only "m_bitf1" is known, "var1.m_union.m_bitf.m_bitf1" can not be derived. Therefore, information such as the address of the corresponding symbol can not be obtained.

  In the method described in Patent Document 1, for example, it is supposed that the desired address 0x0800010 can be acquired by specifying “var1.m_union.m_bitf.m_bitf1” as information representing a symbol. However, in order to derive "var1.m_union.m_bitf.m_bitf1", it is necessary to read and understand the source code, and the more complicated the structure becomes, the more difficult the work becomes.

The information processing apparatus according to the present embodiment searches for a symbol based on a character string match and extracts information corresponding to the symbol. Therefore, "var1.m_union.m_bitf.m_bitf1" can be easily derived simply by specifying "m_bitf1" as information representing a symbol, and acquisition of target information corresponding thereto can be reliably performed. This effect can not be obtained by the above-mentioned general symbolic debugger method or the method described in Patent Document 1.
Third Embodiment
The third embodiment is an embodiment relating to an information processing apparatus that generates a detailed map of information including the address and size of a symbol.
[Configuration and operation]
FIG. 5 is a conceptual diagram showing the configuration of the information processing apparatus of the present embodiment.

  The information processing device 1 of the present embodiment includes an extraction information output device 90.

  The extraction information output unit 90 includes a debug information input unit 100, a preprocessing unit 150, a search condition input unit 110, an extraction item designation unit 160, a search extraction unit 120, a processing unit 130, and an extraction information output unit 140. And

  The debug information input unit 100 uses the input debug information as a signal for subsequent processing. The signal is sent to the pre-processing unit 150.

  The preprocessing unit 150 converts the debug information sent from the debug information input unit 100 into information suitable for search in the search extraction unit 120. The preprocessing unit 150 creates, for example, information on the addresses and sizes of all the variables included in the program. If the type of the variable is a structure, union, bit field or array, detailed address information (address and size, bit position and bit width for bit field) is created for each element. The signal including the created information is sent to the search extraction unit 120.

  From the search condition input unit 110, symbol names (variable names, member names, array elements) of symbols desired to be output to a detailed map file exemplified later are described and input in C language notation. At this time, the search target is described by a regular expression. The search condition input unit 110 sets the input search condition as a signal for subsequent processing. The signal is sent to the search extraction unit 120.

  The extraction item designation unit 160 designates an extraction item to be extracted in the search and extraction unit 120. The specified extraction item is sent to the search extraction unit 120.

  The extraction item designation unit 160 designates an extraction item to be extracted in the search and extraction unit 120. The specified extraction item is sent to the search extraction unit 120.

  The search extraction unit 120 searches the information sent from the preprocessing unit 150 according to the search condition sent from the search condition input unit 110. When the symbol name set as the search condition is searched, information corresponding to the extraction item is extracted for the symbol name. The signal including the extraction item is sent to the processing unit 130.

  The processing unit 130 processes the information sent from the search extraction unit 120, and makes a signal for outputting a detailed map showing an example later. The signal is sent to the extraction information output unit 140.

  The extraction information output unit 140 outputs a detailed map based on the information sent from the processing unit 130.

The explanation of the debug information, the search and extraction, the output of the extraction information, the search condition and the extraction item other than the explanation in the present embodiment is the same as the description of the information processing apparatus of the second embodiment. Therefore, I omit the explanation.
Processing flow
FIG. 6 is a conceptual diagram showing a flow of information processing in the information processing apparatus of the present embodiment.

  First, the debug information input unit 100 sets the input debug information as a signal Va for subsequent processing (S301). The signal Va is sent to the search extraction unit 120.

  Next, the search condition input unit 110 sets the input search condition as a signal Vb for subsequent processing (S302). The signal Vb is sent to the search extraction unit 120.

  Then, the extraction item designation unit 160 designates an extraction item to be extracted for the search object in the search extraction unit 120 (S303). The signal Vc including the designated extraction item is sent to the search extraction unit 120.

  Next, the preprocessing unit 150 converts the debug information sent from the debug information input unit 100 into information suitable for search in the search extraction unit 120 (S304). This process will be described later. The signal Vd including the converted information is sent to the search extraction unit 120.

  Based on the search condition sent from the search condition input unit 110, the search extraction unit 120 searches for the information sent from the pre-processing unit 120, and finds content that matches the search condition. If there is a content that matches, for the extraction item sent from the extraction item designation unit 160, information corresponding to the content that matches is extracted. (S305). The signal Ve including the extracted information is sent to the processing unit 130.

  The processing unit 130 processes the information sent from the search and extraction unit 120 into a signal Ve for outputting (S306). The signal Vf is sent to the extraction information output unit 140.

  The extraction information output unit 140 outputs the extracted information based on the signal sent from the processing unit 130 (S307).

  In the same figure, in the steps of S301 to S304, their order can be switched under the condition that S302 is after S301.

  FIG. 7 is a conceptual diagram showing an example of processing in step S304 of FIG. Here, a case is shown where detailed information list data to be displayed for address, size, bit position and bit width is obtained for all members of a symbol. The detailed information list in this case is information suitable for the search in the search extraction unit 120, which is converted by the pre-processing unit 150 described above.

  First, debug information is searched for and extracted (S321). The basic address of the symbol (the address of the highest symbol rather than the members of the symbol) is searched (S321).

  Next, it is determined whether there is a member one level lower than the symbol (S322).

  If there is a member one level lower, one of them is identified (S323). If there is no member one level lower, the process ends.

  Then, with respect to the identified member, the offset address and the type of the member are searched and extracted for debugging information (S324).

  Next, for the member, an offset address is added to the basic address to obtain an address (S325). The address is recorded in association with the symbol name of the member.

  Furthermore, it is determined whether the type of the member obtained in S322 is a bit field (S326).

  If it is determined that the type of the member is a bit field, the address, size, bit position and bit width are recorded in association with the symbol name of the member (S327). Then, it progresses to S330.

  If it is determined that the type of the member is not a bit field, it is determined whether the type of the member is a structured type (S328).

  If the type of the member is not a structural type, the address and size are recorded in association with the symbol name of the member (S329). Then go to 330.

  If the type of the member is a structural type, the process advances to step S323. .

  Next, with respect to members of the same hierarchy, it is determined whether there is a member whose address is unrecorded (S330).

  If it is determined that there is an unrecorded member in the address for a member of the same hierarchy, one of the unrecorded members is identified, and it is decided to perform the subsequent processing for the identified member (S331) ). Then, the process proceeds to S324.

  If it is determined that there is no unrecorded member for the address for the members of the same hierarchy, then it is determined whether there is an unrecorded member for the address for the next higher layer member (332).

  If there is a member whose address is unrecorded for a member of the next higher hierarchy, one of the members is identified, and it is decided to carry out the subsequent processing for the identified member (S333). Then, the process proceeds to step S323.

  If there is no member whose address is unrecorded for the member of the next higher hierarchy, it is determined whether or not there is a member whose address is not yet recorded for the members of the further higher hierarchy (S334).

  Further, if it is determined that there is an unrecorded member in the address for the member of the upper hierarchy, one of the unrecorded members is identified, and it is decided to perform the subsequent processing for the identified member. (S335). Then, the process proceeds to step S323.

  If it is determined that there is no member whose address is not yet recorded for the member of the upper hierarchy, the processing is ended.

  Thus, for all members of the symbol, the address and size, and bit position and bit width in the case of type bit field, are recorded in association with the symbol name.

  8a to 8g are conceptual diagrams showing an example of the status of data after processing for some of the processing described in FIG. This data may not be output but may only be recorded in a recording unit (not shown) of the pre-processing unit 150, but here, for ease of understanding, the case where the data is output is shown.

  Also, in the figure, symbols are illustrated for the following contents.

  Display a list of detailed information to be displayed for address, size, bit position and bit width for all members of the symbol name var1. This detailed information list is the above-mentioned "information suitable for search in the search extraction unit 120".

  Var1 has two members, m_struct and m_union.

  M_struct has two arrays of m_struct [0] and m_struct [1].

  M_struct [0] has three submembers m_str1, m_str2 and m_str3.

  M_struct [1] has three submembers m_str1, m_str2 and m_str3.

  M_union has two submembers of m_bitf and m_array.

  M_bitf has a sub-member represented by three bit fields of m_bit f1, m_bit f2 and m_bit f3.

  M_array has four arrays of m_array [0], m_array [1], m_array [2] and m_array [3].

  ・ Var1. m_union. m_bitf. m_bitf3 and var1. m_union. m_array. m_array [0] constitutes a union.

  FIG. 8a is a conceptual diagram showing the state of data after the process of S321. A basic address has been extracted for the symbol name var1.

  FIG. 8b is a conceptual diagram showing the state of data after the first processing of S324. The symbol name is var1. The offset address and type are displayed for the members of m_struct [0].

  FIG. 8 c is a conceptual diagram showing the state of data after the first processing of S 325. The symbol name is var1. The address and type are displayed for the members of m_struct [0].

  FIG. 8 d is a conceptual diagram showing the state of data at the time shown in the figure. var1. m_struct [0]. m_str1, var1. m_struct [0]. m_str2 and var1. m_struct [0]. Addresses and sizes are displayed for three members with symbol names of m_str3.

  FIG. 8 e is a conceptual diagram showing the state of data at the time shown in the figure. Furthermore, var1. m_struct [1]. m_str1, var1. m_struct [1]. m_str2 and var1. m_struct [1]. Addresses and sizes are displayed for three members with symbol names of m_str3.

  FIG. 8 f is a conceptual diagram showing the state of data at the point shown in the figure. The address, size, bit position and bit width are displayed for the members represented by the three bit fields.

  Thus, by sequentially performing the processing shown in the conceptual diagram in FIG. 7, finally, the data of the content representing the conceptual diagram in FIG. 8g is recorded, and the processing is completed.

  In the data shown in FIG. m_union. m_bitf. m_bitf3 and var1. m_union. m_array. The same address with m_array [0] is because these two symbols have the same shared type.

The contents of the detailed map output by the extraction information output unit 140 are the same as the contents described in FIG.
In the search condition input unit 110, a condition to search for all members of the symbol name var1 is input.
Further, the extraction item designation unit 160 designates to extract the symbol name, the address, the size, the bit position, and the bit width.

It is of course possible to narrow down the search condition input in the search condition input unit 110 and the extraction item specified in the extraction item specification unit 160 to output information in a limited range.
[effect]
The information processing apparatus of the present embodiment exhibits the same effects as the information processing apparatus of the second embodiment.

  In addition, the information processing apparatus according to the present embodiment performs extraction of addresses and sizes of all elements included in variables that are symbols much more easily and in a short time as compared with the case where the conventional manual processing is performed. can do. Therefore, for example, inspection / debug work at the time of embedded software development and setting work for the RAM monitor necessary for that can be significantly shortened.

Furthermore, the information processing apparatus according to the present embodiment can reliably acquire a list of all candidate variables, even for variables in which structures are nested in multiple layers. In the case of a variable in which structures are nested in multiple layers, it is very laborious to find the parent variable name from the source code from the end member name, and it is easy to make a work mistake. However, in the information processing apparatus according to the present embodiment, by giving the member name as the search condition, it is possible to obtain a list of all the candidate variables. Therefore, the address information of the variable to be inspected can be acquired without well knowing the source code contents, and the technical hurdles of the workers can be dramatically reduced.
Fourth Embodiment
The present embodiment is an embodiment related to an information processing apparatus further comprising a compiler / linker.
[Configuration and operation]
FIG. 9 is a conceptual diagram showing the configuration of the information processing apparatus of the present embodiment.

  The information processing device 1 of the present embodiment includes a compiler / linker 10 and an extraction information output device 90.

  The compiler / linker 10 includes a source code input unit 20, a compile / link processing unit 30, an object code output unit 40, and a debug information output unit 80.

  The extraction information output unit 90 includes a debug information input unit 100, a preprocessing unit 150, a search condition input unit 110, an extraction item designation unit 160, a search extraction unit 120, a processing unit 130, and an extraction information output unit 140. And

  The source code input unit 20 of the compiler / linker 10 uses the input source code to be processed as a signal for subsequent processing. The signal is sent to the compile / link processor 30.

  The compile / link processing unit 30 compiles / links the source code sent from the source code input unit 20 to generate an object code and debug information. The generated object code is sent to the object code output unit 40. The generated debug information is sent to the debug information output unit 80.

  The object code output unit 40 outputs the object code sent from the compilation / link processing unit 30.

  The debug information output unit 80 outputs the debug information sent from the compilation / link processing unit 30 to the debug information input unit 100 of the extraction information output device 90.

  FIG. 10 is a conceptual diagram showing an example of source code input from the source code input unit 20. As shown in FIG. The source code shows the part about the definition of the variable which is a symbol.

The description of the extraction information output device 90 is the same as that of the third embodiment, and thus the description thereof is omitted here.
Processing flow
FIG. 11 is a conceptual diagram showing the flow of information processing of the information processing apparatus of this embodiment.

  First, source code to be processed is input to the source code input unit 20 of the compiler / linker 10 (S401). The signal Vg including the source code is sent to the compile / link processor 30.

  The compile / link processing unit 30 compiles / links the source code sent from the source code input unit 20, and generates an object code and debug information (S402). The signal Vh including the generated object code is sent to the object code output unit 40. The generated debug information is sent to the debug information output unit 80.

  The object code output unit 40 outputs the object code sent from the compilation / link processing unit 30 (S403).

  The debug information output unit 80 outputs the signal Vi including the debug information sent from the compile / link processing unit 30 to the debug information input unit 100 of the extraction information output device 90 (S404).

The description of the steps after S405 is the same as the description of FIG. 6 in the third embodiment, and thus the description thereof is omitted here.
[effect]
The information processing apparatus of the present embodiment exhibits the same effects as the information processing apparatus of the third embodiment.

  In addition, the information processing apparatus according to the present embodiment can create a detailed map as well as the task of compiling / linking the target source code.

  Although the present invention has been described above with reference to the preferred embodiments, the present invention is not necessarily limited to the above embodiments, and can be variously modified and implemented within the scope of the technical idea thereof.

In addition, part or all of the above-described embodiment may be described as in the following appendices, but is not limited to the following.
(Supplementary Note 1)
Debug information input means for converting the input debug information into a signal for subsequent processing;
Search condition input means for converting the input search conditions used in the search into signals for subsequent processing;
Pre-processing means for obtaining an address for the symbol from an offset address for the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
Search extraction means for performing the search for the address information according to the search condition and for extracting extraction information corresponding to the contents searched for by the search;
Extraction information output means for outputting the extraction information;
An information processing apparatus comprising:
(Supplementary Note 2)
The information processing apparatus according to appendix 1, wherein a search target in the search condition is described as a regular expression.
(Supplementary Note 3)
The information processing apparatus according to claim 1 or 2, wherein a search target of the search is a symbol name.
(Supplementary Note 4)
The debug information stores a string symbol name described by a string,
The search target in the search condition is a character string search target input by a character string,
The search is a search for a match between the character string search target and the character string symbol name,
The information processing apparatus according to appendix 3, wherein the information corresponding to the matched character string symbol name is extracted.
(Supplementary Note 5)
The information processing apparatus according to appendix 3 or 4, wherein the symbol name is a symbol name for a variable or a member of the variable.
(Supplementary Note 6)
The information processing apparatus according to appendix 5, wherein the extraction of the offset address of the member of the variable whose type is a structure or a union is performed, and the address of the member is calculated by the offset address.
(Appendix 7)
The information processing apparatus according to appendix 6, wherein the extraction of the offset addresses of all the members of the variable is performed, and the addresses of all the members are calculated by the offset addresses.
(Supplementary Note 8)
The information processing apparatus according to appendix 5, wherein the extraction of the offset address of the member whose type is the bit field is performed, and the address of the member is calculated by the offset address.
(Appendix 9)
The information processing apparatus according to appendix 8, wherein the extraction of the offset addresses of all the members is performed, and the addresses of all the members are calculated by the offset addresses.
(Supplementary Note 10)
The information processing apparatus according to any one of appendices 5 to 9, wherein, when the variable or the member of the variable is an array, the array or the member of the array is extracted.
(Supplementary Note 11)
The information processing apparatus according to any one of appendices 1 to 10, wherein the extraction information includes an address and a size of the search target.
(Supplementary Note 12)
11. The information processing apparatus according to appendix 11, wherein the extraction information further includes a bit position and a bit width of the search target.
(Supplementary Note 13)
The information processing apparatus according to any one of appendices 1 to 12, further comprising a compiler that outputs the debug information.
(Supplementary Note 14)
Converting the input debug information into a signal for subsequent processing;
Converting the input search conditions used for the search into a signal for subsequent processing;
Obtaining an address for the symbol from an offset address for the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
Performing the search for the address information according to the search condition, and extracting extraction information corresponding to the content searched for by the search;
Outputting the extraction information;
Information processing method including:
(Supplementary Note 15)
Processing to make input debug information a signal for subsequent processing;
A process of converting the input search conditions used for the search into a signal for subsequent processing;
Obtaining an address for the symbol from an offset address for the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
A process of performing the search on the address information according to the search condition, and extracting extraction information corresponding to the content searched by the search;
A process of outputting the extraction information;
An information processing program that causes a computer to execute processing including

DESCRIPTION OF SYMBOLS 1 information processing apparatus 10 compiler / linker 20 source code input part 30 compile / link processing part 40 object code output part 80 debug information output part 90 extraction information output device 100 debug information input part 110 search condition input part 120 search extraction part 130 processing Part 140 Extraction information output part 150 Pre-processing part 160 Extraction item specification part

Claims (10)

Debug information input means for converting the input debug information into a signal for subsequent processing;
Search condition input means for converting the input search conditions used in the search into signals for subsequent processing;
Pre-processing means for obtaining an address for the symbol from an offset address for the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
Search extraction means for performing the search for the address information according to the search condition and for extracting extraction information corresponding to the content specified by the search;
Extraction information output means for outputting the extraction information;
Equipped with
The search target of the search is a symbol name,
The symbol name is for a variable or a member of that variable,
An information processing apparatus for extracting the offset address of the member of the variable whose type is a structure or a union, and calculating the address of the member by the offset address .   Debug information input means for converting the input debug information into a signal for subsequent processing;
  Search condition input means for converting the input search conditions used in the search into signals for subsequent processing;
  Pre-processing means for obtaining an address for the symbol from an offset address for the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
  Search extraction means for performing the search for the address information according to the search condition and for extracting extraction information corresponding to the content specified by the search;
  Extraction information output means for outputting the extraction information;
  Equipped with
  The search target of the search is a symbol name,
  The symbol name is for a variable or a member of that variable,
  The extraction of the offset address of the member whose type is the bit field is performed, and the address of the member is calculated by the offset address.
  Information processing device. The information processing apparatus according to claim 1, wherein a search target in the search condition is described by a regular expression. The debug information stores a string symbol name described by a string,
The search target in the search condition is a character string search target input by a character string,
The search, and the character string search target, is for the match with the character string symbol name,
Extracting the information corresponding to the matched character string symbol name
An information processing apparatus according to any one of claims 1 to 3 . In the case where the variable and the members of the array, and an information processing apparatus according to any one of claims 1 to 4, the extracted for the members of the sequence or sequence. Converting the input debug information into a signal for subsequent processing;
Using the input search conditions to be used for the search as a signal for subsequent processing;
Obtaining an address for the symbol from an offset address for the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
Performing the search for the address information according to the search condition, and extracting extraction information corresponding to the content specified by the search;
Outputting the extraction information;
Only including,
The search target of the search is a symbol name,
The symbol name is for a variable or a member of that variable,
The extraction of the offset address of the member of the variable whose type is the structure or union is performed, and the address of the member is calculated by the offset address.
Information processing method.   Converting the input debug information into a signal for subsequent processing;
  Using the input search conditions to be used for the search as a signal for subsequent processing;
  Obtaining an address for the symbol from an offset address for the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
  Performing the search for the address information according to the search condition, and extracting extraction information corresponding to the content specified by the search;
  Outputting the extraction information;
Including
  The search target of the search is a symbol name,
  The symbol name is for a variable or a member of that variable,
  The extraction of the offset address of the member whose type is the bit field is performed, and the address of the member is calculated by the offset address.
  Information processing method.   8. The information processing method according to claim 6, wherein a search target in the search condition is described by a regular expression. Processing to make input debug information a signal for subsequent processing;
A process of converting the input search conditions used for the search into a signal for subsequent processing;
A process of obtaining an address of the symbol from an offset address of the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
A process of performing the search for the address information according to the search condition, and extracting extraction information corresponding to the content specified by the search;
A process of outputting the extraction information;
Let the computer execute the process including
The search target of the search is a symbol name,
The symbol name is for a variable or a member of that variable,
The extraction of the offset address of the member of the variable whose type is the structure or union is performed, and the address of the member is calculated by the offset address.
Information processing program. Processing to make input debug information a signal for subsequent processing;
A process of converting the input search conditions used for the search into a signal for subsequent processing;
A process of obtaining an address of the symbol from an offset address of the symbol included in the debug information, and generating address information including information in which the address is associated with the symbol;
A process of performing the search for the address information according to the search condition, and extracting extraction information corresponding to the content specified by the search;
A process of outputting the extraction information;
Let the computer execute the process including
The search target of the search is a symbol name,
The symbol name is for a variable or a member of that variable,
The extraction of the offset address of the member whose type is the bit field is performed, and the address of the member is calculated by the offset address.
Information processing program.

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