JP6512789B2 - Liquid crystal display device and control method of liquid crystal display device - Google Patents

Description

  The present invention relates to a liquid crystal display device and a control method of the liquid crystal display device.

  In recent years, with the development of semiconductor technology, it has become possible to increase the refresh rate of display devices. In particular, in a liquid crystal panel (also referred to as an IGZO liquid crystal panel) using an In-Ga-Zn-based oxide (IGZO) as an oxide semiconductor, a refresh rate of several tens of ms is usually required. Refreshing in the order of ms or more makes it possible to display without problems.

  In other words, when the image update interval is smaller than the refresh rate, it is not necessary to refresh at a constant interval according to the refresh rate, and it is only necessary to perform the refresh when updating the image. Thus, power consumption can be reduced by reducing refresh.

  With respect to a display device such as this IGZO liquid crystal panel capable of increasing the refresh rate, there is known a technique of changing the refresh rate according to an image to be displayed (Patent Document 1). Specifically, if the number of halftone pixels is small, a technique for suppressing eye fatigue of the user is suggested by setting the refresh rate to, for example, 1 Hz.

JP, 2014-130337, A

  However, in the invention disclosed in the above patent document, the refresh rate changes depending on the image to be displayed, so the polarity of the semiconductor element at the time of driving the liquid crystal panel may be biased to one side depending on the image update timing.

  The refresh operation is to re-store the charge to the initial level again before the charge stored in the semiconductor element is released, and usually, the electrical polarity of the semiconductor element is reversed every refresh. Therefore, if the refresh rate is fixed, the polarity is always reversed at the same time, and no bias occurs, but if the refresh rate is changed by the image, the balance of the polarity can not be maintained.

  In addition, in the case where the image update interval is slightly longer than the refresh rate, refresh for image update may be performed again immediately after the refresh operation, and as a result, almost only one polarity may be obtained.

  Continued use with biased polarity may lead to flickering of the screen at the time of refreshing, and may lead to shortening the life of the semiconductor element.

  The present invention has been made to solve the problems as described above, and it is an object of the present invention to provide a liquid crystal display device capable of preventing polarization deviation and a control method of the liquid crystal display device.

  A liquid crystal display device according to one aspect of the present invention is a liquid crystal display device that displays an image represented by the input image data by applying a voltage according to the input image data to a liquid crystal layer in the display unit. A driving unit for applying a voltage corresponding to the liquid crystal layer, a calculating unit for calculating the degree of polarization bias of the voltage applied to the liquid crystal layer, and the liquid crystal layer are applied based on the calculation result of the calculating unit And a display control unit configured to control the drive unit such that the bias of the voltage polarity is reduced.

  It is possible to prevent polarity bias.

It is a figure explaining the bias | inclination of the polarity by the drive of a liquid crystal panel. It is a block diagram which shows the structure of the liquid crystal display device 2 which concerns on 1st Embodiment of this invention. FIG. 3 is a block diagram showing a configuration of a display control circuit 200 included in the liquid crystal display device 2. It is a figure explaining the table which judges the bias of polarity. FIG. 7 is a flowchart illustrating processing of a deviation degree calculation unit 220. FIG. 7 is a flow diagram instructing execution of reverse refresh processing in the timing control unit 230 based on the first embodiment. It is a figure explaining the timing chart in the case of performing refresh operation based on a 1st embodiment. FIG. 14 is a flow diagram instructing execution of reverse refresh processing in the timing control unit 230 based on the second embodiment. It is a figure explaining the timing chart in the case of performing refresh operation based on a 2nd embodiment. FIG. 18 is a flow diagram instructing execution of reverse refresh processing in the timing control unit 230 based on the third embodiment.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding portions are denoted by the same reference characters and description thereof will not be repeated.

  In this specification, normal refresh driving at a refresh rate is referred to as “normal refresh”, and refresh driving for polarity inversion is referred to as “inversion refresh”.

<0. Basic study>
Before describing the embodiments of the present invention, a basic study made by the inventor of the present application to solve the above problems will be described.

FIG. 1 is a diagram for explaining the bias of the polarity due to the driving of the liquid crystal panel.
As shown in FIG. 1A, a vertical synchronization signal (VSYNC) which is a synchronization signal is generated at a constant cycle. Further, input image data of a display update rate is input at a predetermined timing.

Then, the liquid crystal drive unit drives the liquid crystal in accordance with the display update request.
In the case of the conventional driving of the liquid crystal panel, the liquid crystal is driven at a constant cycle regardless of the update interval of the screen.

  Therefore, as the cumulative polarity, since the method of applying the positive polarity and then applying the negative polarity is continuously repeated, no bias occurs in the polarity.

  On the other hand, when driving the liquid crystal in accordance with the screen update rate, since the liquid crystal panel is driven simultaneously with the screen update request, the polarity may be slightly biased in accordance with the timing of the screen update request.

  FIG. 1 (B) shows the case where the bias of the polarity occurs due to the driving of the normal refresh. As an example, although the case where the refresh rate is 12 Hz and the screen update rate is 10 Hz will be described, it is not particularly limited to this value.

  A vertical synchronization signal (VSYNC) which is a synchronization signal is generated at a constant period. Further, input image data of a display update rate is input at a predetermined timing.

Then, the liquid crystal drive unit drives the liquid crystal in accordance with the display update request.
In this example, a case is shown where the refresh is performed before the screen update based on the refresh rate, and a case is shown in which the bias of the polarity occurs due to the timing of the refresh rate.

  In this embodiment, when such a bias in polarity is detected, a method of inserting an inversion refresh for eliminating the bias in polarity will be described.

<1. First embodiment>
FIG. 2 is a block diagram showing the configuration of the liquid crystal display device 2 according to the first embodiment of the present invention.

  As shown in FIG. 2, the liquid crystal display device 2 includes a liquid crystal display panel 10 and a backlight unit 30.

  The liquid crystal display panel 10 is provided with a display unit 100, a display control circuit 200, a signal line drive circuit 300, and a scanning line drive circuit 400. Note that one or both of the signal line driver circuit 300 and the scan line driver circuit 400 may be provided in the display control circuit 200. Further, one or both of the signal line drive circuit 300 and the scan line drive circuit 400 may be integrally formed with the display portion 100. A host 1 (system) mainly composed of a CPU is provided outside the liquid crystal display device 2.

  The display unit 100 includes a plurality (m) of signal lines SL1 to SLm, a plurality (n) of scanning lines GL1 to GLn, and m signal lines SL1 to SLm and n scanning lines GL1. A plurality of (m × n) pixel formation portions 110 are provided corresponding to the respective intersections with ~ GLn.

  Hereinafter, the signal lines SL1 to SLm are collectively referred to as a signal line SL. Also, the scan lines GL1 to GLn are generically referred to as a scan line GL. The m × n pixel formation portions 110 are formed in a matrix. In each pixel formation portion 110, the gate terminal as a control terminal is connected to the scanning line GL passing the corresponding intersection, and the source terminal as the first conduction terminal is connected to the signal line SL passing the intersection The TFT 111, the pixel electrode 112 connected to the drain terminal as the second conduction terminal of the TFT 111, the common electrode 113 commonly provided to the m × n pixel formation portions 110, the pixel electrode 112, and the common electrode And a liquid crystal layer provided in common to the plurality of pixel formation portions 110. The liquid crystal capacitance Ccl formed by the pixel electrode 112 and the common electrode 113 constitutes a pixel capacitance.

  Note that, typically, an auxiliary capacitance is provided in parallel with the liquid crystal capacitance Ccl in order to reliably hold a voltage in the pixel capacitance. For this reason, although it is general that the pixel capacitance is configured by the liquid crystal capacitance Ccl and the auxiliary capacitance, in the present example, the pixel capacitance is described as being configured by only the liquid crystal capacitance Ccl.

  As the TFT 111, for example, a TFT in which an oxide semiconductor is used for a channel layer (hereinafter referred to as "oxide TFT") is used. More specifically, the channel layer of the TFT 111 is formed of InGaZnOx containing indium (In), gallium (Ga), zinc (Zn), and oxygen (O) as main components. Below, the thing of TFT which used InGaZnOx for the channel layer is called "IGZO-TFT." The IGZO-TFT has a very small off-leak current as compared to a silicon-based TFT using polycrystalline silicon or amorphous silicon as a channel layer. Therefore, the signal voltage written to the liquid crystal capacitance Ccl is held for a long time. Note that as an oxide semiconductor other than InGaZnOx, for example, indium, gallium, zinc, copper (Cu), silicon (Si), tin (Sn), aluminum (Al), calcium (Ca), germanium (Ge), and lead The same effect can be obtained even when an oxide semiconductor containing at least one of Pb) is used for the channel layer. In addition, the use of an oxide TFT as the TFT 111 is an example, and instead, a silicon-based TFT such as polycrystalline silicon or amorphous silicon may be used.

  The display control circuit 200 is typically realized by LSI (Large Scale Integration). The display control circuit 200 receives data DAT including image data from the host 1 and generates and outputs a signal line control signal SCT, a scanning line control signal GCT, and a common potential Vcom.

  Signal line control signal SCT is applied to signal line drive circuit 300. Scan line control signal GCT is applied to scan line drive circuit 400. The common potential Vcom is applied to the common electrode 113.

  The signal line drive circuit 300 generates and outputs a driving image signal to be supplied to the signal line SL in accordance with the signal line control signal SCT. The signal line control signal SCT includes, for example, a digital image signal corresponding to RGB data RGBD, a source start pulse signal, a source clock signal, and a latch strobe signal.

  The signal line drive circuit 300 operates a shift register and a sampling latch circuit (not shown) therein according to a source start pulse signal, a source clock signal, and a latch strobe signal, and a digital obtained based on a digital image signal. A driving image signal is generated by converting a signal into an analog signal by a DA conversion circuit (not shown).

  The scanning line drive circuit 400 repeats the application of the active scanning signal to the scanning line GL in a predetermined cycle according to the scanning line control signal GCT. The scanning line control signal GCT includes, for example, a gate clock signal and a gate start pulse signal. The scanning line driving circuit 400 operates a shift register (not shown) and the like in the inside according to the gate clock signal and the gate start pulse signal to generate a scanning signal.

  The backlight unit 30 is provided on the back side of the liquid crystal display panel 10 and irradiates the back of the liquid crystal display panel 10 with backlight light. The backlight unit 30 typically includes a plurality of LEDs (Light Emitting Diodes). The backlight unit 30 may be controlled by the display control circuit 200 or may be controlled by another method. When the liquid crystal display panel 10 is a reflective type, the backlight unit 30 need not be provided.

  As described above, the driving image signal is applied to the signal line SL, the scanning signal is applied to the scanning line GL, and the backlight unit 30 is driven, according to the image data transmitted from the host 1. The screen is displayed on the display unit 100 of the liquid crystal display panel 10.

  FIG. 3 is a block diagram showing the configuration of the display control circuit 200 included in the liquid crystal display device 2. As shown in FIG.

  As shown in FIG. 3, the display control circuit 200 includes an interface unit 210, a bias degree calculation unit 220, a timing control unit 230, a latch circuit 240, a built-in power supply circuit 250, a signal line control signal output unit 260, and scanning. A line control signal output unit 270 is provided.

  Note that, as described above, one or both of the signal line driver circuit 300 and the scan line driver circuit 400 may be provided in the display control circuit 200.

  The interface unit 210 receives the data DAT and outputs it to each unit. Specifically, RGB data RGBD which is image data, a vertical synchronization signal VSYNC which is a synchronization signal, a horizontal synchronization signal HSYNC, a data enable signal DE, a clock signal CLK and the like are output.

  When receiving the data DAT from the host 1, the interface unit 210 outputs the RGB data RGBDin (input image data) included in the data DAT to the latch circuit 240, and the vertical synchronization signal VSYNC, the horizontal synchronization signal HSYNC, the data enable signal DE. , And the clock signal CLK to the timing control unit 230.

  The timing control unit 230 outputs the latch circuit 240, the signal line control signal output unit 260, and the scanning line control signal based on the vertical synchronization signal VSYNC, the horizontal synchronization signal HSYNC, the data enable signal DE, the clock signal CLK, and the like. A control signal for controlling the unit 270 is output. Further, the timing control unit 230 outputs a voltage setting signal VS for setting the common potential Vcom or the like to the built-in power supply circuit 250.

  The latch circuit 240 outputs the RGB data RGBDout included in the updated data DAT to the signal line control signal output unit 260 based on the control of the timing control unit 230. Further, by holding RGBDout in the latch circuit 240, the same image as the image currently displayed on the display unit 100 is displayed, whereby the screen can be refreshed at a necessary timing.

  The built-in power supply circuit 250 generates and outputs a power supply voltage and a common potential Vcom for use in the signal line control signal output unit 260 and the scanning line control signal output unit 270 based on the voltage setting signal VS.

  The signal line control signal output unit 260 generates a signal line control signal SCT based on the RGB data RGBD from the latch circuit 240, the control signal from the timing control unit 230, and the power supply voltage from the built-in power supply circuit 250. This is output to the signal line drive circuit 300.

  Scan line control signal output unit 270 generates scan line control signal GCT based on the control signal from timing control unit 230 and the power supply voltage from built-in power supply circuit 250, and outputs this to scan line drive circuit 400. .

  The bias degree calculation unit 220 calculates the bias degree of the polarity of the voltage applied to the liquid crystal layer of the pixel formation unit 110 based on the RGB data RGBDin, the vertical synchronization signal VSYNC, and the like.

  Specifically, the deviation degree calculation unit 220 has a counter that counts the deviation degree of the polarity of the voltage. When a positive voltage is applied to the pixel electrode 112 of the pixel formation portion 110 as a voltage application for each frame, it is counted up to "+", and when a negative voltage is applied, it is "-" Count down.

  Since the polarity is reversed when the liquid crystal display panel 10 is driven, if the polarity in the first driving is defined as “+” as an example, “−”, “+”, “− Invert.

  In addition, since the polarity in the previous drive is maintained during the period from one drive to the next drive, if the held time or the number of frames is "+" with respect to the cumulative polarity value, Count up, and count down if "-".

  Then, by using the polarity at the time of driving the liquid crystal display panel 10 and the count value (cumulative polarity value) of the counter, it is determined whether the driving is in the direction of increasing or decreasing the polarization bias. Is possible.

  In this case, since the polarity when driving is “+” and the cumulative polarity value is also “+”, the polarity increases when the polarity during driving is “−” and the cumulative polarity value is also “−”. It is possible to judge that is becoming biased. Also, here, a threshold may be introduced to the accumulated polarity value.

FIG. 4 is a diagram for explaining a table for determining the bias of polarity.
As shown in FIG. 4, for example, when the polarity at the time of driving is "+", the cumulative polarity value is slightly biased if the cumulative polarity value is "1 to N-1", and the cumulative polarity value is "N or more" It is possible to judge that there is a large bias.

  On the other hand, when the polarity at the time of driving is "-", it is slightly biased if the cumulative polarity value is "-1 to-(N-1)", and it is large if the cumulative polarity value is "less than -N" It is possible to judge that it is biased.

FIG. 5 is a flowchart for explaining the processing of the bias degree calculation unit 220.
As shown in FIG. 5, first, the drive polarity is confirmed (step S2). As the drive polarity, the first drive polarity is defined as positive ("+"), and it is determined which of positive and negative ("+", "-") drive. When the rise of the screen update rate (during the driving of the liquid crystal display panel) is detected, it is determined that the previous driving polarity is reversed. For example, if the previous time was positive, it will be negative this time. In the present example, it is assumed that the timing control unit 230 outputs the instruction to the bias degree calculation unit 220 at the rise of the screen update rate.

Then, next, it is judged whether or not it is positive polarity (step S4).
In step S4, when it is judged that it is positive polarity (YES in step S4), it counts up (step S6). Increment the counter value.

  On the other hand, if it is determined in step S4 that the polarity is not positive (NO in step S4), the countdown is performed (step S8). Decrement the counter value.

  Then, it is determined whether it is the next frame (step S10). Specifically, it can be determined whether or not the rising of the vertical synchronization signal VSYNC has been detected.

  If it is determined in step S10 that the frame is not the next frame (NO in step S10), the state is maintained.

  If it is determined in step S10 that the frame is the next frame (YES in step S10), the process returns to step S2 and the above process is repeated.

The value of the counter value is updated by repeating the above process.
FIG. 6 is a flowchart for instructing execution of the inversion refresh process in the timing control unit 230 based on the first embodiment.

  As shown in FIG. 6, first, the counter value is confirmed (step S12). Specifically, the timing control unit 230 confirms the counter value of the counter of the deviation degree calculation unit 220.

  Next, it is determined whether the absolute value exceeds a predetermined value (step S14). In this example, "10" is set as the predetermined value.

  If it is determined in step S14 that the absolute value exceeds the predetermined value (YES in step S14), it is determined whether a predetermined number of frames have elapsed since the display update (step S16). In this example, four frames are set as an example of the predetermined number of frames.

  If it is determined in step S16 that a predetermined number of frames have elapsed since display update (YES in step S16), reverse refresh is instructed (step S18). Specifically, the timing control unit 230 instructs the latch circuit, the signal line control signal output unit 260, and the scanning line control signal output unit 270 to perform the refresh operation on the liquid crystal display panel 10. In addition, the inversion refresh which applies the voltage which suppresses the bias | inclination of polarity is performed.

Then, it is determined whether it is the next frame (step S19).
If it is determined in step S19 that the frame is not the next frame (NO in step S19), the state is maintained.

  If it is determined in step S19 that the frame is the next frame (YES in step S19), the process returns to step S12 and the above process is repeated.

  If it is determined in step S14 that the absolute value exceeds the predetermined value (NO in step S14), the process proceeds to step S19.

  If it is determined in step S16 that a predetermined number of frames have not elapsed since the display update (NO in step S16), the process proceeds to step S19.

  Therefore, when the absolute value of the counter value does not exceed the predetermined value, the reverse refresh instruction is not executed. Also, the reverse refresh instruction is not executed even when it is determined that a predetermined number of frames have not elapsed since the display update.

  FIG. 7 is a diagram for explaining a timing chart in the case of executing the refresh operation based on the first embodiment.

  As shown in FIG. 7, it is shown that the counter value becomes “−11” in the next frame and the absolute value exceeds the predetermined value after reaching the counter value “−10”.

  Next, after two frames, positive polarity is applied according to the screen update rate, and the counter value transitions to the “+” side.

  Then, after the next two frames, the negative polarity is applied according to the screen update rate, the counter value becomes “−11”, and the absolute value exceeds the predetermined value.

  Then, a case is shown where reverse refresh (positive polarity) is instructed after a predetermined number of frames (4 frames). As a result, the counter value shifts to the “+” side, and it becomes possible to suppress the bias to the negative side as compared with the case without inversion refresh.

  Normally, when the user performs some operation, the screen is kept updating for a while, and the screen updating is stopped when the next screen requiring the user to perform another operation is displayed.

  In the present invention, when polarity deviation is detected at the time of screen update, inserting reverse refresh after a predetermined time is at least a stage where screen update has not been performed for a fixed time, that is, it is assumed that screen update has stopped. Therefore, the method of restoring the bias of the polarity is adopted. This is because inserting an inversion refresh in a state in which screen updating is continuing may require the insertion of inversion refresh many times depending on the situation, which may increase power consumption.

  In the present embodiment, the detection of the polarity deviation leads to the operation in the reverse polarity, so that the polarity deviation can be suppressed, and effects such as prevention of flickering and prolonging the life of the panel can be obtained.

<2. Second embodiment>
In the first embodiment described above, the method of inserting the reverse refresh after a predetermined time when the polarity bias is detected at the time of screen update has been described. However, it may be considered that it is desirable to quickly eliminate the bias.

  In the second embodiment, another method will be described which eliminates the bias when the polarity bias is detected when the screen is updated.

  FIG. 8 is a flowchart for instructing execution of the inversion refresh process in the timing control unit 230 based on the second embodiment.

  As shown in FIG. 8, first, the counter value is confirmed (step S12). Specifically, the timing control unit 230 confirms the counter value of the counter of the deviation degree calculation unit 220.

Next, it is determined whether the absolute value exceeds a predetermined value (step S14).
If it is determined in step S14 that the absolute value exceeds the predetermined value (YES in step S14), it is determined whether it is the frame following the display update (step S15).

  When it is determined in step S15 that the frame is the next to the display update (YES in step S15), reverse refresh is instructed (step S18).

Then, it is determined whether it is the next frame (step S19).
If it is determined in step S19 that the frame is not the next frame (NO in step S19), the state is maintained.

  If it is determined in step S19 that the frame is the next frame (YES in step S19), the process returns to step S12 and the above process is repeated.

  If it is determined in step S14 that the absolute value does not exceed the predetermined value (NO in step S14), the process proceeds to step S19.

  If it is determined in step S16 that the frame is not the frame following the display update (NO in step S15), the process proceeds to step S19.

  Therefore, when the absolute value does not exceed the predetermined value, the reverse refresh instruction is not executed. Also, the reverse refresh instruction is not executed even when it is determined that the frame is not the next frame of the display update.

  FIG. 9 is a diagram for explaining a timing chart in the case of executing the refresh operation based on the second embodiment.

  As shown in FIG. 9, after reaching the counter value "-12", the counter value becomes "-11" in the next frame, and in the next frame, the negative polarity is applied according to the screen update rate, and the counter value becomes The case where "-12" is reached is shown.

In this case, the case where the absolute value exceeds the predetermined value is shown.
The case where reverse refresh (positive polarity) is instructed after the next one frame is shown. As a result, the counter value shifts to the “+” side, and the counter value becomes “−11”. Then, after two frames, negative polarity is applied according to the screen update rate, and the counter value becomes “−11”. Since the absolute value exceeds the predetermined value, the case where the reverse refresh (positive polarity) is instructed after the next one frame is shown.

  By repeating the processing, it is possible to suppress the bias toward the negative electrode side as compared to the case without the inversion refresh.

  In the present embodiment, the detection of the polarity deviation leads to the operation in the reverse polarity, so that the polarity deviation can be suppressed, and effects such as prevention of flickering and prolonging the life of the panel can be obtained.

<3. Third embodiment>
An embodiment implemented by combining the first embodiment and the second embodiment will be described.

  FIG. 10 is a flowchart for instructing execution of the inversion refresh process in the timing control unit 230 based on the third embodiment.

  As shown in FIG. 10, the counter value is confirmed (step S20). Specifically, the timing control unit 230 confirms the counter value of the counter of the deviation degree calculation unit 220.

Next, it is determined whether the absolute value exceeds a first predetermined value (step S22).
If it is determined in step S22 that the absolute value exceeds the first predetermined value (YES in step S22), it is determined whether a predetermined number of frames have elapsed since the display update (step S24).

  If it is determined in step S24 that a predetermined number of frames have elapsed since display update (YES in step S24), reverse refresh is instructed (step S26).

Then, it is determined whether it is the next frame (step S27).
If it is determined in step S27 that the frame is not the next frame (NO in step S27), the state is maintained.

  If it is determined in step S27 that the frame is the next frame (YES in step S27), the process proceeds to step S28, and the counter value is confirmed (step S28). Specifically, the timing control unit 230 confirms the counter value of the counter of the deviation degree calculation unit 220.

  On the other hand, when it is determined in step S22 that the absolute value exceeds the predetermined value (NO in step S22), the process proceeds to step S27.

  If it is determined in step S24 that a predetermined number of frames have not elapsed since the display update (NO in step S24), the process proceeds to step S27.

  Therefore, when the absolute value of the counter value does not exceed the first predetermined value, the reverse refresh instruction is not executed. Also, the reverse refresh instruction is not executed even when it is determined that a predetermined number of frames have not elapsed since the display update.

  Next, it is determined whether the absolute value exceeds a second predetermined value (step S30). The second predetermined value is larger than the first predetermined value.

  If it is determined in step S30 that the absolute value exceeds the second predetermined value (YES in step S30), it is determined whether it is the frame following the display update (step S32).

  If it is determined in step S32 that the frame is the next to the display update (YES in step S32), reverse refresh is instructed (step S34).

Then, it is determined whether it is the next frame (step S38).
If it is determined in step S38 that the frame is not the next frame (NO in step S38), the state is maintained.

  If it is determined in step S38 that the frame is the next frame (YES in step S38), the process returns to step S20, and the above process is repeated.

  If it is determined in step S30 that the absolute value does not exceed the second predetermined value (NO in step S30), it is determined whether the absolute value exceeds the first predetermined value (step S36).

  When it is determined in step S36 that the absolute value exceeds the first predetermined value, the process returns to step S27.

  On the other hand, when it is determined in step S36 that the absolute value does not exceed the first predetermined value, the process proceeds to step S38. Then, it is determined whether or not it is the next frame, and if it is determined that it is the next frame, the process returns to step S20, and the above process is repeated.

  Therefore, when the absolute value does not exceed the second predetermined value, the reverse refresh instruction is not executed. Also, the reverse refresh instruction is not executed even when it is determined that the frame is not the next frame of the display update.

  That is, in the third embodiment, when the absolute value of the counter value exceeds the first predetermined value and a predetermined number of frames have elapsed since the display update, the reverse refresh instruction is executed, and the absolute value of the counter value is Is a method of executing the reverse refresh instruction on the frame immediately after the display update frame if the second predetermined value is exceeded.

  Therefore, the reverse refresh instruction according to the second embodiment is executed when the absolute value of the counter value increases and the degree of bias increases, and the reverse refresh instruction according to the first embodiment is executed when the degree of bias is small.

  According to this method, it is possible to efficiently suppress bias and to suppress power consumption by efficiently switching the reverse refresh instruction according to the bias degree.

<4. Other Embodiments>
In the above embodiment, although the configuration in which the liquid crystal display panel 10 includes the display control circuit 200 for controlling the drive circuit for driving the display unit 100 has been described, the present invention is not limited to this configuration, and the host 1 (system) Can also be configured to have the display control circuit 200. That is, the host 1 (system) can directly output an instruction to drive the display unit 100 to the drive circuit.

  It is also possible to provide a program that causes a computer to function to execute the control as described in the above-described flowchart. Among the program modules provided as part of the operating system (OS) of the computer, the program may call necessary modules in a predetermined arrangement at predetermined timing to execute processing.

  It should be understood that the embodiments disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is indicated not by the above description but by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

  Reference Signs List 1 host, 2 liquid crystal display device, 10 liquid crystal display panel, 30 backlight unit, 100 display unit, 110 pixel formation unit, 112 pixel electrode, 113 common electrode, 200 display control circuit, 210 interface unit, 220 bias degree calculation unit, 230 timing control unit, 240 latch circuit, 250 built-in power supply circuit, 260 signal line control signal output unit, 270 scanning line control signal output unit, 300 signal line drive circuit, 400 scanning line drive circuit.

Claims (4)

A liquid crystal display device that displays an image represented by the input image data by applying a voltage corresponding to the input image data to a liquid crystal layer in the display unit.
A driving unit for applying a voltage corresponding to the input image data to the liquid crystal layer;
A calculation unit that calculates the degree of bias in the polarity of the voltage applied to the liquid crystal layer;
A display control unit configured to control the drive unit such that a bias in polarity of a voltage applied to the liquid crystal layer is reduced based on the calculation result of the calculation unit;
The display control unit
Based on the calculation result of the calculation unit, the driving unit is instructed to apply a voltage of a polarity reducing the bias to the liquid crystal layer in the display unit except when updating the screen according to the input image data,
When it is determined that the calculation result of the calculation unit exceeds a predetermined value and a predetermined frame has passed from the screen update time according to the input image data, a voltage of polarity to reduce bias in the display unit is applied to the liquid crystal layer A liquid crystal display device instructing the drive unit to A liquid crystal display device that displays an image represented by the input image data by applying a voltage corresponding to the input image data to a liquid crystal layer in the display unit.
A driving unit for applying a voltage corresponding to the input image data to the liquid crystal layer;
A calculation unit that calculates the degree of bias in the polarity of the voltage applied to the liquid crystal layer;
A display control unit configured to control the drive unit such that a bias in polarity of a voltage applied to the liquid crystal layer is reduced based on the calculation result of the calculation unit;
The display control unit
Based on the calculation result of the calculation unit, the driving unit is instructed to apply a voltage of a polarity reducing the bias to the liquid crystal layer in the display unit except when updating the screen according to the input image data,
When a calculation result of the calculation unit exceeds a first predetermined value, a voltage of a polarity that reduces a deviation in the display unit is applied to the liquid crystal layer after a predetermined frame from the screen update time according to the input image data. Instruct the drive unit,
When the calculation result of the calculation unit exceeds the second predetermined value, a voltage of a polarity that reduces the deviation in the display unit is applied to the liquid crystal layer in the frame immediately after the screen update according to the input image data. A liquid crystal display device which instructs the driving unit to A control method of a liquid crystal display device for displaying an image represented by the input image data by applying a voltage according to the input image data to a liquid crystal layer in the display unit,
Applying a voltage according to the input image data to the liquid crystal layer;
Calculating the degree of bias in the polarity of the voltage applied to the liquid crystal layer;
Controlling the timing of applying a voltage at which the bias in the polarity of the voltage applied to the liquid crystal layer is reduced based on the calculation result of the calculating step ;
The step of controlling the timing comprises
Applying a voltage of a polarity for reducing bias to the liquid crystal layer in the display unit except when updating the screen according to the input image data based on the calculation result;
Applying, to the liquid crystal layer, a voltage of a polarity that reduces the deviation in the display unit when it is determined that the calculation result exceeds a predetermined value and a predetermined frame has elapsed from the screen update time according to the input image data. And a control method of a liquid crystal display device. A control method of a liquid crystal display device for displaying an image represented by the input image data by applying a voltage according to the input image data to a liquid crystal layer in the display unit,
Applying a voltage according to the input image data to the liquid crystal layer;
Calculating the degree of bias in the polarity of the voltage applied to the liquid crystal layer;
Controlling the timing of applying a voltage at which the bias in the polarity of the voltage applied to the liquid crystal layer is reduced based on the calculation result of the calculating step ;
The step of controlling the timing comprises
Applying a voltage of a polarity for reducing bias to the liquid crystal layer in the display unit except when updating the screen according to the input image data based on the calculation result;
Applying, to the liquid crystal layer, a voltage of a polarity that reduces a bias in the display unit after a predetermined frame after screen update according to the input image data, when the calculation result exceeds a first predetermined value;
Applying to the liquid crystal layer a voltage of a polarity that reduces the bias in the display unit in the frame immediately after the screen update according to the input image data if the calculation result exceeds the second predetermined value , A control method of the liquid crystal display device.

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