JP6507436B2 - Synchronization signal transmission / reception method, synchronization signal transmission / reception device, and synchronization signal transmission / reception device - Google Patents

Description

  Embodiments of the present invention relate to communication technology, and more particularly, to a synchronization signal transmission / reception method, a synchronization signal transmission / reception apparatus, and a synchronization signal transmission / reception device.

  Synchronization is a key technology in communication systems, especially in wireless communication systems. The ability to efficiently synchronize the receiver with the transmitter greatly affects the performance of the communication system. A key indicator for quantifying synchronization between devices in a communication system is the complexity of synchronization implementation and synchronization detection performance.

  Synchronization between a Device-to-Device (D2D) communication system and a typical cellular mobile communication system such as Global System for Mobile Communication (GSM). There is a big difference regarding. In the D2D communication system, timings of a plurality of user equipments (User equipment, abbreviated as UE) serving as transmitters are completely different, and a UE serving as a receiver receives signals from a plurality of transmitting UEs. It needs to be synchronized with different sender UEs. Thus, the communication system imposes more sophisticated requirements on synchronization, and the receiving UE needs to be synchronized efficiently with all the transmitting UEs quickly.

  During the research on standardization of the 3rd Generation Partnership Project (abbr .: 3GPP), D2D Synchronization Signal (abbr .: D2 DSS) was introduced to achieve synchronization between different D2D transceivers. ing. D2 DSS includes Primary D 2 D Synchronization Signal (abbr. PD 2 DSS) and Secondary D 2 D Synchronization Signal (abbr. SD 2 DSS), PD 2 DSS is an initial timing and frequency between transmitter and receiver. The synchronization is realized, and the SD2 DSS realizes fine synchronization. At this stage, there is a great interest in how to generate synchronization signals with good correlation.

  Embodiments of the present invention provide a synchronization signal transmission / reception method, a synchronization signal transmission / reception apparatus, and a synchronization signal transmission / reception device. In one D2D application scenario, a synchronization signal with good correlation is generated, so that in this D2D scenario transmission and reception of the distributed synchronization signal can be realized, and the transmission end and reception end of the synchronization signal. It is possible to realize quick synchronization between them.

According to a first aspect, an embodiment of the present invention provides a synchronization signal transmission device, which comprises:
A synchronization signal generation module configured to generate a synchronization signal according to one or more sequences, wherein one or more lengths of the one or more sequences are determined according to the length of the synchronization signal , Sync signal generation module,
A baseband signal acquisition module configured to acquire a baseband signal according to the synchronization signal generated by the synchronization signal generation module;
A first transmission module configured to transmit a baseband signal acquired by the baseband signal acquisition module after performing radio frequency conversion;
including.

In relation to the first aspect, in a first possible implementation of the first aspect, the sequence comprises the first sequence, and the synchronization signal generation module comprises
Determine one or more lengths of one or more first sequences according to the length of the synchronization signal, and one or more first preset values corresponding to the one or more first sequences To determine one or more first preset values, wherein the first preset value corresponding to each first sequence is independent, to generate one or more synchronization signals. A synchronization signal generator configured to perform a cyclic shift on one or more first sequences according to the plurality of first preset values.

In relation to the first possible embodiment of the first aspect, in the second possible embodiment of the first aspect, the sequence further comprises the second sequence, and the synchronization signal generation module
Configured to generate a scrambling sequence according to one or more second sequences, and to perform scrambling processing at least once on the synchronization signal generated by the synchronization signal generation unit using the scrambling sequence Further includes a scrambling unit,
The baseband signal acquisition module
It is specifically configured to acquire a baseband signal according to the synchronization signal subjected to the scrambling process performed by the scrambling unit.

In relation to the second possible embodiment of the first aspect, in the third possible embodiment of the first aspect, the scrambling unit comprises
Determine one or more lengths of the one or more second sequences according to the length of the synchronization signal;
One or more second preset values corresponding to one or more second sequences, wherein all the second sequences are one second preset value or different second preset values And determining one or more second preset values, wherein the second preset value of the scrambling sequence corresponding to all synchronization sources in the group is the same,
It is specifically configured to perform a cyclic shift on each second sequence according to a second preset value to generate a scrambling sequence.

  In relation to the third possible embodiment of the first aspect, in the fourth possible embodiment of the first aspect, when there is a plurality of scrambling sequences, at least one scrambling sequence is in a group , And the other scrambling sequences correspond to different second preset values.

  In relation to the third or fourth possible embodiment of the first aspect, in the fifth possible embodiment of the first aspect, either the first preset value or the second preset value Is determined according to the group identification information.

In relation to the fifth possible embodiment of the first aspect, in the sixth possible embodiment of the first aspect, the preset value comprises the first preset value and the second preset value. , The synchronization signal generation unit and the scrambling unit
It is further configured to determine the preset value according to the following equation:
f (N _GID ) = a * N _GID + b, or
f (N _GID ) = (a * N _GID + b) mod K
_Where N _GID represents group identification information, a and b are predefined constants, f (N _GID ) is a preset value, K is a system defined constant, and mod is modulo Represents an operation.

  In relation to the fifth or sixth possible embodiment of the first aspect, in the seventh possible embodiment of the first aspect, the group identification information indicates a primary device to device synchronization signal PD2 DSS indication. It is a function of the information or conveyed in a first control instruction distributed by the network, or conveyed in a second control instruction distributed by the transmitting device, or implicitly indicated by the network.

In relation to any one of the first to seventh possible embodiments of the first aspect, in the eighth possible embodiment of the first aspect, the synchronization signal generation unit for a different first sequence. Is
The identification information ID of the synchronization signal is determined according to the first preset value corresponding to all the first sequences, or the primary device to device synchronization signal PD2DSS identification information and the first corresponding to all the first sequences Determine the ID of the synchronization signal according to the preset value of 1, or determine the ID of the synchronization signal according to any one of the first preset values of all the first sequences, or
It is further configured to determine the ID of the synchronization signal according to any one of the PD2 DSS identification information and the first preset value of all the first sequences.

In relation to the first aspect or any one of the first to eighth possible aspects of the first aspect, in a ninth possible aspect of the first aspect, the baseband signal acquisition module comprises ,
A mapping unit configured to map the synchronization signal to a subcarrier to obtain a frequency domain signal;
An acquisition unit configured to acquire a time domain signal according to the frequency domain signal acquired by the mapping unit;
including.

In relation to the ninth possible embodiment of the first aspect, in a tenth possible embodiment of the first aspect, the synchronization signal comprises at least one first synchronization signal and at least one second synchronization. The first sequence corresponding to all the first synchronization signals and all the second synchronization signals is the same or different, including the signals, and the mapping unit
In order to obtain frequency domain signals, to map each of the first position corresponding all first synchronizing signal to all of the first synchronization signal, all the second synchronizing signal every second A first position corresponding to all the first synchronization signals and a second position corresponding to all the second synchronization signals, which is specifically configured to map to a second position corresponding to the synchronization signal. Are respectively different symbol positions in one subframe, or the first position corresponding to all the first synchronization signals and the second position corresponding to all the second synchronization signals are respectively in different subframes It is a thing.

In relation to the tenth possible embodiment of the first aspect, in the eleventh possible embodiment of the first aspect, the synchronization signal further includes at least one third synchronization signal, and the third synchronization. The sequence corresponding to the signal is the same as or different from the sequence corresponding to the first synchronization signal or the second synchronization signal, and the mapping unit
All third synchronization signals are further configured to map every third synchronization signal to a third position corresponding to every third synchronization signal to obtain a frequency domain signal. , The first position corresponding to all the first synchronization signals, and the second position corresponding to all the second synchronization signals are respectively different symbol positions in one subframe. Or a first position corresponding to all the first synchronization signals, a second position corresponding to all the second synchronization signals, and a third position corresponding to all the third synchronization signals It is in different subframes.

  In relation to the first aspect or any one of the first to eleventh possible aspects of the first aspect, in a twelfth possible implementation of the first aspect, the sequence is an m-sequence; It is generated according to the ZC sequence or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to the first aspect or any one of the first to twelfth possible embodiments of the first aspect, in the thirteenth possible embodiment of the first aspect, the sequence has a length of 31 If it is an m-sequence having, one or more sequences of primitive polynomials are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to any one of the first aspect or any one of the first to twelfth possible aspects of the first aspect, in a fourteenth possible aspect of the first aspect, the sequence has a length of 63 If it is an m-sequence having, one or more sequences of primitive polynomials are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

In relation to any one of the tenth to fourteenth possible embodiments of the first aspect, in the fifteenth possible embodiment of the first aspect, the acquiring unit comprises
It is specifically configured to obtain a baseband signal from a frequency domain signal by orthogonal frequency division multiplexing OFDM or to obtain a baseband signal from a frequency domain signal by single carrier frequency division multiple access SC-FDMA.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたリソースブロックRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In relation to the fifteenth possible embodiment of the first aspect, in the sixteenth possible embodiment of the first aspect, the acquiring unit comprises
It is further configured to acquire a baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of resource blocks RB configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたリソースブロックRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In relation to the fifteenth possible embodiment of the first aspect, in the seventeenth possible embodiment of the first aspect, the acquiring unit comprises
It is further configured to acquire a baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of resource blocks RB configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

In relation to the seventeenth possible embodiment of the first aspect, in the eighteenth possible embodiment of the first aspect, the apparatus comprises
Further comprising: a transform module configured to perform a discrete Fourier transform DFT on the synchronization signal to obtain a transform signal;
The acquisition unit is configured to map the converted signal to a subcarrier by SC-FDMA in order to acquire a baseband signal.

式中、lは同期信号d（l）の独立変数を表し、Lは同期信号の長さであり、b（n）は同期信号に対してDFTが実行された後で獲得される変換信号を表し、0≦n≦L−1であり、jは虚数単位を表す。 In relation to the eighteenth possible embodiment of the first aspect, in the nineteenth possible embodiment of the first aspect, the conversion module comprises
It is specifically configured to obtain the transformed signal according to the following equation:

Where l represents the independent variable of the synchronization signal d (l), L is the length of the synchronization signal, and b (n) is the transformed signal obtained after DFT is performed on the synchronization signal 0 ≦ n ≦ L−1, j represents an imaginary unit.

In relation to any one of the first to nineteenth possible embodiments of the first aspect or the first aspect, in the twentieth possible embodiment of the first aspect, the first transmission module is ,
After performing a radio frequency conversion on the baseband signal, acquire a radio frequency signal,
It is specifically configured to send out a radio frequency signal when a pre-set period has arrived.

According to a second aspect, an embodiment of the present invention provides a synchronization signal receiving device, which comprises:
A receiving module configured to receive a synchronization signal, wherein the synchronization signal is generated by the transmitting end according to one or more sequences, and one or more lengths of one or more sequences are synchronization signals A receiving module, determined according to the length of
A processing module configured to detect the synchronization signal received by the receiving module to obtain synchronization with the transmitting end of the synchronization signal;
including.

  In relation to the second aspect, in a first possible implementation of the second aspect, the sequence is generated according to an m sequence, a ZC sequence, or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to the first possible embodiment of the second aspect or the second aspect, in the second possible embodiment of the second aspect, if the sequence is an m-sequence having a length of 31 The primitive polynomials to generate one or more sequences are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to the first possible embodiment of the second aspect or the second aspect, in the third possible embodiment of the second aspect, if the sequence is an m-sequence having a length of 63, The primitive polynomials to generate one or more sequences are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

In relation to any one of the first to third possible embodiments of the second aspect or the second aspect, in a fourth possible embodiment of the second aspect, the apparatus is The processing module further includes a transmission module,
Detects whether the receiving module receives a synchronization signal according to preset criteria;
It is further configured to trigger the second transmission module to transmit the synchronization signal generated by the device to another receiving end if the synchronization signal is not detected.

According to a third aspect, an embodiment of the present invention provides a synchronization signal transmission device, which comprises:
A first processor configured to generate the synchronization signal according to the one or more sequences, wherein the length of one or more of the one or more sequences is determined according to the length of the synchronization signal, A first processor configured to acquire a baseband signal in accordance with the synchronization signal;
A first transmitter configured to transmit a baseband signal acquired by the first processor after performing radio frequency conversion;
including.

In relation to the third aspect, in a first possible implementation of the third aspect, the sequence comprises a first sequence and the first processor
Determine one or more lengths of the one or more first sequences according to the length of the synchronization signal;
One or more first preset values corresponding to one or more first sequences, wherein the first preset values corresponding to each first sequence are independent; Determine the preset value,
It is specifically configured to perform a cyclic shift of the one or more first sequences according to the one or more first preset values to generate the synchronization signal.

In relation to the first possible embodiment of the third aspect, in a second possible embodiment of the third aspect, the sequence further comprises a second sequence, and the first processor is configured to:
Generating a scrambling sequence according to the one or more second sequences;
Further configured to perform a scrambling process on the synchronization signal at least once using the scrambling sequence;
Specifically, acquiring a baseband signal according to a synchronization signal
The baseband signal is to be acquired in accordance with the synchronization signal subjected to the scrambling process.

In relation to the second possible embodiment of the third aspect, in the third possible embodiment of the third aspect, the first processor is:
Determine one or more lengths of the one or more second sequences according to the length of the synchronization signal;
One or more second preset values corresponding to one or more second sequences, wherein all the second sequences are one second preset value or different second preset values And determining one or more second preset values, wherein the second preset value of the scrambling sequence corresponding to all synchronization sources in the group is the same,
It is further configured to perform a cyclic shift on each second sequence according to a second preset value to generate a scrambling sequence.

  In relation to the third possible embodiment of the third aspect, in the fourth possible embodiment of the third aspect, when there is a plurality of scrambling sequences, at least one scrambling sequence is in a group , And the other scrambling sequences correspond to different second preset values.

  In relation to the third or fourth possible embodiment of the third aspect, in the fifth possible embodiment of the third aspect, either the first preset value or the second preset value Is determined according to the group identification information.

In relation to the fifth possible embodiment of the third aspect, in the sixth possible embodiment of the third aspect, the preset value comprises the first preset value and the second preset value. , The first processor,
It is further configured to determine the preset value according to the following equation:
f (N _GID ) = a * N _GID + b, or
f (N _GID ) = (a * N _GID + b) mod K
_Where N _GID represents group identification information, a and b are predefined constants, f (N _GID ) is a preset value, K is a system defined constant, and mod is modulo Represents an operation.

  In relation to the fifth or sixth possible embodiment of the third aspect, in the seventh possible embodiment of the third aspect, the group identification information indicates a primary device to device synchronization signal PD2 DSS indication. It is a function of the information or conveyed in a first control instruction distributed by the network, or conveyed in a second control instruction distributed by the transmitting device, or implicitly indicated by the network.

In relation to any one of the first to seventh possible embodiments of the third aspect, in the eighth possible embodiment of the third aspect, the first processor for a different first sequence. Is
Determining an ID of the synchronization signal according to a first preset value corresponding to all the first sequences, or a first corresponding to the primary device to device synchronization signal PD2DSS identification information and all the first sequences Determine the ID of the synchronization signal according to the preset value, or determine the ID of the synchronization signal according to any one of the first preset values of all the first sequences, or
It is further configured to determine the ID of the synchronization signal according to any one of the PD2 DSS identification information and the first preset value of all the first sequences.

In relation to any one of the first to eighth possible embodiments of the third aspect or the third aspect, in a ninth possible embodiment of the third aspect, the first processor synchronizes Specifically, it is configured to acquire a baseband signal according to the signal:
The first processor is configured to map the synchronization signal to a subcarrier and acquire a time domain signal according to the frequency domain signal to acquire a frequency domain signal.

In relation to the ninth possible embodiment of the third aspect, in a tenth possible embodiment of the third aspect, the synchronization signal comprises at least one first synchronization signal and at least one second synchronization. The first sequence, including the signals, corresponding to all the first synchronization signals and all the second synchronization signals is the same or different, and the first processor synchronizes to obtain the frequency domain signals Specifically, it is configured to map signals to subcarriers.
First processor in order to obtain a frequency domain signal, to map each of the first position corresponding all first synchronizing signal to all of the first synchronization signal, all of the second synchronizing signal Are configured to respectively map to a second position corresponding to all second synchronization signals, and correspond to a first position corresponding to all first synchronization signals and all second synchronization signals. The second position to be transmitted is a different symbol position in one subframe, or the first position corresponding to all the first synchronization signals and the second position corresponding to all the second synchronization signals are respectively And be in different subframes.

In relation to the tenth possible embodiment of the third aspect, in an eleventh possible embodiment of the third aspect, the synchronization signal further comprises at least one third synchronization signal, and the third synchronization. The sequence corresponding to the signal is the same as or different from the sequence corresponding to the first synchronization signal or the second synchronization signal, and the first processor subcarriers the synchronization signal to obtain a frequency domain signal. Specifically, it is configured to map to
The first processor is configured to map every third synchronization signal to a third position corresponding to every third synchronization signal to obtain a frequency domain signal, and The third position corresponding to the third synchronization signal, the first position corresponding to all the first synchronization signals, and the second position corresponding to all the second synchronization signals are each in one subframe. Or a first position corresponding to all the first synchronization signals, a second position corresponding to all the second synchronization signals, and a third corresponding to all the third synchronization signals The positions of 3 are in different subframes.

  In relation to any one of the first to eleventh possible embodiments of the third aspect or the third aspect, in a twelfth possible embodiment of the third aspect, the sequence is an m-sequence; It is generated according to the ZC sequence or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to the first aspect of the third aspect or any one of the first to twelfth possible aspects of the third aspect, in the thirteenth possible aspect of the third aspect, the sequence has a length of 31. If it is an m-sequence having, one or more sequences of primitive polynomials are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to any one of the first to twelfth possible embodiments of the third aspect or the third aspect, in the fourteenth possible embodiment of the third aspect, the sequence has a length of 63 If it is an m-sequence having, one or more sequences of primitive polynomials are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

In relation to any one of the tenth to fourteenth possible embodiments of the third aspect, in the fifteenth possible embodiment of the third aspect, the first processor is configured to: In particular, being configured to acquire a signal is
The first processor is configured to obtain the baseband signal from the frequency domain signal by orthogonal frequency division multiplexing OFDM, or the first processor is frequency domain signal by single carrier frequency division multiple access SC-FDMA Are configured to obtain a baseband signal from

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたリソースブロックRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In relation to the fifteenth possible embodiment of the third aspect, in the sixteenth possible embodiment of the third aspect, the first processor obtains a baseband signal from the frequency domain signal by OFDM. Specifically, it is composed of
The first processor is configured to acquire a baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of resource blocks RB configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたリソースブロックRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In relation to the fifteenth possible embodiment of the third aspect, in the seventeenth possible embodiment of the third aspect, the first processor obtains a baseband signal from the frequency domain signal by SC-FDMA. Specifically, what is configured to
The first processor is configured to acquire a baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of resource blocks RB configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

In relation to the seventeenth possible embodiment of the third aspect, in the eighteenth possible embodiment of the third aspect, the first processor is:
Further configured to perform a discrete Fourier transform DFT on the synchronization signal to obtain a transformed signal;
Specifically, the first processor is configured to map the synchronization signal to the subcarriers by SC-FDMA in order to acquire a baseband signal.
The first processor is configured to map the transform signal to a subcarrier by SC-FDMA to obtain a baseband signal.

式中、lは同期信号d（l）の独立変数を表し、Lは同期信号の長さであり、b（n）は同期信号に対してDFTが実行された後で獲得される変換信号を表し、0≦n≦L−1であり、jは虚数単位を表す。 In relation to the eighteenth possible embodiment of the third aspect, in the nineteenth possible embodiment of the third aspect, the first processor is configured to generate a conversion signal for the synchronization signal. Specifically configured to perform the DFT is:
That the first processor is configured to obtain the transform signal according to:

Where l represents the independent variable of the synchronization signal d (l), L is the length of the synchronization signal, and b (n) is the transformed signal obtained after DFT is performed on the synchronization signal 0 ≦ n ≦ L−1, j represents an imaginary unit.

In relation to any one of the first to nineteenth possible embodiments of the third aspect or the third aspect, in the twentieth possible embodiment of the third aspect, the first transmitter is ,
After performing a radio frequency conversion on the baseband signal, acquire a radio frequency signal,
It is specifically configured to send out a radio frequency signal when a pre-set period has arrived.

According to a fourth aspect, an embodiment of the present invention provides a synchronization signal receiving device, which comprises:
A receiver configured to receive a synchronization signal, wherein the synchronization signal is generated by the transmitting end according to one or more sequences, and one or more lengths of the one or more sequences are synchronization signals The receiver, determined according to the length of the
A second processor configured to detect the synchronization signal received by the receiver to obtain synchronization between the transmitting end and the receiving end of the synchronization signal;
including.

  In relation to the fourth aspect, in a first possible implementation of the fourth aspect, the sequence is generated according to an m sequence, a ZC sequence, or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to the first possible embodiment of the fourth aspect or the fourth aspect, in the second possible embodiment of the fourth aspect, if the sequence is an m-sequence having a length of 31 The primitive polynomials to generate one or more sequences are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to the first possible embodiment of the fourth aspect or the fourth aspect, in the third possible embodiment of the fourth aspect, when the sequence is an m-sequence having a length of 63, The primitive polynomials to generate one or more sequences are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

In relation to any one of the first to third possible embodiments of the fourth aspect or the fourth aspect, in the fourth possible embodiment of the fourth aspect, the receiving device is the second The system further includes a transmitter, and the second processor
Detect whether the receiver receives synchronization signal according to preset criteria,
It is further configured to trigger the second transmitter to transmit the synchronization signal generated by the receiving device to another receiving end if the synchronization signal is not detected.

According to a fifth aspect, an embodiment of the present invention provides a synchronization signal transmission method, which comprises
Generating the synchronization signal according to the one or more sequences, wherein one or more lengths of the one or more sequences are determined according to the length of the synchronization signal;
Acquiring a baseband signal according to the synchronization signal;
Sending out the baseband signal after performing the radio frequency conversion;
including.

In relation to the fifth aspect, in the first possible embodiment of the fifth aspect, the sequence includes the first sequence, and generating the synchronization signal according to one or more sequences comprises:
Determining one or more lengths of the one or more first sequences according to the length of the synchronization signal;
Determining one or more first preset values corresponding to one or more first sequences, wherein the first preset values corresponding to each first sequence are independent , Step, and
Performing a cyclic shift of the one or more first sequences according to the one or more first preset values to generate a synchronization signal;
including.

In relation to the first possible embodiment of the fifth aspect, in a second possible embodiment of the fifth aspect, the sequence further comprises a second sequence, and the synchronization signal according to one or more sequences The steps to generate
Generating a scrambling sequence according to the one or more second sequences;
Performing a scrambling process at least once on the synchronization signal using a scrambling sequence;
Further include
Specifically, the step of acquiring the baseband signal according to the synchronization signal
The step of acquiring a baseband signal according to the synchronization signal subjected to the scrambling process.

In relation to the second possible embodiment of the fifth aspect, in the third possible embodiment of the fifth aspect, the step of generating the scrambling sequence according to the one or more second sequences comprises
Determining one or more lengths of the one or more second sequences according to the length of the synchronization signal;
Determining one or more second preset values corresponding to the one or more second sequences, wherein all the second sequences are one second preset value or different second The second preset value of the scrambling sequence corresponding to all preset sources of the group, and corresponding to the preset value of
Performing a cyclic shift on each second sequence according to a second preset value to generate a scrambling sequence;
including.

  In relation to the third possible embodiment of the fifth aspect, in the fourth possible embodiment of the fifth aspect, when there is a plurality of scrambling sequences, at least one scrambling sequence is in a group , And the other scrambling sequences correspond to different second preset values.

  In relation to the third or fourth possible embodiment of the fifth aspect, in the fifth possible embodiment of the fifth aspect, either the first preset value or the second preset value Is determined according to the group identification information.

In relation to the fifth possible embodiment of the fifth aspect, in the sixth possible embodiment of the fifth aspect, the preset value includes the first preset value and the second preset value. The step of determining the preset value according to the group identification information, specifically,
Determining the preset value according to the following equation:
f (N _GID ) = a * N _GID + b, or
f (N _GID ) = (a * N _GID + b) mod K
_Where N _GID represents group identification information, a and b are predefined constants, f (N _GID ) is a preset value, K is a system defined constant, and mod is modulo Represents an operation.

  In relation to the fifth or sixth possible embodiment of the fifth aspect, in the seventh possible embodiment of the fifth aspect, the group identification information indicates primary device to device synchronization signal PD2 DSS indication It is a function of the information or conveyed in a first control instruction distributed by the network, or conveyed in a second control instruction distributed by the transmitting device, or implicitly indicated by the network.

In relation to any one of the first to seventh possible embodiments of the fifth aspect, in the eighth possible embodiment of the fifth aspect, the first sequence for a different first sequence. The relationship between the first preset value and the synchronization signal identification information ID respectively corresponding to
Determining an ID of the synchronization signal according to a first preset value corresponding to all the first sequences, or a first corresponding to the primary device to device synchronization signal PD2 DSS identification information and all the first sequences Determining the ID of the synchronization signal according to the preset value of H, or determining the ID of the synchronization signal according to any one of the first preset values of all the first sequences, or
Determining the ID of the synchronization signal according to any one of the PD2 DSS identification information and the first preset value of all the first sequences.

In relation to any one of the first to eighth possible embodiments of the fifth aspect or the fifth aspect, in a ninth possible embodiment of the fifth aspect, the baseband signal according to the synchronization signal The step of acquiring
Mapping the synchronization signal to a subcarrier to obtain a frequency domain signal;
Acquiring a time domain signal according to the frequency domain signal;
including.

In relation to the ninth possible embodiment of the fifth aspect, in a tenth possible embodiment of the fifth aspect, the synchronization signal comprises at least one first synchronization signal and at least one second synchronization. The first sequence, including the signals, corresponding to all the first synchronization signals and all the second synchronization signals is the same or different, and maps the synchronization signals to subcarriers to obtain a frequency domain signal The steps to do
In order to obtain frequency domain signals, to map each of the first position corresponding all first synchronizing signal to all of the first synchronization signal, all the second synchronizing signal every second Mapping each to a second position corresponding to the synchronization signal, the first position corresponding to all the first synchronization signals and the second position corresponding to all the second synchronization signals respectively The first positions corresponding to different symbol positions in one subframe or corresponding to all the first synchronization signals and the second positions corresponding to all the second synchronization signals are respectively in different subframes There is a step included.

In relation to the tenth possible embodiment of the fifth aspect, in an eleventh possible embodiment of the fifth aspect, the synchronization signal further comprises at least one third synchronization signal, and the third synchronization. The sequence corresponding to the signal is the same as or different from the sequence corresponding to the first synchronization signal or the second synchronization signal, and the step of mapping the synchronization signal to the subcarriers to obtain a frequency domain signal is:
Mapping every third synchronization signal to a third position corresponding to every third synchronization signal to obtain a frequency domain signal, and corresponding to every third synchronization signal The third position, the first position corresponding to all the first synchronization signals, and the second position corresponding to all the second synchronization signals are respectively different symbol positions in one subframe, or Subframes in which the first position corresponding to all the first synchronization signals, the second position corresponding to all the second synchronization signals, and the third position corresponding to all the third synchronization signals Further includes the steps of

  In relation to any one of the first to eleventh possible embodiments of the fifth aspect or the fifth aspect, in a twelfth possible embodiment of the fifth aspect, the sequence is an m-sequence; It is generated according to the ZC sequence or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to any one of the first to twelfth possible embodiments of the fifth aspect or the fifth aspect, in a thirteenth possible embodiment of the fifth aspect, the sequence has a length of 31 If it is an m-sequence having, one or more sequences of primitive polynomials are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to any one of the first to twelfth possible embodiments of the fifth aspect or the fifth aspect, in a fourteenth possible embodiment of the fifth aspect, the sequence has a length of 63 If it is an m-sequence having, one or more sequences of primitive polynomials are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

In connection with any one of the tenth to fourteenth possible embodiments of the fifth aspect, in the fifteenth possible embodiment of the fifth aspect, acquiring a time domain signal according to a frequency domain signal Is
Obtaining the baseband signal from the frequency domain signal by orthogonal frequency division multiplexing OFDM, or acquiring the baseband signal from the frequency domain signal by single carrier frequency division multiple access SC-FDMA.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたリソースブロックRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In relation to the fifteenth possible embodiment of the fifth aspect, in the sixteenth possible embodiment of the fifth aspect, acquiring baseband signals from the frequency domain signal by OFDM comprises:
Acquiring a baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of resource blocks RB configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたリソースブロックRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In relation to the fifteenth possible embodiment of the fifth aspect, in the seventeenth possible embodiment of the fifth aspect, acquiring a baseband signal from the frequency domain signal by SC-FDMA comprises:
Acquiring a baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of resource blocks RB configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

In relation to the seventeenth possible embodiment of the fifth aspect, in an eighteenth possible embodiment of the fifth aspect, in order to obtain a baseband signal, synchronization signals are subcarrier-based by SC-FDMA Before the mapping step, the method
Performing the discrete Fourier transform DFT on the synchronization signal to obtain a transformed signal;
Specifically, the step of mapping a synchronization signal to a subcarrier by SC-FDMA to obtain a baseband signal comprises
Mapping the transformed signal to a subcarrier by SC-FDMA to obtain a baseband signal.

式中、lは同期信号d（l）の独立変数を表し、Lは同期信号の長さであり、b（n）は同期信号に対してDFTが実行された後で獲得される変換信号を表し、0≦n≦L−1であり、jは虚数単位を表す。 In relation to the eighteenth possible embodiment of the fifth aspect, in the nineteenth possible embodiment of the fifth aspect, performing DFT on the synchronization signal to obtain a transformed signal comprises: ,
Obtaining the conversion signal according to the following equation:

Where l represents the independent variable of the synchronization signal d (l), L is the length of the synchronization signal, and b (n) is the transformed signal obtained after DFT is performed on the synchronization signal 0 ≦ n ≦ L−1, j represents an imaginary unit.

In connection with any one of the first to nineteenth possible embodiments of the fifth aspect or the fifth aspect, in a twentieth possible embodiment of the fifth aspect, radio frequency conversion is performed The step of transmitting the baseband signal later is
Acquiring a radio frequency signal after performing a radio frequency conversion on the baseband signal;
Sending out a radio frequency signal when a pre-set period has arrived;
including.

According to a sixth aspect, an embodiment of the present invention provides a synchronization signal receiving method, the method comprising
Receiving the synchronization signal, wherein the synchronization signal is generated by the transmitting end according to one or more sequences, and one or more lengths of the one or more sequences are determined according to the length of the synchronization signal , Step, and
Detecting the synchronization signal in order to obtain synchronization between the transmission end and the reception end of the synchronization signal;
including.

  In relation to the sixth aspect, in a first possible implementation of the sixth aspect, the sequence is generated according to an m sequence, a ZC sequence, or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to the first possible embodiment of the sixth aspect or the sixth aspect, in the second possible embodiment of the sixth aspect, if the sequence is an m-sequence having a length of 31 The primitive polynomials to generate one or more sequences are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In relation to the first possible embodiment of the sixth aspect or the sixth aspect, in the third possible embodiment of the sixth aspect, if the sequence is an m-sequence having a length of 63, The primitive polynomials to generate one or more sequences are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

In relation to any one of the first to third possible embodiments of the sixth aspect or the sixth aspect, in the fourth possible embodiment of the sixth aspect, the method comprises
Detecting whether a synchronization signal is received according to preset criteria;
Sending the synchronization signal generated by the receiving end to another receiving end as the transmitting end if the synchronization signal is not detected;
Further includes

  In the D2D communication scenario, the value of the cross correlation between synchronization signals provided in the embodiments of the present invention is small, which can shorten the synchronization detection time. Therefore, the receiving end of the synchronization signal can realize quick synchronization with the transmitting end according to the synchronization signal, thereby improving system performance.

To illustrate the technical solutions that put to an embodiment of the present invention more clearly, the following briefly describes the accompanying drawings required to describe each embodiment or the prior art. It should be understood that the attached drawings in the following description merely illustrate some embodiments of the present invention, and those skilled in the art can further derive other drawings from these attached drawings without difficulty.

FIG. 6 is a schematic view of a D2D communication scenario with network coverage and with partial network coverage. FIG. 10 is a schematic diagram of a D2D communication scenario without network coverage. FIG. 1 is a schematic structural diagram of a first embodiment of a synchronization signal transmission device according to the present invention. FIG. 5 is a schematic structural diagram of a second embodiment of a synchronization signal transmission device according to the present invention; FIG. 1 is a schematic structural diagram of a first embodiment of a synchronization signal receiving device according to the present invention. FIG. 1 is a schematic structural diagram of a first embodiment of a synchronization signal transmission device according to the present invention. FIG. 1 is a schematic structural diagram of a first embodiment of a synchronization signal receiving device according to the present invention. 1 is a schematic flowchart of a first embodiment of a synchronization signal transmission method according to the present invention; It is an illustration figure of SD2 DSS in 2nd Embodiment of the synchronous signal transmission method by this invention. FIG. 7 is a schematic view of a communication scenario in a third embodiment of a synchronization signal transmission method according to the present invention. It is an illustration figure of SD2 DSS in 4th Embodiment of the synchronous signal transmission method by this invention. 5 is a schematic flowchart of a fifth embodiment of a synchronization signal transmission method according to the present invention; 1 is a schematic flowchart of a first embodiment of a synchronization signal receiving method according to the present invention;

Hereinafter, with reference to the accompanying drawings in the embodiments of the present invention, illustrating the technical solutions in the embodiments of the present invention to clarify. Of course, the described embodiments are merely a part rather than all of the embodiments of the present invention. All other embodiments that can be obtained without difficulty by those skilled in the art based on each embodiment of the present invention are intended to be included within the protection scope of the present invention.

  FIG. 1 is a schematic diagram of D2D communication with network coverage and with partial network coverage. As shown in FIG. 1, on the left side of FIG. 1, a communication scenario with network coverage is shown. In FIG. 1, UEs served by base station 10, ie, UE 11, UE 12, and UE 13 receive the synchronization signal transmitted by base station 10 on the downlink, and each UE uses the above synchronization signal to base Synchronize with station 10 In addition, UE 14 and UE 15 are also within the coverage of base station 10, but for some reason can not be wirelessly connected to base station 10, for example due to walls or obstacles in a building. Thus, when UE 14 attempts to initiate D2D communication with UE 15, UE 14 transmits D2 DSS as a synchronization source, so that receiving end UE 15 is synchronized with UE 14 using D2 DSS, as there is no network assistance.

  Although UE 13 is within the service range of base station 10, UE 13 detects several UEs, for example, UE 21 described in FIG. 1 is in the vicinity of UE 13 and UE 21 is outside the network service. It should be further noted. In this case, since UE 13 is synchronized with base station 10, UE 13 has higher priority as a possible synchronization source. Thus, UE 13 can act as a synchronization source to initiate D2 DSS, so that UE 21 is synchronized with UE 13. Similarly, UE 21 may continue to transmit D2 DSS, so UE 22 is synchronized following UE 21.

  FIG. 2 is a schematic diagram of a D2D communication scenario without network coverage. As shown in FIG. 2, when UE 31 does not receive a synchronization signal, UE 31 transmits D2 DSS to nearby UEs as a synchronization source, and UEs such as UE 32, UE 33, and UE 34 near UE 31 receive D 2 DSS. . Further, the UE 34 transmits D2 DSS to the UE 35. However, the UE 30 can not even receive the D2 DSS sent by the UE 31, so the UE 30 sends another D2 DSS to the UE (eg UE 34) near the UE 30.

  As can be seen from the above description, the scenario of transmitting the synchronization signal in D2D communication mode is more complex than the scenario in the cellular mobile communication system and transfers the timing of the base station synchronization from the synchronization source (such as UE13 or UE21) With transmission of synchronization signals from the signal and a completely distributed synchronization source (such as UE14, UE31, UE30, UE34).

  Based on the foregoing communication scenario, the synchronization signal transmission method, synchronization signal transmission apparatus, and synchronization signal transmission device provided in the embodiments of the present invention will be described in detail below in connection with specific embodiments.

  FIG. 3 is a schematic structural diagram of a first embodiment of a synchronization signal transmitter according to the present invention. This embodiment of the present invention provides a synchronization signal transmission device, which can be incorporated into a signal transmission device such as a UE or a base station. As shown in FIG. 3, the synchronization signal transmission device 30 includes a synchronization signal generation module 31, a baseband signal acquisition module 32, and a first transmission module 33.

  The synchronization signal generation module 31 is configured to generate the synchronization signal according to the one or more sequences, and the length of one or more of the one or more sequences is determined according to the length of the synchronization signal . The baseband signal acquisition module 32 is configured to acquire a baseband signal in accordance with the synchronization signal generated by the synchronization signal generation module 31. The first transmission module 33 is configured to transmit the baseband signal acquired by the baseband signal acquisition module 32 after performing the radio frequency conversion.

  The apparatus of this embodiment can be configured to execute the technical solution of the method embodiment shown in FIG. 8, and the realization principle and technical effect of the technical solution are the same as those of this embodiment. , I will not explain further here.

  In the above embodiment, the sequence includes a first sequence, and the synchronization signal generation module 31 determines one or more lengths of one or more first sequences according to the length of the synchronization signal, One or more first preset values corresponding to one or more first sequences, wherein the first preset values corresponding to each first sequence are independent To perform a circular shift on the one or more first sequences according to the one or more first preset values to determine the first preset value of the and to generate the synchronization signal A synchronization signal generator configured may be included.

  Furthermore, the sequence further includes a second sequence, and the synchronization signal generation module 31 generates a scrambling sequence according to the one or more second sequences, and the synchronization signal generation unit generates the scrambling sequence using the scrambling sequence. The mobile communication device may further include a scrambling unit configured to perform the scrambling process at least once on the synchronization signal. The baseband signal acquisition module 32 may be specifically configured to acquire a baseband signal according to the scrambling signal subjected to the scrambling process performed by the scrambling unit. In this embodiment, the peak-to-average ratio of the synchronization signal can be reduced using the aforementioned scrambling sequence.

  Optionally, the scrambling unit determines one or more lengths of the one or more second sequences according to the length of the synchronization signal, one corresponding to the one or more second sequences Or a plurality of second preset values, wherein every second sequence corresponds to one second preset value or a different second preset value, for all synchronization sources in the group Determining one or more second preset values, wherein the second preset value of the corresponding scrambling sequence is the same, and each second according to the second preset value to generate a scrambling sequence It can also be specifically configured to perform a cyclic shift on the two sequences. In this embodiment of the invention, a cyclic shift value (i.e., a second preset value) corresponding to the scrambling sequence is obtained according to the group identification information. In the D2D group, scrambling sequences used for different synchronization signals have one cyclic shift to enhance the associated performance between synchronization signals in the group and to provide scalability of the composition of inter-group synchronization signals. Furthermore, when there are multiple scrambling sequences, at least one scrambling sequence corresponds to one second preset value in the group, and the other scrambling sequences are different second preset values. It corresponds. In addition, cyclic shifts of scrambling sequences in different D2D groups can also be indicated explicitly or implicitly.

  In any of the embodiments of the present invention, either the first preset value or the second preset value is determined according to the group identification information, and the sequence is generated according to an m sequence, a ZC sequence, or a combination thereof It should be further noted. That is, the synchronization signal is generated according to the m sequence, or the synchronization signal is generated according to the ZC sequence, or the synchronization signal is generated according to both the m sequence and the ZC sequence.

  For ZC sequences having a particular sequence length value Q, different root sequence numbers u correspond to different ZC sequences.

The m-sequence is a sequence that has the longest period and can be generated by the m-stage shift register. The length of the m-sequence is 2 ^m −1, ie the length of the m-sequence can be 7, 15, 31, 63, 127, 255, etc. The m-sequence is a binary sequence.

Based on the above, the preset value includes the first preset value and the second preset value, and the synchronization signal generation unit and the scrambling unit can be further configured to obtain the preset value according to the following equation Assuming that:
f (N _GID ) = a * N _GID + b, or
f (N _GID ) = (a * N _GID + b) mod K
_Where N _GID represents group identification information, a and b are predefined constants, f (N _GID ) is a preset value, K is a system defined constant, and mod is modulo Represents an operation.

In the above embodiment, the group identification information is a function of PD2 DSS indication information or carried in a first control command delivered by the network or carried in a second control command delivered by the sending device, Or implied by the network. Specifically, in a D2D scenario with network coverage, the first control command may be transmitted to the D2D synchronization signal transmitting end using the network. The first control command carries group identification information. Optionally, the group identification may also be conveyed in a first control command delivered by the network. For example, in the LTE system, the first control command may be downlink control information (abbreviation: DCI) transmitted by an evolved node B (abbreviation: eNB) on the downlink using a cellular link. Or Radio Resource Control (abbreviated as RRC) signaling. If the network configures one group identification for different D2D synchronization signal transmitters, those D2D synchronization signal transmitters belong to one group. If the network configures different group identification information for different D2D synchronization signal transmitters, those D2D synchronization signal transmitters belong to different groups. Optionally, the group identification is control signaling used in D2D to instruct the UE receiving scheduling assignment (SA) signaling to generate the group identification of synchronization signal. It may be identification information to be conveyed.

  In addition, for different first sequences, the synchronization signal generator determines the ID of the synchronization signal according to the first preset value corresponding to all the first sequences, or the PD2 DSS identification information and all the first ones. Determining the identification information ID of the synchronization signal according to the first preset value corresponding to the sequence of k, or determining the ID of the synchronization signal according to any one of the first preset values of all the first sequences Or, it may be further configured to determine the ID of the synchronization signal according to any one of the PD2 DSS identification information and the first preset value of all the first sequences.

  Optionally, the baseband signal acquisition module 32 is configured to map the synchronization signal to the subcarriers to acquire a frequency domain signal, and a time according to the mapping unit and the frequency domain signal acquired by the mapping unit An acquisition unit configured to acquire the area signal may also be included.

  In order to obtain frequency domain signals, mapping the synchronization signal to the sub-carriers specifically refers to obtaining frequency domain sub-carrier signals corresponding to all sequences and further obtaining frequency domain signals, All sequences contained in the synchronization signal can be mapped separately to the subcarriers, the frequency domain signal comprising the frequency domain subcarrier signal. For example, two sequences with a length of 31 may be mapped to odd and even subcarriers, respectively, or 31 consecutive subcarriers may be occupied separately, or A total of 62 subcarriers may be mapped as a one-to-one correspondence in a manner. For a sequence having a length of 63, the method for mapping the sequence to 63 subcarriers is similar to the method in the previous example. A sequence having a length of 63 may be mapped to 63 consecutive subcarriers or may be mapped to 63 subcarriers in a one-to-one correspondence using any other method.

In one possible mapping method, the synchronization signal comprises at least one first synchronization signal and at least one second synchronization signal, corresponding to all first synchronization signals and all second synchronization signals. The first sequence is the same or different. Mapping section, in order to obtain a frequency domain signal, to map each of the first position corresponding all first synchronizing signal to all of the first synchronization signal, all the all the second synchronization signal And may be specifically configured to map to a second position corresponding to the second synchronization signal of each of the first and second synchronization signals corresponding to all the first synchronization signals. The second position to be transmitted is a different symbol position in one subframe, or the first position corresponding to all the first synchronization signals and the second position corresponding to all the second synchronization signals are respectively It is in different subframes.

  In another possible mapping method, the synchronization signal may further include at least one third synchronization signal, and a sequence corresponding to the third synchronization signal may be the first synchronization signal or the second synchronization signal. The same as or different from the corresponding sequence. The mapping unit may be further configured to map every third synchronization signal to a third position corresponding to every third synchronization signal to obtain a frequency domain signal, and The third position corresponding to the third synchronization signal, the first position corresponding to all the first synchronization signals, and the second position corresponding to all the second synchronization signals are each in one subframe. Or a first position corresponding to all the first synchronization signals, a second position corresponding to all the second synchronization signals, and a third corresponding to all the third synchronization signals Position 3 is in a different subframe.

  In addition, the number of sequences for generating the synchronization signal depends on the length of the sequences that can be used by the synchronization signal. One or more sequences of a certain length are determined according to the length of the synchronization signal to generate the synchronization signal. For example, the length of the synchronization signal does not exceed 72, and if m sequences are used, the preferred length of the sequence is 62 or 63. When the length of the synchronization signal is 62, it is determined that a synchronization signal having a length of 62 can be generated using two m sequences having a length of 31 or the synchronization signal has a length of 63 At some time, it is determined that a synchronization signal having a length of 63 can be generated using one m sequence having a length of 63. Other similar cases are not described here one by one.

式中、

mod 2は2による除算のモジュロ演算を表す。 In a practical application of this embodiment of the invention, if the sequences are m sequences having a length of 31, then the primitive polynomials of the one or more sequences are any one or any combination of the following polynomials: :

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In another practical application of this embodiment of the invention, where the sequences are m sequences having a length of 63, the primitive polynomials of the one or more sequences are any one or any combination of the following polynomials And:

During the ceremony

mod 2 represents the modulo operation of division by two.

  Furthermore, the acquisition unit may be particularly configured to acquire a baseband signal from the frequency domain signal by OFDM or to acquire a baseband signal from the frequency domain signal by SC-FDMA.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたリソースブロック（Resource Block、略称：RB）の数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 When the acquisition unit acquires a baseband signal from the frequency domain signal by OFDM, the acquisition unit is specifically configured to acquire the baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of resource blocks (abbreviated as RB) configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 When the acquisition unit acquires a baseband signal from the frequency domain signal by SC-FDMA, the acquisition unit is specifically configured to acquire the baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of RBs configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

  FIG. 4 is a schematic structural diagram of a second embodiment of a synchronization signal transmitter according to the present invention. As shown in FIG. 4, the present embodiment is based on the embodiment shown in FIG. Furthermore, the apparatus 40 may further include a transform module 41 configured to perform a DFT on the synchronization signal to obtain a transform signal. The acquisition unit is configured to map the converted signal to a subcarrier by SC-FDMA in order to acquire a baseband signal.

  The apparatus of this embodiment can be configured to execute the technical solution of the method embodiment shown in FIG. 12, and the realization principle and technical effect of the technical solution are the same as those of this embodiment. , I will not explain further here.

式中、lは同期信号d（l）の独立変数を表し、Lは同期信号の長さであり、b（n）は同期信号に対してDFTが実行された後で獲得される変換信号を表し、0≦n≦L−1であり、jは虚数単位を表す。 In this embodiment, the transform module 41 can be specifically configured to obtain a transform signal according to the following equation:

Where l represents the independent variable of the synchronization signal d (l), L is the length of the synchronization signal, and b (n) is the transformed signal obtained after DFT is performed on the synchronization signal 0 ≦ n ≦ L−1, j represents an imaginary unit.

  Based on the previous embodiment, the first transmission module 33 obtains a radio frequency signal after performing a radio frequency conversion on the baseband signal, and sends out the radio frequency signal when the preset period has arrived. In particular it can be configured.

  In the D2D communication scenario, the value of the cross-correlation between synchronization signals generated by the synchronization signal transmitter provided in the present embodiment of the present invention is relatively small, thereby shortening the synchronization detection time of the reception end of the synchronization signal. be able to. Therefore, the receiving end of the synchronization signal can realize quick synchronization with the transmitting end according to the synchronization signal, thereby improving system performance.

  FIG. 5 is a schematic structural diagram of a first embodiment of a synchronization signal receiving apparatus according to the present invention. This embodiment of the present invention provides a synchronization signal receiver, which can be incorporated into a signal receiving device such as a UE or a base station. As shown in FIG. 5, the synchronization signal receiving apparatus 50 includes a receiving module 51 and a processing module 52.

  The receiving module 51 is configured to receive a synchronization signal, the synchronization signal being generated by the transmitting end according to one or more sequences, and one or more lengths of one or more sequences being synchronization signals Determined according to the length of the The processing module 52 is configured to detect the synchronization signal received by the receiving module 51 in order to obtain synchronization with the transmitting end of the synchronization signal.

  The synchronization signal reception device of this embodiment and the transmission device shown in FIG. 3 or 4 are arranged in correspondence with each other. After receiving the synchronization signal transmitted by the transmitting device, the receiving device realizes synchronization with the transmitting device to perform D2D communication. In addition, the transmitting device and the receiving device can be arranged separately and independently, or can be integrated into one communication device (for example a mobile phone), ie one communication device serves as the transmitting device It can act as both a receiver.

  The apparatus of this embodiment can be configured to execute the technical solution of the method embodiment shown in FIG. 13, and the realization principle and technical effect of the technical solution are the same as those of this embodiment. , I will not explain further here.

  In the above embodiments, the sequences can be generated according to m sequences, ZC sequences, or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 Optionally, if the sequence is an m-sequence having a length of 31, then the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 Optionally, if the sequence is an m-sequence having a length of 63, then the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

  Based on the above, the apparatus 50 may further include a second transmission module, wherein the processing module 52 detects whether the receiving module 51 receives a synchronization signal according to the preset criteria, if no synchronization signal is detected: The second transmission module may be further configured to trigger the synchronization signal generated by the device to another receiving end. Optionally, in this embodiment, the second transmission module can be arranged independently or integrated with the reception module 51, which is not limited in the present invention.

FIG. 6 is a schematic structural diagram of a first embodiment of a synchronization signal transmission device according to the present invention. This embodiment of the invention provides a synchronization signal transmission device, which can be integrated into a signal transmission device such as a UE or a base station. As shown in FIG. 6, the synchronization signal transmission device 60 includes a first processor 61 and a first transmitter 62.

  The first processor 61 is configured to generate the synchronization signal according to the one or more sequences, the length of one or more of the one or more sequences being determined according to the length of the synchronization signal, The one processor 61 is configured to acquire a baseband signal in accordance with the synchronization signal. The first transmitter 62 is configured to deliver the baseband signal acquired by the first processor 61 after performing radio frequency conversion.

  The device of this embodiment can be configured to execute the technical solution of the method embodiment shown in FIG. 8 or FIG. 12, and the realization principle and technical effect of the technical solution are those of this embodiment. It is similar and will not be described further here.

  In the above embodiments, the sequence may include a first sequence, and the first processor 61 determines one or more lengths of one or more first sequences according to the length of the synchronization signal. , One or more first preset values corresponding to one or more first sequences, wherein the first preset values corresponding to each first sequence are independent, Particularly configured to perform a cyclic shift of the one or more first sequences according to the one or more first preset values to determine one preset value and to generate the synchronization signal Can.

  Optionally, the sequence may further include a second sequence, wherein the first processor 61 generates a scrambling sequence according to the one or more second sequences, and using the scrambling sequence, the synchronization signal Can be further configured to perform the scrambling process at least once for. Specifically, acquiring a baseband signal according to a synchronization signal is acquiring a baseband signal according to a synchronization signal subjected to scrambling processing.

  Furthermore, the particular process of generating the scrambling sequence according to the one or more second sequences by the first processor 61 is one or more of the one or more second sequences according to the length of the synchronization signal. Determining the length and one or more second preset values corresponding to the one or more second sequences, all the second sequences being one second preset value Or one or more second preset values corresponding to different second preset values, wherein the second preset value of the scrambling sequence for all synchronization sources in the group is the same And performing a cyclic shift on each second sequence according to a second preset value to generate a scrambling sequence.

  Furthermore, when there are multiple scrambling sequences, at least one scrambling sequence corresponds to one second preset value in the group, and the other scrambling sequences are different second preset values. It corresponds.

Either the first preset value or the second preset value is determined according to the group identification information. The preset value comprises the first preset value and the second preset value, and it is assumed that the first processor 61 can be further configured to determine the preset value according to the following equation:
f (N _GID ) = a * N _GID + b, or
f (N _GID ) = (a * N _GID + b) mod K
_Where N _GID represents group identification information, a and b are predefined constants, f (N _GID ) is a preset value, K is a system defined constant, and mod is modulo Represents an operation.

  The group identification information is a function of PD2 DSS identification information, or carried in a first control command delivered by the network, or carried in a second control command delivered by the transmitting device, or implied by the network It should be noted that the sequences are generated according to m sequences, ZC sequences, or a combination thereof.

  For different first sequences, the first processor 61 determines the ID of the synchronization signal according to the first preset value corresponding to all the first sequences, or PD2 DSS identification information and all the first sequences Determining the identification information ID of the synchronization signal according to the first preset value corresponding to or determining the ID of the synchronization signal according to any one of the first preset values of all the first sequences, or It may be further configured to determine the ID of the synchronization signal according to any one of the PD2 DSS identification information and the first preset value of all the first sequences.

  In the above embodiment, the fact that the first processor 61 is configured to acquire the baseband signal according to the synchronization signal is more specifically the first processor 61 to acquire the frequency domain signal. , Configured to map synchronization signals to subcarriers and to acquire time domain signals according to frequency domain signals.

Furthermore, the synchronization signal includes at least one first synchronization signal and at least one second synchronization signal, and the first sequence corresponding to all the first synchronization signals and all the second synchronization signals is the same. Yes or different. First processor 61 in order to obtain a frequency domain signal, that is configured to map a synchronization signal to subcarriers, in particular, the first processor 61, the baseband signal Map all first synchronization signals to first positions corresponding to all first synchronization signals to obtain frequency domain signals, and all second synchronization signals to all second synchronizations The first position corresponding to all the first synchronization signals and the second position corresponding to all the second synchronization signals are configured to respectively map to the second positions corresponding to the signals. The first position corresponding to each different symbol position in one subframe or the first position corresponding to all the first synchronization signals and the second position corresponding to all the second synchronization signals are each in different subframes To be A.

  Furthermore, the synchronization signal further includes at least one third synchronization signal, and the sequence corresponding to the third synchronization signal is the same as or different from the sequence corresponding to the first synchronization signal or the second synchronization signal. . The fact that the first processor 61 is configured to map the synchronization signal to the subcarriers in order to acquire the frequency domain signal means that specifically the first processor 61 acquires the frequency domain signal In order to map all the third synchronization signals to a third position corresponding to all the third synchronization signals, and the third corresponding to all the third synchronization signals. The position, the first position corresponding to all the first synchronization signals, and the second position corresponding to all the second synchronization signals are respectively different symbol positions in one subframe, or all the first The first position corresponding to one synchronization signal, the second position corresponding to all the second synchronization signals, and the third position corresponding to all the third synchronization signals in different subframes To be.

式中、

mod 2は2による除算のモジュロ演算を表す。 Based on the above, in one scenario, if the sequences are m sequences having a length of 31, then the primitive polynomials of the one or more sequences are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In another scenario, if the sequence is an m-sequence having a length of 63, the primitive polynomials of the one or more sequences are any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

  In the above embodiment, the fact that the first processor 61 is configured to acquire the time domain signal according to the frequency domain signal means that the first processor 61 is based on the frequency domain signal from OFDM. It is configured to acquire a band signal or that the first processor 61 is configured to acquire a baseband signal from the frequency domain signal by SC-FDMA.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In one embodiment for acquiring a baseband signal, it is specifically configured that the first processor 61 is configured to acquire a baseband signal from a frequency domain signal by means of OFDM. 61 is further configured to acquire a baseband signal according to:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of RBs configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In another embodiment for acquiring a baseband signal, it is specifically configured that the first processor 61 is configured to acquire a baseband signal from a frequency domain signal by SC-FDMA. One processor 61 is further configured to obtain a baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of RBs configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

  In another embodiment, optionally, the first processor 61 can be further configured to perform a DFT on the synchronization signal to obtain a transformed signal. Specifically, the first processor 61 is configured to map synchronization signals to subcarriers by SC-FDMA in order to acquire a baseband signal. Being configured to map the transform signal to a subcarrier by SC-FDMA to obtain a band signal.

式中、lは同期信号d（l）の独立変数を表し、Lは同期信号の長さであり、b（n）は同期信号に対してDFTが実行された後で獲得される変換信号を表し、0≦n≦L−1であり、jは虚数単位を表す。 The fact that the first processor 61 is configured to perform a DFT on the synchronization signal in order to obtain the transformed signal, in particular, the first processor 61 is adapted to Being further configured to earn, and:

Where l represents the independent variable of the synchronization signal d (l), L is the length of the synchronization signal, and b (n) is the transformed signal obtained after DFT is performed on the synchronization signal 0 ≦ n ≦ L−1, j represents an imaginary unit.

  In the previous embodiment, the first transmitter 62 acquires a radio frequency signal after performing a radio frequency conversion on the baseband signal acquired by the first processor, and radios when the preset period has arrived. It can be specifically configured to deliver frequency signals.

  FIG. 7 is a schematic structural diagram of a first embodiment of a synchronization signal receiving device according to the present invention. The present embodiment of the invention provides a synchronization signal receiving device, which may be in a signal receiving device such as a UE or a base station. As shown in FIG. 7, the synchronization signal receiving device 70 includes a receiver 71 and a second processor 72.

  The receiver 71 is configured to receive a synchronization signal, the synchronization signal being generated by the transmitting end according to one or more sequences, and one or more lengths of the one or more sequences being synchronization signals Determined according to the length of the The second processor 72 is configured to detect the synchronization signal received by the receiver 71 in order to obtain synchronization with the transmission end of the synchronization signal.

The device of this embodiment can be configured to execute the technical solution of the method embodiment shown in FIG. , I will not explain further here.

  In the above embodiments, the sequences are generated according to m sequences, ZC sequences, or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 Optionally, if the sequence is an m-sequence having a length of 31, then the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 Furthermore, if the sequence is an m-sequence having a length of 63, then the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

  Based on the above, the receiving device 70 can further include a second transmitter. The second processor 72 detects, according to preset criteria, whether the receiver 71 receives a synchronization signal and, if no synchronization signal is detected, triggering the second transmitter to generate the present receiver device. It can be further configured to send the synchronization signal to another receiving end. In the present embodiment, the second transmitters may be arranged independently or may be integrated with the receiver 71, which is not limited in the present invention.

  FIG. 8 is a schematic flowchart of a first embodiment of a synchronization signal transmission method according to the present invention. This embodiment of the present invention provides a synchronization signal transmission method, which is used to achieve synchronization between the transmission end and the reception end of the synchronization signal and can be performed by the synchronization signal transmission device . The apparatus can be incorporated into a signal transmission device such as a UE or a base station. As shown in FIG. 8, the synchronization signal transmission method includes the following.

  S301.1 Generate a synchronization signal according to one or more sequences, the length of one or more of the one or more sequences being determined according to the length of the synchronization signal.

  Specifically, the sequence includes a first sequence, and S301 specifically determines one or more lengths of one or more first sequences according to the length of the synchronization signal; Determining one or more first preset values corresponding to one or more first sequences, wherein the first preset values corresponding to each first sequence are independent , And performing a cyclic shift of the one or more first sequences according to the one or more first preset values to generate the synchronization signal.

For different first sequences, there are multiple relationships between the first preset value corresponding to each of the first sequences and the identification information ( identity , abbreviated as ID) of the synchronization signal, Explain the relationships one by one.

  In one particular embodiment, the ID of the synchronization signal is determined according to a first preset value corresponding to all the first sequences. That is, all the first preset values correspond in common to the ID of the synchronization signal. For example, theoretically, for an m-sequence having a length of 63, synchronization signals generated using two independent m-sequences can be mapped to up to 63 * 63 = 3969 IDs, ie 3969 Different synchronization signals are obtained.

  In another particular embodiment, the ID of the synchronization signal is determined according to PD2 DSS and a first preset value corresponding to all the first sequences. For example, an m sequence having a length of 63 can be mapped to 63 IDs, and if there are 3 different PD2 DSS sequences, a total of 3 * 63 = 189 sync signal IDs can be mapped.

  In yet another specific embodiment, the ID of the synchronization signal is determined according to any one of the first preset values of all the first sequences. That is, the ID of the synchronization signal may be uniquely determined by any one of the first preset values. This is aimed at another first preset if the sync signal generated at the position of the first preset value strongly interferes with the sync signal transmitted by the adjacent sync source. The values are used by the adjacent synchronization sources for differentiation from preset values, which ensures that no strong interference occurs between synchronization signals transmitted by the adjacent synchronization sources. In this embodiment, a sequence having a length of 63 can indicate up to 63 different synchronization signals in a group, and a scrambling sequence can be used to differentiate between different groups.

In yet another particular embodiment, the ID of the synchronization signal is determined according to the PD2 DSS identification and any one of the first preset values of all the first sequences. That is, the ID of the synchronization signal can be represented by Nid = f (x, PD2 DSS identification information), Nid represents the ID of the synchronization signal, x represents the first preset value, and f represents the content in parentheses (関 数 represents a function of the first preset value and the PD2 DSS identification information). For example, Nid = x mod N _max or Nid = (x + PD2 DSS identification information) mod N _max , where N _max represents the maximum number of different synchronization sources, eg, N _max = 100 or 60, and this parameter is It can be predefined or can be indicated by signaling, where mod represents a modulo operation.

  In this step, sequences may be generated according to m sequences, ZC sequences, or a combination thereof. That is, the synchronization signal is generated according to the m sequence, or the synchronization signal is generated according to the ZC sequence, or the synchronization signal is generated according to both the m sequence and the ZC sequence.

であり、Qはシーケンス長であり、ZCシーケンスの周期自己相関において、すべての循環シフト値に対応する相関値が主ピークを除いて0であり、別のZCシーケンスを用いてスクランブルされたZCシーケンスの最小相互相関値は

とすることができる。 Both m-sequences and ZC (Zadoff-Chu, sequences named after people) sequences are specific sequences with excellent related performance. The difference between the two sequences with respect to correlation is as follows: In cyclic autocorrelation of m sequences, the correlation value corresponding to all cyclic shift values is -1 except for the main peak, and another m sequence is used The maximum cross correlation value of scrambled m sequences is approximately

Where Q is the sequence length, and in cyclic autocorrelation of ZC sequences, the correlation values corresponding to all cyclic shift values are 0 except for the main peak, and the ZC sequence scrambled using another ZC sequence The minimum cross correlation value of is

It can be done.

式中、jは虚数単位であり、uはZCシーケンスのルートシーケンス番号であって、シーケンス長Qと互いに素な整数であり、d（n）はZCシーケンス内の各チップに対応するインデックスnの特定の値を表す。 A ZC sequence whose sequence length Q is odd is generated according to

Where j is the imaginary unit, u is the root sequence number of the ZC sequence, and is an integer relatively prime to the sequence length Q, and d (n) is the index n corresponding to each chip in the ZC sequence Represents a specific value.

式中、jは虚数単位であり、uはZCシーケンスのルートシーケンス番号であって、シーケンス長Qと互いに素な整数であり、d（n）はZCシーケンス内の各チップに対応するインデックスnの特定の値を表す。 A ZC sequence whose sequence length Q is even is generated according to

Where j is the imaginary unit, u is the root sequence number of the ZC sequence, and is an integer relatively prime to the sequence length Q, and d (n) is the index n corresponding to each chip in the ZC sequence Represents a specific value.

  For ZC sequences having a particular sequence length value Q, different root sequence numbers u correspond to different ZC sequences.

The m-sequence is a sequence that has the longest period and can be generated by the m-stage shift register. The length of the m-sequence is 2 ^m −1, ie the length of the m-sequence can be 7, 15, 31, 63, 127, 255, etc. The m-sequence is a binary sequence.

  The number of sequences to generate the synchronization signal depends on the length of the sequence that can be used by the synchronization signal. One or more sequences of a certain length are determined according to the length of the synchronization signal to generate the synchronization signal. For example, the length of the synchronization signal does not exceed 72, and if m sequences are used, the preferred length of the sequence is 62 or 63. When the length of the synchronization signal is 62, it is determined that a synchronization signal having a length of 62 can be generated using two m sequences having a length of 31 or the synchronization signal has a length of 63 At some time, it is determined that a synchronization signal having a length of 63 can be generated using one m sequence having a length of 63. Other similar cases are not described here one by one.

  S302. The baseband signal is acquired according to the synchronization signal.

  Specifically, S302 can include mapping the synchronization signal to a subcarrier to obtain a frequency domain signal and obtaining a time domain signal according to the frequency domain signal.

  The step of mapping the synchronization signal to the subcarriers in order to obtain a frequency domain signal, in particular, to obtain frequency domain subcarrier signals corresponding to all the sequences and to obtain further frequency domain signals, The step of separately mapping all sequences included in the synchronization signal to the subcarriers may be performed, and the frequency domain signal includes the frequency domain subcarrier signal. For example, two sequences with a length of 31 may be mapped to odd and even subcarriers, respectively, or 31 consecutive subcarriers may be occupied separately, or A total of 62 subcarriers may be mapped as a one-to-one correspondence in a manner. For a sequence having a length of 63, the method for mapping the sequence to 63 subcarriers is similar to the method in the previous example. A sequence having a length of 63 may be mapped to 63 consecutive subcarriers or may be mapped to 63 subcarriers in a one-to-one correspondence using any other method.

In a practical application scenario, acquiring the time domain signal according to the frequency domain signal is a step of modulating the frequency domain signal into the time domain signal as understood by those skilled in the art. The modulation scheme may be Orthogonal Frequency Division Multiplexing (abbr .: OFDM), or single carrier frequency division multiple access (abbr .: SC-FDMA). Specific modulation schemes will be described in detail in the following embodiments.

  S303. A baseband signal is sent out after performing the radio frequency conversion.

  Specifically, S303 performs a step of acquiring a radio frequency signal after performing a radio frequency conversion on a baseband signal, and a step of transmitting a radio frequency signal to, for example, a receiver when a preset period has come. And can be included.

  In the D2D communication scenario, the value of the cross correlation between synchronization signals provided in this embodiment of the present invention is small, which can shorten the synchronization detection time. Therefore, the receiving end of the synchronization signal can realize quick synchronization with the transmitting end according to the synchronization signal, thereby improving system performance.

  It should be noted that in any embodiment of the present invention, a synchronization source group may include multiple synchronization sources. The synchronization source is the device that transmits the synchronization signal, ie, the source of the synchronization signal or the transmitter of the synchronization signal. In the D2D communication process, the transmitting end and the receiving end are arranged relative to each other. The receiving end simultaneously also acts as a transmitting end (i.e., a synchronization source), and the synchronization signal generated by the receiving end can be transmitted to another receiving end to achieve synchronization between the devices. In addition, the group identification information in the present embodiment of the present invention is the identification information of the synchronization source group described above.

  Based on the above embodiments, the sequence may include a second sequence, S301 includes generating a scrambling sequence according to one or more second sequences, and using the scrambling sequence as a synchronization signal. And C. performing the scrambling process at least once. Specifically, S302 is a step of acquiring a baseband signal according to the synchronization signal subjected to the scrambling process. As shown in Table 1, the first sequence and the second sequence may be generated according to a combination of m sequence, ZC sequence, m sequence and ZC sequence. In this embodiment, the peak-to-average ratio of the synchronization signal can be reduced using the aforementioned scrambling sequence.

Optionally, generating the scrambling sequence according to the one or more second sequences comprises, in particular, one or more lengths of one or more second sequences according to a length of the synchronization signal. Determining one or more second preset values corresponding to one or more second sequences, wherein all second sequences are one second. Generating a scrambling sequence, corresponding to a preset value or a different second preset value, wherein the second preset value of the scrambling sequence for all synchronization sources in the group is the same Performing a cyclic shift on each second sequence according to a second preset value. In this embodiment of the invention, a cyclic shift value (i.e., a second preset value) corresponding to the scrambling sequence is obtained according to the group identification information. In the D2D group, scrambling sequences used for different synchronization signals have one cyclic shift to enhance the associated performance between synchronization signals in the group and to provide scalability of the composition of inter-group synchronization signals. Furthermore, when there are multiple scrambling sequences, at least one scrambling sequence corresponds to one second preset value in the group, and the other scrambling sequences are different second preset values. It corresponds. In addition, cyclic shift values (second preset values) of scrambling sequences in different D2D groups can also be indicated explicitly or implicitly.

  It should be noted that either the first preset value or the second preset value is determined according to the group identification information. For ease of explanation, the first preset value and the second preset value are collectively referred to as preset values.

The step of determining the preset value according to the group identification information may specifically be a step of obtaining the preset value according to the following equation:
f (N _GID ) = a * N _GID + b Formula (3a)
Or
f (N _GID ) = (a * N _GID + b) mod K formula (3b)
_Where N _GID represents group identification information, a and b are predefined constants, f (N _GID ) is a preset value, and K is a system defined constant, eg, K can be the system dictated maximum number of synchronization signals in the group, mod representing modulo arithmetic.

  The group identification information may be a function of PD2 DSS indication information, or may be conveyed in a first control instruction delivered by the network, or may be in a second control instruction delivered by the transmitting device. It should be noted that it may be well or implicitly indicated by the network.

Specifically, in a D2D scenario with network coverage, the first control command may be transmitted to the D2D synchronization signal transmitting end using the network. The first control command carries group identification information. Optionally, the group identification may also be conveyed in a first control command delivered by the network. For example, in the LTE system, the first control command may be downlink control information (abbreviation: DCI) transmitted by an evolved node B (abbreviation: eNB) on the downlink using a cellular link. Or Radio Resource Control (abbreviated as RRC) signaling. If the network configures one group identification for different D2D synchronization signal transmitters, those D2D synchronization signal transmitters belong to one group. If the network configures different group identification information for different D2D synchronization signal transmitters, those D2D synchronization signal transmitters belong to different groups. Optionally, group identification information is carried in SA control signaling used in D2D to instruct the UE receiving scheduling assignment (SA) signaling to generate group identification information of synchronization signal. Identification information.

In addition, when PD2 DSS is present, the D2D synchronization signal transmitter using PD2 DSS belongs to a group, ie, group identification information N _GID can be a function of PD2 DSS identification information. The method can be applied to scenarios with network coverage as well as scenarios without network coverage.

In a scenario without network coverage, the second control command can also be sent to the D2D sync signal sender using the sending device, and the second control command carries and sends at least the group identification information N _GID of the sync signal. The functionality of the device is similar to that of Evolved Node B (abbreviated: eNB) in the scenario with network coverage, but the transmitting device entity should be a more sophisticated control device or D2D UE Can.

  The implicit indication by the network means that, when there is network coverage, the group identification information can be indicated by various information delivered by the network, the information being transmitted by the network to the UEs served by the network Be done. For example, if there is network coverage, D2D UEs within the network coverage are synchronized with the base station 10. As shown in FIG. 1, UE 11, UE 12 and UE 13 are synchronized with base station 10 according to the downlink synchronization signals (PSS and SSS) distributed by base station 10. In addition, for example, the UE 13 transmits the synchronization signal D2DSS generated by the UE 13 as a synchronization source, but the UE 13 further transmits the D2 DSS generated based on the synchronization between the UE 13 and the base station 10. That is, if there is network coverage, base station 10 is used as a synchronization reference source for the synchronization reference of all D2D UE synchronization sources, and thus the D2 DSS transmitted by the D2D UE synchronization source is synchronized (or The same can be considered as using a synchronization reference source. "Same" indicates that all D2D UEs use one serving base station as synchronization reference, and "synchronized" indicates that all D2D UEs can use multiple base stations as synchronization reference. Indicates that the plurality of base stations are synchronized.

If there is network coverage, D2 DSS synchronization sources using synchronization reference sources in the serving cell are classified into one group, and these synchronization sources can use the group identification information in the D2 DSS generation process. One specific implementation is as follows: when there is network coverage, when all D2D UEs using a base station (or multiple synchronized base stations) as synchronization reference, transmit D2 DSS Then, use information about the synchronization reference source base station to obtain group identification information. For example, part or all of the information on cell identification information (physical cell identification information, abbreviated as PCI ) of a base station is used to generate group identification information.

に従って生成され、

は基地局のセル識別情報である；
方法2：グループ識別情報は

に従って生成され、

はLTE基地局のPSSに対応する識別情報であり、

の値は0、1、または2とすることができる；
方法3：グループ識別情報は

に従って生成され、

はLTE基地局のSSSに対応する識別情報であり、

の値は少なくとも0から167とすることができ、または167より大きい値を含むことができる。 The cyclic shift (second preset value) of the scrambling sequence used by the D2D UEs in the group may be generated using the following identification information:
Method 1: Group Identification Information

Generated according to

Is the cell identification information of the base station;
Method 2: Group Identification Information

Generated according to

Is identification information corresponding to the PSS of the LTE base station,

The value of can be 0, 1 or 2;
Method 3: Group Identification Information

Generated according to

Is identification information corresponding to the SSS of the LTE base station,

The value of can be at least 0 to 167, or can include a value greater than 167.

  The method for generating the second preset value according to said identification information may be a random mapping from said identification information to a second preset value, ie one unique second advance. The set value can be generated from one of the aforementioned identification information. For example, the second preset value may be equal to one of the aforementioned identification information, or the second preset value may be a linear function mapping of said identification information, This is not limited in the present invention.

  Based on the above embodiments, the synchronization signal can include at least one first synchronization signal and at least one second synchronization signal, and supports all the first synchronization signals and all the second synchronization signals. The first sequence to perform is the same or different; mapping the synchronization signal to the subcarriers to obtain the frequency domain signal, the step of acquiring all the first synchronization signal to obtain the frequency domain signal Mapping to a first position corresponding to every first synchronization signal, and mapping every second synchronization signal to a second position corresponding to every second synchronization signal, The first positions corresponding to all the first synchronization signals and the second positions corresponding to all the second synchronization signals are different symbol positions in one subframe, or all the first positions. And the second position corresponding to all the second synchronization signals may be in different subframes, respectively.

  Furthermore, the synchronization signal may further include at least one third synchronization signal, and the sequence corresponding to the third synchronization signal is the same as the sequence corresponding to the first synchronization signal or the second synchronization signal. Or different. The step of mapping the synchronization signal to the subcarrier to obtain a frequency domain signal may be performed by: acquiring all the third synchronization signal corresponding to all the third synchronization signal in order to acquire the frequency domain signal Mapping each position to a third position corresponding to every third synchronization signal, a first position corresponding to every first synchronization signal, and all second synchronization signals A second position corresponding to all the second synchronization signals, or a first position corresponding to all the first synchronization signals, or a second position corresponding to all the first synchronization signals. And third steps corresponding to all the third synchronization signals may be in different sub-frames, respectively.

  The following description further describes the above embodiments using different application scenarios.

式中、

mod 2は2による除算のモジュロ演算を表す。式（4）において、任意の原始多項式は0および1で表されるシーケンスである。 In practical applications of this embodiment of the invention, if the aforementioned sequence is an m sequence having a length of 31, then the primitive polynomial of said one or more sequences is any one or any of the following polynomials: A combination of:

During the ceremony

mod 2 represents the modulo operation of division by two. In equation (4), arbitrary primitive polynomials are sequences represented by 0 and 1.

式中、

は、m₀の左循環シフトが

に対して実行された後で獲得され、

はm₁の左循環シフトが

に対して実行された後で獲得される。

式中、

は31の長さを有するmシーケンスであり、2つのmシーケンスは同じであってもよく、異なっていてもよく、

であり、

を生成するための原始多項式x_kは式（4）におけるmシーケンスのいずれか1つまたは2つとすることができる。式（4）における任意の原始多項式において、初期値は、x（0）＝0、x（1）＝0、x（2）＝0、x（3）＝0、およびx（4）＝1、として設定することができる。ここでは初期値は非ゼロの値（すなわち、1）を含みさえすればよいことに留意すべきである。例えば、初期値は、x（0）＝1、x（1）＝0、x（2）＝0、x（3）＝0、およびx（4）＝0、として設定することもできる。加えて、0および1で表されるシーケンスを、式

に従って、＋1および−1で表されるシーケンスにマップすることもでき、＋1および−1で表されるシーケンスは、それぞれ、本発明の本実施形態における第1のシーケンスおよび第2のシーケンスである。 Here, SD2 DSS is used as an example to illustrate generation of a synchronization signal, taking an example for explanation. The length of SD2 DSS is 62, and SD2 DSS can be generated according to two m sequences having a length of 31 (ie the first sequence), these two m sequences having a length of 31 are s ₀ and respectively s ₁ is represented, SD2DSS corresponds to two parts d _a and d _B, the relationship between the relationship and d _B and s _0, s ₁ between the d _a and s _0, s ₁ Is assumed to be represented by the following equation:

During the ceremony

Is the left circular shift of m ₀

Earned after being run against

Has a left circular shift of m ₁

Earned after being run against.

During the ceremony

Is an m sequence having a length of 31 and the two m sequences may be the same or different,

And

The primitive polynomial x _k for generating x can be any one or two of the m sequences in equation (4). For any primitive polynomial in equation (4), the initial values are x (0) = 0, x (1) = 0, x (2) = 0, x (3) = 0, and x (4) = 1 , Can be set. It should be noted here that the initial value need only include non-zero values (i.e. 1). For example, the initial values may be set as x (0) = 1, x (1) = 0, x (2) = 0, x (3) = 0, and x (4) = 0. In addition, the sequences represented by 0 and 1 are

It can also be mapped to the sequences represented by +1 and -1 according to and the sequences represented by +1 and -1 are the first sequence and the second sequence in the present embodiment of the invention, respectively.

FIG. 9 is an exemplary view of SD2 DSS in the second embodiment of the synchronization signal transmission method according to the present invention. As shown in FIG. 9, SD2 DSS is a signal including a sequence in at least two positions separated by a small position interval, and the positions of the first sequences s _A and s _B are at the first position and the second position. Interchanged position intervals may be different symbol positions in one subframe (1 ms) or may be intervals of several subframes. Optionally, the transmission period of SD2 DSS is relatively long, generally greater than 100 milliseconds (ms), eg 2.56 seconds (s), which is equivalent to 256 radio frames. In this embodiment of the invention, the SD2 DSS is sent periodically for a relatively long period so as to increase the probability that the receiving end receives the SD2 DSS sent by the synchronization source.

FIG. 9 is merely an illustration of SD2 DSS, and the positions of s _A and s _B after being mapped to frequency domain subcarriers may be arranged contiguously as shown in FIG. 9, or It should further be noted that they may be arranged alternately according to the odd and even subcarriers or may be arranged using another method. Two sequences s _A and s _B having a length of 31 correspond to 62 different positions in total and correspond to two positions corresponding to s _A and s _B , ie, the first SD 2 DSS shown in FIG. It should be ensured that the position and the second SD2 DSS position can be exchanged.

Furthermore, scrambling can be performed on the aforementioned synchronization signal using a scrambling sequence, ie:
d _A (n) = s _A (n) c ₀ (n)
d _B (n) = s _B (n) c ₁ (n) Formula (7)

In the above equation, c ₀ and c ₁ are generated according to an m sequence having a length of 31, and a primitive polynomial corresponding to an m sequence having a length of 31 is any one of the primitive polynomials in equation (4) One or two.

に対してグループ識別情報に関する循環シフトが実行された後で獲得され、スクランブリングシーケンスc₁は、

に対してグループ識別情報に関する循環シフトが実行された後で獲得され、具体的には以下のとおりであることを強調すべきである：

The aforementioned scrambling sequence c ₀ is

The scrambling sequence c ₁ is obtained after a cyclic shift is performed on the group identification information for

It should be emphasized that the circular shift for the group identification information is obtained after it has been performed, in particular as follows:

In Equation (8), N _GID represents group identification information, a specific value of the group identification information is explicitly or implicitly indicated in the group, and the indication method will be described in more detail in the following embodiments. f _k (N _GID ) is a function of N _GID and can be set as Formula (3a) or Formula (3b). For example, in one embodiment, f _k (N _GID ) = N _GID , in another embodiment, f _k (N _GID ) = N _GID mod K, where K is the maximum of synchronization sources in the group. It can represent the number or the maximum number of transfers that can be supported by the synchronization source, and f ₁ (N _GID ) may be the same as or different from f ₂ (N _GID ).

Furthermore, part of the synchronization signal generated according to equation (7) can be re-scrambled, ie:
d _A (n) = s _A (n) c ₀ (n)
d _B (n) = s _B (n) c ₁ (n) z ₁ (n) Formula (9)

として表され、

は式（4）における任意の原始多項式とすることもできる。z₁は

に対してグループ識別情報に関する循環シフトが実行された後で獲得され、これを式（10）として示す。

In equation (9), z ₁ is generated according to an m sequence having a length of 31, and an m sequence having a length of 31 is specifically:

Represented as,

Can also be any primitive polynomial in equation (4). z ₁ is

Are obtained after the circular shift for the group identification information has been performed, which is shown as equation (10).

In equation (10), g (N _GID ) is a function of N _GID and can be equation (3a) or equation (3b). For example, in one embodiment g (N _GID ) = N _GID and in another embodiment f (N _GID ) = N _GID mod K, where K is the number of synchronization sources in the group, or It can represent the maximum number of transfers that the synchronization source can support. The Peak to Average Power Ratio (abbr .: PAPR) of the transmitted synchronization signal can be further reduced by re-scrambling with the scrambling sequence obtained according to equation (10).

In a more specific special case, the synchronization signal of this embodiment of the invention is obtained according to the following formula:

As can be seen from equation (11a), in one application scenario in which a plurality of groups exist, when all of the synchronization sources in each group sends a SD2DSS, the group identification information N _GID to generate SD2DSS Used. When a new UE wants to transmit the SD2 DSS generated by the UE to serve as a synchronization source, that UE first needs to obtain the indicated N _GID information in the group to which the UE belongs, and then Generate SD2 DSS using the same N _GID as used in the group.

  In equation (11b), the SD2 DSS signal determined according to the synchronization signal is generated using two sequences, and a portion of the SD2 DSS signal is generated at even numbered sequence position d (2 n) after generation, and the other portion of the SD2 DSS signal Are arranged at odd-numbered sequence positions d (2n + 1) after generation. Equation (11b) is just one embodiment, and after generation, the two sequences can be mapped to sequence positions in another way to generate SD2 DSS.

を用いてd（2n＋1）に対してスクランブリング処理が実行され、c₁（n）はグループ内の循環シフト（第2の事前設定値）を有し、

は、m₀およびm₁をそれぞれ異なる第2の事前設定値用いて循環シフトすることによってしかるべく生成され、z₁（n）に対して実行される。例えば、第1の位置におけるd（2n）の信号が干渉を受けるときには、m₀を検出することができない（すなわち、m₀の特定の値を獲得することができない）、このシナリオでは、第2の位置におけるd（2n）の信号は干渉を受けず、すなわち、第2の位置におけるd（2n）の信号を用いてm₁を検出することができる。m₁が検出された後で、m₁の値がd（2n＋1）の第1の位置へ代入され、次いでm₀を検出することができ（第2の位置におけるm₀は

として構成されているため、m₀が干渉を受けるわずかな確率が生じる）、それによって、いくつかの循環シフト値がいくつかの干渉シナリオにおいて検出することができない事例が回避される。 In the formula (11b), scrambling processing on the d (2n) using c ₀ (n) of runs, c ₀ (n) has a cyclic shift within the group (second preset value) . Therefore, the cross-correlation value of the normalized c ₀ (n) is -1, thereby achieving quick synchronization between the receiving end and the transmitting end of the synchronization signal. In addition, in order to achieve effective mutual detection between m ₀ and m ₁

Using scrambling process on d (2n + 1) is executed, c ₁ (n) has a cyclic shift within the group (second preset value),

Are appropriately generated by cyclically shifting m ₀ and m ₁ with respectively different second preset values, and are performed on z ₁ (n). For example, when the d (2 n) signal at the first position suffers interference, it can not detect m ₀ (ie it can not obtain a particular value of m ₀ ), in this scenario the second the signal d (2n) in the position of without interference, i.e., can be detected m ₁ using signals d (2n) in the second position. After m ₁ is detected, the value of m ₁ is substituted into the first position of d (2n + 1) and then m ₀ can be detected (m _{0 at} the second position is

Since there is a slight probability that m ₀ suffers from interference), it avoids cases where some cyclic shift values can not be detected in some interference scenarios.

For example, as shown in FIG. 10, in the first group, UE 41 is a synchronous source of the first level, UE 41 generates SD2DSS as N _GID = 0, UE42 and UE43 are participating in the first group , Listens to the SD2 DSS sent by the UE 41 so as to achieve synchronization with the UE 41. Similarly, UE 40 is also another independent first level synchronization source, and before transmitting SD2 DSS, UE 40 first obtains the group identification information of the first group, and then again as N _GID = 0. Generate SD2 DSS. UE 44 is a second level synchronization source, and after receiving the two synchronization signals sent by both UE 41 and UE 40, UE 44 is synchronized with any one or more synchronization sources according to a preset policy (For example, select the one with the highest signal power for synchronization, or select the weighted position of the synchronization position of the two synchronization sources for synchronization). The transmission process of SD2 DSS in the second group on the right side of FIG. 10 is similar to the process in the first group, and the second group comprises only one independent first level synchronization source UE 51, and two There are second level synchronization sources UE 52 and UE 53. The UE 45 located between the two groups can receive synchronization signals from both the first group and the second group. The UE 45 can decide to join a specific group independently according to the behavior of the UE. For example, the UE 45 may determine which group to join according to the UE 45's interest in the content transmitted by the first group and the second group.

  In addition, in the first group, UE 40, UE 41 and UE 44 all transmit SD2 DSS and use group identification information, but SD 40 DSS transmitted by UE 40, UE 41 and UE 44 may be different. In this way, UEs 40 synchronized with UE 40, UE 41 and UE 44 distinguish the received synchronization signals. The signal generation of SD2 DSS can be any one of equation (5), equation (7), or equation (9), and the first sequence corresponding to SD2 DSS can be generated using different cyclic shifts.

  Since the cyclic shift value of the scrambling sequence (i.e., the second preset value) is the same in each group, the cross correlation between the synchronization signals in the group is determined in the first sequence after the cyclic shift is performed. Equal to cross correlation. The first sequence is an m sequence, and the correlation value between the sequences acquired after performing different cyclic shift on the m sequence is -1 and is independent of the length of the sequence. Thus, in one group, the cross-correlation value between SD2 DSSs generated by different synchronization sources according to the method described above is -1.

  That is, in the first group, the cross correlation value of the sequence corresponding to the three SD2 DSSs transmitted by the UE 40, the UE 41, and the UE 44 is -1. Similarly, in the second group, the cross-correlation values of the sequences corresponding to the three SD2 DSSs transmitted by UE 51, UE 52, and UE 53 are also −1. Thus, the present invention can significantly reduce the cross correlation between SD2 DSS in a group and improve synchronization detection performance.

  It should be further noted that the number of synchronization sources in the D2D group is generally limited, and in general there are only a few dozen synchronization sources, or only a few or as few as ten synchronization sources. In addition, in FIG. 10, UE 45 at the edge of the two groups can receive the SD2 DSS transmitted by both UE 44 and UE 52. The two synchronization signals are from two different groups, and the cross-correlation between the two synchronization signals is considered to be relatively low, which is determined by the overlapping area of the two groups in which the UE 45 is located.

  As an important step of the invention, the establishment and identification of D2D synchronization source groups is described below.

を用いて表される。したがって、D2D同期ソースグループ内にあり、同期信号を送信しようとするUEは、別のD2D同期ソースによって送信されたD2DSS内のPD2DSSを検出しさえすればよく、その場合UEはUEがどのグループに最も近いか判定することができる。次いで、SD2DSSを送信するときに、新しいUE（例えば図10のUE40）は、このグループのグループ識別情報に従ってSD2DSSを送信する。この方法は暗黙的指示方法であり、この方法は、ネットワークカバレッジありのシナリオにもネットワークカバレッジなしのシナリオにも適用可能である。 Method 1: PD2 DSS used in one group is the same, and group identification information is distinguished according to PD2 DSS. For example, PD2 DSS uses Primary Synchronization Signal (abbr. PSS) in LTE, and there are a total of three different PD2 DSS signals (as shown in Table 2), and group identification information is in LTE

Is represented using Thus, a UE that is in a D2D sync source group and wants to send a sync signal need only detect PD2 DSS in D2 DSS sent by another D2D sync source, in which case the UE will be in which group It can be determined if it is closest. Then, when transmitting the SD2 DSS, the new UE (for example, the UE 40 in FIG. 10) transmits the SD2 DSS according to the group identification information of this group. This method is an implicit indication method, and this method is applicable to both network coverage and no network coverage scenarios.

  Method 2: When there is network coverage, the base station, eg eNB, uses signaling (DCI or RRC) in the cellular link to the transmitter of the D2D synchronization source, the group identification of the group to which the transmitter of the D2D synchronization source belongs To direct. The second method is an explicit indication method.

  Method 3: When there is no network coverage, information on the group identification information of the group to which the transmitter of the D2D synchronization source belongs is indicated to the transmitter of the D2D synchronization source using the higher function control device or D2D UE. In this case, the more sophisticated control device or D2D UE provides the ability to coordinate synchronization source groups in the distributed network. The third method is an explicit indication method.

  The group identification information of the synchronization source group can be indicated directly or indirectly to the D2D receiver. The indication method can be an indirect indication using D2 DSS identification information, or an indication using a control signal transmitted to the D2D receiving side by the D2D transmitting side.

式中、

mod 2は2による除算のモジュロ演算を表す。式（12）における任意の原始多項式において、初期値は、x（0）＝0、x（1）＝0、x（2）＝0、x（3）＝0、x（4）＝0、およびx（5）＝1、として設定することができる。ここでは初期値は非ゼロの値（すなわち、1）を含みさえすればよいことに留意すべきである。例えば、初期値は、x（0）＝1、x（1）＝0、x（2）＝0、x（3）＝0、x（4）＝0、およびx（5）＝1、として設定することもできる。 In another practical application of this embodiment of the invention, where the aforementioned sequence is an m-sequence having a length of 63, the primitive polynomial of said one or more sequences is any one of the following polynomials: Or any combination:

During the ceremony

mod 2 represents the modulo operation of division by two. In any primitive polynomial in equation (12), the initial values are x (0) = 0, x (1) = 0, x (2) = 0, x (3) = 0, x (4) = 0, And x (5) = 1, can be set. It should be noted here that the initial value need only include non-zero values (i.e. 1). For example, the initial values are: x (0) = 1, x (1) = 0, x (2) = 0, x (3) = 0, x (4) = 0, and x (5) = 1 It can also be set.

In this application scenario, SD2 DSS generation is further used as an illustrative example. It is assumed that SD2 DSS has a length of 63, SD2 DSS can be generated according to an m sequence (ie first sequence) having a length of 63, and SD2 DSS is represented by d, in which case To:

Furthermore, based on equation (13a), a synchronization signal configured independently at another position is added, and the combination of two signals can increase the total number of synchronization source identification information indicated by the entire synchronization signal. :

の生成方法は前述の応用シナリオにおける生成方法と同じであり、2つの応用シナリオの違いは、同期信号の長さおよび同期信号を生成するのに用いられる原始多項式である。この応用シナリオにおける原始多項式は式（12）におけるいずれか1つまたは複数の原始多項式とすることができる。63の長さを有する2つのシーケンスは、それぞれ、第1の位置と第2の位置とにあり、2つのシーケンスは同じであっても異なっていてもよく、2つのシーケンスに対応する循環シフト値（すなわち第1の事前設定値）は独立して構成される。 In formulas (13a) and (13b),

Is the same as in the previous application scenario, the difference between the two application scenarios is the length of the synchronization signal and the primitive polynomial used to generate the synchronization signal. The primitive polynomial in this application scenario can be any one or more primitive polynomials in equation (12). Two sequences having a length of 63 are respectively at the first position and the second position, and the two sequences may be the same or different, and the cyclic shift values corresponding to the two sequences (I.e. the first preset value) are configured independently.

Optionally, the synchronization signal generated according to equation (13a) and equation (13b) is scrambled as shown in equation (14a) and equation (14b):

In equations (14a) and (14b), the method of generating c ₀ and c ₁ is the same as the method of generation in the application scenario described above. Based on equation (13a) and equation (13b), c ₀ and c ₁ are scrambling sequences used to generate SD2 DSS. A cyclic shift is performed on the scrambling sequence according to the group identification information. I will not go into details here.

Furthermore, the synchronization signal generated according to equation (14b) is rescrambled:

An exemplary diagram of the synchronization signal generated according to equation (15) is shown in FIG. The distance between the first position and the second position is a first distance, the distance between the second position and the third position is a second distance, and the sizes of the two distances are the same. Alternatively, this is not a limitation of the present invention. The specific values of the two intervals can be set according to the actual requirements. S ₂ of the equation, it s ₀ or can also be either a s _1, or s can also ₀ or be obtained according to s _1, or s ₀ and s ₁ and may be different. c ₂ may also be either a c ₀ or c _1, or can also be obtained in accordance with c ₀ or c _1, or may be different from c ₀ and c _1. The values of m ₂ and m ₃ are obtained according to m ₀ and m ₁ and m ₂ is not equal to m ₃ . That is, the values of m ₂ and m ₃ can be as follows: m ₂ = m ₀ and m ₃ = m ₁ ; or m ₂ = m ₁ and m ₃ = m ₀ . In the present embodiment, the identification information of the synchronization signal SD2DSS are indicated jointly by m ₀ and m _1, m ₀ and m ₁ may indicate a wider identity range for SD2DSS. In addition, the method for rescrambled equation (14a) or scrambled more times is similar to the method in the above description and will not be described further here.

  In the above, the synchronization signal generation method provided in this embodiment of the present invention is described in detail using two practical applications, but the present invention is not limited to the above two scenarios. The synchronization signal generation method in different scenarios is similar as well and will not be described further here.

  In the above embodiment, the step of acquiring the time domain signal according to the frequency domain signal comprises the steps of acquiring a baseband signal from the frequency domain signal by OFDM or acquiring the baseband signal from the frequency domain signal by SC-FDMA , Can be included.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。 In one embodiment for acquiring a baseband signal, acquiring the baseband signal from the frequency domain signal by OFDM may include acquiring the baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of RBs configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth.

式中、tはベースバンド信号s（t）の時間独立変数を表し、

であり、Δfはサブキャリア間隔であり、a_kは周波数領域データが対応するサブキャリアにマップされた後で獲得される値であり、

であり、式中、

はシステム帯域幅のために構成されたRBの数を表し、

は周波数領域におけるリソースブロックのサイズを表し、

は切り捨て演算を表し、Nはシステム帯域幅のために構成されたサブキャリアの数である。ベースバンド信号を獲得するための本方法は、LTEアップリンクSC-FDMA変調方式に基づく信号送信にも適用することができる。 In another embodiment for acquiring a baseband signal, acquiring the baseband signal from the frequency domain signal by SC-FDMA may include acquiring the baseband signal according to the following equation:

Where t represents a time independent variable of the baseband signal s (t),

Where Δf is the subcarrier spacing and a _k is the value obtained after the frequency domain data is mapped to the corresponding subcarrier,

And in the formula

Represents the number of RBs configured for system bandwidth,

Represents the size of the resource block in the frequency domain,

Represents the truncation operation, and N is the number of subcarriers configured for system bandwidth. The method for acquiring a baseband signal can also be applied to signal transmission based on LTE uplink SC-FDMA modulation scheme.

  Optionally, prior to the step of mapping the synchronization signal to the subcarriers by SC-FDMA to obtain a baseband signal, the method of transmitting synchronization signals comprises: The method may further include the step of performing a Discrete Fourier Transform (abbreviated as DFT), wherein the step of mapping the synchronization signal to subcarriers by SC-FDMA to obtain a baseband signal is specific , Mapping the transformed signal to a subcarrier by SC-FDMA to obtain a baseband signal. Performing DFT processing on the synchronization signal may further reduce the PAPR value of the synchronization signal. In one embodiment where the DFT processing step is not performed, detection on the synchronization signal can be simplified and it can be determined according to specific requirements whether DFT processing should be performed on the synchronization signal.

式中、lは同期信号d（l）の独立変数を表し、Lは同期信号の長さであり、b（n）は同期信号に対してDFTが実行された後で獲得される変換信号を表し、0≦n≦L−1であり、jは虚数単位を表す。 Specifically, DFT is performed on the synchronization signal according to the following equation to obtain the transformed signal:

Where l represents the independent variable of the synchronization signal d (l), L is the length of the synchronization signal, and b (n) is the transformed signal obtained after DFT is performed on the synchronization signal 0 ≦ n ≦ L−1, j represents an imaginary unit.

  FIG. 12 is a schematic flowchart of a fifth embodiment of a synchronization signal transmission method according to the present invention. As shown in FIG. 12, the present embodiment is based on the embodiment shown in FIG. 8, and the synchronization signal transmission method can further include the following.

  S701.1 Generate synchronization signal according to one or more sequences.

  S702. After performing DFT processing on the synchronization signal, a converted signal is acquired.

  This step is an optional step. The synchronization signal generated in S701 can be mapped directly to the subcarriers, ie, S703 is performed.

  S703. The transform signal is mapped to subcarriers to obtain a frequency domain signal.

  S704. The time domain signal is acquired according to the frequency domain signal.

  The time domain signal of this step is the baseband signal in the embodiment shown in FIG.

S705. The time domain signal is transmitted after performing the radio frequency conversion.

The radio frequency conversion here is mainly for performing frequency modulation, transmission filtering, and transmission power amplification at the transmission end of the synchronization signal, and the purpose of the radio frequency conversion is to use an antenna to which the signal corresponds. It is to convert the generated time domain signal into a radio signal to be transmitted on a particular frequency, so as to be transmitted directly.

  For the processing method and the actual effects of each step of this embodiment, reference is made to the previous embodiments, which will not be described further here.

  FIG. 13 is a schematic flowchart of a first embodiment of a synchronization signal receiving method according to the present invention. The present embodiment of the present invention provides a synchronization signal reception method, which is used for synchronization between the transmission end and the reception end of the synchronization signal and can be performed by the synchronization signal reception device. The apparatus can be incorporated into a signal receiving device such as a UE or a base station. As shown in FIG. 13, the synchronization signal reception method includes the following.

  S801. The synchronization signal is received, the synchronization signal is generated by the transmitting end according to the one or more sequences, and the length of one or more of the one or more sequences is determined according to the length of the synchronization signal.

  S802. The synchronization signal is detected to obtain synchronization between the transmission end and the reception end of the synchronization signal.

  Synchronization between the transmitting end and the receiving end can include time synchronization, frequency synchronization, and the like.

  The present embodiment of the present invention is an embodiment of the receiving end corresponding to the above-described embodiment of the transmitting end, and for specific functions and effects, please refer to the description of the embodiment of the transmitting end.

  The receiving end of the synchronization signal first receives the synchronization signal such as SD2 DSS provided by the present invention, and then detects the synchronization signal at the position of the synchronization signal to acquire synchronization parameters such as time parameters and frequency parameters, and synchronizes. Further receive and demodulate control information and data information according to the parameters.

  In the above embodiments, the sequence may include m sequences, ZC sequences, or a combination thereof.

式中、

mod 2は2による除算のモジュロ演算を表す。 In one embodiment, if the sequence is an m sequence having a length of 31, then the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

式中、

mod 2は2による除算のモジュロ演算を表す。 In another embodiment, if the sequence is an m sequence having a length of 63, then the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:

During the ceremony

mod 2 represents the modulo operation of division by two.

  Optionally, the synchronization signal receiving method comprises the steps of: detecting whether the synchronization signal is received according to a preset criterion; and, if the synchronization signal is not detected, separately transmitting the synchronization signal generated by the receiving end as a transmitting end Transmitting to the receiving end of In the present embodiment, the synchronization signal is detected at the receiving end according to the preset criteria, eg when it is detected at a predetermined position whether the strength of the synchronization signal is lower than the preset threshold and the synchronization signal is not detected, The device acting as the receiving end of the device acts as the transmitting end of the synchronization signal to achieve synchronization between the receiving end and the transmitting end, and transmits the synchronization signal to another receiving end according to the method provided by the present invention be able to.

  One skilled in the art can appreciate that all or part of the steps of the method embodiments can be implemented by a program instructing relevant hardware. The program can be stored on a computer readable storage medium. When the program is run, the steps of the method embodiments are performed. The aforementioned storage medium includes any medium capable of storing program code, such as ROM, RAM, magnetic disk, and optical disk.

  Finally, it should be noted that the above-described embodiments are merely for describing the technical solution of the present invention, and not for limiting the present invention. Although the present invention has been described in detail in connection with the above-described embodiments, a person skilled in the art should understand that the above-described embodiments can be made without departing from the scope of the technical solutions of the embodiments of the present invention. It should be understood that further modifications can be made to the technical solutions described in the above, or that replacement equivalent to the technical features of some or all of the technical solutions described in the above embodiments can be made. is there.

10 base stations
11, 12, 13, 14, 15, 21, 22 UE
30 transmitter
31 Synchronization signal generation module
32 baseband signal acquisition module
33 First transmission module
40 transmitter
41 conversion module
50 Receiver
51 receiver module
52 processing modules
60 sender device
61 first processor
62 first transmitter
70 Receiving device
71 Receiver
72 second processor

Claims (17)

A synchronization signal transmission device, wherein the transmission device
A first processor configured to generate a synchronization signal according to one or more sequences, wherein a length of one or more of the one or more sequences is determined according to a length of the synchronization signal A first processor, the first processor being configured to acquire a baseband signal according to the synchronization signal;
A first transmitter configured to transmit the baseband signal acquired by the first processor after performing radio frequency conversion;
Only including,
The sequence comprises a first sequence,
The first processor is
Determining one or more lengths of one or more first sequences according to the length of the synchronization signal;
One or more first preset values corresponding to the one or more first sequences, wherein the first preset values corresponding to each first sequence are independent Determine one or more first preset values;
A transmitting device, in particular configured to perform a cyclic shift of the one or more first sequences according to the one or more first preset values to generate the synchronization signal . The sequence further comprises a second sequence,
The first processor is
Generating a scrambling sequence according to the one or more second sequences;
Further configured to perform a scrambling process on the synchronization signal at least once using the scrambling sequence;
Specifically, acquiring a baseband signal according to the synchronization signal is as follows:
The transmitting device according to claim 1 , wherein the baseband signal is acquired according to the synchronization signal subjected to the scrambling process. The first processor is
Determining one or more lengths of the one or more second sequences according to the length of the synchronization signal;
One or more second preset values corresponding to the one or more second sequences, wherein all the second sequences are one second preset value or different second preset values Determining the one or more second preset values corresponding to the values, wherein the second preset value of the scrambling sequence corresponding to all synchronization sources in the group is the same,
The transmitting device according to claim 2 , further specifically configured to perform a cyclic shift on each second sequence according to the second preset value to generate the scrambling sequence. The transmitting device according to claim 3 , wherein either the first preset value or the second preset value is determined according to group identification information. The group identification information is a function of Primary Device to Device Synchronization Signal (PD2 DSS) indication information, or is conveyed in a first control instruction delivered by the network or a second delivered by the transmitting device 5. The transmitting device according to claim 4 , carried in a control instruction or implicitly indicated by the network. The first processor may, for a different first sequence,
Determining an ID of the synchronization signal according to the first preset value corresponding to all the first sequences, or a primary device to device synchronization signal (PD2 DSS) identification and all the first sequences Determining the ID of the synchronization signal according to the first preset value corresponding to the first or the synchronization signal ID according to any one of the first preset values of all the first sequences. Or, further configured to determine an ID of the synchronization signal according to any one of the PD2 DSS identification information and the first preset value of all the first sequences. Sending device. A synchronization signal receiving device,
A receiver, configured to receive the synchronization signal transmitted by the transmitting device according to claim 1 , wherein the synchronization signal is generated by the transmitting end according to one or more sequences, the one Or a receiver, wherein one or more lengths of the plurality of sequences are determined according to the length of the synchronization signal,
A second processor configured to detect the synchronization signal received by the receiver to obtain synchronization between the transmitting end and the receiving end of the synchronization signal;
Including the receiving device. The receiving device according to claim 7 , wherein the sequence is generated according to an m sequence, a ZC sequence, or a combination thereof. If the sequence is an m sequence having a length of 31, the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:

During the ceremony

The receiving device according to claim 7 , wherein mod 2 represents a modulo operation of division by two. When the sequence is an m sequence having a length of 63, the primitive polynomial for generating the one or more sequences is any one or any combination of the following polynomials:

During the ceremony

The receiving device according to claim 7 , wherein mod 2 represents a modulo operation of division by two. Further comprising a second transmitter;
The second processor is
Detecting whether the receiver receives the synchronization signal according to preset criteria;
8. The method according to claim 7 , further comprising: triggering the second transmitter to transmit the synchronization signal generated by the receiving device to another receiving end if the synchronization signal is not detected. Receiving device. A synchronization signal transmission method, said method comprising
Generating a synchronization signal according to one or more sequences by a transmitter, wherein the length of one or more of the one or more sequences is determined according to the length of the synchronization signal ,
Acquiring a baseband signal according to the synchronization signal by the transmitter;
Sending out the baseband signal after performing radio frequency conversion by the transmitter;
Only including,
The sequence comprises a first sequence,
Generating the synchronization signal according to the one or more sequences by the transmitter;
Determining one or more lengths of one or more first sequences according to the length of the synchronization signal by the transmitter;
Determining, by the transmitter, one or more first preset values corresponding to the one or more first sequences, the first prior corresponding to each first sequence Setting value is independent, step, and
Performing cyclic shift of the one or more first sequences according to the one or more first preset values to generate the synchronization signal by the transmitter. . The sequence further comprises a second sequence,
Generating the synchronization signal according to the one or more sequences by the transmitter;
Generating a scrambling sequence according to the one or more second sequences by the transmitter;
Performing at least one scrambling process on the synchronization signal by the transmitter using the scrambling sequence;
Further include
Specifically, the step of acquiring a baseband signal according to the synchronization signal by the transmitter includes
The method according to claim 12 , wherein the transmitter acquires the baseband signal according to the synchronization signal subjected to the scrambling process. Generating the scrambling sequence according to the one or more second sequences by the transmitter;
Determining one or more lengths of the one or more second sequences according to the length of the synchronization signal by the transmitter;
Determining, by the transmitter, one or more second preset values corresponding to the one or more second sequences, wherein all the second sequences are one second prior. Corresponding to the set value or a different second preset value, and wherein the second preset value of the scrambling sequence for all synchronization sources in the group is the same;
Performing a cyclic shift on each second sequence according to the second preset value to generate the scrambling sequence by the transmitter;
The method of claim 13 comprising: The method according to claim 14 , wherein either the first preset value or the second preset value is determined according to group identification information. The group identification information is a function of Primary Device to Device Synchronization Signal (PD2 DSS) indication information, or is conveyed in a first control instruction delivered by the network or a second delivered by the transmitting device The method according to claim 15 , carried in a control instruction or implicitly indicated by a network. The relationship between the first preset value respectively corresponding to the first sequence and the identification information (ID) of the synchronization signal for different first sequences is:
Determining by the transmitter the ID of the synchronization signal according to the first preset value corresponding to all the first sequences, or by means of the transmitter a primary device to device synchronization signal ( PD2 DSS) determining the ID of the synchronization signal according to the identification information and the first preset value corresponding to all the first sequences, or by the transmitter the first of all the first sequences Determining the ID of the synchronization signal according to any one of the one preset value, or any of the PD2 DSS identification information and the first preset value of all the first sequences by the transmitter. The method according to claim 12 , wherein the ID of the synchronization signal is determined according to one or more.

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