JP6499481B2 - Method for manufacturing group III nitride semiconductor substrate - Google Patents

Description

  The present invention relates to a group III nitride semiconductor substrate and a method for manufacturing a group III nitride semiconductor substrate.

  Patent Document 1 discloses that the surface of a group III nitride semiconductor substrate is planarized by CMP (Chemical Mechanical Polishing).

JP 2013-207108 A

  It is an object of the present invention to planarize the surface of a group III nitride semiconductor substrate by an unprecedented method.

According to the present invention,
A first group III nitride semiconductor layer composed of a group III nitride semiconductor;
A group III nitride semiconductor crystal is epitaxially grown on the first surface of the first group III nitride semiconductor layer, and the exposed growth surface is not subjected to CMP (Chemical Mechanical Polishing) treatment. And the growth surface has a second group III nitride semiconductor layer having higher flatness than the first surface of the first group III nitride semiconductor layer, and
There is provided a group III nitride semiconductor substrate having:

Moreover, according to the present invention,
A preparation step of preparing a first group III nitride semiconductor layer composed of a group III nitride semiconductor;
A group III nitride semiconductor crystal is epitaxially grown on the first surface of the first group III nitride semiconductor layer so that an exposed growth surface is the first surface of the first group III nitride semiconductor layer. A growth step of forming a second group III nitride semiconductor layer having a flatness higher than that of the first surface;
I have a,
In the growth step, the second group III nitride semiconductor layer in which three films having different film compositions are stacked is formed,
The growth rate of the lowermost film is 0.5 μm / hr or more and 2.0 μm / hr or less,
The growth rate of the film immediately above the lowermost layer is 1.5 μm / hr or more and 8.0 μm / hr or less,
A method of manufacturing a group III nitride semiconductor substrate is provided in which the growth rate of the uppermost film is 15.0 μm / hr or more and 40.0 μm / hr or less .

  According to the present invention, a new method for planarizing the surface of a group III nitride semiconductor substrate is realized.

It is a flowchart which shows an example of the flow of a process of the manufacturing method of the group III nitride semiconductor substrate of this embodiment. It is a side surface schematic diagram of an example of the group III nitride semiconductor substrate of this embodiment. It is a side surface schematic diagram of an example of the group III nitride semiconductor substrate of this embodiment. It is a flowchart which shows an example of the flow of a process of the manufacturing method of the group III nitride semiconductor substrate of this embodiment. It is a cross-sectional schematic diagram which shows an example of the instrument used for preparation of the 1st group III nitride semiconductor layer. It is a figure for demonstrating the observation area in an Example. 1 is a diagram illustrating Example 1. FIG. FIG. 6 is a diagram showing Example 2. It is a figure which shows the comparative example 1. FIG. It is a figure which shows the comparative example 2. FIG. It is a figure which shows the surface image of the group III nitride semiconductor layer by which CMP process was made. It is a figure which shows the surface image of the group III nitride semiconductor layer in which CMP processing is not made. It is a figure which shows the cross-sectional image of the growth surface of a 1st group III nitride semiconductor layer, and the growth surface of a 2nd group III nitride semiconductor layer. It is a figure which shows the cross-sectional image of the growth surface of a 1st group III nitride semiconductor layer, and the growth surface of a 2nd group III nitride semiconductor layer.

  Hereinafter, embodiments of a group III nitride semiconductor substrate and a method for manufacturing a group III nitride semiconductor substrate of the present invention will be described with reference to the drawings. The drawings are only schematic diagrams for explaining the configuration of the invention, and the size, shape, number, and ratio of different member sizes are not limited to those shown in the drawings.

  Although details will be described later, the present inventors have epitaxially grown a group III nitride semiconductor crystal on the exposed surface (growth surface) of the group III nitride semiconductor substrate to be planarized under predetermined growth conditions. When a group nitride semiconductor layer (cover layer) is formed, the exposed surface of the group III nitride semiconductor substrate after forming the cover layer (exposed surface of the cover layer) is the group III nitride before forming the cover layer. It was newly found that the flatness is higher (more flat) than the exposed surface of the semiconductor substrate. CMP or the like on the exposed surface of the cover layer is unnecessary.

  As shown in the following examples, general growth different from the predetermined growth conditions (growth conditions of the present embodiment) on the exposed surface (growth surface) of the group III nitride semiconductor substrate to be planarized is shown. When a group III nitride semiconductor layer is formed by epitaxially growing a group III nitride semiconductor crystal under conditions, the exposed surface of the group III nitride semiconductor substrate after the formation of the group III nitride semiconductor layer (group III nitride semiconductor) The exposed surface of the layer) may be deteriorated with almost no change in flatness from the exposed surface of the group III nitride semiconductor substrate before the formation of the group III nitride semiconductor layer. The exposed surface of the group III nitride semiconductor layer formed under the general growth conditions is the exposure of the group III nitride semiconductor layer (cover layer) formed under the predetermined growth conditions (growth conditions of the present embodiment). The flatness is worse than the surface.

  In the present embodiment, a group III nitride semiconductor layer is formed by epitaxially growing a group III nitride semiconductor crystal under predetermined growth conditions on an exposed surface (growth surface) of a group III nitride semiconductor substrate to be planarized. By forming the cover layer), a new planarization method of “flattening the exposed surface (growth surface) of the group III nitride semiconductor substrate” is provided. Details will be described below.

  FIG. 1 is a flowchart showing an example of a processing flow of the method for manufacturing a group III nitride semiconductor substrate of the present embodiment. As shown in FIG. 1, the manufacturing method of the group III nitride semiconductor substrate of this embodiment has preparatory process S10 and growth process S20.

  In the preparation step S10, a first group III nitride semiconductor layer made of a group III nitride semiconductor is prepared. The exposed surface (growth surface) of the first group III nitride semiconductor layer is the target of the planarization process.

  In the preparation step S10, for example, a group III nitride semiconductor substrate including at least a part of the first group III nitride semiconductor layer may be prepared. The group III nitride semiconductor substrate including at least a part of the first group III nitride semiconductor layer may be, for example, a group III nitride semiconductor substrate composed of only the first group III nitride semiconductor layer, A group III nitride semiconductor substrate comprising a first group III nitride semiconductor layer and other layers (including a single layer and a stacked body), wherein the first group III nitride semiconductor layer is exposed on the surface (growth surface) It may be. The thickness of the group III nitride semiconductor substrate including the first group III nitride semiconductor layer is, for example, not less than 100 μm and not more than 1000 μm. The thickness of the first group III nitride semiconductor layer 10 is, for example, not less than 100 μm and not more than 900 μm.

  The growth surface (exposed surface) of the first group III nitride semiconductor layer is a + C plane or a plane inclined at an angle within 59 ° from the + C plane. The growth surface (exposed surface) of the first group III nitride semiconductor layer, which is the target of the planarization treatment, is not flat and has irregularities.

  Hereinafter, in the preparation step S10, a group III nitride semiconductor substrate composed only of the first group III nitride semiconductor layer will be described as being prepared. In addition, when the group III nitride semiconductor substrate which consists of a 1st group III nitride semiconductor layer and another layer is prepared, the same effect can be implement | achieved by the same process.

  Returning to FIG. 1, in the growth step S20, as shown in FIG. 2, a group III nitride semiconductor crystal is grown on the growth surface (first surface) 11 of the first group III nitride semiconductor layer 10 under predetermined conditions. The second group III nitride semiconductor layer 20 is formed by epitaxial growth. The second group III nitride semiconductor layer 20 corresponds to the cover layer described above. Although details are not shown in FIG. 2, the growth surface 21 (exposed surface) of the second group III nitride semiconductor layer 20 is the growth surface 11 (first surface) of the first group III nitride semiconductor layer 10. Flatness). The thickness of the second group III nitride semiconductor layer 20 is, for example, not less than 5 μm and not more than 100 μm.

  As shown in FIG. 3, the second group III nitride semiconductor layer 20 may be composed of three films 22 to 24 having different film compositions. In addition, although not shown, the second group III nitride semiconductor layer 20 may be composed of the film 22 and the film 24, may be composed of the film 23 and the film 24, or may be composed of the film 22 and the film 23. It may be comprised, the film | membrane 22 may be comprised, the film | membrane 23 may be comprised, and another film | membrane may be further added to these. Hereinafter, a manufacturing method of each of the films 22 to 24 will be described.

  The films 22 to 24 are formed by using a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus and supplying a carrier gas to the first group III nitride semiconductor layer 10 (substrate) by a downflow method, under a predetermined growth condition. It is formed by epitaxially growing a nitride semiconductor crystal. The growth conditions for forming the second group III nitride semiconductor layer 20 composed of the films 22 to 24 as shown in FIG. 3 are as follows.

<Growth condition of film 22>
TMGa (constant temperature bath 0 ° C. to 45 ° C.): 200 ccm to 500 ccm, preferably 250 ccm to 350 ccm NH ₃ : 10 slm to ₃₀ slm, preferably 5 slm to 10 slm V / III ratio: 200 to 1600, preferably 350 450 or less Carrier gas: Mixed gas of H ₂ and N ₂ Carrier gas ratio: H ₂ / (H ₂ + N ₂ ) = 0.7 or more and 1.0 or less, preferably 0.8 or more and 0.95 or less : 15 slm to 20 slm Pressure: 400 to 760 torr, preferably 450 to 600 torr Growth temperature: 1180 ° C to 1300 ° C, preferably 1200 ° C to 1300 ° C Growth rate: 0.5 µm / h to 2.0 µm / h Or less, preferably 1.0 μm / H or more and 2.0 μm / h or less Film thickness: 0.1 μm or more and 0.5 μm or less

<Growth Conditions for Film 23>
TMGa (constant temperature bath 0 ° C. to 45 ° C.): 200 ccm to 500 ccm, preferably 250 ccm to 350 ccm NH ₃ : 10 slm to ₃₀ slm, preferably 5 slm to 10 slm V / III ratio: 200 to 1600, preferably 350 450 or less Carrier gas: Mixed gas of H ₂ and N ₂ Carrier gas ratio: H ₂ / (H ₂ + N ₂ ) = 0.7 or more and 1.0 or less, preferably 0.8 or more and 0.95 or less : 15 slm to 20 slm Pressure: 50 to 300 torr, preferably 150 to 250 torr Growth temperature: 1180 to 1300 ° C., preferably 1200 to 1300 ° C. Growth rate: 1.5 μm / h to 8.0 μm / h Or less, preferably 3.0 μm / h to 5.0 μm / h Film thickness: 1.0 μm to 3.0 μm

<Growth Conditions for Film 24>
TMGa (constant temperature bath 0 ° C. to 45 ° C.): 400 ccm to 750 ccm, preferably 400 ccm to 600 ccm NH ₃ : 10 slm to ₃₀ slm, preferably 10 slm to 20 slm V / III ratio: 200 to 1200, preferably 450 550 or less Carrier gas: Mixed gas of H ₂ and N ₂ Carrier gas ratio: H ₂ / (H ₂ + N ₂ ) = 0.7 or more and 1.0 or less, preferably 0.8 or more and 0.95 or less : 15 slm to 20 slm Pressure: 30 to 200 torr, preferably 50 to 150 torr Growth temperature: 1180 ° C to 1300 ° C, preferably 1200 ° C to 1300 ° C Growth rate: 15.0 µm / h to 40.0 µm / h In the following, preferably 30. μm / h or more 40.0μm / h following thickness: 10.0μm more than 15.0μm below

  The second group III nitride semiconductor layer 20 composed of the film 22 and the film 24, the second group III nitride semiconductor layer 20 composed of the film 23 and the film 24, the second group III nitride semiconductor layer 20 composed of the film 22, and the film 23. In the case of forming the second group III nitride semiconductor layer 20 composed of the second group III nitride semiconductor layer 20 composed of the second group III nitride semiconductor layer 20, the film 22, and the film 23, Other than the film thickness under the growth conditions of each film is applied as it is, and the film thickness is adjusted to a desired value by adjusting the growth time. When the second group III nitride semiconductor layer 20 is composed of one film and two films, the thickness of each film is set in order to set the thickness of the second group III nitride semiconductor layer 20 to a desired value. The thickness can be made thicker than that shown in the above growth conditions.

  According to the growth conditions of the film 22, the growth of the group III nitride semiconductor crystal in the lateral direction (a-axis direction and m-axis direction) is slightly promoted. According to the growth conditions of the film 23, the growth of the group III nitride semiconductor crystal in the lateral direction (a-axis direction and m-axis direction) is strongly promoted. That is, the growth condition of the film 23 is more strongly promoted in the lateral direction (a-axis direction and m-axis direction) of the group III nitride semiconductor crystal than the growth condition of the film 22. According to the growth conditions of the film 24, the growth of the group III nitride semiconductor crystal in the vertical direction (c-axis direction) is promoted.

  As shown in the following examples, when the second group III nitride semiconductor layer 20 as shown in FIG. 3 is formed under such growth conditions, the growth surface 21 of the second group III nitride semiconductor layer 20 is The flatness is higher than that of the growth surface 11 of the first group III nitride semiconductor layer 10.

  The inventors of the present invention have found that the conditions in which the lateral growth is promoted in the second group III nitride semiconductor layer 20 (growth temperature: 1180 ° C. or higher and 1300 ° C. or lower, hydrogen carrier flow rate: 10.5 slm or higher 20 .. Or less, the growth surface 21 of the second group III nitride semiconductor layer 20 becomes the growth surface of the first group III nitride semiconductor layer 10. It has been confirmed that the flatness is higher than 11. Although details are not clear, the presence of a film formed by lateral growth causes unevenness on the underlying growth surface (growth surface 11 of the first group III nitride semiconductor layer 10) to be the second group III nitride. It is thought that it will be difficult to appear on the growth surface 21 of the semiconductor layer 20.

  In the case of the present embodiment, after forming at least one of the film 22 and the film 23, the film 24 obtained by growing a group III nitride semiconductor crystal in the vertical direction is formed, thereby suppressing the occurrence of growth pits. An effect is obtained.

  In the case of this embodiment, control of the growth rate is also important. If the growth rate is not properly controlled, there may be inconveniences such as deterioration of crystallinity, generation of growth pits, increase of impurities in the crystal, and inability to flatten with a predetermined film thickness. In the case of the present embodiment, by controlling the growth rates of the film 22, the film 23, and the film 24 as described above, it is possible to realize flattening of a desired surface while suppressing the above-described disadvantages.

  Note that heat treatment may be performed on the first group III nitride semiconductor layer 10 before forming the second group III nitride semiconductor layer 20. The heat treatment conditions can be as follows, for example. By applying such heat treatment, it is possible to obtain a good surface free from deposits such as dust and having no processing damage layer.

NH ₃ : 5 slm or more and 15 slm or less H ₂ : ₃ slm or more and 6 slm or less N ₂ : 8 slm or more and 12 slm or less Pressure: 400 torr or more and 600 torr or less Temperature: 1100 ° C or more and 1300 ° C or less Processing time: 5 minutes or more and 15 minutes or less

According to the manufacturing method of the group III nitride semiconductor substrate of the present embodiment described above, as shown in FIG.
A first group III nitride semiconductor layer 10 composed of a group III nitride semiconductor;
The growth surface 21 formed by epitaxially growing a group III nitride semiconductor crystal on the growth surface (first surface) 11 of the first group III nitride semiconductor layer 10 is exposed to CMP. In addition, the growth surface 21 has a second group III nitride semiconductor layer 20 having higher flatness than the growth surface (first surface) 11 of the first group III nitride semiconductor layer 10;
A group III nitride semiconductor substrate having the following structure is realized.

  The second group III nitride semiconductor layer 20 may be composed of a plurality of films having different film compositions. For example, in the example of FIG. 3, the second group III nitride semiconductor layer 20 is configured by the films 22 to 24.

  Note that “whether or not the growth surface is subjected to CMP treatment” can be confirmed by observing the surface morphology with a differential interference microscope image. FIG. 11 shows a surface image subjected to the CMP process. FIG. 12 shows a surface image not subjected to the CMP process. As shown in the figure, when the CMP process is performed, a very flat surface without waviness, pits, and hillocks is obtained. On the other hand, when the CMP process is not performed, for example, a surface in which polygons with the m-plane as a side surface can be confirmed. It is possible to confirm whether or not the growth surface is subjected to the CMP process based on the difference in characteristics.

  Next, “the flatness of the growth surface of the second group III nitride semiconductor layer 20 is higher than that of the growth surface 11 of the first group III nitride semiconductor layer 10”, as shown in FIG. This can be confirmed by observing the cross section of the laminate including the first group III nitride semiconductor layer 10 and the second group III nitride semiconductor layer 20. The example shown in FIG. 13 is an image obtained by observing cross sections of the growth surface 11 of the first group III nitride semiconductor layer 10 and the growth surface 21 of the second group III nitride semiconductor layer 20 using a fluorescence microscope or the like. . In the case of the figure, in the growth surface 11 (growth interface) and the growth surface 21 (growth outermost surface), the growth surface 21 (growth outermost surface) clearly has less swell and roughness, that is, higher flatness. I can confirm.

  In addition, “the flatness of the growth surface of the second group III nitride semiconductor layer 20 is higher than the growth surface 11 of the first group III nitride semiconductor layer 10” means that the value of the arithmetic average roughness Ra is small or large. You can confirm with. A smaller Ra value means higher flatness. For example, as shown in FIG. 14, a reference length L is determined from the roughness curve in the direction of the average line, the X axis is taken in the direction of the average line of the extracted portion, the Y axis is taken in the vertical direction, and the roughness is taken. When the curve is represented by Y = f (X), the value of Ra is obtained by the following equation (1). In the example of FIG. 14, Ra of the growth surface 21 (growth outermost surface) is 0.87 nm, and Ra of the growth surface 11 (growth interface) is 16.22 nm.

  As described above, according to the present embodiment, a new method for flattening the surface of the group III nitride semiconductor substrate is realized.

  Note that the flatness obtained in this embodiment is inferior to the flatness after the flattening process by CMP (including mirror polishing). However, in the case of the present embodiment, it is possible to significantly shorten the work time of the flattening process as compared with the flattening process by CMP (including mirror polishing). For this reason, the present embodiment does not require flatness as high as flattening processing by CMP (including mirror polishing), but is considered optimal when it is desired to shorten the working time.

<Modification 1>
FIG. 4 is a flowchart showing another example of the processing flow of the method for manufacturing a group III nitride semiconductor substrate of the present embodiment. As shown in FIG. 4, the method for manufacturing a group III nitride semiconductor substrate of this embodiment includes a preparation step S10, a pretreatment step S15, and a growth step S20. The preparation step S10 and the growth step S20 are as described above.

  In the pretreatment step S <b> 15, a simple planarization process is performed on the growth surface 11 of the first group III nitride semiconductor layer 10. For example, when the unevenness of the growth surface 11 of the first group III nitride semiconductor layer 10 is severe, the pretreatment step S15 may be performed before the growth step S20.

  In the pretreatment step S15, for example, etching of the growth surface 11 using a mixed solution of phosphoric acid and sulfuric acid, simple planarization treatment (not including mirror polishing) by CMP, or the like is performed.

  According to the modified example, the growth step S20 can be performed after performing a simple planarization process. Therefore, even if the growth surface 11 of the first group III nitride semiconductor layer 10 is uneven. A desired flat state can be obtained relatively easily.

  In the case of the modification, it is not necessary to perform mirror polishing. For this reason, in the case of this modification example, a simple flattening process (pre-process step S15) and a flattening process (growth step S20) are included, but the working time is reduced compared to the flattening process including mirror polishing. Can be shortened. That is, the same effect as the above-described embodiment can be realized.

<Modification 2>
The second group III nitride semiconductor layer 20 of the present embodiment can contain carbon or silicon as an impurity. When the second group III nitride semiconductor layer 20 is composed of a plurality of films, at least one of them may contain carbon or silicon as an impurity. By containing carbon, a high resistance layer can be obtained. On the other hand, by including silicon, a low resistance layer can be obtained. The method of doping carbon or silicon can be based on the prior art.

  According to this modification, a function of high resistance or low resistance can be further imparted to the cover layer (second group III nitride semiconductor layer 20) that realizes planarization. That is, the second group III nitride semiconductor layer 20 can have a function of high resistance or low resistance in addition to the function of planarizing the growth surface 11 of the first group III nitride semiconductor layer 10.

<Example 1>
“Preparation of Substrate Consisting of First Group III Nitride Semiconductor Layer 10”
A 3-inch φ sapphire (Al ₂ O ₃ ) substrate having a thickness of 550 μm was prepared as a base substrate. A carbon layer (first layer) in which titanium carbide was dispersed was formed on the sapphire substrate under the following conditions.

Deposition method: Reactive sputtering Deposition temperature: 800 ° C
Deposition time: 24 seconds Pressure: 0.4 Pa
Applied power: 150W
Sputtering gas: Ar gas Sputtering gas flow rate: 14.3 scc
Reactive gas: Hydrocarbon (CH ₄ )
Reactive gas flow rate: 10.0sccm
Target: Ti
Film thickness: 0.3nm

  Thereafter, a titanium carbide layer (second layer) was formed on the first layer under the following conditions.

Deposition method: Reactive sputtering Deposition temperature: 800 ° C
Deposition time: 30 minutes Pressure: 0.4 Pa
Applied power: 300W
Sputtering gas: Ar gas Sputtering gas flow rate: 27.0 sccm
Reactive gas: CH ₄
Reactive gas flow rate: 10.0sccm
Target: Ti
Film thickness: 100nm

  Thereafter, the second layer was nitrided under the following conditions.

Nitriding temperature: 925 ° C
Nitriding time: 30 minutes Nitriding gas: NH ₃ gas, H ₂ gas

  Thereafter, a GaN layer was formed on the nitrided second layer under the following conditions to obtain a laminate.

Film formation method: HVPE (hydride vapor phase epitaxy) film formation temperature: 1040 ° C.
Deposition time: 150 minutes Film thickness: 400 μm

  Next, heat treatment was performed. Here, heat treatment was performed using the container 6 shown in FIG. First, the outer peripheral edge of the laminate B was fitted into the groove of the holding portion 631 of the jig 63, and the 20 laminates B were held by the jig 63.

  Thereafter, a jig 63 for holding the laminate B was inserted into the container main body 61. Next, the container body 61 was filled with Ga liquid, and all the laminates B were immersed in the Ga liquid. The layered product B was completely immersed in the Ga liquid, and was not exposed from the Ga liquid. Next, the opening of the container main body 61 was closed with a lid 62. Then, the container 6 was arrange | positioned in an HVPE apparatus and the container 6 was heated in nitrogen gas atmosphere. The heat treatment conditions are as follows.

Temperature: 1200 ° C
Atmosphere: N ₂ gas treatment time: 8 hours

  After the heat treatment, the laminate B was cooled to room temperature and observed. The GaN layer and the sapphire substrate were separated. The isolation | separation location had arisen in the 1st layer and 2nd layer part located between a GaN layer and a sapphire substrate.

  Thereafter, the GaN layer was subjected to etching using a mixed solution of phosphoric acid and sulfuric acid (2 hours) and simple planarization treatment (not including mirror polishing) by CMP in this order. In CMP, a simple flattening process of the N-polar surface (back surface) and removal of scratches on the Ga-polar surface (front surface) were performed. The CMP working time was about 70 hours.

  In this example, the GaN layer thus obtained was used as the substrate made of the first group III nitride semiconductor layer 10.

“Formation of Second Group III Nitride Semiconductor Layer 20”
A film as shown in FIG. 3 is formed on the growth surface of the first group III nitride semiconductor layer 10 while supplying a carrier gas to the first group III nitride semiconductor layer 10 by a downflow method using an MOCVD apparatus. A second group III nitride semiconductor layer 20 composed of 22 to 24 was formed. Note that the first group III nitride semiconductor layer 10 was heat-treated before the second group III nitride semiconductor layer 20 was formed. The growth conditions of the heat treatment and each of the films 22 to 24 are as follows.

<Heat treatment>
NH ₃ : 10 slm
H ₂ : 4.5 slm
N ₂ : 10.5 slm 3
Pressure: 500 torr
Temperature: 1200 ° C

<Growth condition of film 22>
TMGa (constant temperature 2 ° C.): 300 ccm
NH ₃ : 8 slm
V / III ratio: 400
Carrier gas: H ₂ and N ₂ mixed gas H ₂ : 13.5 slm
N ₂ : 1.5 slm
Pressure: 500 torr
Growth temperature: 1250 ° C
Growth rate: 1.5 μm / h
Film thickness: 0.3 μm

<Growth Conditions for Film 23>
TMGa (constant temperature 2 ° C.): 300 ccm
NH ₃ : 8 slm
V / III ratio: 400
Carrier gas: H ₂ and N ₂ mixed gas H ₂ : 13.5 slm
N ₂ : 1.5 slm
Pressure: 200 torr
Growth temperature: 1250 ° C
Growth rate: 4.0 μm / h
Film thickness: 2.0μm

<Growth Conditions for Film 24>
TMGa (constant temperature bath 2 ° C.): 500 ccm
NH ₃ : 16 slm
V / III ratio: 500
Carrier gas: H ₂ and N ₂ mixed gas H ₂ : 13.5 slm
N ₂ : 1.5 slm
Pressure: 100 torr
Growth temperature: 1180 ° C
Growth rate: 20.0 μm / h
Film thickness: 15.0μm

"Observation"
As shown in FIG. 6, the center of the substrate was the origin (0, 0), and the X axis and Y axis were arbitrarily set. And (0,0), (10,0), (20,0), (-10,0), (-20,0), (0,10), (0,20), (0,- Nine observation areas of 1500 μm × 1500 μm in length and width centering on each of 10 points (10) and (0, −20) were set. Note that (M, N) indicates a position moved by M mm in the X-axis direction from the center and further moved by N mm in the Y-axis direction.

  FIG. 7 shows a planar differential interference microscope image of each observation area in the second group III nitride semiconductor layer 20 and the first group III nitride semiconductor before the second group III nitride semiconductor layer 20 is formed. The plane differential interference microscope image (in the figure, before epi growth) of each observation area in the layer 10 is shown. From the planar differential interference microscope image, it can be seen that the growth surface of the second group III nitride semiconductor layer 20 has higher flatness than the growth surface of the first nitride semiconductor layer.

  Moreover, Sa (micrometer) was computed for every observation area, and the average was computed. The average value of the second group III nitride semiconductor layer 20 was 0.174 μm, whereas the average value of the first group III nitride semiconductor layer 10 was 5.113 μm. This result also shows that the growth surface of the second group III nitride semiconductor layer 20 has higher flatness than the growth surface of the first nitride semiconductor layer.

<Example 2>
“Preparation of Substrate Consisting of First Group III Nitride Semiconductor Layer 10”
Same as Example 1.

“Formation of Second Group III Nitride Semiconductor Layer 20”
The same procedure as in Example 1 was performed except that a substrate having a different average Sa value of the first group III nitride semiconductor layer 10 was used.

"Observation"
FIG. 8 shows a planar differential interference microscope image of each observation area in the second group III nitride semiconductor layer 20 and the first group III nitride semiconductor before forming the second group III nitride semiconductor layer 20. The plane differential interference microscope image (in the figure, before epi growth) of each observation area in the layer 10 is shown. From the planar differential interference microscope image, it can be seen that the growth surface of the second group III nitride semiconductor layer 20 has higher flatness than the growth surface of the first nitride semiconductor layer.

  Moreover, Sa (micrometer) was computed for every observation area, and the average was computed. The average value of the second group III nitride semiconductor layer 20 was 0.132 μm, whereas the average value of the first group III nitride semiconductor layer 10 was 3.7561 μm. This result also shows that the growth surface of the second group III nitride semiconductor layer 20 has higher flatness than the growth surface of the first nitride semiconductor layer.

<Comparative Example 1>
“Preparation of Substrate Consisting of First Group III Nitride Semiconductor Layer 10”

  Same as Example 1.

“Formation of Layer Corresponding to Second Group III Nitride Semiconductor Layer 20”
A first film and a second film are formed on the growth surface of the first group III nitride semiconductor layer 10 while supplying a carrier gas to the first group III nitride semiconductor layer 10 by a downflow method using an MOCVD apparatus. Formed a laminated body laminated in this order. Note that the first group III nitride semiconductor layer 10 was subjected to heat treatment before the stacked body including the first film and the second film was formed. The heat treatment and the growth conditions of the laminate are as follows.

<Heat treatment>
NH ₃ : 15 slm
H ₂ : 10.5 slm
N ₂ : 4.5 slm
Pressure: 500 torr
Temperature: 1050 ° C
<Growth conditions for first film>
TMGa (constant temperature 2 ° C.): 250 ccm
NH ₃ : 15 slm
V / III ratio: 1000
Carrier gas: H ₂ and N ₂ mixed gas H ₂ : 10.5 slm
N ₂ : 4.5 slm
Pressure: 500 torr
Growth temperature: 1100 ° C
Growth rate: 1.5 μm / h
Film thickness: 0.5μm

<Growth conditions for second film>
TMGa (constant temperature 2 ° C.): 300 ccm
NH ₃ : 15 slm
V / III ratio: 1000
Carrier gas: H ₂ and N ₂ mixed gas H ₂ : 10.5 slm
N ₂ : 4.5 slm
Pressure: 200 torr
Growth temperature: 1150 ° C
Growth rate: 5.0 μm / h
Film thickness: 15.0μm

"Observation"
FIG. 9 shows a planar differential interference microscope image of each observation area in the second film, and each observation area in the first group III nitride semiconductor layer 10 before forming a stacked body composed of the first film and the second film. The plane differential interference microscope image (in the figure before epi growth) is shown. From the plane differential interference microscope image, the flatness of the first group III nitride semiconductor layer 10 before the formation of the stacked body including the first film and the second film is higher than the growth surface of the second film. I understand.

  Moreover, Sa (micrometer) was computed for every observation area, and the average was computed. The average value of the second film was 1.407 μm, whereas the average value of the first group III nitride semiconductor layer 10 was 3.226 μm. Also from this result, it is understood that the first group III nitride semiconductor layer 10 before the formation of the stacked body including the first film and the second film has higher flatness than the growth surface of the second film. .

<Comparative example 2>
“Preparation of Substrate Consisting of First Group III Nitride Semiconductor Layer 10”
Same as Example 1.

“Formation of Layer Corresponding to Second Group III Nitride Semiconductor Layer 20”
Comparative Example 1 was the same as that of Example 1 except that a substrate having a different average Sa value of the first group III nitride semiconductor layer 10 was used.

"Observation"
FIG. 10 shows a planar differential interference microscope image of each observation area in the second film, and each observation area in the first group III nitride semiconductor layer 10 before forming a stacked body composed of the first film and the second film. The plane differential interference microscope image (in the figure before epi growth) is shown. From the plane differential interference microscope image, the flatness of the first group III nitride semiconductor layer 10 before the formation of the stacked body including the first film and the second film is higher than the growth surface of the second film. I understand.

  Moreover, Sa (micrometer) was computed for every observation area, and the average was computed. The average value of the second film was 1.099 μm, whereas the average value of the first group III nitride semiconductor layer 10 was 4.007 μm. Also from this result, it is understood that the first group III nitride semiconductor layer 10 before the formation of the stacked body including the first film and the second film has higher flatness than the growth surface of the second film. .

Hereinafter, examples of the reference form will be added.
1. A first group III nitride semiconductor layer composed of a group III nitride semiconductor;
A group III nitride semiconductor crystal is epitaxially grown on the first surface of the first group III nitride semiconductor layer, and the exposed growth surface is not subjected to CMP (Chemical Mechanical Polishing) treatment. And the growth surface has a second group III nitride semiconductor layer having higher flatness than the first surface of the first group III nitride semiconductor layer, and
A group III nitride semiconductor substrate having:
2. In the group III nitride semiconductor substrate according to 1,
The second group III nitride semiconductor layer is a group III nitride semiconductor substrate containing carbon as an impurity.
3. In the group III nitride semiconductor substrate according to 1,
The second group III nitride semiconductor layer is a group III nitride semiconductor substrate containing silicon as an impurity.
4). In the group III nitride semiconductor substrate according to any one of 1 to 3,
The second group III nitride semiconductor layer is a group III nitride semiconductor substrate comprising a plurality of films having different film compositions.
5. A preparation step of preparing a first group III nitride semiconductor layer composed of a group III nitride semiconductor;
A group III nitride semiconductor crystal is epitaxially grown on the first surface of the first group III nitride semiconductor layer under a predetermined condition so that an exposed growth surface is the first group III nitride semiconductor. A growth step of forming a second group III nitride semiconductor layer having higher flatness than the first surface of the layer;
A method for producing a group III nitride semiconductor substrate having:
6). In the method for producing a group III nitride semiconductor substrate according to 5,
In the growth step, a Group III nitride semiconductor substrate is produced by epitaxial growth of a Group III nitride semiconductor crystal using a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus under a growth condition of a growth temperature of 1180 ° C. to 1300 ° C. .
7). In the method for producing a group III nitride semiconductor substrate according to 5 or 6,
In the growth step, a Group III nitride semiconductor substrate is produced by epitaxially growing a Group III nitride semiconductor crystal using a MOCVD apparatus under a growth condition in which a hydrogen carrier flow rate is set to 10.5 slm or more and 20.0 slm or less.
8). In the method for producing a group III nitride semiconductor substrate according to any one of 5 to 7,
In the growth step, the second group III nitride semiconductor layer in which three films having different film compositions are stacked is formed,
The growth rate of the lowermost film is 0.5 μm / hr or more and 2.0 μm or less,
The growth rate of the film immediately above the lowermost layer is 1.5 μm / hr or more and 8.0 μm or less,
The method for producing a group III nitride semiconductor substrate, wherein the growth rate of the uppermost film is 15.0 μm / hr or more and 40.0 μm.

6 Container 10 First Group III Nitride Semiconductor Layer 11 Growth Surface 20 Second Group III Nitride Semiconductor Layer 21 Growth Surface 22 Film 23 Film 24 Film 61 Container Body 62 Lid 63 Jig 631 Holding Part 632 Fixing Part B Stacking body

Claims (4)

A preparation step of preparing a first group III nitride semiconductor layer composed of a group III nitride semiconductor;
A group III nitride semiconductor crystal is epitaxially grown on the first surface of the first group III nitride semiconductor layer so that an exposed growth surface is the first surface of the first group III nitride semiconductor layer. A growth step of forming a second group III nitride semiconductor layer having a flatness higher than that of the first surface;
I have a,
In the growth step, the second group III nitride semiconductor layer in which three films having different film compositions are stacked is formed,
The growth rate of the lowermost film is 0.5 μm / hr or more and 2.0 μm / hr or less,
The growth rate of the film immediately above the lowermost layer is 1.5 μm / hr or more and 8.0 μm / hr or less,
The method for producing a group III nitride semiconductor substrate, wherein the growth rate of the uppermost film is 15.0 μm / hr or more and 40.0 μm / hr or less . A preparation step of preparing a first group III nitride semiconductor layer composed of a group III nitride semiconductor;
A group III nitride semiconductor crystal is epitaxially grown on the first surface of the first group III nitride semiconductor layer so that an exposed growth surface is the first surface of the first group III nitride semiconductor layer. A growth step of forming a second group III nitride semiconductor layer having a flatness higher than that of the first surface;
I have a,
In the growth step, the second group III nitride semiconductor layer in which two films having different film compositions are stacked is formed,
The growth rate of the lower layer film is 0.5 μm / hr or more and 2.0 μm / hr or less, or 1.5 μm / hr or more and 8.0 μm / hr or less,
The method for producing a group III nitride semiconductor substrate, wherein the growth rate of the upper layer film is 15.0 μm / hr or more and 40.0 μm / hr or less . In the manufacturing method of the group III nitride semiconductor substrate according to claim 1 or 2 ,
In the growth step, a Group III nitride semiconductor substrate is produced by epitaxial growth of a Group III nitride semiconductor crystal using a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus under a growth condition of a growth temperature of 1180 ° C. to 1300 ° C. . In the manufacturing method of the group III nitride semiconductor substrate of any one of Claim 1 to 3 ,
In the growth step, a Group III nitride semiconductor substrate is produced by epitaxially growing a Group III nitride semiconductor crystal using a MOCVD apparatus under a growth condition in which a hydrogen carrier flow rate is set to 10.5 slm or more and 20.0 slm or less.