JP6456750B2 - Image processing device - Google Patents

Description

  The present invention relates to an image processing apparatus capable of changing a display magnification of a target image.

  An image processing apparatus having a digital zoom function is known. For example, Patent Document 1 describes a specific configuration of this type of image processing apparatus.

  The image processing apparatus described in Patent Document 1 is provided in an endoscope apparatus that images a patient's body cavity, and an image captured by an electronic scope can be enlarged or reduced by a digital zoom function. .

JP 2011-172649 A

  FIG. 3 is a flowchart of digital zoom processing (processing in the case of enlargement zoom) executed by the control unit in the conventional image processing apparatus exemplified in Patent Document 1. In the example of FIG. 3, the current display magnification is defined as m, and the target display magnification is defined as n.

  When the target display magnification n is designated by a user operation or the like, the control unit sets the display magnification to m = 1 as shown in FIG. 3 (S1), and starts trimming size and trimming of the target image. The position is calculated (S2, S3), the calculated size and start position are set in the subsequent processing circuit, and execution of zoom processing is instructed (S4). As a result, the target image is trimmed in the subsequent processing circuit, the trimmed target image is scaled, and the scaled target image is displayed on the display screen of the monitor. Next, the control unit sets the display magnification to m = m + 0.02 (S5), determines whether the display magnification m has reached n (S6), and if the display magnification m has not reached n. (S6: NO), wait for a predetermined time (for example, 20 ms) (S7), and return to processing step S2. The control unit executes a loop of processing steps S2 to S7 until the display magnification m reaches n (S6: YES). Each time processing steps S2 to S7 are executed, the target image is enlarged or reduced so as to approach the target display magnification n and displayed on the display screen of the monitor.

  In this way, when the digital zoom processing is to visualize the display of the target image at the intermediate magnification until the target display magnification n reaches the target display magnification n, the control unit sends a zoom processing command to the subsequent processing circuit for each magnification. Must be issued at each stage. In addition, in order to make the zoom display of the target image appear smoothly to the user, it is necessary to synchronize the issuance of the zoom processing command by the control unit with the minimum rate of the video signal (refresh rate such as one field or one frame). . However, since it is difficult to control the timing of issuing a zoom processing command by the control unit, for example, the target image is displayed at the same magnification in succession for several frames (fields), or the magnification at the middle stage that should be displayed is lost. The problem of doing is pointed out. In addition, it is pointed out that the control unit is not able to accept other processes substantially because it is necessary to issue a zoom process command a plurality of times in a short cycle during execution of the digital zoom process.

  The present invention has been made in view of the above circumstances, and an object thereof is to provide an image processing apparatus suitably configured to execute digital zoom processing.

  An image processing apparatus according to an embodiment of the present invention includes a calculation unit that calculates data relating to a display magnification from a reference first display magnification to a target second display magnification in predetermined magnification value increments. A holding means for holding data relating to each display magnification from the first display magnification to the second display magnification, and data relating to the display magnification held in the holding means, calculated at predetermined magnification value increments; An output unit that sequentially outputs at a predetermined time interval from one corresponding to a magnification value close to the first display magnification, and a target image based on the output data relating to the display magnification each time data relating to the display magnification is outputted. Scaling processing means for performing trimming and scaling.

  In one embodiment of the present invention, the predetermined time interval is, for example, a time interval according to the refresh rate for displaying the target image.

  In one embodiment of the present invention, when the output unit detects a vertical synchronization signal for updating the display of the target image, the output unit selects the first of the data relating to the display magnification held in the holding unit at that time. A configuration corresponding to the magnification value closest to the display magnification may be output.

  In one embodiment of the present invention, the data relating to the display magnification specifies, for example, the size and start position of the target image trimming to the scaling processing means.

  In one embodiment of the present invention, the holding means is illustratively a FIFO register.

  According to an embodiment of the present invention, an image processing apparatus suitably configured to execute digital zoom processing is provided.

It is a block diagram which shows the structure of the electronic endoscope system which concerns on one Embodiment of this invention. It is a figure which shows the flowchart of the digital zoom setting value calculation process performed in the processor with which the electronic endoscope system which concerns on one Embodiment of this invention is equipped. It is a figure which shows the flowchart of the digital zoom process performed in the conventional image processing apparatus.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following, an electronic endoscope system will be described as an example of an embodiment of the present invention.

[Configuration of Electronic Endoscope System 1]
FIG. 1 is a block diagram showing a configuration of an electronic endoscope system 1 according to an embodiment of the present invention. As shown in FIG. 1, the electronic endoscope system 1 includes an electronic scope 100, a processor 200, and a monitor 300.

  The processor 200 includes a system controller 202 and a timing controller 204. The system controller 202 executes various programs stored in the memory 212 and controls the entire electronic endoscope system 1 in an integrated manner. The system controller 202 is connected to the operation panel 214. The system controller 202 changes each operation of the electronic endoscope system 1 and parameters for each operation in accordance with an instruction from the operator input from the operation panel 214. The timing controller 204 outputs a clock pulse for adjusting the operation timing of each unit to each circuit in the electronic endoscope system 1.

  The lamp 208 emits the irradiation light L after being started by the lamp power igniter 206. The lamp 208 is, for example, a high-intensity lamp such as a xenon lamp, a halogen lamp, a mercury lamp, or a metal halide lamp, or an LED (Light Emitting Diode). The irradiation light L is light having a spectrum that spreads mainly from the visible light region to the invisible infrared light region (or white light including at least the visible light region).

  The irradiation light L emitted from the lamp 208 is condensed on the incident end face of an LCB (Light Carrying Bundle) 102 by the condenser lens 210 and is incident on the LCB 102.

  Irradiation light L incident on the LCB 102 propagates through the LCB 102, exits from the exit end face of the LCB 102 disposed at the tip of the electronic scope 100, and irradiates the subject via the light distribution lens 104. The return light from the subject irradiated with the irradiation light L forms an optical image on the light receiving surface of the solid-state image sensor 108 via the objective lens 106.

  The solid-state image sensor 108 is a single-plate color CCD (Charge Coupled Device) image sensor having a complementary color checkered pixel arrangement. The solid-state image sensor 108 accumulates an optical image formed by each pixel on the light receiving surface as a charge corresponding to the amount of light, and generates image signals of yellow Ye, cyan Cy, green G, and magenta Mg. The image signals of two pixels adjacent in the vertical direction are added, mixed, and output. The solid-state imaging element 108 is not limited to a CCD image sensor, and may be replaced with a CMOS (Complementary Metal Oxide Semiconductor) image sensor or other types of imaging devices. The solid-state image sensor 108 may also be one equipped with a primary color filter (Bayer array filter).

  A driver signal processing circuit 110 is provided in the connection portion of the electronic scope 100. An image signal is input to the driver signal processing circuit 110 from the solid-state imaging device 108 in a frame cycle. In the following description, “frame” may be replaced with “field”. In the present embodiment, the frame period and the field period are 1/30 seconds and 1/60 seconds, respectively. The driver signal processing circuit 110 performs predetermined processing on the image signal input from the solid-state image sensor 108 and outputs the processed image signal to the previous signal processing circuit 220 of the processor 200.

  The driver signal processing circuit 110 also accesses the memory 112 and reads the unique information of the electronic scope 100. The unique information of the electronic scope 100 recorded in the memory 112 includes, for example, the number and sensitivity of the solid-state image sensor 108, the operable frame rate, the model number, and the like. The driver signal processing circuit 110 outputs the unique information read from the memory 112 to the system controller 202.

  The system controller 202 performs various calculations based on the unique information of the electronic scope 100 and generates a control signal. The system controller 202 controls the operation and timing of various circuits in the processor 200 using the generated control signal so that processing suitable for the electronic scope connected to the processor 200 is performed.

  The timing controller 204 supplies clock pulses to the driver signal processing circuit 110 according to timing control by the system controller 202. The driver signal processing circuit 110 drives and controls the solid-state imaging device 108 at a timing synchronized with the frame rate of the video processed on the processor 200 side, according to the clock pulse supplied from the timing controller 204.

  The pre-stage signal processing circuit 220 performs predetermined signal processing such as color interpolation, matrix calculation, and Y / C separation on the image signal input from the driver signal processing circuit 110 in one frame period, and the post-stage signal processing circuit 230. Output to.

  The post-stage signal processing circuit 230 includes a first in first out (FIFO) register 232, a trimming circuit 234, a scaler circuit 236, and an output circuit 238. The FIFO register 232, the trimming circuit 234, and the scaler circuit 236 constitute a digital zoom processing circuit. In the present embodiment, the digital zoom process is a process of trimming a part of the target image with reference to the center coordinates of the target image and electronically enlarging or reducing the trimmed target image.

  The image signal input from the pre-stage signal processing circuit 220 is subjected to digital zoom processing as necessary and input to the output circuit 238. The image signal input to the output circuit 238 is converted into a predetermined video format signal for monitor display and output to the monitor 300. As a result, a color image of the subject is displayed on the display screen of the monitor 300.

[Digital zoom setting value calculation processing]
FIG. 2 shows a flowchart of digital zoom setting value calculation processing executed by the system controller 202 in the embodiment of the present invention. The operation panel 214 is provided with a plurality of magnification value designation buttons for designating specified magnification values such as 1.2 times, 1.5 times, and 2.0 times. The digital zoom setting value calculation process in FIG. 2 starts when any one magnification value designation button is pressed. In this embodiment, the reference display magnification value (display magnification value immediately before the magnification value designation button is pressed) is defined as L, and the current display magnification value of the target image is defined as M, which is the target. The display magnification value is defined as N. The target display magnification value N is the same as the display magnification value designated by the magnification value designation button.

[S11 in FIG. 2 (setting of display magnification value M)]
In this processing step S11, the reference display magnification value L is acquired and set as the current display magnification value M of the target image. If the target image is already displayed with the digital zoom, the display magnification value M is set to 1. If the target image is not displayed with the digital zoom, the display magnification value M is set to 1.

[S12 in FIG. 2 (Calculation of Trimming Size)]
In this processing step S12, the vertical and horizontal sizes of the target image before trimming are defined as a and b, respectively, and the vertical and horizontal sizes of the target image after trimming are defined as a ′ and b ′, respectively. In addition, the size of the target image after trimming is calculated by the following equation (1).
Formula (1)
(A ′, b ′) = (a / M, b / M)

[S13 in FIG. 2 (Calculation of Trimming Start Position)]
In this processing step S13, the trimming start position (A, B) of the target image after trimming is calculated by the following equation (2).
Formula (2)
(A, B) = ((aa ′) / 2, (bb ′) / 2)

[S14 in FIG. 2 (trimming setting value is output to FIFO register 232)]
In this processing step S14, the trimming setting values, that is, the trimming size (a ′, b ′) calculated in processing step S12 (calculation of trimming size) and the processing step S13 (calculation of trimming start position) are calculated. The trimming start position (A, B) is output to the FIFO register 232 and written.

[S15 in FIG. 2 (Update of Display Magnification Value M)]
In this processing step S15, the display magnification value M is updated. Specifically, when the enlarged display is performed, the value 0.02 is incremented to the display magnification value M, and when the reduced display is performed, the value 0.02 is decremented.

[S16 in FIG. 2 (End Determination)]
In this processing step S16, it is determined whether or not the display magnification value M has reached the display magnification value N. If it is determined that the display magnification value M has not reached the display magnification value N (S16: NO), the digital zoom setting value calculation processing in FIG. 2 returns to processing step S12 (calculation of trimming size). The digital zoom set value calculation processing of FIG. 2 executes a loop of processing steps S12 to S16 until it is determined that the display magnification value M has reached the display magnification value N (S16: YES). That is, the trimming setting value corresponding to each display magnification from the reference display magnification value L to the target display magnification value N is calculated in increments of 0.02 and written sequentially into the FIFO register 232. This completes the digital zoom set value calculation process of FIG.

[Digital zoom processing]
The driver signal processing circuit 110 generates and outputs a vertical synchronization signal for updating the display of the target image on the display screen of the monitor 300 at a cycle of one frame. This vertical synchronization signal is input not only to the monitor 300 but also to the FIFO register 232 in one frame cycle. The FIFO register 232 sets the current display magnification value M from the trimming setting values held at the time of input each time the vertical synchronization signal is input (every time the rising of the vertical synchronization signal is detected). The corresponding one is output to the trimming circuit 234. In other words, the FIFO register 232 starts from the one corresponding to the magnification value close to the display magnification value L among the trimming setting values corresponding to each display magnification from the display magnification value L to the display magnification value N in one frame cycle. The data are sequentially output to the trimming circuit 234.

  The trimming circuit 234 sequentially processes the target image of each frame (the image signal itself of each frame to be trimmed is expressed as “target image” for convenience of explanation), but the FIFO register 232. Trimming is performed using the set value input from the input, and the result is output to the scaler circuit 236. That is, the trimming circuit 234 outputs the trimmed target image to the scaler circuit 236 by gradually narrowing the range (trimming size and position) for each frame for enlarged display, and for each frame for reduced display. The target image trimmed by gradually expanding the range (trimming size and position) is output to the scaler circuit 236.

  The scaler circuit 236 scales the size of the target image sequentially input from the FIFO register 232 in one frame period to a specified size (for example, the display screen size of the monitor 300), and outputs the scaled image to the output circuit 238. In other words, the scaler circuit 236 enlarges the target image trimmed by the trimming circuit 234 to a specified size in the case of enlarged display and outputs it to the output circuit 238, and is trimmed by the trimming circuit 234 in the case of reduced display. The target image is reduced to a prescribed size and output to the output circuit 238. By sequentially outputting such target images to the monitor 300 via the output circuit 238, the scaling ratio is continuously increased from the display magnification value L to the display magnification value N (value) on the display screen of the monitor 300. The target image is displayed in a state of being gradually changed (in increments of 0.02).

  As described above, in the present embodiment, the system controller 202 continuously calculates all the trimming setting values from the display magnification value L to the display magnification value N, and all the calculated setting values are stored in the FIFO register. 232 is written. Thereafter, the setting values written in the FIFO register 232 are sequentially read at a timing synchronized with the vertical synchronization signal, and the digital zoom process is performed by the trimming circuit 234 and the scaler circuit 236 using the read setting values.

  In other words, in the present embodiment, it is not necessary to control the timing of command issuance by the system controller 202, and the target image of each display magnification from the display magnification value L to the display magnification value N can be easily set to the minimum rate (1 The target image can be displayed on the display screen of the monitor 300 in a state of being synchronized with the frame period (without causing the target image to be displayed at the same magnification for several frames in succession, or without losing the magnification at an intermediate stage to be originally displayed). .

  Further, in this embodiment, since information necessary for digital zoom processing (trimming setting values) is calculated collectively regardless of the frame period, it is not necessary to execute command issuance multiple times in a short period. Therefore, the system controller 202 is not occupied by the digital zoom process, and can execute other processes even while the digital zoom process is being executed.

  The above is the description of the exemplary embodiments of the present invention. Embodiments of the present invention are not limited to those described above, and various modifications are possible within the scope of the technical idea of the present invention. For example, the embodiment of the present invention also includes contents appropriately combined with embodiments or the like clearly shown in the specification or obvious embodiments.

  In the above embodiment, the display magnification of the target image is configured to change linearly (in increments of 0.02), but the present invention is not limited to this. In another embodiment, a configuration may be employed in which the display magnification of the target image changes nonlinearly (eg, exponential or logarithmic).

1 Electronic Endoscope System 100 Electronic Scope 102 LCB
104 Light distribution lens 106 Objective lens 108 Solid-state imaging device 110 Driver signal processing circuit 112 Memory 200 Processor 202 System controller 204 Timing controller 206 Lamp power source igniter 208 Lamp 210 Condensing lens 212 Memory 214 Operation panel 220 Pre-stage signal processing circuit 230 Post-stage signal processing Circuit 232 FIFO register 234 Trimming circuit 236 Scaler circuit 238 Output circuit

Claims (4)

Calculating means for calculating data related to display magnification from the first display magnification as a reference to the target second display magnification in predetermined magnification value increments;
Holding means for holding data relating to each display magnification from the first display magnification to the second display magnification, calculated in increments of the predetermined magnification value;
Scaling processing means for trimming and scaling the target image based on data relating to the display magnification input from the holding means ;
Equipped with a,
A vertical synchronization signal for updating the display of the target image is input to the holding unit at a cycle corresponding to a refresh rate of the display of the target image,
The holding means is
Each time the vertical synchronization signal is input, the data corresponding to the magnification value closest to the first display magnification among the data relating to the display magnification held at the time of input of the vertical synchronization signal is changed to the scaling factor. Output to the processing means and erase from the holding means,
The scaling processing means includes:
Each time data related to the display magnification is input from the holding unit, trimming and scaling of the target image is performed based on the input data related to the display magnification .
Image processing device. The vertical synchronization signal is
Input to the holding means in one frame cycle;
The image processing apparatus according to claim 1. The data regarding the display magnification is
Specifying the trimming size and start position of the target image for the scaling processing means,
The image processing apparatus according to claim 1 . The holding means is
FIFO (First In First Out) register,
The image processing apparatus according to any one of claims 1 to 3 .

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