JP6446856B2 - Pixel clock generation apparatus and image forming apparatus - Google Patents

Description

  The present invention relates to a pixel clock generation device and the like that generate a synchronization signal as a scanning start timing of a photoconductor.

  Image forming apparatuses such as digital multifunction peripherals and laser printers include an optical scanning device that deflects light emitted from a light source by an optical deflector having a rotating polygon mirror and scans a photosensitive member. In an image forming apparatus including a plurality of photoconductors, such as a color image forming apparatus, an optical scanning device including two scanning lenses arranged at positions facing each other with an optical deflector interposed therebetween is generally used. . This optical scanning device is also called a counter scanning optical scanning device.

  In such a scanning optical system, it is desired to suppress scanning speed unevenness that causes deterioration in image quality. The causes of uneven scanning speed can be broadly classified as follows: (1) error for each surface of the polygon mirror (each scanning line) due to the surface accuracy of the optical deflector, and (2) scanning average due to fluctuations in the rotational speed of the polygon mirror. Error due to speed fluctuation, (3) error for each light source in which the scanning speed fluctuates due to the difference in oscillation wavelength of the light source and chromatic aberration of the scanning optical system, (4) manufacturing accuracy and assembly accuracy of each component of the scanning optical system, There are errors for each scanning optical system due to deformation due to changes with time, etc., and (5) nonlinearity errors due to deviation of the scanning speed in one line from the ideal value.

  A technique for correcting the scanning speed unevenness that causes the deterioration of the image quality has been devised, and it is possible to suppress (1) to (5) that cause the scanning speed unevenness (for example, , See Patent Document 1).

  By the way, the optical scanning device of the counter scanning system includes a synchronization detection sensor that receives light before starting writing at a predetermined position in order to make the writing start positions in the main scanning direction of a plurality of photoconductors coincide with each other. Have. The output signal of the synchronization detection sensor is called a synchronization detection signal.

  FIG. 1 shows an example of a schematic configuration diagram of a counter scanning type optical scanning device. Laser light emitted from the LD light source 117 or the LD light source 127 is reflected by the incident mirrors 105 and 106 and reaches the polygon mirror 100. The polygon mirror 100 reflects the laser beam on each surface while rotating, passes the scanning lenses 101 and 102, and scans the photoconductors 103 and 104. Then, when the PD 110 as the synchronization detection sensor detects the laser light reflected by the polygon mirror 100, a synchronization detection signal is output.

  As shown in the figure, the optical scanning device of the counter scanning type may have a synchronization detection sensor (PD 110) corresponding to only one of the plurality of photoconductors 103 and 104. In this case, the pixel clock generation device 140 generates a pseudo synchronization signal (pseudo synchronization signal) for the other photoconductor 104 based on the synchronization detection signal of the PD 110.

  However, when the pseudo synchronization signal is generated, there is a problem that the pseudo synchronization signal is not synchronized with the first synchronization signal because the synchronization signal is detected a plurality of times.

  This problem will be described with reference to FIG. The pixel clock is a clock for generating one pixel. The first pixel clock is a pixel clock generated based on the synchronization detection signal detected by the synchronization detection sensor. The image forming apparatus 10 generates a pseudo synchronization signal at a timing when the first pixel clock reaches a certain number. The first pixel clock operates as shown by the solid line of the first pixel clock in FIG. 2 in order to re-synchronize each time the first synchronization signal is detected.

  On the other hand, it is desired that the pseudo synchronization signal is generated with Tclk_c (the period of the first pixel clock) * Nrefps (a predetermined number) based on the first synchronization signal A. That is, for the sake of explanation, when Nrefps = 6, an expected pseudo-synchronization signal is generated when six first pixel clocks are counted from the first synchronization signal A.

  However, since the first pixel clock is synchronized with the first synchronization signal, when the first synchronization signal B is input, a pseudo synchronization signal is generated at the timing of the first synchronization signal B. That is, when six first pixel clocks are counted from the first synchronization signal A, a pseudo synchronization signal is generated, but a pseudo synchronization signal that is phase-synchronized with the first synchronization signal B is generated. For this reason, it has become a factor of image deterioration.

  In view of the above problems, an object of the present invention is to provide a pixel clock generation device that generates an accurate pseudo synchronization signal in an image forming apparatus having a plurality of photoconductors.

In view of the above-described problems, the present invention provides a pixel clock generation device that generates a pseudo synchronization signal serving as a scanning start timing of a second photosensitive member using a first synchronization signal serving as a scanning start timing of the first photosensitive member. The first pixel clock output unit for outputting the first pixel clock so that the count number of the first pixel clock for a predetermined period becomes a standard value, and the first synchronization signal generated at a substantially constant cycle. triggered only once N times, clock generator starts generating the clock based on the first pixel clock, and, when counting the clock of a predetermined number in response to the first synchronizing signal, And a pseudo synchronization signal generation unit having a counter for generating the pseudo synchronization signal.

  In an image forming apparatus having a plurality of photoconductors, it is possible to provide a pixel clock generation apparatus that generates a pseudo synchronization signal with high accuracy.

It is an example of a schematic block diagram of the optical scanning device of a counter scanning system. It is an example of the figure explaining the problem that a pseudo-synchronization signal is not synchronized with the first synchronization signal. 1 is an example of a schematic configuration of a color image forming apparatus. It is an example of the block diagram of an optical scanning device. It is an example of the figure which shows six deflection | deviation reflective surfaces of a polygon mirror. It is an example of the figure explaining the write start timing. It is a timing chart for demonstrating the prior art example 1 of a pseudo synchronous signal. It is a timing chart for demonstrating the prior art example 2 of a pseudo synchronous signal. It is a timing chart for demonstrating the prior art example 3 of a pseudo synchronous signal. 1 is a diagram illustrating an example of an overall configuration diagram of an image forming apparatus in Embodiment 1. FIG. 1 is a diagram illustrating an example of an overall configuration diagram of an image forming apparatus according to Embodiment 1 of the present invention. 2 is an example of a block diagram of a pixel clock generation unit 1. FIG. 3 is an example of a timing chart for explaining the operation of the pixel clock generation unit 1; It is an example of the figure which shows the structural example of a pseudo synchronous signal production | generation part. It is an example of explanatory drawing regarding the error for every surface of a polygon mirror. It is an example of the timing chart figure of a synchronous mask signal and a pseudo pixel clock. It is an example of the timing chart figure of a pseudo synchronous signal. It is an example of the block diagram of the pixel clock generation part 2 (or pixel clock generation part 3). It is a figure which shows an example of the whole block diagram of the image forming apparatus in Example 2 of this invention. FIG. 4 is an example of a block diagram of a pixel clock generation unit 4 4 is an example of a timing chart of the pixel clock generation unit 4. FIG. It is a figure which shows an example of the whole block diagram of the image forming apparatus in Example 3 of this invention. FIG. 10 is an example of a timing chart of a pseudo synchronization signal generation unit according to a third embodiment. It is a figure which shows an example of the whole block diagram of the image forming apparatus in Example 4 of this invention. It is a figure which shows an example of the whole block diagram of the image forming apparatus in Example 5 of this invention. FIG. 3 is an example of a timing chart for separating a first synchronization signal detected by a PD 707 into a first synchronization signal A and a second synchronization signal B. FIG. 10 is an example of a timing chart of a pseudo synchronization signal generation unit in the fifth embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 3 shows a schematic configuration of the color image forming apparatus 10. The image forming apparatus 10 is a tandem multicolor printer that forms a full color image by superimposing four colors (black, cyan, magenta, and yellow). Two optical scanning devices (2010A, 2010B), four photosensitive drums (2030a, 2030b, 2030c, 2030d), four cleaning units (2031a, 2031b, 2031c, 2031d), and four charging devices (2032a, 2032b, 2032c) , 2032d), four developing rollers (2033a, 2033b, 2033c, 2033d), transfer belt 2040, transfer roller 2042, fixing roller 2050, paper supply roller 2054, paper discharge roller 2058, paper supply tray 2060, paper output tray 2070, A communication control device 2080 and a printer control device 2090 that controls the above-described units in an integrated manner are provided.

  The communication control device 2080 controls bidirectional communication with a host device (for example, a personal computer) via a network or the like.

  The printer control device 2090 includes a CPU, a ROM described in a program written in code readable by the CPU, various data used when executing the program, a RAM as a working memory, an analog data An A / D converter or the like for converting the data into digital data. The printer control device 2090 controls each unit in response to a request from the host device.

  The photosensitive drum 2030a, the charging device 2032a, the developing roller 2033a, and the cleaning unit 2031a are used as a set, and constitute an image forming station that forms a black image.

  The photosensitive drum 2030b, the charging device 2032b, the developing roller 2033b, and the cleaning unit 2031b are used as a set, and constitute an image forming station that forms a cyan image.

  The photosensitive drum 2030c, the charging device 2032c, the developing roller 2033c, and the cleaning unit 2031c are used as a set, and constitute an image forming station that forms a magenta image.

  The photosensitive drum 2030d, the charging device 2032d, the developing roller 2033d, and the cleaning unit 2031d are used as a set, and constitute an image forming station that forms a yellow image.

  Each photosensitive drum has a photosensitive layer formed on the surface thereof. That is, the surface of each photoconductive drum is a surface to be scanned. Each photosensitive drum is rotated in the direction of the arrow within the plane in FIG. 3 by a rotation mechanism (not shown).

  Each charging device uniformly charges the surface of the corresponding photosensitive drum.

  The optical scanning device 2010A scans the surfaces of the charged photosensitive drum 2030a and the photosensitive drum 2030b with light modulated for each color based on black image information and cyan image information from the printer control device 2090, respectively. To do. Thereby, a latent image corresponding to the image information is formed on the surface of each photosensitive drum. The latent image formed here moves in the direction of the corresponding developing roller as the photosensitive drum rotates.

  The optical scanning device 2010B scans the surfaces of the charged photosensitive drum 2030c and the photosensitive drum 2030d with light modulated for each color based on the magenta image information and the yellow image information from the printer control device 2090, respectively. To do. Thereby, a latent image corresponding to the image information is formed on the surface of each photosensitive drum. The latent image formed here moves in the direction of the corresponding developing roller as the photosensitive drum rotates.

  Details of each optical scanning device will be described later.

  By the way, the scanning area in which the image information is written on each photosensitive drum is referred to as “effective scanning area”, “image forming area”, “effective image area”, and the like.

  As each developing roller rotates, the toner from the corresponding toner cartridge is thinly and uniformly applied to the surface thereof. Then, when the toner on the surface of each developing roller comes into contact with the surface of the corresponding photosensitive drum, the toner moves only to a portion irradiated with light on the surface and adheres to the surface. In other words, each developing roller causes toner to adhere to the latent image formed on the surface of the corresponding photosensitive drum so as to be visualized. Here, the toner-attached image (toner image) moves in the direction of the transfer belt 2040 as the photosensitive drum rotates.

  The yellow, magenta, cyan, and black toner images are sequentially transferred onto the transfer belt 2040 at a predetermined timing, and are superimposed to form a color image.

  Recording paper is stored in the paper feed tray 2060. A paper feed roller 2054 is disposed in the vicinity of the paper feed tray 2060. The paper feed roller 2054 takes out the recording paper one by one from the paper feed tray 2060. The recording paper is sent out toward the gap between the transfer belt 2040 and the transfer roller 2042 at a predetermined timing. As a result, the color image on the transfer belt 2040 is transferred to the recording paper. The recording paper on which the color image is transferred is sent to the fixing roller 2050.

  In the fixing roller 2050, heat and pressure are applied to the recording paper, whereby the toner is fixed on the recording paper. The recording paper on which the toner is fixed is sent to the paper discharge tray 2070 via the paper discharge roller 2058 and is sequentially stacked on the paper discharge tray 2070.

  Each of the cleaning units 2031a, 2031b, 2031c, and 2031d removes toner (residual toner) remaining on the surface of the corresponding photosensitive drum. The surface of the photosensitive drum from which the residual toner has been removed returns to the position facing the corresponding charging device again.

  Next, details of the optical scanning device 2010A will be described with reference to FIG. FIG. 4 shows an example of a configuration diagram of the optical scanning device 2010A. The optical scanning device 2010A includes two light sources (2200a and 2200b), two coupling lenses (2201a and 2201b), two aperture plates (2203a and 2203b), two cylindrical lenses (2204a and 2204b), and a polygon mirror 2104A. It has two scanning lenses (2105a, 2105b), two folding mirrors (2106a, 2106b), a condensing lens 2112A, a synchronization detection sensor 2113A, and a scanning control device A (not shown).

  Here, in the XYZ three-dimensional orthogonal coordinate system, the direction along the longitudinal direction (rotation axis direction) of each photosensitive drum is described as the Y-axis direction, and the direction parallel to the rotation axis of the polygon mirror 2104A is described as the Z-axis direction.

  Each light source has a semiconductor laser and a drive circuit for driving the semiconductor laser. The drive circuit for each light source is controlled by the scanning control device A. Hereinafter, for convenience, light emitted from the light source 2200a is referred to as “light LBa”, and light emitted from the light source 2200b is referred to as “light LBb”.

  The coupling lens 2201a converts the light LBa emitted from the light source 2200a into substantially parallel light. The coupling lens 2201b converts light LBb emitted from the light source 2200b into substantially parallel light.

  The aperture plate 2203a has an aperture and adjusts the beam diameter of the light LBa via the coupling lens 2201a. The aperture plate 2203b has an aperture and adjusts the beam diameter of the light LBb via the coupling lens 2201b.

  The cylindrical lens 2204a focuses the light LBa that has passed through the opening of the aperture plate 2203a in the vicinity of the deflection reflection surface of the polygon mirror 2104A in the Z-axis direction. The cylindrical lens 2204b focuses the light LBb that has passed through the opening of the aperture plate 2203b in the vicinity of the deflection reflection surface of the polygon mirror 2104A in the Z-axis direction.

  The optical system arranged between each light source and the polygon mirror 2104A is also called a pre-deflector optical system.

  The polygon mirror 2104A has a six-sided mirror as a rotating polygon mirror, and each mirror surface becomes a deflection reflection surface. This rotary polygon mirror is rotated at a constant speed around a rotation axis by a polygon motor (not shown), and deflects light from each cylindrical lens at a constant angular velocity. Here, it is assumed that the rotary polygon mirror is rotated clockwise. The polygon motor is controlled based on the external clock signal so that the rotational speed of the rotary polygon mirror is 33300 rpm. Therefore, the rotating polygon mirror makes one rotation in about 1.8 ms (milliseconds).

  The light LBa from the cylindrical lens 2204a is incident on the deflection reflection surface located on the −X side of the rotation axis of the polygon mirror 2104A, and the light LBb from the cylindrical lens 2204b is the deflection reflection surface located on the + X side of the rotation axis. Is incident on.

  The scanning lens 2105a is disposed on the −X side of the polygon mirror 2104A and on the optical path of the light LBa deflected by the polygon mirror 2104A. The folding mirror 2106a guides the light LBa via the scanning lens 2105a to the photosensitive drum 2030a. That is, the light LBa is applied to the photosensitive drum 2030a, and forms a light spot on the surface of the photosensitive drum 2030a.

  The scanning lens 2105b is disposed on the + X side of the polygon mirror 2104A and on the optical path of the light LBb deflected by the polygon mirror 2104A. The folding mirror 2106b guides the light LBb through the scanning lens 2105b to the photosensitive drum 2030b. That is, the light LBb is applied to the photosensitive drum 2030b, and forms a light spot on the surface of the photosensitive drum 2030b.

  The light spot on the surface of each photosensitive drum moves in the longitudinal direction of the photosensitive drum as the polygon mirror 2104A rotates. The moving direction of the light spot at this time is the “main scanning direction”, and the rotation direction of the photosensitive drum is the “sub scanning direction”.

  The synchronization detection sensor 2113A is disposed at a position where the light traveling outside the effective scanning area of the photosensitive drum 2030b is received via the condenser lens 2112A. The synchronization detection sensor 2113A outputs a synchronization detection signal to the scanning control device A.

  The synchronization detection sensor 2113A is configured such that the synchronization detection signal is “high level” when the amount of received light is smaller than a predetermined value, and the synchronization detection signal is “low level” when the amount of received light is greater than or equal to a predetermined value. Has been. That is, when the synchronization detection sensor 2113A receives light, the synchronization detection signal changes from “high level” to “low level”.

  The scanning control device A obtains the writing start timing on the photosensitive drum 2030b based on the output signal (synchronization detection signal) of the synchronization detection sensor 2113A.

  Here, as shown in FIG. 5, the six deflecting reflecting surfaces of the polygon mirror 2104 </ b> A are counterclockwise “surface 1”, “surface 2”, “surface 3”, “surface 4”, “surface 5”, Let it be “surface 6”.

  Therefore, for example, when the photosensitive drum 2030b is scanned by the light reflected by the surface 1, the photosensitive drum 2030a is then scanned by the light reflected by the surface 3. Subsequently, the photosensitive drum 2030b is scanned by the light reflected by the surface 2, and then the photosensitive drum 2030a is scanned by the light reflected by the surface 4. Further, the photosensitive drum 2030b is scanned by the light reflected by the surface 3, and then the photosensitive drum 2030a is scanned by the light reflected by the surface 5.

  Next, the write start timing will be described with reference to FIG. When the rising edge of the output signal of the synchronization detection sensor 2113A is detected, the scanning control device A starts writing to the photosensitive drum 2030b after the elapse of time Tk. The time Tk is the time from the rise timing of the synchronization detection signal to the write start timing, and is obtained in advance for each device and stored in the memory of the scanning control device A.

  In this embodiment, since a synchronization detection sensor corresponding to the photosensitive drum 2030a is not provided, a synchronization detection signal for the photosensitive drum 2030a cannot be obtained.

  In this case, as a method of obtaining the writing start timing to the photosensitive drum 2030a, a method of generating a pseudo synchronization signal in synchronization with the output signal of the synchronization detection sensor 2113A is conceivable.

  FIG. 7 is an example of a diagram for explaining the pseudo synchronization signal. The pseudo synchronization signal is a signal that changes from “low level” to “high level” when the time Tr elapses from the rise of the output signal of the synchronization detection sensor 2113A. The time Tr is a time required for the polygon mirror to rotate 1/6, and is obtained in advance for each apparatus.

  Conventionally, as shown in FIG. 7, writing to the photosensitive drum 2030a is started after the elapse of time Tk from the rising timing of the pseudo synchronization signal.

  However, there is a manufacturing error in the rotary polygon mirror, and the writing start position may be different if the deflecting and reflecting surfaces are different.

  Therefore, as a first method, as shown in FIG. 8, the write start timing when scanning the photosensitive drum 2030a with the light reflected by the same deflection reflection surface is determined based on the output signal of the synchronization detection sensor 2113A. A method is conceivable.

  As a second method, as shown in FIG. 9, the time difference (Te13, Te24, Te35, Te46, Te51, Te62) between the deflecting and reflecting surfaces is obtained in advance, the time Tr is corrected, and the photosensitivity is obtained. A method of determining the writing start timing on the body drum 2030a is conceivable. Te13 is a time difference between the surface 1 and the surface 3, Te24 is a time difference between the surface 2 and the surface 4, and Te35 is a time difference between the surface 3 and the surface 5. Further, Te46 is a time difference between the surface 4 and the surface 6, Te51 is a time difference between the surface 5 and the surface 1, and Te62 is a time difference between the surface 6 and the surface 2.

  FIG. 10 is a diagram illustrating an example of an overall configuration diagram of the image forming apparatus 10 according to the first exemplary embodiment of the present invention. Note that the description of the optical scanning device in FIG. 4 is omitted. The laser light scanned by the optical scanning device is controlled by the pixel clock generation device 120.

  The pixel clock generator 120 includes a pixel clock generator 1 (111), a pseudo synchronization signal generator 113, a pixel clock generator 2 (112), a pixel clock generator 3 (114), a first modulation data generator 115, a first A two-modulation data generation unit 118, a first laser driving unit 116, and a second laser driving unit 119 are provided. In addition, although the numerical value in a parenthesis is a code | symbol, in order to distinguish the term of the same name, a term may be instruct | indicated with the number of 1-N.

  A synchronization detection sensor 2113A is disposed at one end of the photoreceptor 2208a, and the laser light reflected by the polygon mirror 2104A is incident on the synchronization detection sensor 2113A before main scanning of the photoreceptor 2208a by one line. The synchronization detection sensor 2113A detects the start timing of scanning.

  The timing of the start of scanning detected by the synchronization detection sensor 2113A is the pixel clock generation unit 1 (111) and the pixel clock generation unit 2 of the pixel clock generation device 120 as periodic first synchronization signals in accordance with the scanning of the photoconductor. (112) and the pseudo synchronization signal generator 113.

  The pixel clock generation unit 1 (111) generates a first pixel clock and a frequency correction value based on the first synchronization signal. The pixel clock generation unit 1 (111) is an example of a first pixel clock output unit. The pseudo synchronization signal generation unit 113 generates a pseudo synchronization signal based on the first synchronization signal and the first pixel clock. The pixel clock generation unit 2 (112) corrects the initial frequency setting value with the frequency correction value, and generates the second pixel clock in synchronization with the first synchronization signal. The pixel clock generation unit 3 (114) corrects the initial frequency setting value with the frequency correction value and generates a third pixel clock in synchronization with the pseudo synchronization signal. The pixel clock generator 2 (112) is an example of a second pixel clock generator, and the pixel clock generator 3 (114) is an example of a third pixel clock generator.

  The first modulation data generation unit 115 outputs the first modulation data synchronized with the second pixel clock to the first laser driving unit 116 based on the first image data, and the first laser driving unit 116 responds to the modulation data. The light source 2200a is driven with the output to output laser light.

  The second modulation data generation unit 118 outputs the second modulation data synchronized with the third pixel clock to the second laser driving unit 119 based on the second image data, and the second laser driving unit 119 responds to the modulation data. The light source 2200b is driven by output to output laser light.

  Further, the polygon mirror does not need to have six surfaces as shown in FIG. 10, but may have four surfaces as shown in FIG. FIG. 11 is a diagram illustrating an example of an overall configuration diagram of the image forming apparatus 10 according to the first exemplary embodiment of the present invention. The configuration of the pixel clock generation device 120 is the same.

  The image forming apparatus 10 in FIG. 11 includes two LD light sources 117, an LD light source 127, two photoconductors 103 and 104, and one PD 110 (corresponding to a synchronization detection sensor). PD 110 is an example of a first synchronization signal generator.

  In FIG. 11, the image forming apparatus 10 includes a polyhedral polygon mirror 100, scanning lenses 101 and 102, photoconductors 103 and 104, incident mirrors 105 and 106, a PD 110, a pixel clock generation device 120, and LD light sources 117 and 127. Is provided.

  Incident light Bk 108 from the LD light source 117 is reflected by the incident mirror 105, enters the polygon mirror 100, and is reflected by the polygon mirror 100. Incident light Bk 108 keeps its periodicity by the rotation of the polygon mirror 100, passes through the scanning lens 101, is adjusted in angle to match the width of the photosensitive member 103, and scans the photosensitive member 103. On the other hand, the incident light Y 109 of the LD light source 127 is reflected by the incident mirror 106, enters the polygon mirror 100, and is reflected by the polygon mirror 100. Incident light Y109 maintains periodicity by the rotation of the polygon mirror 100, passes through the scanning lens 102, is adjusted in angle to match the width of the photoconductor 104, and scans the photoconductor 104. As a result, electrostatic latent images corresponding to the outputs of the LD light sources 117 and 127 are formed on the photoconductors 103 and 104, respectively.

  A PD 110 is disposed at one end of the photoconductor 103, and laser light reflected by the polygon mirror 100 is incident on the PD 110 before main scanning of the photoconductor 103 by one line, and the PD 110 scans the start timing. Detected. The scanning start timing detected by the PD 110 is the pixel clock generation unit 1 (111), the pseudo synchronization signal generation unit 113 of the pixel clock generation device 120 as a periodic first synchronization signal in accordance with the scanning of the photoconductor 103, And it inputs into the pixel clock generation part 2 (112).

  As described above, the function and operation of the pixel clock generation device 120 of FIG. 11 are the same as the function and operation of the pixel clock generation device 120 of FIG. Below, based on the structure of FIG. 11, the image forming apparatus 10 of this embodiment is demonstrated.

  FIG. 12 is an example of a block diagram of the pixel clock generation unit 1 (111). In FIG. 12, the pixel clock generator 1 (111) includes a first counter 201, a moving average calculator 203, a filter 204, a divider 205, a delay element 206, a register 207, a digital clock oscillator 208, a comparator 209, and An adder 210 is provided.

  The first counter 201 counts the interval of the first synchronization signal at the interval of scanning one main scanning line by one polygon mirror surface by the first pixel clock. The comparator 209 compares the counted value with Nref (standard value of the count value of the first pixel clock for one surface of the polygon mirror) for one surface of the polygon mirror, and compares the difference with the moving average calculator 203. To enter.

  Here, the effective scanning period rate is ER, the photosensitive member linear velocity is ν, the effective writing width is L, the pixel density in the main scanning direction is ρm, the pixel density in the sub-scanning direction is ρs, and the number of writing beams is M. Then

It is.

  For example, when there are four polygon mirrors, the moving average calculator 203 calculates a moving average for four difference values. The moving average calculation value for the four difference values smoothed by the filter 204 is divided by Nref by the divider 205 and converted into an error Δf_now per pixel period. The delay element 206 updates the frequency correction value Δf, which is a control value, by adding an error Δf_now per pixel period, and the adder 210 adds the addition value of the frequency correction value Δf and the initial frequency fclk_i set in the register 207. The first pixel clock is generated by the digital clock oscillator 208.

  By this feedback control, the error per pixel period is within a predetermined range. The frequency correction value Δf when the error falls within a predetermined range is given to the pixel clock generation unit 2 (112) and the pixel clock generation unit 3 (114). Note that the value of Nref and the initial frequency fclk_i of the register 207 are the effective scanning period rate ER and the photosensitive member linear velocity ν, the effective writing width L, the pixel density ρm in the main scanning direction, and the pixel density in the sub-scanning direction of the image forming apparatus 10. It depends on ρs and the number M of writing beams.

  FIG. 13 is an example of a timing chart for explaining the operation of the pixel clock generation unit 1 (111). In FIG. 13, the interval Tspsp of the first synchronization signal input from the LD light source 117 for one surface of the polygon mirror fluctuates due to fluctuations in the rotational speed of the polygon mirror 2104A, resulting in an error.

  Assuming that the frequency of the first pixel clock as the control value is fclk_w, the cycle of the first pixel clock is 1 / fclk_w, and the pixel clock generation unit 1 (111) sets the count value by the first pixel clock to Nref. Control fclk_w.

At this time, the following equation holds.
Tspsp = Nref / fclk_w
On the other hand, if the target period determined for each model of the image forming apparatus 10 is Tspsp_target and the initial frequency is fclk_i,
Tspsp_target = Nref / fclk_i
If the frequency error is Δf,
1 / Δf = 1 / fclk_w−1 / fclk_i
Here, a time error Δt due to an error in scanning speed is
Δt = Tspsp−Tspsp_target
= Nref (1 / fclk_w-1 / fclk_i)
= Nref / Δf
It becomes.

  In other words, by comparing the rotation error for one rotation of the polygon mirror with Nref × the number of surfaces of the polygon mirror when there is no inter-surface error of the polygon mirror, the frequency of the first pixel clock is matched to the rotation error of the polygon mirror. It is possible to correct.

  Further, when the photoconductor is scanned using a common polygon mirror, a similar frequency error Δf occurs in the second pixel clock and the third pixel clock. Therefore, it is possible to correct the frequency according to the rotation error of one rotation of the polygon mirror by giving the frequency error Δf to the second pixel clock and the third pixel clock as a correction value.

  FIG. 14 is an example of a diagram illustrating a configuration example of the pseudo synchronization signal generation unit. The pseudo synchronization signal generator 113 includes four digitally controlled oscillators (DCO) 0 (301) to digitally controlled oscillator 3 (304), counters 0 (311) to 3 (314), an OR circuit 320, and a mask signal generator 330. have.

  The digitally controlled oscillator 0 (301) to the digitally controlled oscillator 3 (304) output pseudo pixel clock signals in which the same initial frequency is set.

  The mask signal generator 330 masks the first synchronization signal and generates synchronization mask signals 0 to 3 that are asserted once every four times.

  Counters 0 (311) to 3 (314) count the pseudo pixel clock signal and output an assert signal when the count value reaches Nref_ps. Counters 0 (311) to 3 (314) are cleared every synchronization mask signals 0 to 3. That is, the counters 0 (311) to 3 (314) start counting with the synchronization mask signals 0 to 3, and are cleared with the synchronization mask signals 0 to 3.

  The OR circuit 320 outputs a pseudo synchronization signal when any one of the assert signals from the counters 0 (311) to 3 (314) is ON.

  According to such a configuration, it is possible to generate a clock in which the rotational speed unevenness is also corrected for the pseudo pixel clock by the frequency correction value for correcting the rotational speed unevenness. In addition, since the mask signal generation unit 330 masks the synchronization signal, the digital control oscillator 0 (301) to the digital control oscillator 3 (304) resynchronize the pseudo pixel clock even if the first synchronization signal is asserted a plurality of times. Therefore, the pseudo-synchronization signal can be generated in the time based on each mask signal.

  Here, with reference to FIG. 15, an error of the inscribed circle radius of the polygon mirror will be described as an example of the cause of the deviation of the writing start position on the surface to be scanned.

  FIG. 15 is an example of an explanatory diagram regarding an error for each surface of the polygon mirror. a represents the distance from the center of the polygon mirror on the surface of a certain polygon mirror a, and b represents the distance from the center of the polygon mirror on the surface b of a certain polygon mirror. Even if the incident light is from the same position, if the distance from the center of the surface of the polygon mirror is different, the reflected light is reflected at different positions, so the writing position on the photoconductor is different.

  In order to reduce the error in the writing position, it is necessary to generate a pseudo-synchronization signal on the same surface as the surface of the polygon mirror on which the counting of the pixel clock is started. Does not occur. Therefore, the pseudo-generated count number Nref_ps must be determined so that the pseudo-synchronization signal is generated on the same surface as the surface of the polygon mirror on which the counting is started. Therefore, the pseudo generated count number Nref_ps represents the rotation amount by the count number until the same surface as the surface of the polygon mirror where the counting is started starts scanning the photosensitive member 104.

  The pseudo generated count number Nref_ps is a value stored in a register (not shown). In addition to this, there is a mirror angle error of the polygon mirror, but it can be corrected by the pseudo-generated count number Nref_ps.

  In addition, the writing positions of the photoconductors 103 and 104 may be shifted due to errors in each scanning optical system such as the mounting positions of the scanning lenses 101 and 102 and curved surface manufacturing errors. As a method for detecting the writing position, as described in Patent Document 2, a predetermined alignment mark used as a reference when combining the images of the photoconductors 103 and 104 is detected based on the alignment sensor, and the position is detected. A method for calculating the amount of deviation is known. Therefore, by setting the pseudo generated count number Nref_ps to correct the error for each scanning optical system based on the calculation result of the positional deviation amount, it is possible to suppress the deviation of the writing position due to these error factors.

  In the present embodiment (embodiment 1), when four polygon mirrors are used, two of the photoreceptors 103 and 104 are scanned using two of them. Since the PD 110 (synchronization detection sensor) is arranged only on one photoconductor 103, the photoconductor 104 on which the PD 110 is not arranged is delayed for a predetermined time with respect to the first synchronization signal measured by the PD110. Scanning can be started in synchronization with the pseudo synchronization signal.

FIG. 16 shows an example of a timing chart of the synchronization mask signal and the pseudo pixel clock.
The first synchronization signal is masked by the mask signal generator 330 and is output as the synchronization mask signals 0 to 3 (only the synchronization mask signals 0 and 1 are shown in the figure). In the case of the synchronization mask signal 0, the first synchronization signal is output by passing it only once every four times. In the case of the synchronization mask signal 1, the first synchronization signal is shifted by one time with respect to the synchronization mask signal 0 and the first synchronization signal is output. The signal is output by passing the signal only once every four times.

  The digitally controlled oscillator 0 (301) to the digitally controlled oscillator 3 (304) generate the pseudo pixel clocks 0 to 3 in synchronization with the respective synchronization mask signals at the same cycle as the first pixel clock. It should be noted that “identical” includes not being required to be completely coincident and being regarded as identical. Counters 0 (311) to 3 (314) operate based on the pseudo pixel clocks 0 to 3, respectively. In the case of the pseudo pixel clock 0, it is output in the same cycle as the first pixel clock in synchronization with the synchronization mask signal 0. Therefore, it does not synchronize with the synchronization mask signal 0 until the first synchronization signal passes next without being masked. Thereby, even if the first synchronization signal is repeatedly output, a pseudo synchronization signal that is phase-synchronized with the first synchronization signal that is the starting point can be generated. That is, it is possible to prevent the pseudo synchronization signal from synchronizing with the first synchronization signal that is input one after another.

  FIG. 17 is an example of a timing chart of the pseudo synchronization signal. FIG. 17 illustrates a case where two photoconductors 103 and 104 are scanned with two faces of four polygon mirrors using three counters from counter 0 to counter 2.

  In FIG. 17, the first synchronization signal is asserted at the start of scanning of the polygon mirror 4 surface in synchronization with the scanning of the photosensitive member 103. The counters 0 to 2 are sequentially reset by the synchronization mask signal every three planes, and start counting of each pseudo pixel clock.

  In FIG. 17, if the counter 0 is reset on one surface, the scanning start timing of the photoconductor 104 using that surface is rotated by two or more surfaces, and the counter pixel pseudo signal count of the counter 0 is set to Nref_ps. This is the timing when the set value is reached. That is, the timing at which the pseudo synchronization signal is generated is generated so that the LD light source 127 writes to the photoconductor 104 on the same surface as the surface of the polygon mirror 100 used when the LD light source 117 writes to the photoconductor 103. The

  Taking counter 0 as an example, the first synchronization signal is not masked and reset by synchronization mask signal 0, and the count value (counata0) that started counting becomes Nref_psa, so that a pseudo synchronization signal is output from OR circuit 320. The

  The timing at which the pseudo synchronization signal is detected is detected on the same surface as the polygon mirror from which the first synchronization signal is detected, so that it is not affected by errors for each polygon mirror surface. Similarly, for the counter 1 and the counter 2, the pseudo pixel clocks 1 and 2 are sequentially counted, and pseudo synchronization signals on each surface of the polygon mirror are sequentially output.

  By periodically masking the first synchronization signal, the pseudo synchronization signal can be prevented from being synchronized with the first synchronization signal until the pseudo synchronization signal is generated after being synchronized with the reference first synchronization signal.

  FIG. 18 is an example of a block diagram of the pixel clock generation unit 2 (or pixel clock generation unit 3). In FIG. 18, the pixel clock generation unit 2 (112) includes an initial frequency setting unit 602, an adder 603, and a digital control oscillator 604. The initial frequency setting unit 602 holds an initial value of the frequency of the pixel clock 2. The adder 603 adds the frequency correction value generated by the pixel clock generation unit 1 (111) to the initial frequency, and supplies the digital control oscillator 604 with a frequency setting value obtained by correcting the rotation error of the polygon mirror 100.

  The digitally controlled oscillator 604 generates a second pixel clock at a frequency set by the adder 603 in phase synchronization with the first synchronization signal.

  Since the pixel clock generation unit 2 (112) can set an initial value different from that of the pixel clock generation unit 1 (111), an initial value that corrects a writing end position shift due to an error for each scanning optical system. The value can be set. In the case where a plurality of LD light sources 117 and 127 are provided, the ability to separately set the initial value of the frequency is advantageous for suppressing errors for each scanning optical system.

  In the case of the pixel clock generation unit 3 (114), a pseudo synchronization signal is input to the digital control oscillator 604 instead of the first synchronization signal. The digitally controlled oscillator 604 generates a third pixel clock at a frequency set by the adder 603 in phase synchronization with the pseudo synchronization signal.

  As a method for detecting the writing end position, a predetermined alignment mark used as a reference when combining the images of the photoconductors 103 and 104 as described in Patent Document 2 is detected based on the alignment sensor. A method for calculating the positional deviation amount is known. Based on the calculation result of the positional deviation amount, an initial setting value of the frequency is set. Since the write end position changes with time, it is preferable to set the initial setting value of the frequency as appropriate.

  As described above, in the present embodiment, the first synchronization signal is periodically masked so that it is not resynchronized with the synchronization signal until the pseudo synchronization signal is generated after the synchronization with the reference synchronization signal. Thus, the deviation of the writing start position can be suppressed.

  In addition, the frequency of the first pixel clock is controlled according to the rotational speed unevenness of the polygon mirror 100, and the pseudo-sync signal is generated based on the controlled frequency correction value, thereby making the writing position of the light beam on the opposite side constant. To do. Further, by generating the pseudo synchronization signal on the same surface as the first synchronization signal, the error for each surface of the polygon mirror can be ignored. In addition, by individually setting the initial frequency for each pixel clock generation unit, the error for each scanning optical system can be corrected, and the error at the write end position can be corrected.

  In this embodiment, an image forming apparatus 10 that scans two photosensitive members 103 and 104 by dividing the laser beam of one LD light source 117 will be described.

  FIG. 19 is a diagram illustrating an example of an overall configuration diagram of the image forming apparatus 10 according to the second exemplary embodiment of the present invention. In the present specification, components having the same reference numerals perform the same functions, and therefore, description of components once described may be omitted or only differences may be described.

  The image forming apparatus 10 in FIG. 19 has one LD light source 117, two photoconductors 103 and 104, and one PD 110 (synchronization detection sensor).

  Compared to the first embodiment, since there is one LD light source 117, the laser beam is split by the light beam splitting element 107. Thereby, the incident light 109 generated by the LD light source 127 in the first embodiment can be generated by one LD light source 117.

  In FIG. 19, an image forming apparatus 10 includes a polyhedral polygon mirror 100, scanning lenses 101 and 102, photoconductors 103 and 104, incident mirrors 105 and 106, an LD light source 117, a light beam splitter 107, a PD 110, and a pixel clock generation device. 120, a modulation data generation unit 5 (129), and a fifth laser driving unit (130).

  The pixel clock generation device 120 includes a pixel clock generation unit 1 (111), a pseudo synchronization signal generation unit 113, and a pixel clock generation unit 4 (128).

  In FIG. 11, the functions of the pixel clock generation unit 2 (112) that has generated the second pixel clock and the pixel clock generation unit 3 (114) that has generated the third pixel clock are shown in FIG. The clock generation unit 4 (128) is realized. For this reason, the pixel clock generation unit 4 (128) switches the frequency of the fourth pixel clock in a period during which the photoconductor 103 and the photoconductor 104 are scanned.

  In addition, the first modulation data generation unit 115 and the second modulation data generation unit 118 in FIG. 11 are realized by the fifth modulation data generation unit 129 in FIG. 19, and the first laser driving unit 116 and the second laser driving in FIG. The function of the unit 119 is realized by the fifth laser driving unit 130 in FIG.

  The laser light emitted by the LD light source 117 as the light source is divided into incident light Bk 108 (first light beam) and incident light Y 109 (second light beam) by a light beam splitting element 107 using a half mirror, respectively. Is reflected by the incident mirrors 105 and 106 and is incident on different surfaces of the polygon mirror 100, and scans the photosensitive member (Bk) 103 and the photosensitive member (Y) 104 through the scanning lenses 101 and 102. As a result, electrostatic latent images corresponding to the output of the LD light source 117 are formed on the photoconductors 103 and 104, respectively.

  A PD 110 is disposed at one end of the photoconductor 103, and laser light reflected by the polygon mirror 100 is incident on the PD 110 before main scanning of the photoconductor 103 by one line, and the PD 110 scans the start timing. Detected. The scanning start timing detected by the PD 110 is the pixel clock generation unit 1 (111), the pseudo synchronization signal generation unit 113 of the pixel clock generation device 120 as a periodic first synchronization signal in accordance with the scanning of the photoconductor 103, And it inputs into the pixel clock generation part 4 (128).

  The pixel clock generation unit 1 (111) generates a first pixel clock and a frequency correction value based on the first synchronization signal. The pseudo synchronization signal generation unit 113 generates a pseudo synchronization signal based on the first synchronization signal and the frequency correction value. The pixel clock generation unit 4 (128) generates a fourth pixel clock based on the first synchronization signal, the pseudo synchronization signal, and the frequency correction value.

  The modulation data generation unit 5 (129) generates modulation data synchronized with the fourth pixel clock based on the image data, and outputs the modulation data to the fifth laser driving unit 130. The fifth laser driving unit 130 outputs according to the modulation data. The LD light source 117 is driven to output laser light.

  FIG. 20 is an example of a block diagram of the pixel clock generation unit 4 (128). The pixel clock generation unit 4 (128) includes initial frequency setting units 601 and 602, a selector 606, adders 603 and 605, and a digitally controlled oscillator 604.

  The initial frequency setting unit 601 sets an initial frequency of the fourth pixel clock when the laser beam scans the photoconductor 103. An initial frequency setting unit 602 sets an initial frequency of the pixel clock 4 when the laser beam scans the photosensitive member 104. The initial frequency setter 601 holds a first initial frequency set value, and the initial frequency setter 602 holds a second initial frequency set value. The initial frequency setting unit 601 is an example of a first setting value holding unit, and the initial frequency setting unit 602 is an example of a second setting value holding unit.

  A side signal is input to the selector 606. The side signal is switched between H and L depending on whether the input to the pixel clock generation unit 4 is the first synchronization signal or the pseudo synchronization signal. The selector 606 is an example of a frequency reading unit.

  The adder 603 adds one of the initial frequency setting values selected by the selector 606 and the frequency correction value generated by the pixel clock generation unit 1. The digitally controlled oscillator 604 generates a fourth pixel clock in phase with the synchronization signal based on the added initial frequency setting value and frequency correction value. Details will be described below.

  FIG. 21 shows an example of a timing chart of the pixel clock generation unit 4. The first synchronization signal is asserted when the PD 110 detects the incident light Bk (108). The pseudo synchronization signal is asserted at the timing described in the first embodiment after the first synchronization signal is asserted.

  The side signal becomes H level when the pseudo synchronization signal is asserted, and becomes L level when the first synchronization signal is asserted.

  The synchronization signal is a signal obtained by adding the first synchronization signal and the pseudo synchronization signal by the adder 605. The first initial frequency setting value ma and the second initial frequency setting value mb are values held by the initial frequency setting units 601 and 602.

  Ma is the value ma of the first initial frequency setting value or the value mb of the second initial frequency setting value, and is a value selected by the side signal. When the side signal is L, ma is selected, and when the side signal is H, mb is selected.

  The pixel clock generation unit 1 outputs the frequency correction value Δmc for each first synchronization signal. Mi is a frequency setting value of the pixel clock, and is determined by “Ma + frequency correction value Δmc”.

  Therefore, either “Mi = ma + Δmc” or “Mi = mb + Δmc” becomes the frequency of the fourth pixel clock depending on the side signal. The frequency of the fourth pixel clock is updated to “Mi = ma + Δmc” or “Mi = mb + Δmc” by the synchronization signal, and the digital control oscillator 604 outputs the fourth pixel clock in phase synchronization with the synchronization signal. .

  Since the pixel clock generation unit 4 (128) can set an initial value (pixel clock frequency) different from the pixel clock generation unit 1, the initial value is set for each error in each scanning optical system. Is possible.

  For example, in the case where a plurality of scanning optical systems described in the present embodiment (embodiment 2) are provided, the ability to separately set the initial value of the frequency is advantageous in suppressing errors for each scanning optical system, and errors in the write end position. Can be corrected.

  As described above, according to the present embodiment, in addition to the effects of the first embodiment, scanning with one LD light source 117 enables a plurality of initial frequencies to be individually set while reducing the cost, so that the scanning optical system can be individually set. Each error can be corrected, and the error at the write end position can be corrected.

  Since the polygon mirror 100 is common to the pixel clock generation units 2, 3, 5 and 6 and the rotation unevenness is equal, the pixel clock generation unit 111 can be shared and the circuit can be simplified.

  In this embodiment, an image forming apparatus 10 that scans four photosensitive members 103, 104, 703, and 704 with four LD light sources 117, 127, 713, and 1901 will be described.

  FIG. 22 is a diagram illustrating an example of an overall configuration diagram of the image forming apparatus 10 according to the third exemplary embodiment of the present invention. The image forming apparatus 10 in FIG. 22 illustrates a case where there are four writing LD light sources, four photosensitive members, and two PDs.

  In FIG. 22, the image forming apparatus 10 is different from the image forming apparatus 10 according to the first embodiment described with reference to FIG. 11 in that the photoconductors 703 and 704, the incident mirrors 705 and 706, the PD 707, the third laser driving unit 1915, and the fourth. A laser driving unit 1909 and LD light sources 713 and 1901 are added as an optical system. The pixel clock generation device 120 includes a second pseudo synchronization signal generation unit 1902, a pixel clock generation unit 5 (1910), a third modulation data generation unit 1913, a pixel clock generation unit 6 (1904), and fourth modulation data. A generation unit 1907 is added.

  In this embodiment (third embodiment), the pixel clock generation unit 2 (112), the pixel clock generation unit 3 (114), the first modulation data generation unit 115, the second modulation data generation unit 118, and the first laser drive. The unit 116 and the second laser driving unit 119 have the same configuration as the components having the same reference numerals in FIG. 11 described in the first embodiment. The pixel clock generation unit 5 (1910) and the pixel clock generation unit 6 (1904) have the same configuration as the pixel clock generation unit 2 (112) and the pixel clock generation unit 3 (114). The third modulation data generation unit 1913 and the fourth modulation data generation unit 1907 have the same configuration as the first modulation data generation unit 115 and the second modulation data generation unit 118. Further, the third laser driving unit 1915 and the fourth laser driving unit 1909 have the same configuration as the first laser driving unit 116 and the second laser driving unit 119.

  The configuration of the second pseudo synchronization signal generation unit 1902 is the same as that of the pseudo synchronization signal generation unit 113, and includes digitally controlled oscillators 311 to 314 (second clock generation unit) that generate a pseudo pixel clock (second clock). Yes.

  FIG. 23 is an example of a timing chart of the pseudo synchronization signal generator in the present embodiment (third embodiment). In FIG. 23, the first synchronization signal from the PD 110 and the second synchronization signal from the PD 707 are input corresponding to the LD light source 117 and the LD light source 713, respectively, with respect to the timing chart in the first embodiment described in FIG. The counters a0 to a2 and b0 to b2 and the comparators a0 to a2 and b0 to b2 are respectively processed to generate the first pseudo synchronization signal and the second pseudo synchronization signal. Other operations are almost the same as those in the timing chart of FIG. The PD 707 is an example of a second synchronization signal generator.

  In FIG. 23, the first pseudo synchronization signal is generated at the timing of scanning the photoconductor 104 on the same surface as the polygon mirror 100 when the LD light source 117 scans the photoconductor 103, and the second pseudo synchronization signal is the LD light source. 713 is generated at the timing when the photoconductor 704 is scanned on the same surface as the polygon mirror 100 when the photoconductor 703 is scanned.

  In the present embodiment (third embodiment), the same effect as in the first embodiment can be obtained even when the number of optical scanning devices is two. That is, by periodically masking the first synchronization signal and the second synchronization signal, the first pseudo synchronization signal and the second pseudo synchronization signal are generated after being synchronized with the reference first synchronization signal or the second synchronization signal. By not re-synchronizing with the first synchronization signal or the second synchronization signal until it is done, the deviation of the write start position can be suppressed.

  The frequency of the first pixel clock is controlled in accordance with the rotational speed unevenness of the polygon mirror, and the pseudo sync signal is generated based on the controlled first pixel clock, thereby making the writing position of the light beam on the opposite side constant.

  Further, by generating the first pseudo synchronization signal on the same surface as the first synchronization signal, the error for each surface of the polygon mirror can be ignored. Similarly, by generating the second pseudo synchronization signal on the same surface as the second synchronization signal, the error for each surface of the polygon mirror can be ignored. Further, since the initial frequency can be individually set for each LD, the error for each scanning optical system can be corrected, and even when the number of photoconductors is increased as compared with the first embodiment, the error at the write end position is corrected. it can.

  In this embodiment, an image forming apparatus 10 that scans four photoconductors with two LD light sources will be described.

  FIG. 24 is a diagram illustrating an example of an overall configuration diagram of the image forming apparatus 10 according to the fourth exemplary embodiment of the present invention. The image forming apparatus 10 in FIG. 24 includes two LD light sources 117 and 713, four photoconductors 103, 104, 703, and 704, and two PDs 110 and 707.

  The image forming apparatus 10 has photoreceptors 703 and 704, incident mirrors 705 and 706, and an LD light source 713 as an optical system as compared with the image forming apparatus 10 described in FIG.

  In FIG. 24, the LD light source 713 and the LD light source 117 are drawn at positions separated from each other, but in the actual optical system, the LD light source 713 is placed at a position separated in the sub-scanning direction of the LD light source 117.

  The incident light M (714) and the incident light Bk (108) pass through the common scanning lens 101, and the incident light Y (109) and the incident light C (715) pass through the common scanning lens 102.

  Further, the pixel clock generation device 120 is different from the image forming device 10 described in FIG. 19 of the second embodiment with a second pseudo synchronization signal generation unit 1902, a pixel clock generation unit 7 (710), and a sixth modulation data generation unit. 711 and a sixth laser driver 712.

  The laser light emitted by the LD light source 117 is split into incident light Bk and incident light Y by the beam splitter 107. After the incident light Bk is reflected by the incident mirror 105, the photoconductor 103 is scanned by the polygon mirror 100. The incident light Bk is detected by the PD 110 before scanning. After the incident light Y is reflected by the incident mirror 106, the photoconductor 104 is scanned by the polygon mirror 100.

  The laser light emitted from the LD light source 713 is split into incident light M and incident light C by the light beam splitting element 107. After the incident light M is reflected by the incident mirror 705, the photoconductor 703 is scanned by the polygon mirror 100. The incident light M is detected by the PD 707 before scanning. After the incident light C is reflected by the incident mirror 706, the photoconductor 704 is scanned by the polygon mirror 100.

  The PD 110 detects the incident light Bk and outputs a first synchronization signal. The PD 707 detects the incident light M and outputs a second synchronization signal.

  As in the second embodiment, the first synchronization signal is input to the pixel clock generation unit 1, the pseudo synchronization signal generation unit 113, and the pixel clock generation unit 4 (128). The second synchronization signal is input to the pixel clock generation unit 7 and the second pseudo synchronization signal generation unit 1902.

  The image forming apparatus 10 in the present embodiment (embodiment 4) performs the same operation as in the second embodiment. The pixel clock generation unit 7 has the same configuration as the pixel clock generation unit 4, and the sixth modulation data generation unit 711 has the same configuration as the fifth modulation data generation unit 129.

  However, since the initial frequency is set for each of the pixel clock generation unit 4 and the pixel clock generation unit 7, an error for each scanning optical system can be corrected. The pixel clock generation unit 7 includes setting units for the third initial frequency and the fourth initial frequency.

  The pixel clock generation unit 4 (128) and the pixel clock generation unit 7 (710) have the configuration shown in FIG. The pixel clock generator 4 (128) generates a fourth pixel clock that is a reference clock for the incident light Bk108 and the incident light Y109, and the pixel clock generator 7 generates a reference for the incident light M (714) and the incident light C (715). A fifth pixel clock that is a clock is generated. Since the pixel clock generation unit 4 (128) and the pixel clock generation unit 7 (710) share the polygon mirror 100 and have the same rotation unevenness, the pixel clock generation unit 111 can be shared and the circuit can be simplified. Can do.

  Further, in this embodiment (Embodiment 4), in addition to the effects of Embodiment 1, the frequency of the first pixel clock is controlled according to the rotational speed unevenness of the polygon mirror 100, and based on the controlled first pixel clock. By generating the pseudo synchronization signal, the writing position of the light beam on the opposite side is made constant.

  Further, by generating the first pseudo synchronization signal on the same surface as the first synchronization signal, the error for each surface of the polygon mirror can be ignored. Similarly, by generating the second pseudo synchronization signal on the same surface as the second synchronization signal, the error for each surface of the polygon mirror can be ignored. Further, since a plurality of initial frequencies can be individually set for one LD light source, an error for each scanning optical system can be corrected, and even when the number of photoconductors is increased as compared with the second embodiment, the write end position can be corrected. The error can be corrected.

  In this embodiment, the image forming apparatus 10 that extracts the first synchronization signals A and B from the first synchronization signals detected by one PD in the image forming apparatus 10 that operates four photosensitive members with two LD light sources will be described.

  FIG. 25 is a diagram illustrating an example of an overall configuration diagram of the image forming apparatus 10 according to the fifth exemplary embodiment of the present invention. The image forming apparatus 10 in FIG. 25 includes two LD light sources 117 and 713, four photoconductors 103, 104, 703, and 704, and one PD 707.

  In FIG. 25, the image forming apparatus 10 does not include the PD 110 as compared to the image forming apparatus 10 described in FIG.

  The selector 1001 outputs the first synchronization signal as the first synchronization signal A and the first synchronization signal B in response to the synchronization selection signal. The synchronization selection signal is given from a higher-level control unit such as a CPU.

  As in the second embodiment, the first synchronization signal A is input to the pixel clock generation unit 1, the pseudo synchronization signal generation unit 113, and the pixel clock generation unit 4 (128). The first synchronization signal B is input to the pixel clock generation unit 7 and the pseudo synchronization signal generation unit 1902.

  FIG. 26 is a timing chart for separating the first synchronization signal detected by the PD 707 into the first synchronization signal A and the second synchronization signal B. The first synchronization signal detected by the PD 707 is distributed to the first synchronization signal A or the first synchronization signal B by a synchronization selection signal supplied from a higher-level control unit such as a CPU.

  In FIG. 26, when the synchronization selection signal is L, it is separated into the first synchronization signal A by the selector 1001, and when it is H, it is separated into the first synchronization signal B. Even if the PD 707 is common to the LD light sources 117 and 713, the synchronization selection signal enables separation into the first synchronization signal A and the first synchronization signal B.

  FIG. 27 is an example of a timing chart of the pseudo synchronization signal generator in the present embodiment. In FIG. 27, the first synchronization signal A and the first synchronization signal B are obtained from the first synchronization signal with respect to the timing chart of FIG. Note that the first synchronization signal B is omitted on the second and third surfaces in order to make the drawing easier to see.

  The PD 707 and the selector 1001 detect the first synchronization signals A and B, respectively. The counters a0 to a2 are reset by the first synchronization signal A, and the counters b0 to b2 are reset by the first synchronization signal B.

  When the count value of the counter a0 becomes Nref_psa, the pseudo synchronization signal 1 is generated. Similarly, when the count value of the counter b0 becomes Nref_psb, the pseudo synchronization signal 2 is generated. Thereafter, the surface of the polygon mirror 100 is switched, and the pseudo synchronization signals 1 and 2 are generated each time the first synchronization signal is generated.

  The pseudo synchronization signal 1 is generated at the timing when the photoconductor 104 is scanned on the same surface as the polygon mirror 100 when the LD light source 117 scans the photoconductor 103. The pseudo sync signal 2 is generated by the LD light source 713 scanning the photoconductor 703. It is generated at the timing of scanning the photoreceptor 704 on the same surface as the polygon mirror 100 at that time.

  Therefore, in this embodiment, in addition to the effects of the first embodiment, even if the PD 707 is common to the two LD light sources 117 and 713, it can be separated into the first synchronization signal A and the first synchronization signal B. In the present embodiment, the image forming apparatus 10 can be made smaller than the fourth embodiment by using the PD 707 in common.

  Further, by generating the first pseudo synchronization signal on the same surface as the first synchronization signal A, the error for each surface of the polygon mirror can be ignored. Similarly, by generating the second pseudo synchronization signal on the same surface as the first synchronization signal B, the error for each surface of the polygon mirror can be ignored. In addition, since one LD light source 117, 713 can individually set a plurality of initial frequencies, an error for each scanning optical system can be corrected, and even if the number of photoconductors is increased as compared with the first embodiment, writing is possible. The end position error can be corrected.

DESCRIPTION OF SYMBOLS 10 Image forming apparatus 100 Polygon mirror 101,102,701,702 Scanning lens 103,104,703,704 Photoconductor 105,106,705,706 Incident mirror 107 Light beam splitting element 110,707 PD
111 Pixel clock generator 1
112 Pixel clock generator 2
113 Pseudo sync signal generator 114 Pixel clock generator 3
115 First Modulation Data Generation Unit 116 First Laser Driving Unit 117, 127, 713, 1901 LD Light Source 120 Pixel Clock Generation Device

JP 2013-178477 A JP 2006-305780 A

Claims (10)

A pixel clock generation device that generates a pseudo synchronization signal as a scanning start timing of the second photoconductor using a first synchronization signal as a scanning start timing of the first photoconductor,
A first pixel clock output unit that outputs a first pixel clock so that a count value of the first pixel clock in a predetermined period becomes a standard value;
Generally triggered only once the first synchronizing signal generated at a predetermined period to N times, the clock generator starts generating the clock based on the first pixel clock, and, triggered by the first synchronization signal A counter that generates the pseudo-synchronization signal when the predetermined number of clocks are counted , and a pseudo-synchronization signal generator ,
A pixel clock generation device comprising: The pseudo sync signal generator of claim 1, wherein the clock generation unit generates the pseudo sync signal the that first synchronized signal synchronized in phase with the trigger for generating the start of the clock, it is characterized by Pixel clock generator. The first synchronization signal is input when light for scanning the first photosensitive member is reflected by an arbitrary surface of the rotary polygon mirror before scanning,
The pseudo synchronization signal generation unit counts the number of rotations of the rotary polygon mirror necessary for the surface on which the first synchronization signal is generated to start scanning of the second photoconductor as the number, Generating the pseudo synchronization signal for each surface of the rotary polygon mirror;
3. The pixel clock generation apparatus according to claim 1, wherein the pixel clock generation apparatus is a pixel clock generation apparatus. The first pixel clock output unit outputs a correction value of the frequency of the first pixel clock so that the count number of the first pixel clock in the predetermined period becomes a standard value,
The pseudo synchronization signal generator is
A mask signal generator for generating N synchronization mask signals by passing the first synchronization signal once every N times;
N clock generation units that start generating the clock in response to the first synchronization signals passed through the N synchronization mask signals by correcting the frequency with the correction value;
And N the counter each of the clock generator for counting the clock generated,
An output unit that outputs the pseudo-synchronization signal each time one of the N counters counts the clock to the number;
Pixel clock generator according to claim 1, characterized in that it comprises a. The first pixel clock output unit outputs a correction value of the frequency of the first pixel clock so that the count number of the first pixel clock in the predetermined period becomes a standard value,
A second pixel clock generation unit for correcting the frequency of the second pixel clock synchronized with the first synchronization signal by the correction value and generating the second pixel clock;
A third pixel clock generation unit that corrects the frequency of the third pixel clock synchronized with the pseudo synchronization signal by the correction value and generates the third pixel clock;
The initial value of the frequency of the second pixel clock and the initial value of the frequency of the third pixel clock are individually set in advance,
Pixel clock generator according to claim 1, characterized in that. The first pixel clock output unit outputs a correction value of the frequency of the first pixel clock so that the count number of the first pixel clock in the predetermined period becomes the standard value,
A first set value holding unit in which a first initial frequency is set;
A second set value holding unit in which the second initial frequency is set;
A frequency reading unit that reads the first initial frequency when the first synchronization signal is input and reads the second initial frequency when the pseudo synchronization signal is input;
Oscillating at the first initial frequency corrected with the correction value in synchronization with the first synchronization signal or at the second initial frequency corrected with the correction value in synchronization with the pseudo synchronization signal. A generator for generating a pixel clock;
6. The pixel clock generation device according to claim 5 , further comprising: A second synchronization signal serving as a scanning start timing of the third photosensitive member is input,
A second clock generation unit that starts generating a second clock based on the first pixel clock, triggered by the second synchronization signal passed in a predetermined cycle;
A second pseudo-synchronization signal generator for generating a second pseudo-synchronization signal when the predetermined number of the second clocks are counted in response to the second synchronization signal;
Pixel clock generator according to claim 1, characterized in that it comprises a. By the synchronization selection signal, the first synchronization signal is selected as the second synchronization signal that becomes the scanning start timing of the third photoconductor,
Generally triggered only once the first synchronizing signal generated at a predetermined period to N times, the second clock generator starts generating the second clock based on the first pixel clock, and the second A counter that generates a second pseudo synchronization signal when a predetermined number of the second clocks are counted in response to the synchronization signal , and a second pseudo synchronization signal generation unit,
A third set value holding unit in which the third initial frequency is set;
A fourth set value holding unit in which the fourth initial frequency is set;
A second frequency reading unit that reads the third initial frequency when the second synchronization signal is input, and reads the fourth initial frequency when the second pseudo synchronization signal is input;
Oscillated at the third initial frequency corrected with the correction value in synchronization with the second synchronization signal or at the fourth initial frequency corrected with the correction value in synchronization with the second pseudo synchronization signal A second generator for generating a fifth pixel clock;
The pixel clock generation device according to claim 6 , further comprising: A pixel clock generator according to claim 1 or claim 7,
Two light sources,
An optical deflector for deflecting light from the two light sources toward the first photosensitive member and the second photosensitive member, respectively.
The first and second photosensitive members scanned by the light deflected by the optical deflector;
An image forming apparatus comprising: a first synchronization signal generation unit configured to detect light that scans the first photosensitive member and generate the first synchronization signal. A pixel clock generator according to claim 6 or claim 8,
A light source;
A beam splitter that divides the light emitted by the light source into a first light beam that scans the first photoconductor and a second light beam that scans the second photoconductor;
An optical deflector for deflecting the first light beam and the second light beam divided by the light beam splitter toward the first photoconductor and the second photoconductor, respectively;
The first photosensitive member scanned by the first light beam deflected by the optical deflector; the second photosensitive member scanned by the second light beam;
An image forming apparatus comprising: a first synchronization signal generation unit configured to detect light that scans the first photosensitive member and generate the first synchronization signal.