JP6428915B2 - Receiving circuit, receiving apparatus and receiving method - Google Patents

Description

  The present invention relates to a receiving circuit, a receiving apparatus and a receiving method, and a receiving apparatus and a receiving method for a radio base station. For example, the receiving circuit, the receiving apparatus and the receiving method suitable for suppressing an increase in circuit scale, and The present invention relates to a radio base station receiving apparatus and a receiving method thereof.

  In recent years, in a wireless communication system, optical communication is used for signal transmission between a slave unit and a master unit constituting a wireless unit of a base station. In a general optical transmission method of a signal received by a slave unit, the received signal is orthogonally demodulated, converted into a digital signal, further converted into CPRI, etc., and then optically transmitted. Therefore, the general optical transmission method has a problem that the function is complicated and the circuit scale and power consumption increase.

  In order to solve this problem, optical communication using RoF (Radio over Fiber) technology is performed. RoF technology includes analog RoF and digital RoF.

  In the analog RoF, a radio frequency received radio signal is converted into an optical signal as an analog signal and transmitted to the master unit via an optical cable (Non-Patent Document 1). Therefore, there is a problem that the signal is easily deteriorated during transmission and the signal quality is deteriorated.

  On the other hand, in the digital RoF, a radio frequency received radio signal is converted into a digital signal, then converted into an optical signal, and transmitted to the parent device via an optical cable (Non-patent Document 2). In this case, unlike the case of analog RoF, the signal quality is unlikely to deteriorate.

  In addition, Patent Document 1 discloses a level detection unit that detects a level of input digital data, a carrier generation unit that generates a carrier signal that sequentially increases in frequency corresponding to a detection result of the level detection unit, and digital data. There is disclosed a pulse width modulation amplifier comprising conversion means for converting into a pulse width modulation signal based on a carrier signal.

  Patent Document 2 discloses a receiver including a mixer that mixes an oscillator signal and a carrier signal modulated by an information signal, and an A / D converter that converts the information signal into a digital signal. Is disclosed.

  Further, in Patent Document 3, an input signal is input, an envelope of the received signal is detected, an envelope detection means for outputting the detection signal, an input comparison between the detection signal and the reference voltage, and a data signal is obtained. A data communication demodulator circuit comprising a comparator means for demodulating and outputting is disclosed.

  Further, Patent Document 4 discloses a configuration in which a phase synchronization type ΔΣ modulator is provided in a transmission circuit.

JP 2006-2111647 A Special Table 2002-519926 Japanese Patent Laid-Open No. 08-204762 International Publication No. 2011/078120

Yutaka Fukuya et al., “Development of RoF system shared with W-CDMA / LTE system”, NTT DOCOMO Technical Journal Vol. No. 18 4, pp. 25-29 Satoshi Ito et al., “Development and commercialization of a small-scale RoF device for weak electric field areas”, NTT DOCOMO Technical Journal Vol. 21 No. 2, pp. 46-51

  In the digital RoF, although the signal quality does not deteriorate, it is necessary to optically transmit after converting a high-frequency signal into a signal in an intermediate frequency band due to a bit rate limitation in digital processing or optical conversion. Therefore, in this related technique, there is a problem that a frequency conversion unit for down-conversion and a high-speed AD converter are required, and the circuit scale increases. Other problems and novel features will become apparent from the description of the specification and the accompanying drawings.

  The present invention has been made to solve such a problem, and a receiving circuit, a receiving apparatus and a receiving method capable of suppressing an increase in circuit scale, and a receiving apparatus for a radio base station and the same An object is to provide a receiving method.

  According to an embodiment, the receiving circuit includes a detector that outputs an envelope signal of a radio frequency signal received wirelessly, a phase signal generation unit that generates a phase signal of a pulse waveform of the radio frequency signal, the envelope signal, and the envelope signal A ΔΣ modulator that outputs a ΔΣ modulation signal based on the phase signal, and a high-frequency pulse signal generator that generates a high-frequency pulse signal based on the ΔΣ modulation signal and the phase signal.

  According to one embodiment, the receiving method detects the amplitude of a radio frequency received radio frequency signal and outputs an envelope signal, and detects the phase of the radio frequency signal to generate a phase signal of a pulse waveform. A step of ΔΣ-modulating the envelope signal in synchronization with the phase signal and outputting as a ΔΣ-modulated signal; and a step of multiplying the ΔΣ-modulated signal and the phase signal to generate a high-frequency pulse signal. Prepare.

Further, according to one embodiment, a receiving device of a radio base station detects a radio reception signal and converts a high-frequency pulse signal generated using phase-synchronous ΔΣ modulation into an optical signal;
A baseband signal processing circuit that receives the optical signal via an optical cable and generates a baseband signal corresponding to the high-frequency pulse signal.

  Also, according to one embodiment, a radio base station reception method detects a radio reception signal, converts a high-frequency pulse signal generated using phase-synchronous ΔΣ modulation into an optical signal, and converts the optical signal to an optical cable. And a baseband signal corresponding to the high-frequency pulse signal is generated.

  According to the embodiment, it is possible to provide a receiving circuit, a receiving apparatus and a receiving method that can suppress an increase in circuit scale, and a receiving apparatus and a receiving method for a radio base station.

1 is a block diagram showing a configuration of a receiving circuit according to a first exemplary embodiment; It is a block diagram which shows the structure of the receiver with which the receiver circuit shown in FIG. 1 is mounted. FIG. 3 is a block diagram showing a configuration of a receiving circuit according to a second exemplary embodiment. FIG. 4 is a block diagram illustrating a modified example of the receiving circuit illustrated in FIG. 3. FIG. 6 is a block diagram showing a configuration of a receiving circuit according to a third exemplary embodiment. FIG. 6 is a block diagram showing a configuration of a receiving circuit according to a fourth exemplary embodiment.

  Hereinafter, embodiments will be described with reference to the drawings. Since the drawings are simple, the technical scope of the embodiments should not be narrowly interpreted based on the description of the drawings. Moreover, the same code | symbol is attached | subjected to the same element and the overlapping description is abbreviate | omitted.

  In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. Are partly or entirely modified, application examples, detailed explanations, supplementary explanations, and the like. Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including operation steps and the like) are not necessarily essential except when clearly indicated and clearly considered essential in principle. Similarly, in the following embodiments, when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numbers and the like (including the number, numerical value, quantity, range, etc.).

<Embodiment 1>
FIG. 1 is a block diagram of a configuration of the receiving circuit 11 according to the first embodiment.
The receiving circuit 11 shown in FIG. 1 is, for example, a slave unit that constitutes a radio unit of a radio base station, and is binarized by performing phase-synchronous delta-sigma modulation on a radio-received analog high-frequency signal. A digital high frequency pulse signal. This high-frequency pulse signal is suitable for serial communication such as RoF. For example, the high-frequency pulse signal is converted into an optical signal and then transmitted to an external master unit via an optical cable. Here, the receiving circuit according to the present embodiment does not need to include a down-conversion oscillator and a phase shifter, and also needs to include a quadrature demodulator, a high-speed FPGA for conversion into a CPRI signal, and the like. Therefore, an increase in circuit scale can be suppressed. This will be specifically described below.

  As illustrated in FIG. 1, the reception circuit 11 includes a detector 111, a phase signal generator 112, a ΔΣ modulator 113, and a multiplier (high frequency pulse signal generator) 114. The phase signal generation unit 112, the ΔΣ modulator 113, and the multiplier 114 constitute a phase-locked ΔΣ modulator.

Detector 111 detects the amplitude of the high frequency signal S _IN that is wirelessly received from the outside and outputs the envelope signal r. The response speed of the detector 111 may be about twice as fast as the main signal bandwidth.

Phase signal generator 112 generates a phase signal S _theta pulse waveform by detecting the phase of the high frequency signal S _IN. Specifically, the phase signal generation unit 112 is a comparator, compares the high frequency signal _SIN and the reference voltage Vref, and outputs a comparison result indicating a binary value of 0 or 1 as the phase signal _Sθ . . The reference voltage Vref is, for example, 0V.

The ΔΣ modulator 113 ΔΣ modulates the envelope signal r in synchronization with the phase signal S _θ used as a clock signal, and outputs a binarized ΔΣ modulation signal.

The multiplier 114 multiplies the ΔΣ modulation signal and the phase signal S _θ to generate a high frequency pulse signal S _O. Here, .DELTA..SIGMA modulation signal corresponds to the amplitude component of the high-frequency signal S _IN, the phase signal S _theta, corresponding to a phase component of the RF signal S _IN. Therefore, it can be said that the high-frequency pulse signal S _O is a binarized digital high-frequency signal holding information on the analog high-frequency signal S _IN .

The high-frequency pulse signal _S0 is converted into an optical signal, for example, and then transmitted to an external master unit via an optical cable.

(a formula)
Next, it will be described with reference to the formula for a high-frequency pulse signal S _O generated by the receiving circuit 11.

First, the radio-frequency received high-frequency signal _SIN is expressed as follows, where x is the in-phase component of the baseband signal, y is the quadrature component of the baseband signal, ω is the angular velocity of the carrier wave, t is time, and i is an imaginary unit. It is expressed as equation (1).

Then, the envelope signal r representing the amplitude component of the high-frequency signal S _IN is expressed by the following equation (2).

Further, the phase signal S _θ representing the phase component of the high-frequency signal S _IN is expressed as the following Expression (3).

From equation (2) and (3), the signal envelope signal r and ΔΣ modulation, and the phase signal S _theta, the high frequency pulse signal S _O is the multiplication results, is omitted binarization effects, the following It is expressed as equation (4).

Equation (4) As is apparent from the high frequency pulse signal S _O digital generated by the receiving circuit 11 includes information of the high frequency signal S _IN of the analog wirelessly received by the receiving circuit 11.

Thus, the receiving circuit 11, by performing a phase synchronization type ΔΣ modulation to an analog high-frequency signal S _IN that is wirelessly received, and generates a binarized digital RF pulse signal S _O. The high-frequency pulse signal S _O is suitable for serial communication such as RoF, for example, after being converted into an optical signal, through the optical cable, it is transmitted to the outside. Here, the receiving circuit 11 does not need to include an oscillator and a phase shifter for down-conversion, and does not need to include a quadrature demodulator, a high-speed FPGA for conversion into a CPRI signal, etc. An increase in scale can be suppressed. Along with this, an increase in power consumption can be suppressed.

Furthermore, the optical transmission of the high frequency pulse signal S _O of the binarized digital, compared with the case of optical transmission of analog high-frequency signal, for resistance to noise is strong, the deterioration of the signal quality is suppressed.

  Although the case where the ΔΣ modulator 113 outputs a binarized ΔΣ modulation signal has been described as an example in this embodiment, the present invention is not limited to this. The ΔΣ modulator can be appropriately changed to a configuration that outputs a multi-valued ΔΣ modulation signal such as ternarization.

(Application example of receiving circuit 11)
FIG. 2 is a block diagram illustrating a configuration of the receiving device 1 in which the receiving circuit 11 is mounted. In FIG. 2, a receiving circuit 11 b is shown as a specific configuration example of the receiving circuit 11.

  The receiving apparatus 1 is used as a radio unit of a base station apparatus, for example, and includes a receiving circuit 11b, a baseband signal processing circuit 12, an optical cable 13, and an antenna 14. Here, the receiving circuit 11b corresponds to a slave unit in the radio unit, and the baseband signal processing circuit 12 corresponds to a master unit in the radio unit.

  The reception circuit 11 b further includes a band pass filter 116, a low noise amplifier (LNA) 117, and an E / O conversion unit 118, as compared with the reception circuit 11.

Bandpass filter 116, of the high frequency signal S _IN that is wirelessly received via the antenna 14 from the outside, passing only a desired frequency band. Low noise amplifier 117 amplifies the high frequency signal _{S IN} that has passed through the bandpass filter 116.

Detector 111 detects the amplitude of the amplified radio frequency signal S _IN by the low noise amplifier 117, and outputs the envelope signal r. Phase signal generating unit 112 detects the phase of the high frequency signal S _IN amplified by the low noise amplifier 117 generates a phase signal S _theta pulse waveform. ΔΣ modulator 113 ΔΣ modulation in synchronization with the envelope signal r to the phase signal S _theta, and outputs it as ΔΣ modulation signal. The multiplier 114 multiplies the ΔΣ modulation signal and the phase signal S _θ to generate a digital high-frequency pulse signal S _O. Here, .DELTA..SIGMA modulation signal corresponds to the amplitude component of the high-frequency signal S _IN, the phase signal S _theta, corresponding to a phase component of the RF signal S _IN. Therefore, it can be said that the high-frequency pulse signal S _O is a digital high-frequency signal including information on the analog high-frequency signal _SIN .

The E / O converter 118 converts the digital high-frequency pulse signal S _O (electric signal) into an optical signal.

  The optical cable 13 connects the receiving circuit 11b and the baseband signal processing circuit 12. The optical signal generated by the receiving circuit 11b is transmitted to the baseband signal processing circuit 12 via the optical cable 13.

  The baseband signal processing circuit 12 includes an O / E converter 121, multipliers 122 and 123, AD converters 124 and 125, an oscillator 126, and a phase shifter 127.

The O / E converter 121 converts the optical signal supplied from the receiving circuit 11b via the optical cable 13 into a digital high-frequency pulse signal S _O (electric signal).

Bandpass filter 128 removes the added out-of-band noise in the high-frequency pulse signal S _O phase synchronous ΔΣ modulator, passes only a desired frequency band. As a result, the high frequency pulse signal S _O becomes a high frequency analog signal _SOA .

  The oscillator 126 generates an oscillation signal having a predetermined frequency. The phase shifter 127 outputs an oscillation signal f1 that is in phase with the oscillation signal of the oscillator 126, and outputs an oscillation signal f2 that is 90 degrees out of phase with the oscillation signal f1.

The multiplier 122 multiplies the high frequency analog signal _SOA and the oscillation signal f1 to obtain an in-phase component signal of the baseband signal from the high frequency analog signal _SOA . The multiplier 123 multiplies the high frequency analog signal _SOA and the oscillation signal f2 to obtain a quadrature phase component signal of the baseband signal from the high frequency analog signal _SOA . The in-phase component signal and the quadrature component signal of the baseband signal are AD-converted by AD converters 123 and 124, respectively. Then, the baseband signal processing circuit 12 executes predetermined processing based on this baseband signal.

  The receiving circuit 11b is suitable for IC. For example, by manufacturing the receiving circuit 11b using SiGe, the low-noise amplifier 117 to the multiplier 114 can be integrated into one chip. Furthermore, by manufacturing the receiving circuit 11b using SiGe BiCMOS, the low-noise amplifier 117 to the E / O conversion unit 118 can be integrated into one chip.

<Embodiment 2>
FIG. 3 is a block diagram of a configuration example of the receiving circuit 21 according to the second embodiment.
The reception circuit 21 further includes a saturation amplifier 211 in the subsequent stage of the phase signal generation unit 112, as compared with the reception circuit 11b.

Saturation amplifier 211, a high-frequency signal S _IN amplified by the low noise amplifier 117 through a bandpass filter 116, and outputs the amplified to saturation power. As a result, the high-frequency signal _SIN is shaped into a rectangular shape or a shape close thereto. Therefore, the phase signal generator 112 can easily compare the high-frequency signal _SIN and the reference voltage Vref, and can accurately detect the phase.

  Since the other configuration and operation of the receiving circuit 21 are the same as those of the receiving circuit 11b, description thereof is omitted.

(Modification of the receiving circuit 21)
FIG. 4 is a block diagram showing a modification example of the receiving circuit 21 as a receiving circuit 21a.
The reception circuit 21 a includes a variable gain amplifier 211 a in place of the saturation amplifier 211 as compared with the reception circuit 21.

Variable gain amplifier 211a is envelope signal r output from the detector 111 (i.e., the amplitude of the high frequency signal S _IN) is a variable gain amplifier gain is changed according to.

For example, if the amplitude of the high frequency signal _{S IN} is large, the gain of the variable gain amplifier 211a becomes small and the amplitude of the high frequency signal _{S IN} is small, the gain of the variable gain amplifier 211a increases. Thus, the variable gain amplifier 211a, even if the amplitude of the high frequency signal S _IN is small, it is possible to increase the voltage variation of the high frequency signal S _IN. Therefore, the phase signal generation unit 112, even if the amplitude of the high frequency signal S _IN is small, the phase of the high frequency signal S _IN can be easily detected.

  Since the other configuration and operation of the receiving circuit 21a are the same as those of the receiving circuit 21, description thereof is omitted.

<Embodiment 3>
FIG. 5 is a block diagram of a configuration example of the receiving circuit 31 according to the third embodiment.
The reception circuit 31 includes a phase signal generation unit 312 instead of the phase signal generation unit 112, as compared with the reception circuit 11b.

In the phase signal generation unit 312, the comparator has a hysteresis characteristic. For example, when the determination by the comparator shifts from Low to High, the reference voltage Vref + is used. On the other hand, when the determination by the comparator shifts from High to Low, the reference voltage Vref− is used. At this time, the value of the reference voltage Vref + is higher than the reference voltage Vref−. The reference voltage Vref + and the reference voltage Vref- are envelope signal outputted from the detector 111 r (i.e., the amplitude of the high frequency signal _{S IN)} value corresponding to is set. Comparator compares the reference voltage Vref + or reference voltage Vref- and the high frequency signal _{S IN,} and outputs the comparison result as the phase signal S _theta.

For example, if the amplitude of the high frequency signal _{S IN} is high, the reference voltage Vref +, the absolute value of Vref- increases. That is, the absolute value of the threshold value for determining the positive and negative of the high frequency signal _SIN is increased. On the other hand, if the amplitude of the high frequency signal _{S IN} is small, the reference voltage Vref +, the absolute value of Vref- decreases. That is, the absolute value of the threshold value for determining the positive and negative high-frequency signal S _IN is reduced. Thereby, it is possible hysteresis setting suitable for the amplitude of the high frequency signal S _IN.

  Since the other configuration and operation of the receiving circuit 31 are the same as those of the receiving circuit 11b, description thereof is omitted.

<Embodiment 4>
FIG. 6 is a block diagram of a configuration of the receiving circuit 41 according to the fourth embodiment.
The reception circuit 41 further includes a level adjustment unit 411 as compared with the reception circuit 11b.

For example, the level adjustment unit 411 scales the level of the envelope signal r output from the detector 111 to a level corresponding to the dynamic range of the ΔΣ modulator 113. When the ΔΣ modulator 113 is insufficient for the dynamic range required for the receiver, the gain in the level adjustment unit 411 is changed stepwise to adjust to satisfy the required dynamic range. Also, if the amplitude distortion in the generation and transmission of high-frequency pulse signal S _O occurs, it adds an inverse distortion component to the envelope signal r. Accordingly, the receiving circuit 41 can maintain the signal quality at a high quality.

  In addition, the characteristic part of the receiving circuit concerning the said Embodiment 1-4 may be used in combination.

(Difference between cited document and the present invention)
First, the configuration disclosed in Patent Document 1 assumes input of a digital signal, and aims to remove noise from the digital signal. On the other hand, the receiving circuits according to the first to fourth embodiments assume an analog signal input, and perform phase-synchronous ΔΣ modulation on the analog high-frequency signal to generate a digital high-frequency pulse signal. The purpose is that. As described above, Patent Document 1 and the present invention have different configurations and purposes.

  In addition, the configuration disclosed in Patent Document 2 includes a quadrature modulation demodulator, and each of the in-phase signal and the quadrature signal is individually ΔΣ modulated and digitized. On the other hand, the receiving circuits according to the first to fourth embodiments do not include a quadrature modulation demodulator and further perform phase modulation. Further, the configuration disclosed in Patent Document 2 performs AD conversion on a baseband signal. On the other hand, the receiving circuits according to the first to fourth embodiments perform AD conversion or ΔΣ modulation on the high frequency signal. As described above, Patent Document 2 and the present invention have different configurations and purposes.

  Further, the configuration disclosed in Patent Document 3 uses only the envelope signal obtained by detecting the amplitude of the input signal as the reference voltage of the comparator, and includes the receiver circuit according to the first to fourth embodiments. The configuration is fundamentally different.

  The configuration disclosed in Patent Document 4 includes a phase-synchronous ΔΣ modulator in a transmission circuit. On the other hand, in the configurations of the first to fourth embodiments, a phase synchronization type ΔΣ modulator is provided in the receiving circuit.

  Further, the phase-locked ΔΣ modulator provided in the transmission circuit and the phase-locked ΔΣ modulator provided in the receiving circuit have the following differences in configuration and purpose.

First, in the phase-locked ΔΣ modulator provided in the transmission circuit, the input signal is a digital signal and the level of the input signal is predetermined. On the other hand, in the phase-locked ΔΣ modulator provided in the receiving circuit of the present invention, the input signal is an analog signal, and the signal level of the input signal is not constant. In the receiving circuit of the present invention, the high frequency signal S _IN that is wirelessly received, the envelope signal r representing the amplitude, and the phase signal S _theta representing the phase is generated.

  Further, the phase-locked ΔΣ modulator pushes the quantization noise out of the signal band, thereby reducing the quantization noise in the signal band and reducing the influence on the modulation accuracy. In the transmission apparatus, the leakage power outside the signal band is severely limited so as not to affect the adjacent communication environment in the frequency domain. On the other hand, in the receiving apparatus targeted by the present invention, there is no limit on the leakage power outside the signal band, so that it is not necessary to consider the quantization noise pushed out of the signal band as long as the standards such as throughput are satisfied.

  Furthermore, in the case of LTE, since the transmission signal employs an Orthogonal Frequency Division Multiplexing (OFDM) scheme, the PAPR (Peak to Average Power Ratio) is large. On the other hand, since the SC-FDMA (Single Carrier Frequency Division Multiple Access) system is adopted for the received signal, the PAPR is relatively small. Therefore, in the phase-locked ΔΣ modulator provided in the receiving circuit, the ΔΣ modulation accuracy of the envelope signal can be improved, and the quantization noise can be suppressed relatively small with respect to the main signal.

  Although the present invention has been described with reference to the exemplary embodiments, the present invention is not limited to the above. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the invention.

  This application claims the priority on the basis of Japanese application Japanese Patent Application No. 2015-056135 for which it applied on March 19, 2015, and takes in those the indications of all here.

DESCRIPTION OF SYMBOLS 1 Receiving device 11, 11a Receiving circuit 21, 21a Receiving circuit 31 Receiving circuit 41 Receiving circuit 12 Baseband signal processing circuit 13 Optical cable 14 Antenna 111 Detector 112 Phase signal generation part 113 ΔΣ modulator 114 Multiplier 115 AD converter 116 Band pass Filter 117 Low noise amplifier 118 E / O conversion unit 121 O / E conversion unit 122, 123 Multiplier 124, 125 AD converter 126 Oscillator 127 Phase shifter 128 Band pass filter 211 Saturation amplifier 211a Variable gain amplifier 312 Phase signal generation unit 411 Level adjustment section

Claims (11)

A detector that outputs an envelope signal of a radio-frequency signal received wirelessly;
A saturation amplifier that amplifies the high-frequency signal to saturation power;
Phase signal generating means for detecting the phase of the high-frequency signal from the output signal of the saturation amplifier and generating a phase signal of the pulse waveform of the high-frequency signal;
A ΔΣ modulator that outputs a ΔΣ modulation signal based on the envelope signal and the phase signal;
A high-frequency pulse signal generator that generates a high-frequency pulse signal based on the ΔΣ modulation signal and the phase signal;
A receiving circuit. The saturation amplifier is a variable gain amplifier whose gain changes according to the amplitude of the high-frequency signal detected by the detector.
The receiving circuit according to claim 1 . The phase signal generation means is a comparator that compares the high-frequency signal with a reference voltage signal and outputs a comparison result as the phase signal.
The receiving circuit according to claim 1 or 2 . The comparator compares the high-frequency signal with the reference voltage signal according to the amplitude of the high-frequency signal detected by the detector, and outputs a comparison result as the phase signal;
The receiving circuit according to claim 3 . Level adjustment means for adjusting the level of the envelope signal;
The receiving circuit as described in any one of Claims 1-4 . The level adjusting means scales the level of the envelope signal to a level corresponding to the dynamic range of the ΔΣ modulator.
The receiving circuit according to claim 5 . The level adjusting means adds a reverse distortion component of distortion generated in the high-frequency pulse signal to the envelope signal and outputs it.
The receiving circuit according to claim 5 or 6 . The envelope signal of the analog further comprising an AD converter for converting the digital receiver circuit according to any one of claims 1 to 7. The receiving circuit according to any one of claims 1 to 8 , further comprising an E / O conversion unit that converts the high-frequency pulse signal into an optical signal and transmits the optical signal to the outside via an optical cable. The receiving circuit according to claim 9 , wherein the high-frequency pulse signal is generated from the radio-frequency signal received wirelessly, converted into the optical signal, and output.
The optical cable for transmitting the optical signal;
A baseband signal processing circuit that generates a baseband signal corresponding to the high-frequency signal from the optical signal transmitted via the optical cable;
A receiving device. Detecting the amplitude of a radio frequency signal received wirelessly and outputting an envelope signal;
Amplifying the high frequency signal to saturation power by using a saturation amplifier;
Detecting the phase of the high-frequency signal from the output signal of the saturation amplifier to generate a phase signal of a pulse waveform;
ΔΣ-modulating the envelope signal in synchronization with the phase signal, and outputting as a ΔΣ-modulated signal;
Multiplying the ΔΣ modulation signal and the phase signal to generate a high frequency pulse signal;
A reception method comprising:

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