JP6316179B2 - Radar signal source - Google Patents

Description

  The present invention relates to a radar signal wave source that is applied to a radar apparatus and generates a frequency-modulated continuous signal.

  In a radar apparatus using an FMCW (Frequency Modulated Continuous Wave) signal that is a frequency-modulated continuous signal (for example, a chirp signal), the FMCW signal is transmitted as a transmission signal, and this signal is reflected on the object, and this is reflected as a reception signal. Receive. Then, the distance to the object, the relative speed, and the like can be obtained from the time difference between the received signal and the transmitted signal transmitted at the time of reception.

  Generally, a radar signal wave source used in a radar apparatus includes a digital signal processor (DSP) that generates a digital value representing a discrete frequency value, and a digital / analog conversion that converts the digital value into an analog signal. (DAC: Digital-Analog Converter), a low-pass filter (LPF) that suppresses spurious noise, and a voltage-controlled oscillator (VCO).

  The VCO used in the above configuration oscillates at a frequency corresponding to the input voltage signal. This relationship between voltage and frequency is called VF characteristic (voltage frequency characteristic). Generally, the VF characteristic has non-linearity. Therefore, in a radar signal wave source that is actually used in a radar apparatus, closed-loop control such as a phase locked loop (PLL) using a digital value phase as a reference signal is used in order to improve the linearity of the VCO. A technique such as a technique for detecting the frequency of the output signal of the VCO and compensating for an error from the ideal characteristic is used (see Patent Documents 1 and 2, for example).

  The technique described in Patent Document 1 corrects the frequency nonlinearity of the VCO in generating the FMCW signal. In this method, the frequency setting code of the digital value and the differential calculation result of the detected phase value are input to the comparator. Then, the frequency error information obtained by the comparator is passed through the LPF and converted into an analog signal by the DAC. And the frequency control is performed by inputting the integration result to the frequency control terminal of the VCO. As described above, the configuration using the closed loop control can correct the frequency nonlinearity and the frequency deviation of the modulated wave in the radar apparatus.

  However, in this case, since the closed loop control is used, the followability may be limited by a time constant determined by the band of the LPF. As a result, there is a problem that it cannot cope with a high-speed modulation signal. Moreover, since there are many necessary functional blocks, there is a problem that the circuit scale becomes large.

  On the other hand, the technique described in Patent Document 2 changes the look-up table (LUT) by measuring the frequency of a chirp signal in a certain frequency period.

FIG. 9 is a diagram showing a configuration of a radar signal wave source used in a conventional radar apparatus.
As shown in FIG. 9, the conventional radar signal wave source includes a modulation control unit 102 having LUTs 1021 and 1022, a DAC 103, a VCO 104, a frequency detection circuit 105, and an ADC 106.

  In this radar signal wave source, the modulation control unit 102 controls the output voltage of the DAC 103 based on information in the LUT 1021. Then, a frequency modulation operation is performed so that the frequency of the VCO output signal from the VCO 104 changes linearly, and a frequency modulation signal suitable for FMCW radar is output.

  Then, at the timing when the frequency detected by the frequency detection circuit 105 reaches a predetermined frequency region, the ADC 106 acquires the frequency control voltage at that time. Then, the LUT 1022 is updated based on the voltage value, and the contents of the LUT 1022 are reflected on the LUT 1021 at a certain time. Thereby, the frequency nonlinearity and frequency deviation of the VCO can be corrected.

  In this case, when the delay amount of the frequency detected by the frequency detection circuit 105 is larger than the modulation speed, the frequency detected by the frequency detection circuit 105 is synchronized with the frequency control voltage output from the DAC 103 at that time. It becomes difficult to correct accurately. For this reason, it may be difficult to use as a radar signal wave source that outputs a high-speed modulated signal.

JP 2011-247598 A JP 2013-47617 A

As described above, in the related art, there is a problem that it is difficult to perform accurate correction when the delay of the frequency detected by the frequency detection circuit becomes larger than the period of the operating chirp signal. .
Further, the method of controlling by closed loop control has a problem that the modulation speed is limited by the loop band. There is also a problem that the configuration is complicated and the circuit scale becomes large.

  The present invention has been made to solve the above-described problems, and can perform high-speed modulation with respect to the conventional configuration, and even when there is a variation in the delay of the frequency detected by the frequency detection circuit. An object of the present invention is to provide a radar signal wave source capable of accurate compensation.

Radar signal wave source according to the present invention, the frequency of detecting the frequency of the input and voltage controlled oscillator for generating a continuous signal oscillates at a frequency corresponding to a voltage signal, electric pressure continuous signal generated by the controlled oscillator A detection circuit, a delay detector for detecting a delay time from the frequency of the reference continuous signal during calibration operation and the frequency of the continuous signal detected by the frequency detection circuit, and a reference continuous signal during operation The frequency difference between the delay circuit that delays the frequency of the signal by the delay time detected by the delay detector, the frequency of the reference continuous signal delayed by the delay circuit, and the frequency of the continuous signal detected by the frequency detection circuit is detected. a comparator for, from the frequency difference detected by the comparator, and a coefficient processor for calculating a correction value for the voltage frequency characteristic of the voltage-controlled oscillator, a reference continuous signal and a coefficient processor Based on the calculated correction value Ri is obtained by a modulation control unit for controlling the voltage signal.

  According to the present invention, since it is configured as described above, it is possible to perform high-speed modulation compared to the conventional configuration, and it is possible to accurately compensate even when there is a variation in the delay of the frequency detected by the frequency detection circuit. It becomes.

It is a figure which shows the structure of the signal wave source for radars concerning Embodiment 1 of this invention. It is a figure which shows the specific structure of the delay detector in Embodiment 1 of this invention. It is a flowchart which shows the calibration operation | movement of the signal source for radars concerning Embodiment 1 of this invention. It is a figure which shows the frequency detected by the frequency detection circuit in Embodiment 1 of this invention. 3 is a flowchart showing an operation operation of the radar signal wave source according to the first embodiment of the present invention. It is a figure which shows the specific structure of the delay detector in Embodiment 2 of this invention. It is a figure which shows the structure of the signal wave source for radars concerning Embodiment 3 of this invention. It is a figure which shows the structure of the signal wave source for radars concerning Embodiment 4 of this invention. It is a figure which shows the structure of the conventional signal wave source for radars.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
Embodiment 1 FIG.
1 is a diagram showing the configuration of a radar signal wave source according to Embodiment 1 of the present invention.
The radar signal wave source is applied to a radar apparatus. As shown in FIG. 1, a control unit 1, a modulation control unit 2, a digital-analog converter (DAC) 3, a voltage controlled oscillator (VCO) 4, a frequency The detection circuit 5 includes a switch 6, a delay detector 7, a recording unit 8, a delay circuit 9, a comparator 10, and a coefficient processor 11.

  The control unit 1 generates an ideal chirp signal (a frequency-modulated reference continuous signal). This ideal chirp signal repeats an up-chirp signal and a down-chirp signal whose frequency monotonously increases. The ideal chirp signal generated by the control unit 1 is output to the modulation control unit 2, the delay detector 7 and the delay circuit 9.

The modulation control unit 2 provides frequency control information for controlling the frequency control voltage signal generated by the DAC 3 based on the ideal chirp signal from the control unit 1 and the correction value (correction time) for the VF characteristic of the VCO 4. Is to be generated. This frequency control information is a signal obtained by changing the output time of the frequency at which the ideal chirp signal fluctuates by the correction time. The modulation control unit 2 includes an LUT 21 that stores information (correction value information) indicating a correction value for the VF characteristic. The correction value information stored in the LUT 21 is updated by the coefficient processor 11. The frequency control information generated by the modulation control unit 2 is output to the DAC 3.
The control unit 1 and the modulation control unit 2 are executed by a program process using a CPU based on software.

  The DAC 3 generates a frequency control voltage signal for the VCO 4 in accordance with the frequency control information from the modulation control unit 2. The frequency control voltage signal generated by the DAC 3 is output to the VCO 4.

  The VCO 4 oscillates at a frequency corresponding to the frequency control voltage signal from the DAC 3 to generate a chirp signal (continuous signal). The chirp signal generated by the VCO 4 is used as a radar signal by the radar apparatus.

  The frequency detection circuit 5 detects a frequency (instantaneous frequency) from the chirp signal generated by the VCO 4. Information (frequency information) indicating the frequency detected by the frequency detection circuit 5 is output to the delay detector 7 or the comparator 10 via the switch 6.

  The switch 6 switches the output destination (the delay detector 7 side or the comparator 10 side) of the frequency information from the frequency detection circuit 5. Here, the switch 6 connects the frequency detection circuit 5 and the delay detector 7 when the radar signal source performs a calibration operation. On the other hand, when the radar signal wave source performs an operation, the frequency detection circuit 5 and the comparator 10 are connected. The switching control of the switch 6 is automatically performed by a switch control unit (not shown).

  The delay detector 7 detects a delay time (delay amount) from the frequency of the ideal chirp signal from the control unit 1 and the frequency indicated by the frequency information from the frequency detection circuit 5 via the switch 6. Details of the delay detector 7 will be described later. Information (delay time information) indicating the delay time detected by the delay detector 7 is output to the recording unit 8.

  The recording unit 8 is a memory such as a RAM that records the delay time information from the delay detector 7. The delay time information recorded in the recording unit 8 is read out by the delay circuit 9.

  The delay circuit 9 delays the ideal chirp signal from the control unit 1 by the delay time indicated by the delay time information read from the recording unit 8. The ideal chirp signal delayed by the delay circuit 9 is output to the comparator 10.

  The comparator 10 compares the frequency of the ideal chirp signal from the delay circuit 9 with the frequency indicated by the frequency information from the frequency detection circuit 5 via the switch 6, and detects the frequency difference. Information (frequency difference information) indicating the frequency difference detected by the comparator 10 is output to the coefficient processor 11.

  The coefficient processor 11 calculates a correction value (correction time) for the VF characteristic of the VCO 4 by dividing the frequency gradient of the ideal chirp signal from the frequency difference information from the comparator 10. That is, a correction value is calculated so that the frequency of the output signal from the VCO 4 is linear. Information (correction value information) indicating a correction value for the VF characteristic calculated by the coefficient processor 11 is output to the LUT 21 of the modulation control unit 2 and updated.

Next, details of the delay detector 7 will be described with reference to FIG.
As shown in FIG. 2, the delay detector 7 includes a plurality of delay circuits (internal delay circuits) 71, a plurality of correlators 72, and a delay time detector 73. In the example of FIG. 2, n delay circuits 71 and correlators 72 are provided, and suffixes (−1, −2,..., −n) are attached to the respective codes in order to distinguish them.

  The delay circuit 71 delays the ideal chirp signal from the control unit 1 by a specified delay amount. The delay amount of each delay circuit 71 is set to a different value. The ideal chirp signal delayed by the delay circuit 71 is output to the corresponding correlator 72.

  The correlator 72 is provided for each delay circuit 71 and performs a correlation operation between the frequency of the ideal chirp signal from the corresponding delay circuit 71 and the frequency indicated by the frequency information from the frequency detection circuit 5 via the switch 6. It is. Information indicating the correlation calculation result by the correlator 72 (correlation calculation information) is output to the delay time detection unit 73.

  The delay time detector 73 detects the delay amount of the delay circuit 71 having a large (usually maximum) correlation calculation information from each correlator 72 as a delay time. Information (delay time information) indicating the delay time detected by the delay time detection unit 73 is output to the recording unit 8.

Next, the operation of the radar signal source configured as described above will be described.
The operation of the radar signal wave source is divided into two operations, a calibration operation for calculating a correction value for the VF characteristic of the VCO 4 and an operation operation.

First, the calibration operation of the radar signal wave source will be described with reference to FIG.
In the radar signal wave source calibration operation, as shown in FIG. 3, first, the switch 6 connects the frequency detection circuit 5 and the delay detector 7 (step ST301).

  Next, the control unit 1 generates an ideal chirp signal, and the modulation control unit 2 generates frequency control information from the ideal chirp signal and a correction value for the VF characteristic of the VCO 4 (steps ST302 and 303).

  Next, the DAC 3 generates a frequency control voltage signal according to the frequency control information, and the VCO 4 generates a chirp signal by oscillating at a frequency corresponding to the frequency control voltage signal (steps ST304 and ST305). As a result, the VCO 4 generates a chirp signal whose frequency continuously changes.

  Next, the frequency detection circuit 5 detects a frequency (instantaneous frequency) from the chirp signal generated by the VCO 4 (step ST306). FIG. 4 shows an output example of the frequency detection circuit 5 in the calibration operation. In FIG. 4, the broken line indicates the time change of the frequency of the ideal chirp signal, and the solid line indicates the time change of the frequency of the VCO 4 output signal before correction of the VF characteristic detected by the frequency detection circuit 5. As shown in FIG. 4, before the correction of the VF characteristic, the nonlinearity of the VCO 4 is observed. Information (frequency information) indicating the frequency detected by the frequency detection circuit 5 is output to the delay detector 7 via the switch 6.

Here, the frequency fi of the ideal chirp signal generated by the control unit 1 is expressed by the following equation (1), where f0 is the frequency when the chirp is started, α is the slope of the frequency of the ideal chirp signal, and t is the time. Is done.
fi = f0 + αt (1)

Further, the frequency fm detected by the frequency detection circuit 5 includes nonlinearity of the VF characteristic of the VCO 4. Therefore, this frequency fm does not match the frequency fi of the ideal chirp signal. Further, when the delay time by the DAC 3, the VCO 4 and the frequency detection circuit 5 is χ, it can be expressed by the relationship of the following equation (2).
fm≈f0 + α (t + χ) (2)

  As described above, there is a delay time χ between the frequency indicated by the frequency information detected by the frequency detection circuit 5 and the frequency of the ideal chirp signal.

  Therefore, the delay detector 7 detects the delay time χ from the frequency of the ideal chirp signal from the control unit 1 and the frequency indicated by the frequency information from the frequency detection circuit 5 via the switch 6 (step ST307). . At this time, in the delay detector 7, each delay circuit 71 delays the ideal chirp signal by a prescribed delay amount, and each correlator 72 detects the frequency and frequency detection of the ideal chirp signal delayed by the corresponding delay circuit 71. Correlation with the frequency indicated by the frequency information from the circuit 5 is performed. Then, the delay time detection unit 73 detects the delay amount of the delay circuit 71 in which the correlation calculation result from each correlator 72 becomes large (usually maximum) as the delay time. Information (delay time information) indicating the delay time detected by the delay time detection unit 73 is output to the recording unit 8 and recorded.

By the above calibration operation, a delay amount corresponding to the delay time χ by the DAC 3, the VCO 4 and the frequency detection circuit 5 can be obtained.
This calibration operation is performed periodically.

Next, the operation of the radar signal wave source will be described with reference to FIG.
In the operation operation of the radar signal wave source, as shown in FIG. 5, first, the switch 6 connects the frequency detection circuit 5 and the comparator 10 (step ST501).

  Next, the control unit 1 generates an ideal chirp signal, and the modulation control unit 2 generates frequency control information from the ideal chirp signal and a correction value for the VF characteristic of the VCO 4 (steps ST502 and 503).

  Next, the DAC 3 generates a frequency control voltage signal according to the frequency control information, and the VCO 4 generates a chirp signal by oscillating at a frequency corresponding to the frequency control voltage signal (steps ST504 and 505). As a result, the VCO 4 outputs a chirp signal whose frequency continuously changes as a radar signal.

  Next, the frequency detection circuit 5 detects a frequency (instantaneous frequency) from the chirp signal generated by the VCO 4 (step ST506). Information (frequency information) indicating the frequency detected by the frequency detection circuit 5 is output to the comparator 10 via the switch 6.

On the other hand, the delay circuit 9 delays the ideal chirp signal from the control unit 1 by the delay time indicated by the delay time information read from the recording unit 8 (step ST507). At this time, the frequency fi of the ideal chirp signal delayed by the delay time τk output from the delay circuit 9 is expressed by the following equation (3). Thereby, it will be in the state substantially synchronized with the frequency fm which the frequency information from the frequency detection circuit 5 shows.
fi = f0 + α (t + τk) (3)

  Next, the comparator 10 compares the ideal chirp signal from the delay circuit 9 with the frequency indicated by the frequency information from the frequency detection circuit 5 via the switch 6, and detects the frequency difference Δf (step ST508).

  Next, the coefficient processor 11 calculates the correction value (correction time) for the VF characteristic of the VCO 4 by dividing the frequency indicated by the frequency difference information from the comparator 10 by the frequency gradient α of the ideal chirp signal (step ST509). ). The correction value information recorded in the LUT 21 of the modulation control unit 2 is updated with information indicating the correction value for the VF characteristic calculated by the coefficient processor 11 (correction value information).

  As described above, by periodically performing the calibration operation, the delay time existing between the frequency detected by the frequency detection circuit 5 and the frequency of the ideal chirp signal is periodically measured, and the correction value of the VF characteristic is calculated. Can be used for calculation. In other words, even when the delay time caused by the DAC 3, the VCO 4 and the frequency detection circuit 5 fluctuates, the correction can be performed with high accuracy. In addition, since closed loop control is not used, VCO 4 can be tracked even with a high-speed chirp signal, and linearity of VCO 4 can be compensated. Thus, the radar signal source of the present invention is useful for a radar signal source that discretely sweeps frequencies based on the LUT 21 and is suitable for correcting the linearity of the VCO 4.

  As described above, according to the first embodiment, the frequency detection circuit 5 that detects the frequency of the chirp signal generated by the VCO 4 and the frequency and frequency detection circuit 5 that detect the frequency of the ideal chirp signal during the calibration operation. A delay detector 7 for detecting a delay time from the generated frequency, a delay circuit 9 for delaying the frequency of the ideal chirp signal by the delay time detected by the delay detector 7 during operation, and a delay by the delay circuit 9 A comparator 10 for detecting the frequency difference between the frequency of the ideal chirp signal and the frequency of the chirp signal detected by the frequency detection circuit 5, and a correction value for the VF characteristic of the VCO 4 from the frequency difference detected by the comparator 10. The frequency control voltage signal is controlled based on the coefficient processor 11 to be calculated, the ideal chirp signal, and the correction value calculated by the coefficient processor 11. Since there is provided a that modulation control unit 2 is capable of high-speed modulation to the conventional configuration, also, it is possible to accurately compensate even if there is a variation in the delay of the detection circuit.

Embodiment 2. FIG.
In the first embodiment, as shown in FIG. 2, the delay detector 7 detects the delay time by a plurality of correlation calculation processes. On the other hand, in the second embodiment, as shown in FIG. 6, the delay detector 7 detects a delay time by peak detection.

FIG. 6 is a diagram showing the configuration of the delay detector 7 in the second embodiment of the present invention.
The delay detector 7 according to the second embodiment includes peak hold circuits 74 and 75 and a comparator (internal comparator) 76 as shown in FIG.

  The peak hold circuit 74 detects the time during which the frequency of the ideal chirp signal from the control unit 1 is high (usually the maximum value) during the measurement period. Information (peak time information) indicating the time when the frequency detected by the peak hold circuit 74 becomes high is output to the comparator 76.

  The peak hold circuit 75 detects the time during which the frequency indicated by the frequency information from the frequency detection circuit 5 via the switch 6 is high (usually the maximum value) during the measurement period. Information (peak time information) indicating the time when the frequency detected by the peak hold circuit 75 has increased is output to the comparator 76.

  The comparator 76 compares the time indicated by the peak time information from the peak hold circuits 74 and 75 and detects the time difference as a delay time. Information (delay time information) indicating the delay time detected by the comparator 76 is output to the recording unit 8 and recorded.

In the calibration operation of the radar signal wave source according to the second embodiment, the peak hold circuit 74 of the delay detector 7 increases the frequency of the ideal chirp signal from the control unit 1 during the measurement period (usually maximum). Time). At this time, frequency measurement is started from a predetermined timing, and the measured frequency is compared with the stored frequency. When an ideal chirp signal exceeding the stored frequency is detected, the frequency of the ideal chirp signal and the time at that time are updated at that timing. Then, the measurement is finished after a certain period of time, and the time from the time when the measurement is started to the time when the frequency becomes high is detected.
Similarly, the peak hold circuit 75 also detects the time when the frequency indicated by the frequency information from the frequency detection circuit 5 via the switch 6 is high (usually the maximum value).
Then, the comparator 76 detects a time difference detected by the peak hold circuits 74 and 75 as a delay time.

  As described above, in the second embodiment, since the delay detector 7 is configured to detect the delay time by peak detection, in addition to the same as in the first embodiment, the peak detection has a larger number of calculations than the correlation calculation. Since there are few, it can comprise with simpler hardware.

Embodiment 3 FIG.
FIG. 7 is a diagram showing a configuration of a radar signal wave source according to the third embodiment of the present invention. The radar signal source according to the third embodiment shown in FIG. 7 is obtained by removing the switch 6 and the delay detector 7 from the radar signal source according to the first embodiment shown in FIG. And a delay difference detector 12, a differentiator 13, a switch control unit 14, a switch 15 and a delay circuit 16 are added. Other configurations are the same, and only the different parts are described with the same reference numerals.

  The switch 6b switches the output destination of the correction value information from the coefficient processor 11 (on the modulation control unit 2 side or the delay detector 7b side). Here, the switch 6b connects the coefficient processor 11 and the delay detector 7b when the radar signal source performs a calibration operation. On the other hand, when the radar signal wave source performs an operation, the coefficient processor 11 and the modulation control unit 2 are connected. The switching control of the switch 6b is automatically performed by a switch control unit (not shown).

  The delay detector 7b detects the delay time from the correction value indicated by the correction value information from the coefficient processor 11 via the switch 6b. At this time, the delay detector 7b detects the delay time by distinguishing between the case of the chirp signal being an up-chirp signal and the case of a down-chirp signal based on the differential information from the differentiator 13. Information indicating the delay time in the case of the up-chirp signal detected by the delay detector 7b (first delay time information) and information indicating the delay time in the case of the down-chirp signal (second delay time information) are recorded. Is output to the unit 8.

The recording unit 8 is a memory that records the first and second delay time information from the delay detector 7 b and the delay difference information from the delay difference detector 12. The first delay time information recorded in the recording unit 8 is read by the delay circuit 9, and the delay difference information is read by the delay circuit 16.
The delay circuit 9 sets the delay amount to 0 when the radar signal wave source performs the calibration operation.

  The delay difference detector 12 detects a delay time difference obtained by subtracting the first delay time from the second delay time read from the recording unit 8. Information (delay time difference information) indicating the delay time difference detected by the delay difference detector 12 is output to the recording unit 8.

  The differentiator 13 differentiates the ideal chirp signal from the delay circuit 9 and detects its increase or decrease. Thereby, it can be detected whether the ideal chirp signal is an up-chirp signal or a down-chirp signal. Information indicating the result of differentiation by the differentiator 13 (differential information) is output to the switch control unit 14 and the delay detector 7b.

  The switch control unit 14 controls switching of the switch 15. Here, the switch control unit 14 controls switching of the switch 15 so that the delay circuit 9 and the comparator 10 are connected when the radar signal wave source performs the calibration operation. Further, when the radar signal wave source performs an operation, if the differential information from the differentiator 13 indicates an up-chirp signal, the switch 15 connects the delay circuit 9 and the comparator 10 to each other. Controls switching. On the other hand, when the differential information indicates a down chirp signal, the switching of the switch 15 is controlled so that the delay circuit 9 and the delay circuit 16 are connected.

  The switch 15 switches the output destination (the comparator 10 side or the delay circuit 16 side) of the ideal chirp signal from the delay circuit 9. The switch 15 switches the path according to the control by the switch control unit 14.

  The delay circuit 16 delays the ideal chirp signal from the delay circuit 9 via the switch 15 by the delay time difference indicated by the delay time difference information read from the recording unit 8. The ideal chirp signal delayed by the delay circuit 16 is output to the comparator 10.

  In the configuration shown in FIG. 7, the differentiator 13 detects increase / decrease in the ideal chirp signal delayed by the delay circuit 9. This is because if the delay time is switched by switching the increase / decrease of the ideal chirp signal during operation, the delay time cannot be compensated correctly, and the delay time must be switched by switching the increase / decrease after the compensation delay. Because.

Next, the operation of the radar signal source configured as described above will be described focusing on the differences from the operation of the first embodiment.
First, the calibration operation of the radar signal wave source will be described.
In this case, first, the switch 15 connects the delay circuit 9 and the comparator 10. The delay amount of the delay circuit 9 is set to zero. The switch 6 b connects the coefficient processor 11 and the delay detector 7.

When the chirp signal is an up-chirp signal, the coefficient processor 11 divides the frequency difference Δf detected by the comparator 10 by the frequency gradient α of the ideal chirp signal, and corrects the VF characteristics of the VCO 4 at each time. (Correction time) τm (t) is calculated.
Next, the delay detector 7b performs an averaging process on the correction value τm (t) to detect the delay time τk. First delay time information indicating the delay time τk in the up-chirp signal is recorded in the recording unit 8.

Similarly, when the chirp signal is a down chirp signal, the coefficient processor 11 divides the frequency difference Δf detected by the comparator 10 by the slope α of the frequency of the ideal chirp signal, and the VF of the VCO 4 at each time point. A correction value τm ′ (t) for the characteristic is calculated.
Next, the delay detector 7b performs an averaging process on the correction value τm ′ (t) to detect the delay time τk ′. Second delay time information indicating the delay time τk ′ in the down chirp signal is recorded in the recording unit 8.

Here, when the delay times generated in the DAC 3, the VCO 4, and the frequency detection circuit 5 are different between the up-chirp signal and the down-chirp signal (that is, when there is hysteresis), compensation for this difference is also necessary. Therefore, the delay difference detector 12 detects a delay time difference Δτk obtained by subtracting the delay time τk in the up-chirp signal from the delay time τk ′ in the down-chirp signal from the following equation (4). Information (delay time difference information) indicating the delay time difference detected by the delay difference detector 12 is recorded in the recording unit 8.
Δτk = τ′k−τk (4)

Next, the operation of the radar signal source will be described.
In this case, the delay circuit 9 sets the delay time τk in the up chirp signal recorded in the recording unit 8 as a delay amount. The delay circuit 16 sets the delay time difference Δτk recorded in the recording unit 8 as a delay amount. If the delay time τk for the up-chirp signal is longer than the delay time τ′k for the down-chirp signal, the set delay for the delay circuit 16 is set to a negative number.

The delay circuit 9 delays the ideal chirp signal from the control unit 1 by the delay time τk.
Next, the differentiator 13 differentiates the ideal chirp signal from the delay circuit 9 to detect the increase / decrease, and the switch control unit 14 controls switching of the switch 15 from this differentiation information. Here, when the sign of the differentiation result of the ideal chirp signal is positive (in the case of an up-chirp signal), the switch control unit 14 controls switching of the switch 15 so as to connect the delay circuit 9 and the comparator 10. To do.

  On the other hand, when the sign of the differentiation result of the ideal chirp signal is negative (in the case of a down chirp signal), the switch control unit 14 controls switching of the switch 15 so as to connect the delay circuit 9 and the delay circuit 16. . As a result, in the case of the down chirp signal, the delay circuit 16 further delays the delay time difference Δτk. Thereby, the hysteresis can be compensated.

  As described above, according to the third embodiment, the delay detector 7b distinguishes between the case of the up-chirp signal and the down-chirp signal and detects the delay time. In the case of the down chirp signal, the delay circuits 9 and 16 are used to delay the down chirp signal. In addition to the effects of the first embodiment, the up chirp signal and the down chirp signal have different delay times. In addition, the delay time can be compensated. As a result, the output frequency of the VCO 4 can be accurately compensated.

Embodiment 4 FIG.
FIG. 8 is a diagram showing a configuration of a radar signal wave source according to Embodiment 4 of the present invention. In the radar signal source according to the fourth embodiment shown in FIG. 8, the switch 6 is removed from the radar signal source according to the first embodiment shown in FIG. 1, and the terminator 17, the switch controller 18 and the switch 19 are replaced. It is added. The delay detector 7 is connected between the frequency detection circuit 5 and the comparator 10. Other configurations are the same, and only the different parts are described with the same reference numerals.

The terminator 17 terminates the input signal.
The switch control unit 18 controls switching of the switch 19. Here, the switch control unit 18 controls switching of the switch 19 in synchronization with the cycle of the ideal chirp signal. In FIG. 8, the period of the ideal chirp signal is detected via the delay detector 7.
The switch 19 switches the output destination (external or terminator 17 side) of the chirp signal (radar signal) from the VCO 4. The switch 19 switches the path according to the control by the switch control unit 18. The switch 19 can automatically switch the operation of the radar signal wave source to the calibration operation or the operation operation.

Next, the operation of the radar signal source configured as described above will be described.
First, the calibration operation of the radar signal wave source will be described.
In this case, the switch 19 connects the VCO 4 and the terminator 17. Other operations are the same as those in the first embodiment, and the delay detector 7 can detect the delay time generated in the DAC 3, the VCO 4 and the frequency detection circuit 5 by the correlation calculation process.

  Note that the ideal chirp signal is periodically output from the control unit 1, and the switch 19 switches to the connection between the VCO 4 and the connection line to the outside at the timing when the first delay time update process is completed. Thereby, the radar signal wave source can be shifted to the operation state.

The operation operation is the same as that of the first embodiment. In the comparator 10, the frequency indicated by the frequency information from the frequency detection circuit 5 is compared with the frequency of the ideal chirp signal from the delay circuit 9, and the frequency difference is output. Is done. Then, the coefficient processor 11 calculates correction data for the VF characteristic based on this frequency difference.
Further, the delay detector 7 updates the delay time for each period of the chirp signal and causes the recording unit 8 to record it. The delay time set by the delay circuit 9 is updated every period.

  As described above, according to the fourth embodiment, the switch 19 is provided for switching the path so that the output signal from the VCO 4 is output to the outside or the terminator 17 for each period of the ideal chirp signal. In addition to the effect of 1, the delay time generated in the DAC 3, the VCO 4 and the frequency detection circuit 5 can be updated at any time. As a result, the VF characteristic can be corrected without being affected even when a change due to a temperature change or the like of the external environment occurs.

  In the present invention, within the scope of the invention, any combination of the embodiments, or any modification of any component in each embodiment, or omission of any component in each embodiment is possible. .

  DESCRIPTION OF SYMBOLS 1 Control part, 2 Modulation control part, 3 Digital analog converter (DAC), 4 Voltage control oscillator (VCO), 5 Frequency detection circuit, 6, 6b, 15, 19 Switch, 7, 7b Delay detector, 8 Recording part , 9 delay circuit, 10 comparator, 11 coefficient processor, 12 delay difference detector, 13 differentiator, 14, 18 switch control unit, 16 delay circuit, 17 terminator, 21 LUT, 71 delay circuit (internal delay circuit) , 72 Correlator, 73 Delay time detector, 74, 75 Peak hold circuit, 76 Comparator (internal comparator).

Claims (5)

A voltage controlled oscillator for generating a continuous signal oscillates at a frequency corresponding to the input voltage signal,
A frequency detection circuit for detecting the frequency of the continuous signal generated by the voltage control oscillator,
A delay detector for detecting a delay time from the frequency of the reference continuous signal and the frequency of the continuous signal detected by the frequency detection circuit during the calibration operation;
A delay circuit that delays the frequency of the reference continuous signal by a delay time detected by the delay detector during an operation operation;
A comparator for detecting a frequency difference between the frequency of the reference continuous signal delayed by the delay circuit and the frequency of the continuous signal detected by the frequency detection circuit;
From the frequency difference detected by the comparator, and a coefficient processor for calculating a correction value for the voltage frequency characteristic of the voltage control oscillator,
A radar signal wave source comprising: a modulation control unit that controls the voltage signal based on the reference continuous signal and the correction value calculated by the coefficient processor. The delay detector is
A plurality of internal delay circuits for delaying the frequency of the reference continuous signal by different delay amounts;
A plurality of correlators that are provided for each of the internal delay circuits and perform a correlation operation between the frequency of the reference continuous signal delayed by the corresponding internal delay circuit and the frequency of the continuous signal detected by the frequency detection circuit; ,
The radar signal source according to claim 1, further comprising: a delay time detection unit that detects a delay amount of the internal delay circuit having a large correlation calculation result by the correlator as the delay time. The delay detector is
A first peak hold circuit for detecting a time during which the frequency of the reference continuous signal is increased within a measurement period;
A second peak hold circuit for detecting a time during which the frequency of the continuous signal detected by the frequency detection circuit is increased within the measurement period;
The radar according to claim 1, further comprising: an internal comparator that detects a difference between a time detected by the first peak hold circuit and a time detected by the second peak hold circuit as the delay time. Signal source. A terminator that terminates the input signal;
The electrostatic pressure output destination of the generated continuous signal by controlled oscillator by switching the external or terminator, radar signals according to claim 1, further comprising a switch for switching the calibration operation and the operational behavior Wave source. A voltage controlled oscillator for generating a continuous signal oscillates at a frequency corresponding to the input voltage signal,
A frequency detection circuit for detecting the frequency of the continuous signal generated by the voltage control oscillator,
A comparator that detects a frequency difference between the frequency of the reference continuous signal and the frequency of the continuous signal detected by the frequency detection circuit;
From the frequency difference detected by the comparator, and a coefficient processor for calculating a correction value for the voltage frequency characteristic of the voltage control oscillator,
A differentiator for differentiating the frequency of the reference continuous signal;
A delay detector for detecting a delay time from the correction value calculated by the coefficient processor for each positive / negative sign of the differential result by the differentiator during the calibration operation;
A delay difference detector that detects a delay time difference by subtracting a delay time when the sign is positive from a delay time when the sign is negative, based on a detection result by the delay detector;
A delay circuit that delays the reference continuous signal input to the comparator during an operation by a delay time corresponding to a case where the sign detected by the delay detector is positive;
When the sign of the differentiation result by the differentiator is negative during operation, the reference continuous signal delayed by the delay circuit and input to the comparator is the delay time difference detected by the delay difference detector. A radar signal wave source comprising: a second delay circuit that delays only by a second delay circuit.

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