JP6310348B2 - COMMUNICATION DEVICE AND METHOD FOR CONTROLLING COMMUNICATION DEVICE - Google Patents

Description

  The present invention relates to a communication device.

  As background art in this technical field, there are JP 2010-147804 A (Patent Document 1), JP 2010-86009 A (Patent Document 2), and JP 2012-203640 A (Patent Document 3).

  In Patent Document 1, in a transmission device that is implemented by combining a plurality of units packaged for each function, a log obtained by logging unit status information is displayed when a failure occurs in the transmission device. The transmission apparatus includes a nonvolatile recording unit that sequentially records so that it can be used for analysis. However, the status information shall include at least one of the following information: mounting status of unit, status of communication line connected to transmission device, alarm generation status of unit or transmission device, and setting status of unit or transmission device. It is disclosed.

  In Patent Document 2, in a storage device, when a microprocessor detects a power supply abnormality, at least part of management information stored in an SDRAM (Synchronous Dynamic Random Access Memory) (logical / physical conversion table in a logical / physical conversion table). (Difference information with the conversion table) is written as logical / physical conversion table difference information into the MRAM (Magnetorative Random Access Memory), which is a non-volatile memory capable of high-speed writing, and at the time of recovery of the SDRAM, if necessary, It is disclosed that the management information stored in the SDRAM is corrected using the management information written in the MRAM.

  In Patent Literature 3, an information processing apparatus manages a virtual machine that operates on the own apparatus or another apparatus. The information processing apparatus compares one or more files used for the operation of the virtual machine with one or more template files. It is disclosed that the information processing apparatus generates configuration information indicating the setting state of the virtual machine based on the comparison result between the file and the template file.

JP 2010-147804 A JP 2010-86009 A JP 2012-203640 A

  Patent Document 1 discloses a transmission apparatus having a non-volatile recording unit that sequentially records, that is, isolation of a failure factor, so that it can be used for failure cause analysis. However, Patent Document 1 does not consider restarting the transmission apparatus when an alarm such as loss of clock synchronization or instantaneous power interruption occurs.

  Patent Document 2 discloses a storage device that corrects the management information of the SDRAM using the management information written in the MRAM when the device is restarted, that is, the writing of information from the nonvolatile memory to the volatile memory when the device is restarted. ing. However, Patent Document 2 does not disclose a blocking method for isolating a failure factor at the time of restarting the apparatus and preventing the separated configuration information from being applied to the apparatus again.

  In Patent Document 3, a file system that is updated in accordance with a setting change of a virtual machine or the like is stored in a nonvolatile storage device, and a virtual machine is restarted by using the saved file system, that is, in a server, It discloses the writing of information from a non-volatile memory to a volatile memory when the apparatus is restarted. However, Patent Document 3 discloses that a file system used by a virtual machine is only stored in a non-volatile storage device when it is set in accordance with the setting change of the virtual machine, and there is a problem in the file system. It is not assumed that the element is separated when the element to be caused is included.

  On the other hand, if the collected log is not recorded from the volatile device to the non-volatile device, the log recorded in the volatile device will be lost when the power is shut off. In order to record a large number of logs, it is necessary to use a high-speed and highly durable nonvolatile device.

  For this reason, configuration information (failure factor) that is considered to be a cause of failure at a level that requires device restart by recording configuration information beyond the level desired by the device administrator from the volatile device to the nonvolatile device. Is not described in any cited document as block information for preventing the communication device from being applied to the communication device after restarting. Even if these prior arts are combined, it is impossible to conceive of improving availability and fault tolerance by the communication device having the above-described configuration.

A typical example of the invention disclosed in the present application is as follows. That is, a communication device that transmits and receives packets, and includes a transfer control unit that determines a transfer destination of the packet, and a control unit that controls the transfer control unit, and the control unit is configured to set the transfer control unit And a first processor that monitors the state of each unit, a volatile memory that is accessed by the first processor, and a nonvolatile memory that is accessed by the first processor, and the transfer control unit and wherein the control unit is set operating parameters in accordance with the setting information, the first processor, the log information indicating the state of the setting information and the respective portions the Ru is set in the transfer control unit and the control unit, the setting information and the stored in the volatile memory after the log information is generated, when a failure in the control unit is detected, the volatile memory fault information of the control unit that the detected Stores information on the failure of the control unit that conforms to a first predetermined condition in the nonvolatile memory, and reads all or part of the setting information and the log information from the volatile memory at a predetermined timing. After storing the non-volatile memory and restarting the control unit, when the detected control unit failure occurs, the setting information stored in the non-volatile memory causes a failure of the control unit Generating the definition information for not applying the setting information determined to be the factor causing the failure of the control unit to the communication device again, and generating the non-volatile memory or the volatile stored in the memory, the out of the setting information stored in the nonvolatile memory, an information of the previous time from the setting information causing the detected failure of the control unit, corresponding to the definition information With no information, it sets the control unit.

  According to the exemplary embodiment of the present invention, the availability and fault tolerance of a communication device can be improved. Problems, configurations, and effects other than those described above will become apparent from the description of the following embodiments.

It is a block diagram which shows the structure of the communication apparatus of the Example of this invention. It is a figure which shows the example of allocation of the memory area of DRAM. It is a figure which shows the user interface for changing the hardware error level of a failure. It is a sequence diagram of starting operation of a C-Plane module. It is a sequence diagram of the operation | movement which adds a configuration information and collects a log. It is a figure which shows the example of the data recorded on a log recording area. It is a figure which shows the example of the data recorded on a non-volatile memory. It is a flowchart of the process which accesses a log recording area. It is a flowchart of the restart process of a C-Plane module. It is a restart sequence of the C-Plane module. It is a figure which shows the example of the data recorded on a critical filter area | region. It is a flowchart of the restart process of a D-Plane module.

  Embodiments of the present invention will be described below with reference to the drawings.

  In the following description, in order to facilitate comparison with the prior art, a communication device 10 that mainly relays a packet on a communication network (receives a packet flowing through the communication network and determines a route of the received packet) (FIG. 1). The case where the present invention is applied will be described. However, as long as the effects of the present invention are achieved, the type of device and packet to be applied are not limited thereto.

  FIG. 1 is a block diagram showing a configuration of a communication device 10 according to an embodiment of the present invention.

  The communication apparatus 10 includes a C-Plane module 200, a D-Plane module 300, a plurality of NIF (Network Interface) modules 400-1 to 400-N, and a power supply module 80.

  The C-Plane module 200 is a module that mainly performs control processing. Specifically, the C-Plane module 200 is a routing protocol for exchanging information about a communication network with other communication devices (for example, OSPF (Open Shortest Path First). ), BGP (Border Gateway Protocol), and control of the apparatus itself. The D-Plane module 300 is a module that mainly performs transfer processing. Specifically, the D-Plane module 300 searches for transmission destination lines of packets received by the NIF modules 400-1 to 400-N. The NIF modules 400-1 to 400-N transmit and receive packets transmitted through line I / Fs (Interfaces) 410-1 to 410-N that are accommodated lines. Each of the C-Plane module 200 and the D-Plane module 300 includes a plurality of elements (components or devices).

  A management terminal 90 operated by an administrator of the communication device 10 is connected to the management interface 210 of the communication device 10 via a signal line.

  The elements constituting the C-Plane module 200 will be described. The C-Plane module 200 includes a management interface 210, a C-Plane CPU (Central Processing Unit) 220, a boot ROM (Read Only Memory) 230, a non-volatile storage device A240, and a DRAM (Dynamic Random Access Memory) 260. A non-volatile memory 270 and a Bridge 250 that connects each component on the C-Plane module 200.

  The management interface 210 is an interface connected to the management terminal 90 and the power supply module 80, and can monitor the power supplied from the power supply module 80. The C-Plane CPU 220 executes control of the device itself and creation of a packet transfer database necessary for the communication device 10 using a routing protocol. Further, the C-Plane CPU 220 monitors the state of each module of the communication device 10 and the presence / absence of a failure. The boot ROM 230 stores a BIOS (Basic Input / Output System) 2301. It is appropriate to use a rewritable EEPROM (Electrically Erasable Programmable Read-Only Memory) as the boot ROM 230. The BIOS 2301 is a program that controls the communication device 10 immediately after the C-Plane module 200 is started and until the C-Plane CPU 220 controls the communication device 10. Diagnose and start OS (Operating System). Note that the activation of the OS may be executed by the C-Plane CPU 220 that has been controlled by the communication device 10. Further, the BIOS 2301 may be executed by the C-Plane CPU 220. The BIOS 2301 and the C-Plane CPU 220 are control units (processors) that control the communication device 10.

  The nonvolatile storage device A240 holds default setting parameters related to the OS and the communication device 10. The DRAM 260 holds data necessary for controlling the communication device 10. The nonvolatile memory 270 is a storage device that can store data (for example, an operation log of the device) even when power is not supplied to the communication device 10. The non-volatile memory 270 may be a non-volatile device that can be accessed at high speed, such as MRAM (magnetoresistance memory), and does not need to be aware of the lifetime due to the number of writes. When using a nonvolatile device with a relatively low access speed (for example, a NAND flash memory), when data periodically stored in the DRAM 260 is copied to the nonvolatile memory 270, a recording omission due to insufficient bandwidth is prevented. Good.

  The nonvolatile memory 270 may be soldered to the C-Plane module 200 or may be detachably attached using a socket. When the nonvolatile memory 270 is detachable, a log stored in the nonvolatile memory 270 removed from the communication device 10 may be read to analyze the failure content.

  As shown in FIG. 2, the storage area of the DRAM 260 is divided into various configuration storage areas 2603, a free area 2604, a log recording area 2602, and a critical filter (critical filter) area 2601.

  Various configuration storage areas 2603 hold various settings necessary for the operation of the communication apparatus 10. The log recording area 2602 records various logs collected during the operation of the communication apparatus 10. The critical filter area 2601 holds settings for preventing application of settings that hinder the operation of the communication apparatus 10. The free area 2604 is used for recording other data.

  Since the area in the DRAM 260 is divided, it is necessary to set an offset for each area in the addresses shown in FIGS. The reason why the DRAM 260 is used in the C-Plane module 200 is that the DRAM requires a refresh process for periodically charging the memory cells, but the access bandwidth and the capacity unit price are balanced. This is because priority.

  The elements that make up the D-Plane module 300 will be described. The D-Plane module 300 includes a D-Plane CPU 310, a nonvolatile storage device B 320, a routing controller 330, a routing memory 340, a buffer controller 350, a buffer memory ( Buffer Memory) 360.

  In response to an instruction from the C-Plane CPU 220, the D-Plane CPU 310 sets operating conditions and the like for various components in the NIF 400 and the D-Plane module 300. Further, the state (log information) of the D-Plane module 300 and NIF 400 is acquired, and the presence / absence of a failure (failure information) is monitored. The D-Plane CPU 310 notifies the C-Plane CPU 220 of log information and failure information via the Bridge 250. The C-Plane CPU 220 that has received the notification stores it in each storage unit. Note that the D-Plane CPU 310 may store log information and failure information directly in the DRAM 260 or the nonvolatile memory 270 via the Bridge 250. In this case, the D-Plane CPU 310 may notify the C-Plane CPU 220 of storage of log information and failure information, or the C-Plane CPU 220 repeatedly (for example, periodically) the DRAM 260 and the nonvolatile memory 270. , The log information and the failure information may be stored, and the log information and the failure information may be acquired.

  The nonvolatile storage device B320 stores default setting parameters related to various components in the D-Plane module 300. The routing controller 330 searches the transmission destination of the received packet in response to the request from the buffer controller 350. The routing memory 340 holds transmission destination information (route table) corresponding to the destination of the received packet. The buffer controller 350 controls packet input / output of the buffer memory 360, extracts header information of the received packet, and requests the routing controller 330 to search for a transmission destination. The buffer memory 360 temporarily stores the packet until the transmission destination of the packet received by the communication device 10 is determined.

  So far, the components (also referred to as devices) constituting the communication apparatus 10 have been described. Hereinafter, failures of these components (hardware failures) will be described. Hardware (sometimes expressed as H / W) failures can be broadly classified into three categories.

  The first is “attention level failure”, which does not require restart of the NIF 400, the C-Plane module 200, and the D-Plane module 300, and the failure portion can be repaired or left unattended. is there. In the communication apparatus 10 according to the present embodiment, the parity error of the routing memory 340, the buffer memory 360, and the DRAM 260 is applicable. The attention level failure is referred to as “hardware error level 1”. Hereinafter, the attention level disorder may be referred to as “level 1”.

  The second is a “warning level failure” in which the NIF 400, the C-Plane module 200, or the D-Plane module 300 needs to be restarted but does not require replacement. In the communication apparatus 10 according to the present embodiment, an ECC (Error Correction Coding) error of the routing memory 340 and the DRAM 260 is applicable. The warning level failure is referred to as “hardware error level 2”. Hereinafter, the warning level failure may be referred to as “level 2”.

  The third is a “severe level failure” in which the NIF 400, the C-Plane module 200, or the D-Plane module 300 itself is replaced, or the NIF 400, the C-Plane module 200, the D-Plane module 300, or the communication device 10. This is a level that requires replacement of the components (including the power supply module 80). In the communication apparatus 10 according to the present embodiment, a failure of the power supply module 80 (including a decrease in supply power) and various memory failures are applicable. The severe level failure is called “hardware error level 3”. Hereinafter, the severe level failure may be referred to as “level 3”.

  When a hardware failure occurs, a log is recorded in the log recording area 2602 in the DRAM 260 (see FIG. 6). For “attention level failure” and “warning level failure”, the user interface shown in FIG. 3 may be used to change the hardware error level.

  FIG. 3 is a diagram showing a user interface for changing the hardware error level of a failure.

  As shown in FIG. 3, the user interface includes radio buttons for selecting whether to record level 1 hardware faults in non-volatile memory 270. The user interface also includes radio buttons for selecting whether each hardware error is set to level 1 or level 2 for each type of hardware error. For example, in the illustrated example, the error level can be set for the parity error of the buffer memory 360, the parity error of the routing memory 340, the ECC error of the routing memory 340, the parity error of the DRAM 260, and the ECC error of the DRAM 260. The user interface also includes a radio button for selecting whether to record a log of regular work (for example, DRAM refresh) in the nonvolatile memory 270.

  The contents set by the user interface in FIG. 3 are recorded in various configuration storage areas 2603.

  Next, an outline of the operation of the C-Plane module 200 after the communication device 10 is powered on will be described.

  FIG. 4 is a sequence diagram of the activation operation of the C-Plane module 200.

When the communication apparatus 10 is powered on, the BIOS 2301 activated by the C-Plane CPU 220 loads initialization parameters (setting information for initial setting) necessary for operating each component of each module from the boot ROM 230. Then, set each component and initialize each component. Then, the BIOS 2301 activates the apparatus diagnosis program and diagnoses the presence or absence of a failure in the apparatus configuration device (steps S201-1A to S201-NA, steps S201-1B to S201-NB). For example, the BIOS 2301 transmits a health check message to the nonvolatile storage device A240 (step S201-1A). When the nonvolatile memory device A240 receives the health check message from the BIOS 2301, the nonvolatile memory device A240 transmits a response message if there is no abnormality in the operation (step S201-1B). Similarly, the BIOS 2301 transmits a health check message to the DRAM 260, the nonvolatile memory 270, the D-Plane CPU 310, and the NIF 400, and receives a response message from each device constituent device . The BIOS 2301 also performs a health check of the C-Plane CPU 220 (Step 201-NA, Step 201-NB).

If the health check response message is returned from all the device configuration devices as a result of the diagnosis, the failure of the device configuration device is not detected, so the BIOS 2301 reads the OS stored in the nonvolatile storage device A240 (step S202 ). Is instructed to start the D-Plane module 300 that transfers the packet (step S204). When the D-Plane CPU 310 receives an activation instruction from the BIOS 2301, it activates the D-Plane module 300.

  When the activation of the OS is completed, the C-Plane CPU 220 represents default setting parameters (specific information for each device configuration component) (default configuration value, default configuration information, default configuration, or default config) in the DRAM 260. May be set) (step S205). Similarly, the C-Plane CPU 220 sets a default configuration value in other components (for example, the nonvolatile memory 270) constituting the C-Plane module 200.

  Further, after starting the routing protocol, the C-Plane CPU 220 generates a control packet addressed to another communication device and transmits it from the NIF 400 (step S206A). When the C-Plane CPU 220 receives a packet transmitted from the NIF 400 from another communication device (step S206B), the C-Plane CPU 220 performs route calculation using a routing protocol, and then sends a parameter setting instruction to the routing memory 340 and a parameter to be set to D- The Plane CPU 310 is notified (step S207).

As described above, in the startup sequence of the C-Plane module 200, the BIOS 2301 (C-Plane CPU 220) performs processing until the OS startup is completed, and the processing after the OS startup is completed is step S202. The read OS (C-Plane CPU 220) performs.

  Next, an outline of the operation of the D-Plane module 300 after the communication apparatus 10 is powered on will be described.

  When the D-Plane CPU 310 receives the activation instruction from the BIOS 2301 (step S204 in FIG. 4), the D-Plane CPU 310 executes the activation sequence of components (for example, the routing controller 330, the routing memory 340, etc.) and the NIF 400 that constitute the D-Plane module 300. Initialization processing is performed.

  Thereafter, the D-Plane CPU 310 reads setting values to be set for each component from the nonvolatile storage device B320. The D-Plane CPU 310 sets the setting value read from the non-volatile storage device B320 as a default configuration value in each component 330, 340 or the like of the D-Plane module 300 or the NIF 400. This setting is performed to control the components 330 and 340 and the NIF 400. After setting the components constituting the D-Plane module 300 and the default configuration values of the NIF 400, the components constituting the D-Plane module 300 can set various parameters and arbitrary configuration values. Control packets addressed to other communication devices can be transmitted.

  In addition, when the D-Plane CPU 310 receives a parameter setting instruction to the routing memory 340 in step S207 and a parameter to be set (step S207 in FIG. 4), the D-Plane CPU 310 writes the received parameter in the routing memory 340 and constructs a routing table. .

  Next, packet relaying by the communication device 10 after the activation sequence (see FIG. 4) of each module is completed will be described.

  In general packet transmission / reception in the communication apparatus 10, media conversion (for example, photoelectric conversion) is performed on the packets received by the line I / Fs 410-1 to 410-N by the line I / Fs 410-1 to 410-N. Are output to the buffer controller 350 from the line I / Fs 410-1 to 410-N.

  The buffer controller 350 extracts a packet header from the received packet, outputs the packet header to the routing controller 330, and stores the received packet in the buffer memory 360.

  The routing controller 330 generates a search key for searching a database configured in the routing memory 340 based on the input header information, and an entry corresponding to the search key is stored in the database in the routing memory 340. Find out what has been done. If the corresponding entry is stored as a result of the search, transmission destination line information included in the entry is acquired. Thereafter, the routing controller 330 outputs an identifier indicating that the database search is completed and the acquired transmission destination line information to the buffer controller 350.

  Based on the destination line information input from the routing controller 330, the buffer controller 350 converts the packet stored in the buffer memory 360 to the line I / Fs 410-1 to 410-N corresponding to the destination line information. Output to either.

  When the line I / Fs 410-1 to 410-N receive a packet from the buffer controller 350, the line I / Fs 410-1 to 410-N perform media conversion (for example, electro-optic conversion) and then transmit the packet from the accommodation line.

  In the communication device 10, in addition to the above-described default configuration value, the device administrator uses the user interface to perform arbitrary configuration information (configuration value, configuration, configuration, configuration, or , Config, or configuration information or config information). In this embodiment, the above-described default configuration value applied until the start sequence of each module is completed, configuration information that can be added as needed, and a log in the communication device 10 are stored in a volatile device (for example, DRAM 260). ). Further, a part of information held in the volatile device is recorded in a nonvolatile device (for example, the nonvolatile memory 270) at a predetermined timing.

  Next, an example of collecting configuration information and logs that can be added at any time in the communication apparatus 10 after the startup sequence of each module (see FIG. 4) is completed will be described.

  FIG. 5 is a sequence diagram of operations for adding configuration information and collecting logs.

  The timing of starting the activation sequence of each module is assumed to be time T0. In FIG. 5, the above-described default configuration information is omitted for simplification of description.

  When the device administrator uses the management terminal 90 and inputs arbitrary configuration information from the command line user interface (CLI) after time T0, the C-Plane CPU 220 stores the input configuration information in the log in the DRAM 260. Conversion into a format for recording in the recording area 2602 (conversion rules are incorporated in the OS). The C-Plane CPU 220 records the converted information together with time information or the like as log data (log information) in the log recording area 2602 in the DRAM 260 (step S601-1). For example, the configuration information input from the management terminal 90 may be addition of a user to the communication device 10.

  The C-Plane CPU 220 records a part of the data held in the log recording area 2602 in the nonvolatile memory 270 at a predetermined timing (for example, every predetermined period that can be changed to a desired value by the apparatus administrator). Recording and holding of data stored in the log recording area 2602 and the nonvolatile memory 270 of the DRAM 260 will be described later. Note that the predetermined timing can be set by the device administrator, such as 1 μs (microseconds) or 1 ms (milliseconds), using config.

  In FIG. 5, the C-Plane CPU 220 displays the log data recorded in the log recording area 2602 at time T0 ′ (T0 ≦ T0 ′ <T1) at a timing (time T1) when a predetermined period has passed from time T0. Reading (step S611-1), when there is information to be copied to the nonvolatile memory 270, the information is copied to the nonvolatile memory 270 (step S612-1). That is, the log data recorded in the log recording area 2602 between time T0 and time T1 (T0 ≦ T <T1) is copied to the nonvolatile memory 270. Hereinafter, a predetermined cycle to be copied to the nonvolatile memory 270 is referred to as a time interval. The time interval represents an interval in which log data to be copied to the nonvolatile memory 270 is recorded in a predetermined cycle in the log data in the log recording area 2602.

  In the section from time T1 to time T2, the C-Plane CPU 220 logs execution of DRAM refresh (charge of charge to the memory cells in the DRAM), which is a regular operation, at time T1 ′ (T1 ≦ T1 ′ <T2). Recording is performed in the log recording area 2602 (step S621).

  At a timing (time T2) when a predetermined period has elapsed from time T1, the C-Plane CPU 220 reads the log data recorded in the log recording area 2602 at time T1 ′ (step S611-2), and stores it in the nonvolatile memory 270. If there is information to be copied, the information is copied to the nonvolatile memory 270 (step S612-2). That is, of the log information recorded in the log recording area 2602 between time T1 and time T2 (T1 ≦ T <T2), log data to be copied to the nonvolatile memory 270 is copied to the nonvolatile memory 270 at time T2. In this embodiment, since the event that occurred at time T1 'is a regular operation, the log data is not copied to the nonvolatile memory 270 (based on the setting in FIG. 3).

  In the interval from time T2 to T3, the communication device 10 receives a packet to be transferred (step S630), and when the routing controller 330 accesses the routing memory 340 and performs a route search (steps S631, S632), the time T2 ′. In (T2 ≦ T2 ′ <T3), a parity error in the routing memory 340 was detected. The routing controller 330 transmits the parity error in the routing memory 340 to the C-Plane CPU 220 via the D-Plane CPU 310 (step S633), and the C-Plane CPU 220 receives the parity error notification from the D-Plane CPU 310. The log is recorded in the log recording area 2602 and the nonvolatile memory 270 of the DRAM 260 (steps S634 and S635).

  Even at the timing (time T3) when a predetermined period has passed from time T2, the C-Plane CPU 220 reads the log data recorded in the log recording area 2602 at time T2 ′ (step S611-3), and the nonvolatile memory If there is information to be copied to the 270, the information is copied to the nonvolatile memory 270 (step S612-3). That is, of the log information recorded in the log recording area 2602 between time T2 and time T3 (T2 ≦ T <T3), log data to be copied to the nonvolatile memory 270 is copied to the nonvolatile memory 270 at time T3. At this time, among the log data recorded in the log recording area 2602, log data already stored in the nonvolatile memory 270 need not be copied to the nonvolatile memory 270.

  In the section from time T3 to T4, when configuration information for the communication device 10 is input from the CLI at time T3 ′ (T3 ≦ T3 ′ <T4) (same as step S601-1), the C-Plane CPU 220 The inputted configuration information is converted and recorded in the log recording area 2602 in the DRAM 260 together with time information and the like (step S601-2). The configuration information input in step S601-2 is power suppression for the communication device 10. For this reason, the C-Plane CPU 220 instructs the power supply module 80 to reduce the supply power.

  Thereafter, the management interface 210 detects a decrease in the power supply of the power supply module 80 at time T3 ″ and transmits it to the C-Plane CPU 220 (step S691). The C-Plane CPU 220 determines that the H / W failure has occurred and the DRAM 260 Log is recorded in the log recording area 2602 and the nonvolatile memory 270 (steps S692 and S693).

  Even at a timing (time T4) when a predetermined period has passed since time T3, the log data recorded in the log recording area 2602 at time T3 ′ and time T3 ″ is read (step S611-4) and copied to the nonvolatile memory 270. If there is power information, it is copied to the nonvolatile memory 270 (step S612-4), that is, among the log information recorded in the log recording area 2602 between time T3 and time T4 (T3 ≦ T <T4), Log data to be copied to the nonvolatile memory 270 is copied to the nonvolatile memory 270 at time T4.

  At this time, among the log data recorded in the log recording area 2602, log data already stored in the nonvolatile memory 270 need not be copied to the nonvolatile memory 270.

  Next, a data format recorded in the log recording area 2602 in the DRAM 260 will be described.

  FIG. 6 is a diagram showing an example of data recorded in the log recording area 2602 in the DRAM 260. In FIG. 6, the data recorded in the log recording area 2602 is described in a table format. However, these data are not necessarily represented by a table structure, but are represented by other data structures (list, queue, etc.). May be.

  The log recording area 2602 includes an address 26021, a time 26022, a detection site (Source / Detector) 26023, a type (Type) 26024, a factor (Factor) 26025, and a hardware error level 26026.

  The address 26021 is an address in the DRAM 260, and the start address of the log recording area 2602 is the offset in FIG. Time 26022 is the time when the log was collected. The detection site 26023 is a place where a log is generated or detected. The type 26024 is a log type, and includes, for example, an input configuration, a regular work, a hardware error, and the like. The factor 26025 is the content of the operation and action recorded as a log. The hardware error level 26026 is an identifier assigned by classifying hardware faults.

  FIG. 7 is a diagram illustrating an example of data recorded in the nonvolatile memory 270. In FIG. 7, data recorded in the nonvolatile memory 270 is described in a table format. However, these data are not necessarily represented by a table structure, but are represented by other data structures (list, queue, etc.). Also good.

  The nonvolatile memory 270 includes an address 2701, a time 2702, a detection part (Source / Detector) 2703, a type (Type) 2704, a factor (Factor) 2705, and a hardware error level 2706.

  An address 2701 is an address in the nonvolatile memory 270. The time 2702, detection part 2703, type 2704, factor 2705, and hardware error level 2706 record the same information as the time 26022, detection part 26023, type 26024, factor 26025, and hardware error level 26026 in the log recording area 2602, respectively. To do.

  Next, the timing at which logs are recorded in the log recording area 2602 will be described. The code | symbol attached | subjected to the right side in FIG. 6 respond | corresponds to the step of FIG.

  The log whose address is offset + 0 records that a command for adding a user to the communication apparatus 10 is input from the CLI of the management terminal 90 at time T0 'in step S601-1 in FIG. Since this log is caused by command input, the hardware error level 26026 is 0. Since only a bit string can be stored in the log recording area 2602 of FIG. 6, before the C-Plane CPU 220 writes a log to the DRAM 260, it is converted into a value in each item (type 26024, factor 26025, etc.).

  In the log whose address is offset + 1, it is recorded that DRAM refresh, which is a routine operation, is performed on the DRAM 260 at time T1 'in step S621 in FIG. Since this log is due to regular work, the hardware error level 26026 is zero.

  In the log whose address is offset + 2, the detection of the parity error in the routing memory 340 is recorded at time T2 'in step S634 of FIG. Although this log is caused by a hardware error, the hardware error level 26026 is 1 according to the setting by the user interface (see FIG. 3).

  The log whose address is offset + 3 records that a command for suppressing the power consumption of the communication apparatus 10 is input from the CLI of the management terminal 90 at time T3 ′ in step S601-2 of FIG. . Since this log is caused by command input, the hardware error level 26026 is 0.

  In the log whose address is offset + 4, it is recorded in step S692 of FIG. 5 that a decrease in the power supply of the power supply module 80 is detected by the management interface 210 at time T3 ″. Therefore, the hardware error level 26026 is 3.

  Next, the timing when the log is recorded in the nonvolatile memory 270 will be described. Reference numerals on the right side in FIG. 7 correspond to the steps in FIG.

The log whose address is 0 corresponds to the log whose log recording area 2602 has the address offset + 0. In step S601-1 of FIG. 5, the log for adding a user to the communication apparatus 10 from the CLI of the management terminal 90 at time T0 ′. It is a record that a command has been entered. This log is read from the DRAM 260 in step S611-1 of FIG. 5, and written in the nonvolatile memory 270 in step S612-1.

The log whose address is 1 corresponds to the log whose address in the log recording area 2602 is offset + 2. In step S634 in FIG. 5, the detection of the parity error in the routing memory 340 is recorded at time T2 ′. This log has a hardware error level 26026 of 1, but since the setting for recording in the nonvolatile memory at the H / W failure level 1 is applied in the user interface of FIG. 3, it is also written in the nonvolatile memory 270 in step S635. (Details will be described later).

The log with the address 2 corresponds to the log with the address of the log recording area 2602 being offset + 3, and the power consumption of the communication device 10 is suppressed from the CLI of the management terminal 90 at time T3 ′ in step S601-2 of FIG. It is recorded that the command for the purpose was input. This log is read from the DRAM 260 in step S611-4 of FIG. 5, and written in the nonvolatile memory 270 in step S612-4.

The log with the address 3 corresponds to the log with the address of the log recording area 2602 being offset + 4. In step S692 in FIG. 5, the management interface 210 detects that the supply power of the power supply module 80 is reduced at time T3 ″. Since the hardware error level 26026 is 3, this log is also written in the nonvolatile memory 270 in step S693.

  FIG. 8 is a flowchart of processing for accessing the log recording area 2602 in the DRAM 260.

  After the activation sequence of each module in the communication device 10 ends (time T0, step S701), the C-Plane CPU 220 determines whether various configurations are input from the CLI (step S702). If no configuration has been input (NO in step S702), the process proceeds to step S704. On the other hand, when the configuration is input (YES in step S702), the C-Plane CPU 220 converts the input configuration into a format for recording in the log recording area 2602 (see FIG. 6) and records the log. Recording is performed in the area 2602 (step S703). In the example of step S601-1 in FIG. 5, the time 26022 is T0 ′, the detection part 26023 is the CLI that is the input I / F, the type 26024 is the config, the factor 26025 is the contents of the configuration (for example, user addition), hardware Recording is performed using an identifier indicating that the error level 26026 is 0. The rule for conversion to this identifier is incorporated in the OS.

  Thereafter, the C-Plane CPU 220 determines whether a regular work that is periodically executed in the communication apparatus 10 is being executed (step S704). If the regular work has not been executed (NO in step S704), the process proceeds to step S706. On the other hand, if the regular work is being executed (YES in step S704), the C-Plane CPU 220 converts the work content into a format for recording in the log recording area 2602 (see FIG. 6), as in step S703. Then, it is recorded in the log recording area 2602 (step S705). In the example of step S621 in FIG. 5, the time 26022 is T1 ′, the detection site 26023 is the C-Plane CPU that is the trigger source, the type 26024 is regular work, the factor 26025 is DRAM refresh, and the hardware error level 26026 is 0. It records using the identifier which shows.

  Thereafter, it is determined whether a hardware failure has occurred in the communication device 10 (step S706). If no hardware error has occurred (NO in step S706), the process advances to step S710. On the other hand, if a hardware error has occurred as in steps S633 and S691 in FIG. 5 (YES in step S706), the level of hardware failure is determined according to the setting by the user interface (see FIG. 3) (step S706). S707). When the level of the hardware failure is 2 or more (YES in step S707), the content of the hardware failure is converted into a format for recording in the log recording area 2602 (see FIG. 6), and the log recording area 2602 To record. Further, it is converted into a format for recording in the nonvolatile memory 270 (see FIG. 7) and recorded in the nonvolatile memory 270 (step S709).

  In the example of step S634 in FIG. 5, the time 26022 is T2 ′, the detection part 26023 is the detection source, the type 26024 is the H / W error, the factor 26025 is the routing memory parity error, and the hardware error level 26026 is 1. It records using the identifier which shows that there exists.

  If the level of the hardware failure is less than 2, it is determined whether to record the hardware failure of the hardware error level 1 in the nonvolatile memory 270 (step S708). If it is set by the user interface (see FIG. 3) that the hardware failure of the hardware error level 1 is recorded in the nonvolatile memory 270 (YES in step S708), the process proceeds to step S709. On the other hand, when it is set not to record the hardware failure in the nonvolatile memory 270 (NO in step S708), the process proceeds to step S710.

  In the example of step S635 in FIG. 5, the time 26022 is T2 ′, the detection site 26023 is the detection source, the type 26024 is the H / W error, the factor 26025 is the routing memory parity error, and the hardware error level 26026 is 1. It records using the identifier which shows that there exists.

  Thereafter, it is determined whether the time has reached T1 (step S710). If the time is not T1 (NO in step S710), the process returns to step S702. On the other hand, when the time reaches T1 (YES in step S710), a configuration (command) log in which the detected part 26023 already recorded in the log recording area 2602 is input from the CLI is copied to the nonvolatile memory 270 (step S711). ). Here, a hardware failure log is recorded at T1 ′ (T1 ≦ T1 ′ <T2), and a configuration (command) log input from the CLI during the time interval (T0 ≦ T <T1) is collected. In this case, the recording order of the nonvolatile memory 270 may be rewritten so as to be in time series.

  Thereafter, it is determined whether or not a log of regular work is recorded in the nonvolatile memory 270 (step S712). If the user interface (see FIG. 3) is set not to record the log of the regular work in the nonvolatile memory 270 (NO in step S712), the process returns to step S702. On the other hand, when it is set to record the log of the regular work in the nonvolatile memory 270 (YES in step S712), the type 26024 reads the log of the regular work from the log recording area 2602 and copies it to the nonvolatile memory 270 (step). S713).

  Here, if a hardware failure log or a command log from the CLI is recorded at T1 ′ (T1 ≦ T1 ′ <T2) and a regular work log is recorded in the time interval (T0 ≦ T <T1), the nonvolatile memory The recording order of the memory 270 may be rewritten so as to be in time series.

  Through the above processing, log data as shown in FIG. 7 is stored in the nonvolatile memory 270.

  Next, a flowchart for restarting the C-Plane module 200 because a hardware failure has occurred in a component in the C-Plane module 200 will be described with reference to FIGS. Here, the restart and replacement of the C-Plane module 200 itself will be described as an example, but the C-Plane module 200 itself may be restarted and the components on the C-Plane module 200 may be replaced. Even when the components on the C-Plane module 200 are exchanged, the C-Plane module 200 itself is restarted at the time of exchange.

  First, when detecting a hardware failure, the C-Plane CPU 220 records a log (failure detection time, detected part, failure level) in the log recording area 2602 in the DRAM 260 (step S100), and then the C-Plane CPU 220 In accordance with the log recording rule described above, a log is also recorded in the nonvolatile memory 270 (step S101). The C-Plane CPU 220 executes the processing after S102 after S101, but executes the processing of FIG. 8 in parallel with the processing after S102.

  Next, the C-Plane CPU 220 determines whether or not the hardware (C-Plane module 200) needs to be restarted immediately (step S102). For example, a hardware failure with a hardware error level of 1 may be determined as not requiring restart, and a hardware failure with a hardware error level of 2 or 3 may be determined as requiring immediate restart. This restart determination criterion is implemented in the OS. The C-Plane CPU 220 makes a determination by comparing the restart determination criterion with the hardware level. Note that the interface shown in FIG. 3 is used for setting a hardware failure.

  If the restart is unnecessary (NO in step S102), the operation of the communication device 10 is continued (step S1021). On the other hand, when it is necessary to restart immediately (YES in step S102), the C-Plane CPU 220 determines whether or not hardware (C-Plane module 200) needs to be replaced (step S103). For example, it may be determined that a hardware failure with a hardware error level of 2 does not require replacement, and a hardware failure with a hardware error level of 3 determines that replacement is necessary. This replacement criterion is also implemented in the OS. The C-Plane CPU 220 determines by comparing the replacement determination standard with the hardware level.

  When the hardware (C-Plane module 200) needs to be replaced (YES in step S103), the C-Plane CPU 220 replaces the hardware (C-Plane module 200) including the failed component with respect to the device manager. Is sent to the console of the management terminal 90 (step S104). At this time, the hardware (C-Plane module 200) including the component that needs to be replaced is described in the message, and the serial number of the hardware (C-Plane module 200) including the component that needs to be replaced is recorded in the boot ROM 230. . Note that the recording of the serial number is not limited to the boot ROM 230 and may be a non-volatile recording unit.

  In step S104, the C-Plane CPU 220 outputs, for example, “C-Plane module needs to be replaced. Do you want to replace? Y / N” to the console of the management terminal 90 as a hardware replacement message. After outputting the hardware replacement message, the C-Plane CPU 220 enters a state of accepting an input from the management terminal 90 for the hardware replacement message (step S1040).

  If the input from the management terminal 90 for the hardware replacement message is “Y” (YES in step S1040), that is, if the administrator wishes to replace the hardware (C-Plane module 200), C-Plane. The CPU 220 stops the operation of the hardware (C-Plane module 200) and shifts the state of the hardware (C-Plane module 200) to a state where the administrator can replace the hardware (C-Plane module 200). . After replacing the hardware (C-Plane module 200), the BIOS 2301 of the new hardware (C-Plane module 200) accepts a restart instruction for restarting the hardware (C-Plane module 200) from the management terminal 90. (Step S1041).

  Thereafter, when the BIOS 2301 receives an instruction to restart the hardware (C-Plane module 200) from the management terminal 90 (YES in Step S1041), the BIOS 2301 restarts the hardware (C-Plane module 200). The BIOS 2301 loads initialization parameters (setting information for initial setting) necessary for operating each component of the C-Plane module 200 from the boot ROM 230, and sets each component (step S105).

  Further, when the input from the management terminal 90 for the hardware replacement message is “N” (NO in step S1040), the hardware (C-Plane module 200) restart instruction is not accepted from the management terminal 90 ( In step S1041, NO), the C-Plane CPU 220 jumps to step S1034 (step S1042) and continues the operation of the communication device 10 (step S1021).

  On the other hand, when the hardware (C-Plane module 200) need not be replaced (NO in step S103), the C-Plane CPU 220 restarts the hardware (C-Plane module 200). After that, the BIOS 2301 loads an initialization parameter (setting information for initial setting) from the boot ROM 230 after the startup diagnosis, and sets it in each component (step S1031).

After the restart, as described above, the BIOS 2301 started by the C-Plane CPU 220 starts the start diagnosis . Note that the BIOS 2301 also performs startup diagnosis of the C-Plane CPU 220 (steps S106 and S1032). Then , it is determined whether or not the hardware (C-Plane module 200) that has caused the restart has been replaced (steps S107 and S1033). For example, it can be determined by comparing the serial number of the installed hardware (C-Plane module 200) with the serial number recorded in the boot ROM 230 in step S104. Note that the hardware (C-Plane module 200) can be replaced while the communication device 10 is powered on.

  In step S107, when the hardware (C-Plane module 200) in which the failure is detected is not replaced (NO in step S107), the BIOS 2301 sets the value of the startup diagnosis number counter N to 0 (step S108). It is determined whether or not the value has reached the upper limit X of the number of activation diagnosis (step S109). The upper limit value X can be set by a device administrator using a user interface.

  When the value of N has reached the upper limit value X (YES in step S109), the BIOS 2301 determines that the hardware (the C-Plane module 200 or a component of the C-Plane module 200) cannot operate normally. Then, the hardware (C-Plane module 200 or a component of the C-Plane module 200) is ignored. Specifically, the config setting is not performed on the hardware (the C-Plane module 200 or the C-Plane module 200), and the hardware (C-Plane module 200 or C-Plane module 200) is not configured. It is output that an error has continuously occurred in the component (for example, an error lamp is lit) (step S1091).

  On the other hand, if the value of N has not reached the upper limit value X (NO in step S109), the BIOS 2301 indicates that a failure has occurred in the hardware (the C-Plane module 200 or a component of the C-Plane module 200). Is detected (step S110). If no failure is detected in the hardware (C-Plane module 200 or a component of the C-Plane module 200) (NO in step S110), the process jumps to step S1034 (step S1101). On the other hand, when a failure is detected in the hardware (C-Plane module 200 or a component of the C-Plane module 200) (YES in step S110), the BIOS 2301 notifies the device administrator of the hardware (C-Plane module). 200) The C-Plane CPU 220 is instructed to output a hardware failure detection message notifying that a failure has been detected to the management terminal 90 (step S111). Thereafter, the BIOS 2301 increases the value of N by 1 (step S112), restarts the hardware (C-Plane module 200), and loads the initialization parameter (setting information for initial setting) from the boot ROM 230. Then, each component is set (step S113).

On the other hand, when the hardware (C-Plane module 200) in which the failure is detected is not replaced in Step S1033 (NO in Step S1033), or a failure occurs on the hardware (C-Plane module 200) in Step S110. Is not detected (step S1101), the C-Plane CPU 220 determines whether or not the location where the hardware failure has occurred is the nonvolatile memory 270 (step S1034). If the location where the hardware failure has occurred is not the nonvolatile memory 270 (NO in step S1034), since reliable definition information (config) prior to the time interval where the failure occurred is stored in the nonvolatile memory 270, the C-Plane The CPU 220 accesses the non-volatile memory 270 and performs isolation so as not to cause each component to set a failure factor that is a config in the time interval when the failure occurs as a config. The failure factor is also referred to as a hardware error failure factor. When there are a plurality of configs in the time interval when the failure occurs, these failure factors are collectively referred to as a failure factor group. Then, the failure factor or the failure factor group is configured as a block definition in the critical filter region 2601 in the volatile memory 260 (step S1035). In addition, as long as it can be distinguished from other config as a block definition, you may comprise in other memory | storage parts, such as the non-volatile memory 270. FIG. Thereafter, the C-Plane CPU 220 refers to the non-volatile memory 270 and applies the config at the time before the time of the log data of the failure factor used for generating the block definition to the hardware (C-Plane module 200). That is, the C-Plane CPU 220 applies the configuration other than the block definition configured in step S1035 to the hardware (C-Plane module 200) (step S1036).

  Next, details of the processing from step S1031 to step S1036 will be described.

  FIG. 10 is a sequence diagram showing details of the processing from step S1031 to step S1036.

  As described above, when the hardware (C-Plane module 200) configuring the communication device 10 is restarted, the BIOS 2301 is required to operate each component on the C-Plane module 200 from the boot ROM 230. Load initialization parameters (setting information for initial settings) and set to each component. Then, the BIOS 2301 activates a device diagnosis program and diagnoses whether or not there is a failure in the device configuration device (nonvolatile storage device A240, C-Plane CPU220, DRAM260, nonvolatile memory 270, D-Plane CPU310, NIF400, etc.) (step S201). -1A to S201-NA, steps S201-1B to S201-NB).

  On the other hand, when the hardware (C-Plane module 200) is restarted in Step S1031 of FIG. 9 (Step S1031), the BIOS 2301 diagnoses whether there is a failure in the hardware (C-Plane module 200), as in Step S201. (Step S1032). When the hardware (C-Plane module 200) in which the failure is detected has not been replaced (NO in Step S1033), the C-Plane CPU 220 determines whether or not the location where the hardware failure has occurred is the nonvolatile memory 270. (Step S1034). If the location of the hardware failure is not the nonvolatile memory 270 (NO in step S1034), the C-Plane CPU 220 accesses the nonvolatile memory 270 and configures and configures a block definition for preventing the failure factor from being set as config. The block definition is stored in the critical filter area 2601 in the volatile memory 260 (step S1035).

  Specifically, the C-Plane CPU 220 sets a default config for the components of the communication device 10 in the various configuration storage areas 2603 in the DRAM 260 (step S210). Thereafter, the C-Plane CPU 220 refers to the nonvolatile memory 270, acquires the log data (including the hardware error failure factor) of FIG. 7 from the nonvolatile memory 270 (step S208-1), and stores the acquired log data in the DRAM 260. The failure factor is determined from the stored log data, and the determined failure factor is set as a block definition for the critical filter region 2601 in the DRAM 260 (step S208-2). The C-Plane CPU 220 refers to the nonvolatile memory 270, determines a failure factor from log data (including hardware error failure factor) stored in the nonvolatile memory 270, and determines the critical filter area 2601 in the DRAM 260. The determined failure factor may be set as a block definition (step S208-2).

  FIG. 11 is a diagram showing an example of data recorded in the critical filter area 2601 in the DRAM 260. In FIG. 11, data recorded in the critical filter area 2601 is described in a table format. However, these data are not necessarily represented by a table structure, but are represented by other data structures (list, queue, etc.). May be.

  The critical filter area 2601 includes an address 26011, a detection part (Source / Detector) 26013, a type (Type) 26014, and a factor (Factor) 26015.

  The address 26011 is an address in the DRAM 260, and the start address of the critical filter area 2601 is the offset in FIG. The detection part 26013, the type 26014, and the factor 26015 record the same information as the detection part 2703, the type 2704, and the factor of the nonvolatile memory 270, respectively.

  In addition, since it is only necessary to record the config of the time interval in which the failure occurs as a failure factor, FIG. 11 is not limited to the above, and the time at which the config of the time interval in which the failure occurred is recorded may be configured as a block definition element. Good.

  Specifically, in the critical filter area 2601 shown in FIG. 11, a time interval (T3 ≦ T <T4) in which a hardware failure (step S691 in FIG. 5) of a high level (hardware error level is 2 or more) occurs. The CLI command input (step S601-2 in FIG. 5) is determined to be a failure factor of a hardware error (for example, a decrease in supply power) that occurred at time T3 ″, and is set as a block definition in the critical filter area 2601. ing.

  A series of flow for setting a block definition will be described. The C-Plane CPU 220 refers to the log data copied from the log data in the nonvolatile memory 270 (FIG. 7) to the free area 2604 in the DRAM 260, and identifies the time 2702 when the hardware error level is equal to or higher than a predetermined level. Among the time intervals that are between the timings of storing log data in the nonvolatile memory 270, the time interval including the specified time is specified. Then, all entries having a config 2704 of the time 2702 included in the specified time section are specified, and the config of the specified entry is set as a failure factor or a failure factor group in the block definition.

  In the present embodiment, “T3 ″”, which is the time when a hardware failure having a hardware error level of 2 or more that needs to be restarted, is identified, and the time interval T3 ≦ T <T4 including “T3 ″” is identified. FIG. 11 shows the result of specifying the config whose address 2701 is “2”, which is the time included in the time interval T3 ≦ T <T4, and setting the information of the specified config in the block definition.

  Thereafter, the C-Plane CPU 220 refers to the nonvolatile memory 270, applies the config information before the time interval when the failure occurs to the hardware (C-Plane module 200) (step S1036), and shifts to the device operation phase. (S1074).

  Specifically, the C-Plane CPU 220 sets the block definition (step S208-2) and then uses the failure used to generate the block definition among the config information recorded in the nonvolatile memory 270 stored in the free area 2604. Refer to the config information at the time before the time (T3 ′) of the log data of the factor or before the time interval including the fault factor (step S209-1), and enter the configuration information into the various configuration storage areas 2603 in the DRAM 260. Is copied (step S209-2). Alternatively, after setting the block definition (step S208-2), the C-Plane CPU 220 configures all of the config information recorded in the nonvolatile memory 270 stored in the free area 2604 to various configuration storage areas 2603 in the DRAM 260. When copying information, referring to the critical filter area 2601, the config information described in the critical filter area 2601 is not copied to the various configuration storage areas 2603 as config information (step S209-2).

  After step S1036 is completed, the C-Plane CPU 220 shifts the communication device 10 to the normal operation phase (S1074). Thereafter, if necessary, the C-Plane CPU 220 may instruct the NIF 400 to start the routing protocol (Step S206), and may instruct the D-Plane CPU 310 to set parameters in the routing memory 340 (Step S207). .

  If it is determined in step S107 that the hardware (C-Plane module 200) in which the failure is detected is replaced (YES in step S107), the hardware (C-Plane in which the failure is detected in step S1033). If it is determined that the module 200) has been replaced (YES in step S1033), or if it is determined in step S1034 that the location where the hardware failure has occurred is the nonvolatile memory 270 (YES in step S1034), the nonvolatile memory The config information stored in the memory 270 may be incorrect. Therefore, the C-Plane CPU 220 outputs to the management terminal 90 a message in which various config information related to the communication device 10 after time T0 is not stored in the nonvolatile memory 270 (step S1071). Thereafter, the C-Plane CPU 220 reads various default config information related to the communication device 10 from the non-volatile storage device A240, applies the information to the replaced hardware (C-Plane module 200) (step S1072), and relates to the communication device 10. A message that prompts the user to set additional config information is output (step S1073). Thereafter, the apparatus operation phase is entered (S1074).

If the failed hardware is a removable component such as the non-volatile storage device A240 among the components on the C-Plane module 200, the process proceeds to step S1034 if YES in step S107 and YES in step S1033. You may jump. In other words, the power of the C-Plane module 200 may be appropriately turned off to replace the failed component, and the processes after step S1034 may be executed.

  In this case, the config information can be set with reference to the block definition even if hardware replacement is performed in units of removable components, so that the availability and fault tolerance of the communication device 10 can be improved.

  With reference to FIG. 12, a flowchart for restarting the D-Plane module 300 when a hardware failure occurs in a component in the D-Plane module 300 will be described. Here, the restart and replacement of the D-Plane module 300 itself will be described as an example, but the D-Plane module 300 itself may be restarted and the components on the D-Plane module 300 may be replaced. Even in the case of exchanging components on the D-Plane module 300, the D-Plane module 300 itself is restarted when exchanging.

  First, the C-Plane CPU 220 records the detected hardware failure in the log recording area 2602 (step S500). The processing of steps S500 to S503 is the same as the processing of S100 to S103 in FIG. Further, the process of step S5021 is the same as the process of step S1021 of FIG. Further, the processing in steps S508 to S513 after NO in step S507 is the same as the processing in steps S108 to S113 after NO in step S107 in FIG. Furthermore, the processing of steps S5035 to S5036 is the same as the processing of steps S1035 to S1036 of FIG.

  In step S504, the C-Plane CPU 220 outputs, for example, “D-Plane module needs to be replaced. Do you want to replace? Y / N” to the console of the management terminal 90 as a hardware replacement message. After outputting the hardware replacement message, the C-Plane CPU 220 is in a state of accepting an input from the management terminal 90 for the hardware replacement message (step S5040).

  If the input from the management terminal 90 for the hardware replacement message is “Y” (YES in step S5040), that is, if the administrator wishes to replace the hardware (D-Plane module 300), C-Plane. The CPU 220 stops the operation of the hardware (D-Plane module 300) and shifts the state of the hardware (D-Plane module 300) to a state in which the administrator can replace the hardware (D-Plane module 300). The instruction is transmitted to the D-Plane CPU 310. When the D-Plane CPU 310 receives an instruction to shift the hardware (D-Plane module 300) to a replaceable state from the C-Plane CPU 220, the D-Plane CPU 310 stops the operation of the hardware (D-Plane module 300), and the hardware The administrator shifts the state of the (D-Plane module 300) to a state where the hardware (D-Plane module 300) can be replaced. After the replacement of the hardware (D-Plane module 300), the BIOS 2301 of the C-Plane module 200 is in a state of accepting a restart instruction for restarting the hardware (D-Plane module 300) from the management terminal 90 (step S5041). ).

  Thereafter, when the BIOS 2301 receives an instruction to restart the hardware (D-Plane module 300) from the management terminal 90 (YES in step S5041), the BIOS 2301 restarts the hardware (D-Plane module 300). The BIOS 2301 loads initialization parameters (setting information for initial setting) necessary for operating each component of the D-Plane module 300 from the boot ROM 230, and sets each component (step S505).

  After the restart, the BIOS 2301 starts a startup diagnosis (step S506), and determines whether or not the hardware (D-Plane module 300) that caused the restart has been replaced (step S507). For example, it can be determined by comparing the serial number of the installed hardware (D-Plane module 300) with the serial number recorded in the boot ROM 230 in step S504. Note that the hardware (D-Plane module 300) can be replaced while the communication device 10 is powered on. Further, the processing of steps S5031 to S5032 is the same as the processing of S506 to S507.

  In step S507, as in step S107 of FIG. 9, the BIOS 2301 determines whether or not the hardware (D-Plane module 300) that caused the restart has been replaced, for example, the D-Plane module before and after the restart. Judge by comparing 300 serial numbers. In this case, the serial number of the D-Plane module 300 is not limited to the boot ROM 230, and may be recorded in any storage unit of the C-Plane module 200. When the hardware (D-Plane module 300) in which the failure is detected has not been replaced (NO in step S507), the process proceeds to step S508. On the other hand, if the hardware (D-Plane module 300) in which a failure is detected has been replaced (YES in step S507), the process proceeds to step S5035.

  In step S509, as in step S109 of FIG. 9, the BIOS 2301 determines whether or not the value of N has reached the upper limit value X of the number of startup diagnoses. If the value of N has reached the upper limit value X (YES in step S509), the D-Plane CPU 310 configures the fault location in the hardware (the D-Plane module 300 or a component of the D-Plane module 300). Is not set (step S5091), and the apparatus operation phase is entered (S5092).

  In step S510, as in step S110 of FIG. 9, the BIOS 2301 detects whether a failure has occurred in the hardware (component of the D-Plane module 300 or C-Plane module 200) (step S510). . If no failure is detected in the hardware (component of the D-Plane module 300 or C-Plane module 200) (NO in step S510), the process jumps to step S5035 (step S5101). On the other hand, when a failure is detected in hardware (component of the D-Plane module 300 or C-Plane module 200) (YES in step S510), the process proceeds to step S511.

  In step S5033, as in step S1033 of FIG. 9, the BIOS 2301 determines whether or not the hardware (D-Plane module 300) that caused the restart has been replaced, but the hardware in which the failure has been detected. Regardless of whether or not (D-Plane module 300) has been replaced, the process proceeds to step S5035.

  In step S5035, as in step S5035 of FIG. 9, the C-Plane CPU 220 accesses the non-volatile memory 270, and sets a block definition for preventing each component from being set as a fault factor in the config, and a critical filter area 2601 in the volatile memory 260. (Step S5035). The block definition may be configured in another storage unit such as the nonvolatile memory 270. Thereafter, the C-Plane CPU 220 refers to the non-volatile memory 270 and applies the config for the D-Plane module 300 before the time of the log data of the failure factor used for generating the block definition to the D-Plane module 300. The instruction is transmitted to the D-Plane CPU 310, and the D-Plane CPU 310 receives the instruction from the C-Plane CPU 220, and is for the D-Plane module 300 before the time of the log data of the failure factor used for generating the block definition. Is applied to the hardware (D-Plane module 300) (step S5036), and the apparatus operation phase is entered (S5092).

  As described above, regarding the process of restarting the D-Plane module 300 when a hardware failure has occurred in the component in the D-Plane module 300 (FIG. 12), a hardware failure has occurred in the component in the C-Plane module 200. The difference from the process of restarting the C-Plane module 200 (FIG. 9) is mainly described. This difference is due to the fact that the D-Plane module 300 does not have a nonvolatile memory. Therefore, the separation in step S1034 in FIG. 9 is not necessary, and steps S1071 to S1073 are not necessary.

  Further, in the D-Plane module 300, even if the config setting is performed on the component in which the failure has occurred, the component does not operate normally. Therefore, in the case of YES in step S509, the config setting on the component is not performed ( Step S5091). For example, when any of the ports of the line I / Fs 410-1 to 410-N has a failure, the operation of the communication device 10 can be continued if the config is not set to the failed port, that is, the failed port is blocked. In this case, communication is possible if there is a port that forms a link aggregation with a blocked port where the config setting is not performed.

  With the above configuration, a communication device (network node) 10 that can solve the above-described problems can be provided.

  As described above, according to the embodiment of the present invention, the configuration information (failure factor) causing the failure of the communication device 10 is isolated, and the block definition for preventing the communication device 10 from reflecting the failure factor is provided. Can be configured. For this reason, the availability and fault tolerance of the communication device are improved.

  Note that, in the method of duplicating the C-Plane module 200 not equipped with a non-volatile memory, log information cannot be held in the device when an unintended power interruption occurs, and it is difficult to identify and isolate setting information that causes a device failure. The above-mentioned problem cannot be solved.

  Further, setting information set in the NIF modules 400-1 to 400-N, the D-Plane module 300, and the C-Plane module 200 and log information indicating the state of the communication device 10 are stored in the DRAM 260 as needed. Information on the detected failure is stored in the DRAM 260, and the setting information and the log information satisfying a predetermined condition and the failure information are read from the DRAM 260 at a predetermined timing and stored in the nonvolatile memory 270. Then, the NIF modules 400-1 to 400-N, the D-Plane module 300, or the C-Plane module 200 are restarted, and the settings stored in the nonvolatile memory 270 before the setting information that causes the detected failure Since the information is used to set the NIF modules 400-1 to 400-N, the D-Plane module 300, or the C-Plane module 200, the state before the occurrence of the failure can be easily restored.

  Further, since log information that meets a predetermined condition is read from the DRAM 260 and stored in the nonvolatile memory 270, the log information stored in the nonvolatile memory 270 can be reduced, and the durability of the nonvolatile memory 270 is improved. However, the access speed of the nonvolatile memory 270 may be relatively slow, the required capacity of the nonvolatile memory 270 can be reduced, and the space for mounting the nonvolatile memory 270 can be reduced.

  Furthermore, since failure information that meets a predetermined condition is read from the DRAM 260 and stored in the nonvolatile memory 270, the failure information stored in the nonvolatile memory 270 can be reduced. It is easy to isolate the cause of failure. Further, the durability of the nonvolatile memory 270 is improved, the access speed of the nonvolatile memory 270 may be relatively slow, the required capacity of the nonvolatile memory 270 can be reduced, and the space for mounting the nonvolatile memory 270 is reduced. Can do.

  In addition, since the setting information that has been determined to be the cause of the failure is retained in the block definition so that it will not be applied to the communication device again, the same failure factor is not applied, preventing repeated failures. can do. For this reason, the stop time of a communication apparatus can be shortened and fault tolerance and availability can be improved.

  In addition, when the hardware in which a failure is detected is replaced, the replaced hardware is initialized using the setting information for initial setting, so that a minimum operation can be ensured.

  In addition, since an interface for setting a condition for determining whether or not to store failure information in the nonvolatile memory 270 is provided, the information stored in the nonvolatile memory 270 can be selected according to the user's desire.

  The present invention is not limited to the above-described embodiments, and includes various modifications and equivalent configurations within the scope of the appended claims. For example, the above-described embodiments have been described in detail for easy understanding of the present invention, and the present invention is not necessarily limited to those having all the configurations described. A part of the configuration of one embodiment may be replaced with the configuration of another embodiment. Moreover, you may add the structure of another Example to the structure of a certain Example. In addition, for a part of the configuration of each embodiment, another configuration may be added, deleted, or replaced.

  In addition, each of the above-described configurations, functions, processing units, processing means, etc. may be realized in hardware by designing a part or all of them, for example, with an integrated circuit, and the processor realizes each function. It may be realized by software by interpreting and executing the program to be executed.

  Information such as programs, tables, and files that realize each function can be stored in a storage device such as a memory, a hard disk, and an SSD (Solid State Drive), or a recording medium such as an IC card, an SD card, and a DVD.

  Further, the control lines and the information lines are those that are considered necessary for the explanation, and not all the control lines and the information lines that are necessary for the mounting are shown. In practice, it can be considered that almost all the components are connected to each other.

10 Communication Device 80 Power Supply 90 Management Terminal 200 C-Plane (Control System) Module 210 Management Interface 220 C-Plane CPU
230 Boot ROM
240 Nonvolatile memory device A
250 Bridge
260 DRAM
270 Non-volatile memory 300 D-Plane module 310 D-Plane CPU
320 Nonvolatile storage device B
330 Routing Controller 340 Routing Memory 350 Buffer Controller 360 Buffer Memory 400-1 to 400-N Network I / F Module 410-1 to 410-N Line Interface

Claims (10)

A communication device for transmitting and receiving packets,
A transfer control unit for determining a transfer destination of the packet;
A control unit for controlling the transfer control unit,
The control unit sets the transfer control unit and monitors a state of each unit, a volatile memory accessed by the first processor, and a non-volatile accessed by the first processor A memory, and
Operation parameters are set according to setting information in the transfer control unit and the control unit,
The first processor is
The log information indicating the state of the setting information and the respective portions the Ru is set in the transfer control unit and the control unit, and stored in the volatile memory after the setting information and the log information is generated,
If a fault is detected in the control unit, it stores information of the detected failure of the controller to the volatile memory, the non-fault information conforming the control unit to the first predetermined condition Store it in memory,
All or part of the setting information and the log information is read from the volatile memory at a predetermined timing, and stored in the nonvolatile memory.
After restarting the control unit, when the detected failure of the control unit occurs, the setting information stored in the non-volatile memory is determined to be a factor causing the failure of the control unit. ,
The setting information determined to be a factor causing the failure of the control unit, generating definition information not to be applied to the communication device again, and storing in the nonvolatile memory or the volatile memory,
Of the setting information stored in the nonvolatile memory, information that is information at a time prior to the detected setting information that causes the failure of the control unit , and information that does not correspond to the definition information , A communication apparatus that sets the control unit. The communication device according to claim 1,
The first processor is
When the log information is set to be stored in the nonvolatile memory, the log information is read from the volatile memory at a predetermined timing, and stored in the nonvolatile memory.
When the detected failure of the control unit conforms to the first predetermined condition, information on the failure of the control unit conforming to the first predetermined condition is read from the volatile memory at a predetermined timing, A communication device that is stored in a non-volatile memory.   The communication device according to claim 1,
  The first processor is
  Determine whether the controller has been replaced;
  When the control unit is replaced, the control unit is initialized using setting information for initial setting.   The communication device according to claim 2,
  The communication device according to claim 1, wherein the first processor provides an interface for setting whether to store the log information in the nonvolatile memory.   The communication device according to claim 1,
  The transfer control unit includes a second processor configured to set the transfer control unit in response to an instruction from the control unit,
  The second processor is
  When a failure is detected in the transfer control unit, the information of the detected failure of the transfer control unit is notified to the control unit,
  The first processor is
  Upon receiving information on the detected failure of the transfer control unit from the second processor, the information is stored in the nonvolatile memory,
  Restart the transfer controller,
  An instruction to set the transfer control unit is transmitted to the second processor by using setting information stored in the nonvolatile memory before the detected failure of the transfer control unit occurs. Communication device.   A method of controlling a communication device that transmits and receives packets,
  The communication apparatus includes a transfer control unit that determines a transfer destination of the packet, and a control unit that controls the transfer control unit,
  The control unit sets the transfer control unit and monitors a state of each unit, a volatile memory accessed by the first processor, and a non-volatile accessed by the first processor A memory, and
  Operation parameters are set according to setting information in the transfer control unit and the control unit,
  The method
  The first processor stores setting information set in the transfer control unit and the control unit and log information indicating a state of each unit in the volatile memory after the setting information and the log information are generated,
  When a failure is detected in the control unit, the first processor stores information on the detected failure of the control unit in the volatile memory, and the control unit conforms to a first predetermined condition Information of failure in the non-volatile memory,
  The first processor reads all or part of the setting information and the log information from the volatile memory at a predetermined timing, and stores it in the nonvolatile memory.
  After the first processor restarts the control unit, when the detected failure of the control unit occurs, the setting information stored in the nonvolatile memory is caused to cause the failure of the control unit. It was determined that
  The first processor generates definition information for not applying the setting information determined to be the cause of the failure of the control unit to the communication device again, and stores the definition information in the nonvolatile memory or the volatile memory. Store and
  The first processor is information at a time before setting information that causes the failure of the detected control unit among the setting information stored in the nonvolatile memory, and the definition information includes A method of setting the control unit using information that does not correspond.   The method of claim 6, comprising:
  When the log information is set to be stored in the nonvolatile memory, the first processor reads the log information from the volatile memory at a predetermined timing, stores the log information in the nonvolatile memory,
  When the detected failure of the control unit meets the first predetermined condition, the first processor sends information on the failure of the control unit that meets the first predetermined condition at a predetermined timing. Reading from the volatile memory and storing in the non-volatile memory.   The method of claim 6, comprising:
  The first processor is
  Determine whether the controller has been replaced;
  When the control unit is exchanged, the control unit is initialized using setting information for initial setting.   The method of claim 7, comprising:
  The method according to claim 1, wherein the first processor provides an interface for setting whether to store the log information in the nonvolatile memory.   The method of claim 9, comprising:
  The transfer control unit includes a second processor configured to set the transfer control unit in response to an instruction from the control unit,
  The second processor is
  When a failure is detected in the transfer control unit, information on the detected failure of the transfer control unit is stored in the nonvolatile memory,
  The first processor is
  Restart the transfer controller,
  The second processor is
  A method comprising: setting the transfer control unit using setting information stored in the non-volatile memory before a failure of the detected transfer control unit occurs.

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