JP6293612B2 - Vehicle control device - Google Patents

Description

  The present invention relates to a vehicle control device that controls a control target such as an internal combustion engine, a transmission, and an air conditioner mounted on a vehicle, and in particular, controls using a multi-core type arithmetic processing unit including a plurality of processor cores. The present invention relates to a control device that controls an object.

  Patent Document 1 discloses a control device that controls a control target mounted on a vehicle using a multi-core arithmetic processing unit including a plurality of processing units (processor cores). According to this apparatus, when the ignition switch is in the on state, all of the plurality of processing units are operated, and when the ignition switch is in the off state, only a part of the plurality of processing units is operated. When the processing load of the control device increases when the is in the off state, for example, when an external failure diagnosis process or a self-diagnosis process is performed, control is performed to increase the number of processing units to be operated.

  Patent Document 2 discloses a technique for preventing an erroneous notification of an event when an event is notified from one core included in a multi-core arithmetic processing unit to another core by an interrupt.

JP 2013-199180 A JP 2012-108786 A

  When it is necessary to rewrite a control program executed by each processor core of a multi-core arithmetic processing unit configured to include a plurality of processor cores, for example, control executed by a control unit that controls a control target mounted on a vehicle When a bug is found in a program or when improvements are made to improve control performance, a control program stored in a rewritable read-only memory (hereinafter simply referred to as “ROM”) Rewriting is performed by the device.

  Patent Documents 1 and 2 show a vehicle control device using a multi-core type arithmetic processing unit, but do not show a rewrite process of a control program stored in a ROM. In addition, Patent Document 1 describes that when the ignition switch is in an OFF state, a part of the plurality of processing units (cores) is not operated to reduce power consumption. When is in the on state, all the processing units are activated. Since the above-described control program rewriting process is normally executed with the ignition switch turned on, the apparatus disclosed in Patent Literature 1 does not perform control for reducing power consumption during the control program rewriting process.

  When rewriting a control program for a multi-core type arithmetic processing unit applied to a control device that controls the operation of an internal combustion engine mounted on a vehicle, the operation of the internal combustion engine cannot be continued, and power generation (battery charging) is not possible. Furthermore, recently, since the control content has become complicated, the time required for rewriting tends to increase. Therefore, it is required to execute the rewriting process of the control program with the ignition switch turned on, to reduce the power consumption during the rewriting process, and to shorten the rewriting process time.

  The configuration of the multi-core type arithmetic processing unit includes an asymmetric type configuration and a symmetric type configuration. In the multi-core type arithmetic processing unit having an asymmetric type configuration, a cache memory and a A ROM for storing the control program is provided. Therefore, when the control program of the multi-core arithmetic processing unit having an asymmetric type configuration is rewritten by an external device, a method that takes advantage of the configuration features can be applied.

  The present invention has been made in view of the above-described circumstances, and appropriately executes processing for rewriting a control program executed by a plurality of processor cores included in a multi-core arithmetic processing unit having an asymmetric configuration by an external device. An object of the present invention is to provide a vehicle control device capable of executing rewriting processing at a relatively high speed.

In order to achieve the above object, an invention according to claim 1 is a vehicle control device that controls a control object mounted on a vehicle using a multi-core arithmetic processing unit including a plurality of processor cores. The multi-core type arithmetic processing unit (11) corresponds to each of the plurality of processor cores (21 to 23) and the cache memory (31 to 33) provided corresponding to each of the plurality of processor cores (21 to 23). A rewritable read-only memory (41 to 43) that is provided and stores control programs executed by the plurality of processor cores, and a communication unit (54) that transmits and receives data to and from the external device (2). The multi-core arithmetic processing unit (11) sends a request for rewriting the control program from the external device via the communication unit. When received, the target processor core (any one of 21 to 23, for example, 22) that executes the control program that is the target of the rewrite request is stored in the corresponding read-only memory (for example, 42). A rewrite process of the control program is executed. In the rewrite process, rewrite data of the control program is received via the communication unit, and the received data is stored in the corresponding cache memory (for example, 32). Each time the rewritten data reaches a predetermined data amount (DW), a write process to the corresponding read-only memory (for example, 42) is executed, and the target processor core (for example, 22) executes the rewrite process is a Rukoto rested the operation of the processor core other than the target processor core (e.g., 21, 23) And butterflies.

According to this configuration, when the multi-core arithmetic processing unit receives a control program rewrite request from an external device via the communication unit, the multi-core arithmetic processing unit responds by the target processor core that executes the control program that is the target of the rewrite request. A rewrite process of the control program stored in the read-only memory is executed. In the rewrite process, rewrite data of the control program is received via the communication unit, and the received data is stored in the corresponding cache memory, Each time the stored rewrite data reaches a predetermined data amount, a write process to the corresponding read-only memory is executed. By using the cache memory as a buffer memory for temporarily storing rewrite data, the rewrite process can be performed at a relatively high speed, and the power consumption can be suppressed by shortening the rewrite process time. Further, during execution of the rewriting process, control is performed to stop the operation of the processor core that does not execute the rewriting process, so that power consumption can be suppressed.

The invention according to claim 2, in the vehicle control system according to claim 1, wherein the target processor core, by starting the rewriting processing program stored in the corresponding one of the read-only memory, the rewrite processing And the control program stored in the storage area other than the storage area in which the rewrite processing program is stored in the corresponding read-only memory is rewritten.

  According to this configuration, by starting the rewrite processing program stored in the read-only memory corresponding to the target processor core, the rewrite processing is executed, and the rewrite processing program of the corresponding read-only memory is stored. The control program stored in the storage area other than the storage area is rewritten. Since the rewrite processing program stored in the corresponding read-only memory is activated to execute the rewrite processing, for example, the process of copying and reactivating the rewrite processing program to the cache memory becomes unnecessary, and is required for rewriting. Additional processing can be simplified. Also, even if the ignition switch is turned off or the battery voltage drops during rewrite processing, or if a communication error occurs, the rewrite processing program stored in the corresponding read-only memory will not be lost. Therefore, if the power supply voltage or the communication abnormality is restored normally, the rewriting process can be executed again. Furthermore, since the rewriting process is executed even when the multi-core arithmetic processing unit is restarted, a processor core unnecessary for the rewriting process can be immediately stopped.

It is a block diagram which shows the structure of the control apparatus for vehicles concerning one Embodiment of this invention. FIG. 2 is a block diagram illustrating a configuration of a multi-core arithmetic processing unit (MCU) illustrated in FIG. 1. It is a block diagram which shows the structure of MCU shown in FIG. It is a time chart for demonstrating the process which rewrites the control program of MCU which has an asymmetrical structure with an external device. 5 is a flowchart of normal control executed by each core constituting the MCU corresponding to the operation example shown in FIG. 4 and event processing executed by a specific core. 5 is a flowchart of a rewrite request handling process corresponding to the operation example of FIG. It is a flowchart of the rewrite mode transition process performed by the process of FIG. It is a flowchart of the rewriting monitoring process performed by the process of FIG. It is a flowchart of the process which performs the reception of the data for rewriting performed by the processor core which uses rewriting object ROM. It is a flowchart of the process which performs writing of the data for rewriting to ROM. It is a block diagram which shows the modification of the structure shown in FIG.

Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a block diagram showing the configuration of a vehicle control apparatus according to an embodiment of the present invention. This control apparatus is a multi-core type that controls an internal combustion engine, a transmission, an air conditioner and the like mounted on a vehicle 1. Arithmetic processing units (hereinafter referred to as “MCU”) 11 to 14 and a bus 3 for connecting them to each other are provided. The bus 3 is configured to be connectable to the external device 2 via the data link connector 4. The external device 2 is used to rewrite a control program stored in a ROM (Read Only Memory) of the MCUs 11 to 14, a control device including the MCUs 11 to 14, an internal combustion engine, a transmission target, and various types used for control. Diagnose failures of sensors and actuators (hereinafter referred to as “control system” as a whole). Any of the ROMs included in the MCUs 11 to 14 can rewrite the stored contents.

  FIG. 2 is a block diagram showing the configuration of the MCU 11. The MCU 11 includes three processor cores (hereinafter simply referred to as “core”) 21 to 23, a cache memory (hereinafter referred to as “CAM”) 31 used by the core 21, and a core. ROM 41 and bus 55 for storing the control program executed by 21 and CAM 32 used by the core 22, ROM 42 and bus 56 for storing the control program executed by the core 22, CAM 33 and core 23 used by the core 23 ROM 43 for storing a control program to be executed, bus 57, inter-core communication unit 51 functioning as an interface that mediates communication between the three cores, shared memory 52 usable by cores 21 to 23, control system Input / output unit 53 to which various sensors and actuators are connected; And an external communication unit 54 for sending data to 3. In the MCU 11, the three cores 21 to 23 execute processing necessary for controlling the internal combustion engine mounted on the vehicle 1. The MCU 12 has the same configuration as the MCU 11 (hereinafter referred to as “asymmetrical configuration”).

  FIG. 3 is a block diagram illustrating the configuration of the MCU 13. The MCU 13 includes two cores 61 and 62, a CAM 71 used by the core 61, a CAM 72 used by the core 62, and a shared memory usable by the cores 61 and 62. 81, ROM 82 for storing control programs executed by the cores 61 and 62, an input / output unit 83 to which various sensors and actuators of the control system are connected, reception of data on the bus 3, and transmission of data to the bus 3 And an external communication unit 84 for performing the above. In the MCU 13, for example, the two cores 61 and 62 execute processing necessary for controlling the transmission mounted on the vehicle 1. The MCU 14 has the same configuration as the MCU 13 (hereinafter referred to as “symmetrical configuration”).

  FIG. 4 is a time chart for explaining the process of rewriting the control program of the MCU 11 by the external device 2. This figure shows an example of the rewrite processing operation example of the control program stored in the ROM 42 corresponding to the core 22. ing. In this operation example, the core 21 executes a process of receiving a rewrite request for a control program, and the core 22 executes a process of receiving data for rewriting and a process of writing the received data in the ROM 42. At this time, the program of the reception process and the writing process executed by the core 22 is stored in the boot area of the ROM 42, and the control program stored in the ROM 42 is rewritten with respect to the control program stored in an area other than the boot area. Executed.

  4 (a) to 4 (f) are respectively messages on the bus 3 (upper: messages sent by the external device 2 and received by the MCU 11, lower: messages sent by the MCU 11 and sent to the external device 2), Processing executed by the core 21, processing executed by the core 22, writing data to the CAM 32, writing data to the ROM 42 (however, the BT starts the reception processing program and the writing processing program stored in the boot area) ) And the transition of processing executed by the core 23. Data indicated by broken lines in FIGS. 4A, 4D, and 4E indicate data for rewriting the control program.

  When the message M1 including the rewrite request for the control program is sent to the bus 3, the core 21 reads it, starts the rewrite request handling process (RES), and sends the confirmation response message M11. Next, when the message M2 designating that the target of rewriting the control program is the ROM 42 is sent, the core 21 sends the confirmation response message M12, and the reception process stored in the boot area of the ROM 42 is sent to the core 22. Outputs a command to start the program and the write processing program. Immediately after the start of the write processing program, the core 22 outputs a command to suspend the cores 21 and 23, and the cores 21 and 23 cease operation.

  Thereafter, a message MRW including rewrite data is sent from the external device 2 for each predetermined data amount DW suitable for the writing process to the ROM 42. The core 22 executes the reception processing program and the write processing program (RW), receives the message MRW and sends the confirmation response message MAC, stores the received rewrite data in the CAM 32, and further stores it in the CAM 32. When the rewriting data reaches a predetermined data amount DW, a process of writing to the ROM 42 is executed.

  When the writing process is completed, the core 22 executes a check process CHK of the written data (program) and calculates a CVN (Calibration Verification Number). The external device 2 sends a message M3 requesting CVN, and the core 22 sends a message M13 including CVN in response to this message M3. In response to this, the external device 2 sends a rewrite processing completion message M4. Upon receiving the rewrite processing completion message M4, the core 22 shifts the core 22 itself from the rewrite processing mode to the normal control mode and activates the cores 21 and 23 (time tE). The cores 21 to 23 shift to normal control through an initialization process.

  5A, 5B, and 5C are flowcharts showing a part of normal control processing executed by the cores 21 to 23 of the MCU 11, and FIG. 5D is an external device as described above. 2 is a flowchart of event processing executed when a message (rewrite request message) addressed to the MCU 11 is received from 2.

  The core 21 executes failure detection confirmation processing and data transmission / reception processing in normal control (steps S11 and S12). The failure detection confirmation process is a process for confirming a failure code to be transmitted to the external device 2 based on the result of the failure detection process executed by the cores 21 to 23. The data transmission / reception processing is processing for performing data transmission / reception with other MCUs 12 to 14 and the external device 2. In addition, in this embodiment, the reception of the message addressed to the MCU 11 is determined in advance so that the core 21 executes, and the event processing shown in FIG. 5D is executed by the core 21 to receive the rewrite request message and Transmission of an acknowledgment message or the like is executed in response to the message reception event (step S21).

  The core 22 executes a failure detection process, a TRQT calculation process, and a cooperative control process (steps S31 to S33). The failure detection process is a process for detecting a failure of the internal combustion engine mounted on the vehicle 1 or a sensor or actuator mounted on the internal combustion engine, and the TRQT calculation process is performed according to the depression amount of the accelerator pedal of the vehicle 1 or the like. This is a process for calculating the target torque TRQT of the internal combustion engine, and the cooperative control process is a process for performing cooperative control with the control executed by the other MCUs 12-14.

  The core 23 executes input / output processing, idle stop processing, and TRQA calculation processing (steps S41 to S43). The input / output process is a process for inputting data detected by the sensor and a process for outputting a drive signal to the actuator. The idle stop process is a process for temporarily stopping the internal combustion engine when a predetermined idle stop condition is satisfied. The TRQA calculation process is a process for calculating the actual output torque TRQA of the internal combustion engine.

  FIG. 6 is a flowchart of the rewrite request response process executed in the event process of FIG. In step S51, the received message is checked, and if there is no abnormality, the message normal flag FMMSGOK is set to “1”.

  In step S52, it is determined whether or not the message normal flag FMSGOK is “1”. If the answer is negative (NO) and an abnormality is detected, a negative message is sent to notify the sender of the abnormality. Create (step S53) and proceed to step S57.

  If the answer to step S52 is affirmative (YES), it is determined whether or not the rewriting target is a ROM of the own unit (MCU11) (step S54). If the answer to step S54 is negative (NO), this is a request to rewrite the control program stored in the ROMs of the other MCUs 12 to 14, and therefore the process proceeds to step S55 to execute the rewrite monitoring process shown in FIG. . If the answer to step S54 is affirmative (YES), the rewrite mode transition process shown in FIG. 7 is executed (step S56), and the cores 21 to 23 in the MCU 11 are changed to the rewrite process mode of the control program (including the suspension wait state). ).

  In step S57, a negative message or an acknowledgment message (MAC) of the received rewrite request message is transmitted. In step S58, it is determined whether or not a process switching permission flag FSWOK is “1”. The process switching permission flag FSWOK is set to “1” when the ROM to be rewritten is confirmed and the transition of the cores 21 to 23 to the rewrite processing mode is completed. While the answer to step S58 is negative (NO), the process is immediately terminated, and when the answer is affirmative (YES), the execution program is switched or a standby command waiting state is entered (step S59). That is, when the ROM 41 is rewritten, the execution program is switched between the reception processing program and the writing processing program stored in the boot area of the ROM 41, the rewriting data is received and the ROM 41 is written, and the ROM 42 or 43 When rewriting is performed, the process shifts to a pause command waiting state.

  FIG. 7 is a flowchart of the rewrite mode transition process executed in step S56 of FIG. In this embodiment, values “1” to “3” of the ROM designation parameter NROM correspond to the ROMs 41 to 43. That is, when NROM = 1, the ROM 41 is the ROM to be rewritten, when NROM = 2, the ROM 42 is the ROM to be rewritten, and when NROM = 3, the ROM 43 is the ROM to be rewritten.

  In steps S61 to S63, it is determined whether the ROM designation parameter NROM is “1”, “2”, or “3”. If the ROM designation parameter NROM has not been received, the process is terminated.

  When the ROM designation parameter NROM is “1”, the core 21 executes the receiving process and the writing process of the rewriting data, so that the receiving process program and the writing process program stored in the ROM 41 are activated. (Step S64), the temporary storage destination of the received data is set in the CAM 31 (Step S65). In step S66, the cores 22 and 23 that are not subjected to the control program rewrite process (reception process and write process) are permitted to be suspended (set to a sleep waiting state).

  When the ROM designation parameter NROM is “2”, the core 22 executes the reception process and the rewrite process, so that the reception process program and the write process program stored in the ROM 42 can be started (step S67). Is temporarily stored in the CAM 32 (step S68). In step S69, the cores 21 and 23 that do not perform the control program rewrite process (reception process and write process) are permitted to be suspended (in a standby state).

  When the ROM designation parameter NROM is “3”, the core 23 performs reception and rewrite processing, so that the reception processing program and write processing program stored in the ROM 43 can be activated (step S70), and the received data A temporary storage destination is set in the CAM 33 (step S71). In step S72, the cores 21 and 22 that are not subjected to the control program rewrite process (reception process and write process) are permitted to be suspended (set to a sleep waiting state).

  FIG. 8 is a flowchart of the rewrite monitoring process executed in step S55 of FIG. The monitoring process of the control program rewriting process by the other MCU 12, 13, or 14 is executed by the core 21 in the MCU 11. In step S81, it is determined whether or not rewriting is being performed in another MCU. If the answer is affirmative (YES), the cores 22 and 23 that do not execute the monitoring process are suspended (step S82). When the rewriting process in the other MCU is completed, the cores 22 and 23 are activated (step S83), the normal control is restored, and the core 21 itself is also restored to the normal control (step S84).

  For example, when the control program is rewritten in the MCU 11, only one core included in each of the other MCUs 12 to 14 executes the rewrite monitoring process, and the cores other than the one core that executes the monitoring process. The operation is stopped and the control is started after the rewriting process is completed. As a result, the power consumption of the entire control device can be reduced during the rewriting process.

FIG. 9 is a flowchart of the rewrite data reception process. This processing is executed in response to the message reception event by the core that executes the rewriting processing (core 22 in the operation example shown in FIG. 4).
In step S91, the received message including the rewriting data is checked, and if no abnormality is detected, the message normal flag FMSGOK is set to “1”. In step S92, it is determined whether the message normal flag FMSGOK is “1”. If the answer is negative (NO), a negative message is created (step S94), and the process proceeds to step S95. When the message normal flag FMSGOK is “1”, the received data is stored in the corresponding cache memory (CAMx) (step S93).

  In step S95, a negative message or rewrite data reception confirmation message (MAC) is transmitted. In step S96, the process waits until the transmission is completed. When the transmission is completed, a transmission completion process is executed (step S97). In the transmission completion process, the response time TRES required from the reception of the rewriting data to the transmission of the reception confirmation message is measured, and it is confirmed that the response is completed within the specified response time TRESLMT.

  9 is executed by the core 21 (reception data is temporarily stored in the CAM 31) when the control program stored in the ROM 41 corresponding to the core 21 is rewritten. When the control program stored in the corresponding ROM 42 is rewritten, the control program is executed by the core 22 (received data is temporarily stored in the CAM 32), and the control program stored in the ROM 43 corresponding to the core 23 is rewritten. Is executed by the core 23 (received data is temporarily stored in the CAM 33).

FIG. 10 is a flowchart of rewrite data write processing. This process is executed every predetermined time after activation by the core (core 22 in the operation example shown in FIG. 4) that executes the rewrite process.
In step S101, it is determined whether or not the program has just been started. If the answer is affirmative (YES), it is determined whether or not the core 21 has been started (step S102). If the answer is affirmative (YES), the cores 22 and 23 are suspended (step S103). If the answer to step S102 is negative (NO), it is determined whether or not the core 22 is activated (step S104). When the answer is affirmative (YES), the cores 21 and 23 are paused (step S105). When the answer is negative (NO), that is, when the core 23 is activated, the cores 21 and 22 are paused ( Step S106).

  If the answer to step S101 is negative (NO), it is determined whether or not the process of storing the received rewrite data in the corresponding cache memory (CAMx) is completed. If the answer is negative (NO), that is, if data is being received, the process immediately proceeds to step S109. If the answer to step S107 is affirmative (YES), the rewrite data stored in the corresponding cache memory (CAMx) is stored. Writing to the corresponding ROM (step S108).

  In step S109, it is determined whether or not the rewriting data has been written to the ROM. While the answer to step S109 is negative (NO), the processing is immediately terminated. When the answer is affirmative (YES), the data written in the ROM is checked (calculation of CVN) (step S110).

  As described above, in this embodiment, when the MCU 11 (core 21) having an asymmetric configuration receives a control program rewrite request from the external device 2 via the external communication unit 54, the MCU 11 (core 21) becomes a target of the rewrite request. The target processor core (any one of the cores 21 to 23) that executes the control program executes a rewrite process of the control program stored in the corresponding ROM. In the rewrite process, data for rewriting the control program is stored. The received data is received via the communication unit 54, and the received data is stored in the corresponding cache memory (CAMx). Each time the stored rewrite data reaches a predetermined data amount DW, the corresponding ROM is written. Is done. By using the cache memory as a buffer memory for temporarily storing rewrite data, the rewrite can be executed at a higher speed than when the rewrite data is temporarily stored in the shared memory 52. The processing can be performed at a relatively high speed, and the power consumption can be suppressed by shortening the rewriting processing time.

  Further, during execution of the rewriting process, control is performed to stop the operation of the processor core that does not execute the rewriting process, so that the power consumption of the entire MCU 11 that is executing the rewriting process can be reduced.

  In addition, the rewrite processing program (reception processing program and write processing program) stored in the ROM corresponding to the core that executes the rewrite processing is started to execute the rewrite processing, and the rewrite processing program of the corresponding ROM is stored. The control program stored in the storage area other than the stored storage area is rewritten. Since the rewriting process program stored in the corresponding ROM is activated to execute the rewriting process, for example, the process of copying and reactivating the rewriting process program to the cache memory becomes unnecessary, and additional processing required for rewriting Simple processing can be simplified.

  The present invention is not limited to the embodiment described above, and various modifications can be made. For example, as shown in FIG. 11, the control device having a configuration in which the bus 3 is divided into buses 3a and 3b by the gateway 5, or for example, the MCU 14 includes the wireless communication device 14a, and the wireless communication device 2a is provided. The present invention can also be applied to a control device or the like in which the external device 2 provided can execute a control program rewriting process via the wireless communication devices 2a and 14a.

DESCRIPTION OF SYMBOLS 1 Vehicle 2 External device 3 Bus 11, 12 Multi-core type arithmetic processing unit (asymmetric type)
21-23 Processor core 31-33 Cache memory 41-43 Read-only memory 54 External communication part

Claims (2)

In a vehicle control device that controls a control object mounted on a vehicle using a multi-core arithmetic processing unit configured to include a plurality of processor cores,
The multi-core arithmetic processing unit includes a cache memory provided corresponding to each of the plurality of processor cores, and a control program provided corresponding to each of the plurality of processor cores and executed by the plurality of processor cores. A rewritable read-only memory that stores data and a communication unit that transmits and receives data to and from an external device,
When the multi-core arithmetic processing unit receives a rewrite request for the control program from the external device via the communication unit, the target processor core that executes the control program that is the target of the rewrite request corresponds to the corresponding processor core. Execute the rewrite process of the control program stored in the read-only memory,
In the rewriting process, rewrite data of the control program is received via the communication unit, the received data is stored in the corresponding cache memory, and each time the stored rewrite data reaches a predetermined data amount Performing a write process to the read-only memory ,
The target processor core, the rewrite processing when the execution is the vehicle control device according to claim Rukoto rested the operation of the processor core other than the target processor core. The target processor core executes the rewrite process by activating the rewrite process program stored in the corresponding read-only memory, and the rewrite process program of the corresponding read-only memory is stored. The vehicle control device according to claim 1, wherein the control program stored in a storage area other than the storage area is rewritten.

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