JP6274070B2 - Power supply - Google Patents

Description

  The present invention relates to a power supply apparatus that switches between two switching units by providing a phase difference in a switching cycle, and more specifically, a change timing of a voltage output from a switching element is temporally changed between two switching units. The present invention relates to a power supply device in which noise due to a sudden current change that occurs when overlapping is reduced.

  2. Description of the Related Art Conventionally, there is an interleaved power supply device that alternately switches two switching elements connected in parallel. Since this power supply device switches two switching elements with a phase difference of 180 degrees, when the on-duty of a switching signal for driving the switching element becomes close to 50%, the on-off change (rise / rise) of the output voltage of one of the switching elements. (Decrease) timing may overlap in time with the on / off change timing of the output voltage of the other switching element, and when this timing overlaps, noise generated compared to when only one switching element is turned on or off. It gets bigger. In some cases, high-order harmonics are generated due to this large noise and the standard of harmonic regulation is not satisfied, and abnormal noise may be generated from the booster coil.

In order to reduce this noise, when the on-duty of the switching signal for driving the switching element approaches 50%, the phase difference of each switching signal is shifted from 180 degrees so that the on-off timing of the two switching elements does not overlap. It is sufficient to drive like this.
However, when the phase difference of each switching signal is largely shifted from 180 degrees, effects unique to the interleaving method such as reduction of input current ripple by driving the switching element with the phase difference of 180 degrees are impaired.

  As another method for solving this problem, when the on-duty of the switching signal increases and approaches 50%, the phase difference between the two switching signals is slightly increased from 180 degrees and the overlap described above is performed. A method is conceivable in which the timing is avoided and the phase difference between the two switching signals is returned to the original 180 degrees when the on-duty of the switching signals exceeds 50%. In other words, this is a method in which the effect peculiar to the interleaving method is not impaired by increasing the phase difference between the two switching signals from 180 degrees for the minimum necessary period.

  In this method, it is necessary to shorten the period during which the phase difference between the two switching signals is increased from 180 degrees as much as possible. However, the switching element turn-on / turn-off time caused by the difference in temperature, current, characteristics of each switching element, etc. Due to the variation, the ON / OFF change of the switching signal may differ from the actual ON / OFF change of the switching element. As described above, the difference between these changes is expected to be a long time margin, and the phase difference of each switching signal is 180 degrees as described above. Since the effects unique to the interleaving method, such as ripple reduction of the input current by driving the switching element with a phase difference of 180 degrees, are impaired, the phase difference between the two switching signals is increased from 180 degrees. The question that the period cannot be too long There was.

  On the other hand, Patent Document 1 discloses a power source that disperses switching noise generated in two switching units in frequency by driving the two switching units at different switching frequencies, and consequently reduces the noise level of the entire apparatus. A device has been proposed.

  However, since the method of Patent Document 1 drives the two switching units at different switching frequencies, for example, even if the on-duty of the switching elements of the two switching units is close to 50%, the output of the switching element of each switching unit The frequency at which the voltage on / off timing overlaps decreases, but only the frequency decreases. At the timing at which the two switching signals overlap, the on / off timings of the output voltages of the switching elements of the two switching units described above are temporally related. The problem of overlapping was not fundamentally solved. If noise is generated due to the temporal overlap of the ON / OFF timing of the output voltage of this switching element, as described above, high-order harmonics are generated due to the noise, and problems such as not satisfying the harmonic regulation standards, There is a problem that abnormal noise occurs, and even when the frequency of occurrence is low, it is necessary to implement noise countermeasures using a filter, a core, or the like.

JP 2011-172372 A (page 5-6, FIG. 3)

  The present invention solves the above-described problems, and in an interleave type power supply device that switches two switching units connected in parallel with a switching signal having a predetermined phase difference, there is a variation in turn-on / turn-off time of the switching element. In this case, the on / off timing of the output voltage of the switching element of each switching unit is detected, and the phase difference of the switching signal is prevented so that the on / off timing does not overlap in time between the two switching units. The purpose is to control.

In order to solve the above problems, the present invention according to claim 1 of the present invention provides:
A rectifier for rectifying the AC power inputted, a first switching unit and second switching unit connected in parallel to the voltage rectified by the rectifier is input from the first switching unit and the second switching unit A smoothing capacitor that smoothes the output voltage ;
A switching control unit for generating a first switching signal for driving the first switching unit and a second switching signal for driving the second switching unit with a predetermined phase difference; and A first voltage detection unit that detects a voltage switched by the unit and outputs a first voltage detection signal;
A power supply device of an interleave type comprising a second voltage detection unit that detects a voltage switched by the second switching unit and outputs a second voltage detection signal ;
The switching control unit may change the phase difference based on rising and falling timings of the first voltage detection signal and the second voltage detection signal, respectively.

In the invention according to claim 2 of the present invention, the switching control unit selects either the first phase difference which is the phase difference or a second phase difference which is larger than the first phase difference. Generating a first switching signal and the second switching signal;
A first time difference between the rising edge of the first voltage detection signal and the falling edge of the second voltage detection signal, and a second time difference between the falling edge of the first voltage detection signal and the rising edge of the second voltage detection signal. If any one of these is less than a predetermined time difference threshold, the second phase difference is selected,
Thereafter, when either the first time difference or the second time difference becomes less than the time difference threshold, the first phase difference is selected.

  By using the above means, according to the power supply device of the present invention, the effects of the interleaving method such as the ripple reduction of the input current are not impaired as compared with the conventional method, and the first switching unit and the second switching unit respectively. The switching noise generated by the temporal overlap of the switching ON / OFF timings can be reduced.

It is a block diagram which shows the Example of the power supply device by this invention. It is a block diagram which shows the Example of the phase switching part by this invention. It is explanatory drawing explaining the timing relationship of the voltage switched. (On-duty reduction) It is explanatory drawing explaining the timing relationship of the voltage switched. (On-duty increase) It is explanatory drawing which shows the phase switching timing in the input current and switching in the half cycle of an input voltage. It is explanatory drawing explaining the timing relationship when the on-duty of the switched voltage approaches 50%. (On-duty reduction) It is explanatory drawing explaining the timing relationship when the on-duty of the switched voltage further reduces from 50%. (On-duty reduction) It is explanatory drawing explaining the timing relationship when the on-duty of the switched voltage approaches 50%. (On-duty increase) It is explanatory drawing explaining the timing relationship when the ON duty of the switched voltage further increases from 50%. (On-duty increase)

  DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail as examples based on the attached drawings.

FIG. 1 is a block diagram showing an embodiment of a power supply device 1 which is operated in an inductor current continuous mode according to the present invention and is composed of an interleaved PFC converter having two switching units for A phase and B phase.
The power supply device 1 includes a rectifier 4 for rectifying an AC power supply (not shown) connected to the input terminal 2 and the input terminal 3, an input voltage detection unit 40 connected in parallel between the input terminal 2 and the input terminal 3, A smoothing capacitor 13, an A-phase switching unit (first switching unit) 21 having an input terminal 21a, an output terminal 21b, a common terminal 21c, and a signal terminal 21d, an input terminal 22a, an output terminal 22b, a common terminal 22c, and a signal And a B-phase switching unit (second switching unit) 22 having an end 22d.

  Further, the power supply device 1 uses one of two switching signals generated by PWM modulation based on each of the two input clock signals as an A-phase switching signal (first switching signal) to the A-phase switching unit 21. The switching control unit 16 outputs the other switching signal as a B-phase switching signal (second switching signal) to the B-phase switching unit 22 and outputs an on-duty value used in PWM modulation as a state signal described later. A clock signal generation unit (clock signal generation means) 20 that is used when generating two switching signals, generates two clock signals having a predetermined phase difference, and outputs them to the switching control unit 16, and a clock signal generation The phase switching signal is output to the unit 20 and the clock signal generating unit 20 Phase switching unit for switching the phase difference of the two clock signals output and a (phase switching means) 30. Note that the input voltage (instantaneous voltage) detected by the input voltage detector 40 is input to the switching controller 16 as an input voltage signal.

  The A-phase switching unit 21 has an input terminal 21 a at the positive terminal of the rectifier 4, a common terminal 21 c at the negative terminal of the rectifier 4, an output terminal 21 b at the positive terminal of the smoothing capacitor 13, and a signal terminal 21 d at the switching control unit 16. It is connected to the output terminal of the switching signal for A phase. Similarly, the B-phase switching unit 22 has the input terminal 22a at the positive terminal of the rectifier 4, the common terminal 22c at the negative terminal of the rectifier 4, the output terminal 22b at the positive terminal of the smoothing capacitor 13, and the signal terminal 22d at the switching control unit. The output terminals of the 16 B-phase switching signals are respectively connected. The negative electrode end of the smoothing capacitor 13 is connected to the negative electrode of the rectifier. Further, the positive terminal of the smoothing capacitor 13 is connected to the positive voltage output terminal 14, and the negative terminal of the smoothing capacitor 13 is connected to the negative voltage output terminal 15.

  On the other hand, the A-phase switching unit 21 includes an inductor 6 having one end connected to the input end 21a, a diode 12 having the other end connected to the anode terminal and a cathode terminal connected to the output end 21b, and the inductor 6 And an IGBT 7 (A phase switching element) that is connected to the common end 21c and is turned on / off by an A phase switching signal input from the signal end 21d to the gate terminal. The collector terminal of the IGBT 7 is connected to the anode terminal of the diode 12, and the emitter terminal of the IGBT 7 is connected to the common terminal 21c. Furthermore, the A-phase switching unit 21 includes an A-phase voltage detection unit (first voltage detection unit) 10 that detects a voltage between the collector terminal and the emitter terminal of the IGBT 7 and outputs it as an A-phase voltage signal.

  Similarly, the B-phase switching unit 22 includes an inductor 5 having one end connected to the input terminal 22a, a diode 11 having the other end connected to the anode terminal and a cathode terminal connected to the output terminal 22b, and an inductor. 5, and an IGBT 8 (B phase switching element) that is connected between the other end and the common end 22 c and is turned on / off by a B phase switching signal input from the signal end 22 d to the gate terminal. The collector terminal of the IGBT 8 is connected to the anode terminal of the diode 11, and the emitter terminal of the IGBT 8 is connected to the common terminal 22c. Further, the B-phase switching unit 22 includes a B-phase voltage detection unit (second voltage detection unit) 9 that detects a voltage between the collector terminal and the emitter terminal of the IGBT 8 and outputs it as a B-phase voltage signal.

  The clock signal generating unit 20 generates a clock signal for A phase and outputs it to the switching control unit 16, and a 180 degree delayed clock signal obtained by delaying the phase by 180 degrees from the input A phase clock signal. And a delay signal generator 19 for generating two clock signals of a 191-degree delayed clock signal delayed by 191 degrees, and these two clock signals are input, and a 180-degree delayed clock signal and a 191-degree delayed clock are received by a phase switching signal. And a clock switching unit 17 that selects any one of the signals and outputs the selected signal to the switching control unit 16 as a B-phase clock signal. The clock switching unit 17 outputs a 180 degree delayed clock signal when the phase switching signal is at a low level, and outputs a 191 degree delayed clock signal when the phase switching signal is at a high level.

A case where the phase difference between the A phase clock signal and the B phase clock signal is 180 degrees is referred to as a first phase difference, and a case where the phase difference is 191 degrees is referred to as a second phase difference.
In this embodiment, the clock switching unit 17 switches between the 180-degree delayed clock signal and the 191-degree delayed clock signal whose phase is determined in advance with respect to the A-phase clock signal by the phase switching signal output from the phase switching unit 30. Output as a B-phase clock signal, that is, output as a B-phase clock signal with a selected phase, but the present invention is not limited to this, and the clock signal generator 20 generates a phase difference corresponding to the phase switching signal. The B phase clock signal may be generated.

  The phase switching unit 30 receives an A-phase voltage signal, a B-phase voltage signal, an A-phase clock signal, and an on-duty value that is a state signal indicating the switching control state of the switching control unit 16 output from the switching control unit 16. A function of outputting a phase switching signal to the clock switching unit 17 in order to select a B-phase clock signal so that the ON / OFF change timings of the input A-phase voltage signal and B-phase voltage signal do not overlap in time is provided. .

Next, before describing the internal block of the phase switching unit 30, the general function of the phase switching unit 30 will be described with reference to FIG.
FIG. 3 explains the timing at which each switching signal is generated based on each clock signal and the IGBT 7 and IGBT 8 are driven by this switching signal.
In FIG. 3, the horizontal axis represents time, and the vertical axis represents the voltage of each signal. 3 (1) is the A phase clock signal, FIG. 3 (2) is the B phase clock signal, FIG. 3 (3) is the A phase switching signal, FIG. 3 (4) is the B phase switching signal, and FIG. (5) shows the A-phase voltage signal, and FIG. 3 (6) shows the B-phase voltage signal. Further, t1 to t11 indicate time.

  The A-phase switching signal shown in FIG. 3 (3) is generated based on the A-phase clock signal shown in FIG. 3 (1). For example, t1 to t8 of the A phase clock signal correspond to one cycle of the A phase switching signal. Since the phase B clock signal in FIG. 3B is 180 degrees behind the phase A clock signal, t5 to t11 of the phase B clock signal corresponds to one cycle of the phase B switching signal. .

  In this embodiment, the high-level period of each switching signal is an on-duty period, and the A-phase voltage detector 10 and the B-phase are connected to the collector terminals of the IGBT 7 and IGBT 8 where the switching signal is input to the gate terminal, respectively. The voltage detection unit 9 outputs a voltage signal based on the output voltage of each phase controlled by each switching signal. However, since the phase of each switching signal and each corresponding voltage signal is inverted, the low level of the A phase voltage signal shown in FIG. 3 (5) and the B phase voltage signal shown in FIG. It becomes the corresponding period. Further, since there is a turn-on / turn-off delay time for the IGBT 7 and IGBT 8, the on / off change of each phase voltage signal is delayed by this delay time from the on / off timing of the switching signal.

  As described above, the two clock signals have a phase difference of 180 degrees, and the two switching signals correspondingly have a phase difference of 180 degrees. Since the turn-on / turn-off delay times of IGBT 7 and IGBT 8 are different, the phase A voltage signal and the phase B voltage signal are not completely 180 degrees out of phase. The on-duty of the switching signal input to the gate terminals of the IGBT 7 and IGBT 8 is basically the same, but due to the difference in the turn-on / turn-off delay time between the IGBT 7 and IGBT 8 and the variation of components used in each switching unit. The high level time of the A phase voltage signal output from the collector terminal of the IGBT 7 and the high level time of the B phase voltage signal output from the collector terminal of the IGBT 8 and the low level of the A phase voltage output from the collector terminal of the IGBT 7 The level time and the low level time of the B phase voltage output from the collector terminal of the IGBT 8 are not completely the same.

  As described above, there is a phase difference of 180 degrees between the two clock signals. Therefore, when the on-duty of each switching signal is around 50%, the change timing of the A-phase voltage signal and the B-phase voltage signal (rising / falling of the signal) May overlap. Specifically, the phase A when the time difference A between the phase A voltage signal t4 and the phase B voltage signal t6 and the time difference B between the phase B voltage signal t7 and the phase A voltage signal t9 become zero. The change timing of the voltage signal and the B phase voltage signal overlap.

  In the present application, the phase switching unit 30 calculates the time difference A and the time difference B for each cycle of the clock signal, and switches the phase difference between the two clock signals by the phase switching signal when the time difference becomes a predetermined threshold value or less. The on / off change timings of the IGBT 7 and the IGBT 8, that is, the change timings of the A-phase voltage signal and the B-phase voltage signal are not overlapped. In the following description, the time difference (absolute value) between t4 and t6 is referred to as time difference A, and the time difference (absolute value) between t9 and t7 is referred to as time difference B.

  Note that the phase switching unit 30 is configured so that the A-phase voltage signal and the B-phase voltage signal are within a period (200 microseconds) of the clock signal from t3 delayed by a phase of 90 degrees from the rising timing t1 of the A-phase clock signal. , T4, t6, t7, and t9, which are rising or falling timings, are detected. The phase switching unit 30 measures and stores times up to t4, t6, t7, and t9, with t3 as a time reference (start of timekeeping). Then, the phase switching unit 30 calculates the time difference A and the time difference B from the stored four times.

Next, the configuration of the phase switching unit 30 will be described.
As shown in FIG. 2, the phase switching unit 30 includes a 90-degree phase delay unit 31, a signal change detection unit 32, a storage unit 33, a time difference calculation unit 34, a phase switching determination unit 35, a timer unit 36, and a period transition counter unit 37. It has.

The 90-degree phase delay unit 31 delays the phase of the input A-phase clock signal by 90 degrees and outputs it as a detection start signal. The timer unit 36 measures time.
The signal change detection unit 32 determines the rising timing of the input detection start signal from the rise of the input detection start signal to the rise of the next detection start signal. The time until the on / off change of the rising / falling of each of the input A-phase voltage signal and B-phase voltage signal (corresponding to OFF / ON of the IGBT) occurs is measured using the timer unit 36, and the ON / OFF change Output as time. The storage unit 33 stores the input on / off change time. When the next rising edge of the detection start signal is input, the signal change detection unit 32 sets the storage completion flag to “1” and stores it in the storage unit 33.

The time difference calculation unit 34 monitors the storage completion flag in the storage unit 33, and when this flag becomes “1”, reads the on / off change time from the storage unit 33, calculates the time difference A and the time difference B, and calculates the phase switching determination unit. To 35.
The period transition counter unit 37 has an initial value of 1 and increments the count value by 1 every time there is an update instruction to be described later from the phase switching determination unit 35. When the count value reaches 6, the next value is returned to the initial value of 1. . This count value is referred to as a period identification value. The period transition counter unit 37 is a counter that sequentially shifts the control state of the phase switching determination unit 35 corresponding to a period obtained by dividing the half cycle of the input voltage of the power supply device 6 into six. Which of the first phase difference and the second phase difference is selected in these six periods is determined by the count value of the period transition counter unit 37. The relationship between the count value and the control state of the phase switching determination unit 35 will be described later in detail.

  The phase switching determination unit 35 receives the detection start signal output from the 90-degree phase delay unit 31, and every clock period from the rise of the input detection start signal to the rise of the next detection start signal. Determine whether the phase switching signal is high level or low level and output. As described above, the signal change detection unit 32 detects the ON / OFF change time of the A phase voltage signal and the B phase voltage signal detected every clock period from the rise of the detection start signal to the rise of the next detection start signal, and the storage is completed. Are stored in the storage unit 33. The time difference calculation unit 34 can know the rising timing of the detection start signal from the storage completion flag. At this timing, the time difference A and the time difference B are calculated and output to the phase switching determination unit 35. Therefore, the time difference A and the time difference B in one clock period from the rise of the detection start signal to the rise of the next detection start signal are input to the phase switching determination unit 35.

  The phase switching determination unit 35 to which the time difference A and the time difference B are input reads a period identification value that is a count value from the period transition counter unit 37. The phase switching determination unit 35 sets the phase switching signal to the high level or the low level at the next rising edge of the detection start signal according to the condition corresponding to the period identification value and the comparison result between the input time difference and a predetermined time difference threshold. To output. The relationship between the condition corresponding to the period identification value and the comparison result between the input time difference and a predetermined time difference threshold will be described in detail later. In addition, the condition corresponding to the period identification value and the time difference threshold value are stored in advance in the phase switching determination unit 35.

  The phase switching determination unit 35 changes the phase switching signal from a high level to a low level, or from a low level to a high level, when the input on-duty value changes from a decrease to an increase, and When the input on-duty value changes from increasing to decreasing, an update instruction is output to the period transition counter unit 37 to update the counter of the period transition counter unit 37. This counting operation will also be described in detail later.

Next, the operation of the power supply device 1 will be described.
When an AC voltage is applied between the input terminal 2 and the input terminal 3, this AC voltage is rectified by the rectifier 4 to become a DC voltage and applied to the input terminals of the A-phase switching unit 21 and the B-phase switching unit 22, respectively. Is done. The clock generator 18 also generates an A-phase clock signal and outputs it to the switching controller 16. On the other hand, the phase switching unit 30 outputs the phase switching signal as a low level. The clock switching unit 17 to which the low-level phase switching signal is input outputs the clock signal obtained by delaying the A-phase clock signal by 180 degrees to the switching control unit 16 as the B-phase clock signal.

  The switching control unit 16 applies the A-phase switching signal PWM-modulated based on the input A-phase clock signal to the A-phase switching unit 21 and the PWM-modulated B based on the input B-phase clock signal. The phase switching signal is output to the B phase switching unit 22. Each switching unit controls on / off of the IGBT 7 and the IGBT 8 in accordance with the input switching signal.

FIG. 5 is an explanatory diagram showing an input voltage and an input current in a half cycle of the AC power source input to the power supply device 1 and a phase switching timing in the B-phase clock signal.
The switching control unit 16 controls the on-duty of each switching signal for driving the IGBT 7 and the IGBT 8 so that the input current approaches a sine wave waveform so that the power factor approaches 1. For this reason, the switching control unit 16 increases the on-duty when the input voltage (instantaneous voltage) detected by the input voltage detection unit 40 is low, and decreases the on-duty when the input voltage is high.

  Therefore, the switching control unit 16 corresponds to the magnitude of the input voltage (instantaneous voltage), for example, when the input voltage is approximately 0 volts, the on-duty is set to 100%, and the on-duty is decreased as the input voltage gradually increases. The on-duty is set to 0% when the input voltage reaches a peak. Then, the switching control unit 16 increases the on-duty as the input voltage gradually decreases. In addition, when the peak voltage of the input voltage of the power supply device 1 is lower than the rated voltage, it does not become 0% completely, but the operation in which the on-duty repeatedly increases and decreases corresponding to the instantaneous value of the input voltage is input. It has nothing to do with the peak voltage value.

  As described above, the switching control unit 16 controls the on-duty from, for example, 100% to 0%, and further from 0% to 100%, while the input voltage changes for a half cycle. In a conventional interleaved power supply device that performs switching with a phase difference of 180 degrees, noise is always generated when the IGBT 7 and the IGBT 8 are turned on and off. As described above, when the switching controller 16 controls the on-duty by varying it by, for example, 0 to 100%, the on-duty becomes approximately 50% when the phase of the input voltage is, for example, around 30 degrees and around 150 degrees. When the ON / OFF timing of the two-phase IGBTs overlaps in the vicinity of about 50%, noise is generated at the same timing, and the noise level becomes larger than when the timings do not overlap, as shown by the broken line in FIG. Such a big noise was generated.

  In the present invention, as described above, the phase switching unit 30 monitors the ON / OFF change timings of the A-phase voltage signal and the B-phase voltage signal, and the A-phase voltage signal is not overlapped when the timing approaches. Control is performed to change the phase of the B phase clock signal with respect to the clock signal for use. That is, the phase switching unit 30 selects either the 180 degree delayed clock signal or the 191 degree delayed clock signal as the B phase clock signal. For this reason, the ON / OFF timings of the two-phase IGBTs do not overlap, and such a large noise does not occur.

  While the input voltage changes half a cycle, the phase switching determination unit 35 outputs a phase switching signal for switching the phase of the B-phase clock signal corresponding to the six periods from period 1 to period 6 shown in FIG. To do. The phase switching determination unit 35 sets the phase of the B phase clock signal with reference to the A phase clock signal. The phase 1 is 180 degrees in the period 1, the phase 191 degrees in the period 2, the phase 180 degrees in the periods 3 and 4, and the phase 5 in the period 5. In the phase 191 degrees and in the period 6, a phase switching signal that is delayed by 180 degrees is output. Therefore, the phase switching determination unit 35 outputs a phase switching signal corresponding to the above-described period 1 to period 6 while the input voltage changes for a half cycle.

  FIG. 3 shows a case where the on-duty of each switching signal for driving the IGBT 7 and the IGBT 8 is decreased in the period 1 described with reference to FIG. Since FIG. 3 illustrates the section of period 1, the phase switching signal is low level, that is, the phase difference between the A-phase clock signal and the B-phase clock signal is 180 degrees. .

  As shown in FIGS. 3 (1) and 3 (2), the clock signal generation unit 20 is configured to determine the order of the A-phase clock signal and the B-phase clock signal that are the basis of the A-phase switching signal and the B-phase switching signal. The phase difference is output as 180 degrees, and the rising edge of each clock signal, for example, t1 for the A-phase clock signal and t5 for the B-phase clock signal is the beginning of the period of each switching signal. In this embodiment, the frequency of the A-phase clock signal and the B-phase clock signal is 5 kHz (one cycle is 200 microseconds). Further, the turn-on / turn-off delay time (delay time by IGBT) of the IGBT 7 and the IGBT 8 is 2 microseconds. The time corresponding to the phase difference between the 180-degree delayed clock signal output from the delay signal generator 19 and the 191-degree delayed clock signal is referred to as a phase shift time.

  The 90-degree phase delay unit 31 in the phase switching unit 30 sends a detection start signal obtained by delaying the phase by 90 degrees (50 microseconds) from the rising timing of the input A-phase clock signal to the signal change detection unit 32. Since the signal is output, the time during which the signal change detection unit 32 can detect the ON / OFF changes (rise timing and fall timing) of the A phase voltage signal and the B phase voltage signal is in the range of 200 microseconds from t3 to t10. This is because the timing when the ON / OFF change of the A-phase voltage signal and the B-phase voltage signal is expected to overlap is t6 and t9, and it is only necessary to detect the timing before and after the overlap in the range of t3 to t10. For example, since the overlapping timing does not occur in the range from t1 to t3, there is no problem even if the phase switching unit 30 cannot detect all on-off changes of the A-phase voltage signal and the B-phase voltage signal.

As described above, the A-phase voltage signal and the B-phase voltage signal are signals indicating the ON / OFF change timing of the voltage between the collector and emitter terminals of the IGBT 7 and IGBT 8 of each switching unit, and are therefore output from the switching control unit 16. The IGBT 7 and the IGBT 8 are turned on during a period in which the A-phase switching signal shown in (3) or the B-phase switching signal shown in FIG. 3 (4) is at a high level (on-duty period). Each of the B phase voltage signals becomes low level. As described with reference to FIG. 5, the switching control unit 16 decreases the on-duty as the instantaneous voltage of the AC voltage detected by the input voltage detection unit 40 increases. The on-duty decreases with the passage of time from the phase of the AC voltage waveform at 0 degree, and the time during which each of the A-phase voltage signal and the B-phase voltage signal becomes low level (pulse off time) also decreases correspondingly. To do.
Hereinafter, unless otherwise specified, “phase voltage on-duty” indicates a ratio of a period during which these signals are at a low level with respect to a period of one cycle of the A-phase voltage signal or the B-phase voltage signal.

  The switching control unit 16 controls the IGBT 7 and the IGBT 8 with basically the same on-duty. However, the phase voltage on-duty of the A-phase voltage signal and the B-phase voltage signal may differ by, for example, about 2% due to component variations. is there.

  In FIG. 3, when the switching control unit 16 sets the phase voltage on-duty of the A-phase voltage signal and the B-phase voltage signal to 60% (120 microseconds), the on-off change timing of the adjacent A-phase voltage signal and B-phase voltage signal is , T4 and t6, and t9 and t7.

  When the rising edge of the detection start signal is input at t3, the signal change detection unit 32 in the phase switching unit 30 instructs the timer unit 36 to start timing, and the A phase voltage signal with the time point of t3 as a time reference. And the time until the on-off change (rise or fall) of the B phase voltage signal occurs. When an on / off change occurs in either the A-phase voltage signal or the B-phase voltage signal, the signal change detection unit 32 reads the time until that time from the timer unit 36, and type information of on / off change, for example, “rising of the A-phase voltage signal The time read from the timer unit 36 is stored in the storage unit 33 as one on / off change time data.

  Therefore, in the range of t3 to t10, four on-off change times from t4 (32 microseconds), t6 (52 microseconds), t7 (132 microseconds), and t9 (152 microseconds) with reference to t3, and these The type information is stored in the storage unit 33. When the next rising edge of the detection start signal is input at t10, the signal change detection unit 32 stores a one-cycle storage completion flag in the storage unit 33. The signal change detection unit 32 starts monitoring on / off changes of the next A-phase voltage signal and B-phase voltage signal, and monitors the next rise of the detection start signal.

  The time difference calculation unit 34 monitors a flag indicating the completion of one-cycle storage stored in the storage unit 33. When this flag is detected, the time difference calculation unit 34 deletes this flag, and stores other types of on / off changes stored in the flag. After all the corresponding on / off change times are read from the storage unit 33, the stored contents of the storage unit 33 are erased, the time difference A and the time difference B are calculated from the on / off change times read from the storage unit 33, and output to the phase switching determination unit 35. To do. Therefore, in the case of FIG. 3, the time difference calculation unit 34 calculates and outputs the time difference A as 20 microseconds and the time difference B as 20 microseconds.

  The time difference calculation unit 34 has four conditions for calculating the time difference A and the time difference B, that is, from the start of the timer unit 36 to the rising and falling of the A-phase voltage signal and the B-phase voltage signal, respectively. If the time is not all in the storage unit 34, the time difference is not calculated and output. This is because the detection range of each phase voltage signal is limited as described above, and when there is an ON / OFF change outside the detection range, there is no overlapping timing of ON / OFF changes of the two phase voltage signals.

The phase switching determination unit 35 internally stores the contents of <period transition condition> and <execution operation> and a time difference threshold value, and determines whether or not they match <period transition condition> described below. In this case, after performing an <execution operation> corresponding to this condition, the count value (period identification value) of the period transition counter unit 37 is updated, and the process proceeds to the next period. This period identification value corresponds to periods 1 to 6 described in FIG. Further, as described above, the period identification value is sequentially updated to 1 to 6 by the update instruction signal output from the phase switching determination unit 35 and to 1 after the 6th. Further, when the period transition condition is not satisfied and when the time difference A and the time difference B are not input, the current state is maintained without doing anything.
Period 1: <period transition condition> Time difference A and time difference B are both less than the time difference threshold, <execution operation> The phase difference signal is set to high level, and the period identification value is updated to 2 (transition to period 2).
Period 2: <period transition condition> time difference A is less than time difference threshold, <execution operation> phase difference signal is set to low level, and period identification value is updated to 3 (transition to period 3).
Period 3: <period transition condition> The on-duty value output from the switching controller 16 changes from decreasing to increasing, and <execution operation> updates the period identification value to 4 (transition to period 4).
Period 4: <period transition condition> Both time difference A and time difference B are less than the time difference threshold, <execution operation> The phase difference signal is set to high level, and the period identification value is updated to 5 (transition to period 5).
Period 5: <Period transition condition> Time difference B is less than the time difference threshold, <Execution operation> The phase difference signal is set to low level, and the period identification value is updated to 6 (transition to Period 6).
Period 6: <Period transition condition> The on-duty value output from the switching control unit 16 changes from the increasing direction to the decreasing direction, and <Execution operation> The period identification value is updated to 1 (transition to Period 1).

  In the case of FIG. 3, since the period identification value indicated by the period transition counter unit is 1 (period 1), the phase switching determination unit 35 has a predetermined time difference threshold (5 microseconds) and the input time difference A (20 (Microseconds) and time difference B (20 microseconds) are respectively compared. Since both time difference A and time difference B are larger than the time difference threshold value and do not apply to the period transition condition, the phase difference signal remains at the low level as it is. .

  When the time difference A or the time difference B becomes zero, the on-off change of the A-phase voltage signal and the B-phase voltage signal is overlapped. In the present application, the phase switching unit 30 monitors the time difference A and the time difference B, and delays the phase of the B phase clock signal by 180 degrees to 11 degrees (6 microseconds) according to the above-described period transition condition. The timing at which ON / OFF changes of the B phase voltage signal overlap is avoided. Note that 6 microseconds of time corresponding to the phase of 11 degrees is the phase shift time.

  In this embodiment, since the time difference threshold is defined as 5 microseconds from the maximum switching delay time generated in the IGBT 7 and IGBT 8, the phase shift time is defined as 6 microseconds, which is longer than this. Thereby, it is possible to reliably avoid the timing at which the on / off changes of the A-phase voltage signal and the B-phase voltage signal overlap. The avoidance operation at the timing when the on / off changes overlap will be described in detail later.

  FIG. 4 is an explanatory diagram for explaining the timing relationship of the voltages switched by the IGBT 7 and the IGBT 8, and the on-duty of the switching signal for each phase output by the switching control unit 16 increases in the section of the period 4 described in FIG. Shows when to do. Since this figure is a section of period 4, the phase switching signal is low level, that is, the phase difference between the A-phase clock signal and the B-phase clock signal is 180 degrees.

  In FIG. 4, the horizontal axis represents time, and the vertical axis represents the voltage of each signal. 4 (1) is the A phase clock signal, FIG. 4 (2) is the B phase clock signal, FIG. 4 (3) is the A phase switching signal, FIG. 4 (4) is the B phase switching signal, and FIG. (5) shows the A phase voltage signal, and FIG. 4 (6) shows the B phase voltage signal. Further, t11 to t20 indicate time.

The description of each clock signal, each switching signal, and each phase voltage signal has been described with reference to FIG.
As shown in FIGS. 4 (3) and 4 (4), the switching control unit 16 increases the instantaneous voltage of the AC voltage detected by the input voltage detection unit 40 with the on-duty of the switching signal for each phase output. If the phase voltage on-duty of the A-phase voltage signal and the B-phase voltage signal shown in FIGS. 4 (5) and 4 (6) is 30% (60 microseconds), the time difference calculation unit 34 calculates. The time difference A between t15 and t16 and the time difference B between t18 and t19 are both 40 microseconds. In the phase switching determination unit 35 to which the calculated time difference A and time difference B are input, the period identification value output by the period transition counter unit 37 is 4 (period 4). That is, both the time difference A and the time difference B are not less than the time difference threshold value and do not apply to the period transition condition, so the phase switching signal remains at the low level as it is.

  FIG. 6 is an explanatory diagram for explaining the timing relationship between the voltages switched by the IGBT 7 and the IGBT 8. In the period 1 described with reference to FIG. 5, the switching control unit 16 sets the on-duty of the switching signal for driving the IGBT 7 and the IGBT 8 as the input voltage. The case where it reduces as the instantaneous voltage of the alternating voltage detected by the detection part 40 becomes large is shown. As a result, the timing at which the ON / OFF changes of the A-phase voltage signal and the B-phase voltage signal overlap is approaching, and both the time difference A and the time difference B are smaller than the time difference threshold value, so the phase switching determination unit 35 switches the phase switching signal. The case where it shifted to the period 2 from the period 1 is shown.

  In FIG. 6, the horizontal axis represents time, and the vertical axis represents the voltage of each signal. 6 (1) is the A phase clock signal, FIG. 6 (2) is the B phase clock signal, FIG. 6 (3) is the A phase voltage signal, FIG. 6 (4) is the B phase voltage signal, and FIG. ) Indicates a phase switching signal, and FIG. 6 (6) indicates a period (period identification value) indicated by the count value of the period transition counter unit 37. Further, t21 to t35 indicate time.

  When the detection start signal rises at t22 as shown in FIG. 6 (1), the signal change detection unit 32 uses the A phase voltage signal and B as the reference for the timer unit 36 to measure the rise time of the detection start signal as described above. The time when the rising / falling of the phase voltage signal occurs is acquired from the timer unit 36 and stored in the storage unit 33 as the on / off change time of the A phase and the B phase. On the other hand, the time difference calculation unit 34 calculates the time difference A and the time difference B from the on / off change time extracted from the storage unit 33 and outputs the time difference A and the time difference B to the phase switching determination unit 35. In the following description, since the process until the time difference A and the time difference B are calculated is the same, the description starts from the time when the time difference A and the time difference B are calculated.

  When the half period of the input voltage of the power supply device 1 described in FIG. 5 is divided into six periods, the switching is performed as shown in FIGS. 6 (3), 6 (4), and 6 (6). The control unit 16 reduces the on-duty as the instantaneous voltage of the AC voltage detected by the input voltage detection unit 40 increases, so that the phase voltage on-duty of the A-phase voltage signal and the B-phase voltage signal is 52% (104 microseconds). In this case, the time difference calculation unit 34 calculates both the time difference A from t24 to t25 and the time difference B from t27 to t28 as 4 microseconds.

  Since the period identification value input from the period transition counter unit 37 is 1 (period 1), the phase switching determination unit 35 to which this time difference is input has the condition of period 1 of the period transition condition, that is, the time difference A and the time difference. B is less than the time difference threshold value, and it is determined that the period transition condition is satisfied. At t29, which is the rising edge of the next detection start signal, the phase switching signal is changed from the low level to the high level, and an update instruction is given to the period transition counter unit 37. The period identification value is updated from 1 to 2 for output.

  On the other hand, the clock switching unit 17 to which the high-level phase switching signal is input switches the B-phase clock signal from the current 180-degree delayed clock signal to the 191-degree delayed clock signal and outputs it to the switching control unit 16. As a result, as shown in FIG. 6 (2), the rising edge of the B phase clock signal at t32 is a signal delayed by 6 microseconds (phase shift time) from the falling edge of the A phase clock signal at t30.

  For this reason, the time difference A between t31 and t33 is changed from 4 microseconds before the clock signal switching to 10 microseconds after the clock signal switching, and the time difference B between t34 and t35 is after the clock signal switching from 4 microseconds before the clock signal switching. 2 microseconds. However, the fall of the B-phase voltage signal at t35 is delayed from the rise of the A-phase voltage signal at t34, and the period of period 2 is the direction in which the switching control unit 16 decreases the on-duty. In the interval, the time difference B increases, and in FIG. 6, the rising edge of the A phase voltage signal and the falling edge of the B phase voltage signal do not overlap.

  In this section 2, the phase switching determination unit 35 determines that the time difference A calculated by the time difference calculation unit 34 is 10 microseconds and is larger than the time difference threshold, so that the condition of period 2 of the period transition condition, that is, the time difference A is the time difference threshold. Therefore, the phase switching determination unit 35 keeps the phase switching signal at the high level.

FIG. 7 is an explanatory diagram for explaining the timing relationship between the voltages switched by the IGBT 7 and the IGBT 8. In the period 2 described with reference to FIG. 5, the switching control unit 16 sets the on-duty of the switching signal for driving the IGBT 7 and the IGBT 8 as the input voltage. The case where it reduces as the instantaneous voltage of the alternating voltage detected by the detection part 40 becomes large is shown. As a result,
In this example, the time difference A is smaller than the time difference threshold, and the phase switching determination unit 35 switches the phase switching signal and shifts from the period 2 to the period 3.

  In FIG. 7, the horizontal axis represents time, and the vertical axis represents the voltage of each signal. 7 (1) is the A phase clock signal, FIG. 7 (2) is the B phase clock signal, FIG. 7 (3) is the A phase voltage signal, FIG. 7 (4) is the B phase voltage signal, and FIG. ) Indicates the phase switching signal, and FIG. 7 (6) indicates the period indicated by the count value of the period transition counter unit 37. Further, t41 to t53 indicate time.

  When the half period of the input voltage of the power supply device 1 described in FIG. 5 is divided into six periods, the switching is performed as shown in FIGS. 7 (3), 7 (4), and 7 (6). The control unit 16 decreases the on-duty as the instantaneous voltage of the AC voltage detected by the input voltage detection unit 40 increases, and sets the phase voltage on-duty of the A-phase voltage signal and the B-phase voltage signal to 49% (98 microseconds). In this case, the time difference calculation unit 34 calculates the time difference A between t43 and t44 as 4 microseconds, and the time difference B between t45 and t46 as 8 microseconds.

  At this time, since the period identification value input from the period transition counter unit 37 is 2 (period 2), the phase switching determination unit 35 has a period 2 condition of the period transition condition, that is, the time difference A is less than the time difference threshold. Since the condition is satisfied, the phase switching determination unit 35 changes the phase switching signal from high level to low level at t47 and outputs an update instruction to the period transition counter unit 37, so that the period identification value is updated from 2 to 3. The

  On the other hand, the clock switching unit 17 to which the low-level phase switching signal is input switches the B phase clock signal from the current 191 degree delayed clock signal to the 180 degree delayed clock signal and outputs it to the switching control unit 16. As a result, as shown in FIG. 7B, the rising edge of the B phase clock signal becomes a signal synchronized with the falling edge of the A phase clock signal.

  Therefore, the time difference A between t49 and t50 is changed from 4 microseconds before switching the clock signal to 2 microseconds after the clock signal switching, and the time difference B between t52 and t53 is switched from 8 microseconds before the clock signal switching. The latter 2 microseconds. However, the fall of the A phase voltage signal at t50 is delayed from the rise of the B phase voltage signal at t49, and during the period indicated by the time difference B, the B phase voltage signal at t53 than the rise of the A phase voltage signal at t52. Since the switching control unit 16 decreases the on-duty in the period 3 period, the time difference A and the time difference B increase in the period 3 period, and the A phase voltage signal Does not overlap in time with the fall of the B-phase voltage signal.

In this period 3, the phase switching determination unit 35 does not correspond to the condition of the period 3 of the period transition condition, that is, the case where the on-duty value output from the switching control unit 16 changes from the decreasing direction to the increasing direction. The determination unit 35 keeps the phase switching signal at the low level regardless of the values of the time difference A and the time difference B.
Note that in this period 3, the phase switching determination unit 35 outputs an update instruction to the period transition counter unit 37 when the condition of the period 3 described above is satisfied, so that the period identification value is updated from 3 to 4.

  FIG. 8 is an explanatory diagram for explaining the timing relationship of the voltages switched by the IGBT 7 and the IGBT 8. When the half cycle of the input voltage of the power supply device 1 described in FIG. The case where the on-duty is increased as the instantaneous voltage of the AC voltage detected by the input voltage detection unit 40 by the control unit 16 decreases is shown. As a result, the timing at which the ON / OFF changes of the A-phase voltage signal and the B-phase voltage signal overlap each other approaches, both the time difference A and the time difference B become smaller than the time difference threshold, and the phase switching determination unit 35 switches the phase switching signal to The case where it shifted to period 5 from is shown.

  In FIG. 8, the horizontal axis represents time, and the vertical axis represents the voltage of each signal. 8 (1) is the A phase clock signal, FIG. 8 (2) is the B phase clock signal, FIG. 8 (3) is the A phase voltage signal, FIG. 8 (4) is the B phase voltage signal, and FIG. ) Indicates the phase switching signal, and FIG. 8 (6) indicates the period indicated by the count value of the period transition counter unit 37. Moreover, t61-t75 has shown time.

  When the half period of the input voltage of the power supply device 1 described in FIG. 5 is in period 4 among the periods divided into 6, switching is performed as shown in FIGS. 8 (3), 8 (4), and 8 (6). The control unit 16 increases the on-duty as the instantaneous voltage of the AC voltage detected by the input voltage detection unit 40 decreases, and the phase voltage on-duty of the A-phase voltage signal and the B-phase voltage signal is 48% (96 microseconds). In this case, the time difference calculation unit 34 calculates both the time difference A from t63 to t64 and the time difference B from t67 to t68 as 4 microseconds.

  At this time, since the period identification value input from the period transition counter unit 37 is 4 (period 4), the phase switching determination unit 35 has the condition of the period transition condition, that is, the time difference A and the time difference B both. In order to determine that it is less than the time difference threshold value and satisfy the period transition condition, and to change the phase switching signal from low level to high level at t69, which is the rising edge of the next detection start signal, and to output an update instruction to the period transition counter unit 37 The period identification value is updated from 4 to 5 (period 5).

  On the other hand, the clock switching unit 17 to which the high-level phase switching signal is input switches the B-phase clock signal from the current 180-degree delayed clock signal to the 191-degree delayed clock signal and outputs it to the switching control unit 16. As a result, as shown in FIG. 8 (2), the B-phase clock signal becomes a signal delayed by 6 microseconds (phase shift time) from the fall of the A-phase clock signal at t70 to the rise of the B-phase clock signal at t71. .

  Therefore, the time difference A between t72 and t73 calculated by the time difference calculation unit 34 is changed from 4 microseconds before the clock signal switching to 2 microseconds after the clock signal switching, and the time difference B between t74 and t75 is before the clock signal switching. From 4 microseconds to 10 microseconds after switching the clock signal. However, since the rising of the B-phase voltage signal at t73 is delayed from the falling of the A-phase voltage signal at t72, and the period of the period 5 is the direction in which the switching control unit 16 increases the on-duty. In the phase voltage signal, the time difference A increases, and in FIG. 8, the rise of the A phase voltage signal and the fall of the B phase voltage signal do not overlap.

  In this period 5, the phase switching determination unit 35 has a calculated time difference B of 10 microseconds and is larger than the time difference threshold, and therefore does not satisfy the condition of period 5 of the period transition condition, that is, the condition that the time difference B is less than the time difference threshold. Therefore, the phase switching determination unit 35 keeps the phase switching signal at the high level.

  FIG. 9 is an explanatory diagram for explaining the timing relationship of the voltages switched by the IGBT 7 and the IGBT 8. When the half cycle of the input voltage of the power supply device 1 described in FIG. The case where the on-duty is increased as the instantaneous voltage of the AC voltage detected by the input voltage detection unit 40 by the control unit 16 decreases is shown. As a result, the timing at which the ON / OFF changes of the A-phase voltage signal and the B-phase voltage signal overlap is approaching, the time difference B becomes smaller than the time difference threshold, and the phase switching determination unit 35 switches the phase switching signal to change from the period 5 to the period 6. The case of migration is shown.

  In FIG. 9, the horizontal axis represents time, and the vertical axis represents the voltage of each signal. 9 (1) is the A phase clock signal, FIG. 9 (2) is the B phase clock signal, FIG. 9 (3) is the A phase voltage signal, FIG. 9 (4) is the B phase voltage signal, and FIG. ) Indicates the phase switching signal, and FIG. 9 (6) indicates the period indicated by the count value of the period transition counter unit 37. Further, t81 to t94 indicate times.

  As shown in FIGS. 9 (3), 9 (4), and 9 (6), when the half period of the input voltage of the power supply device 1 described in FIG. The control unit 16 increases the on-duty as the instantaneous voltage of the AC voltage detected by the input voltage detection unit 40 decreases, and the phase voltage on-duty of the A-phase voltage signal and the B-phase voltage signal is 51% (102 microseconds). In this case, the time difference calculation unit 34 calculates the time difference A from t83 to t84 as 8 microseconds and the time difference B from t86 to t87 as 4 microseconds.

  At this time, since the period identification value input from the period transition counter unit 37 is 5 (period 5), the phase switching determination unit 35 has the condition of period 5 of the period transition condition, that is, the time difference B is less than the time difference threshold. Since the condition is satisfied, the phase switching determination unit 35 changes the phase switching signal from high level to low level at t88 and outputs an update instruction to the period transition counter unit 37, so that the period identification value is updated from 5 to 6. The

  On the other hand, the clock switching unit 17 to which the low-level phase switching signal is input switches the B phase clock signal from the current 191 degree delayed clock signal to the 180 degree delayed clock signal and outputs it to the switching control unit 16. As a result, as shown in FIG. 9B, the B-phase clock signal becomes a signal synchronized with the falling edge of the A-phase clock signal.

  Therefore, the time difference A between t91 and t92 is changed from 8 microseconds before the clock signal switching to 2 microseconds after the clock signal switching, and the time difference B between t93 and t94 is after the clock signal switching from 4 microseconds before the clock signal switching. 2 microseconds. However, the rising of the B-phase voltage signal at t92 is delayed from the falling of the A-phase voltage signal at t91, and during the period indicated by the time difference B, the A-phase voltage at t94 than the falling of the B-phase voltage signal at t93. Since the rising edge of the signal is delayed and the period 6 is the direction in which the switching control unit 16 increases the on-duty, the time difference A and the time difference B both increase in the period 6, and the A-phase voltage signal Does not overlap in time with the fall of the B-phase voltage signal.

In this period 6, the phase switching determination unit 35 does not correspond to the period transition condition period 6, that is, the case where the on-duty value output from the switching control unit 16 changes from the increasing direction to the decreasing direction. The determination unit 35 keeps the phase switching signal at the low level.
Note that in this period 6, the phase switching determination unit 35 outputs an update instruction to the period transition counter unit 37 when the condition of the period 6 described above is satisfied, so that the period identification value is updated from 6 to 1.

  As described above, the switching control unit 16 performs the operation of the phase switching unit 30 so that the A-phase voltage signal and the B-phase voltage are detected by the switching between the IGBT 7 and the IGBT 8 detected by the A-phase voltage detection unit 10 and the B-phase voltage detection unit 9. Based on the rise and fall timings of the two voltages of the signal, the phase of the B-phase clock signal is switched to one of phase 180 degrees and phase 191 degrees to switch the A-phase switching signal and the B-phase switching signal. The phase difference is controlled. For this reason, generation | occurrence | production of a noise can be reduced by avoiding the time overlap of the switching timing of IGBT7 and IGBT8 in A phase switching part 21 and B phase switching part 22 inside.

  Also, based on the operation at 180 degrees, the switching time of the IGBT 7 and IGBT 8 is temporarily switched to 191 degrees before the time overlap occurs, and the operation time at the phase difference of 191 degrees is shortened as much as possible. In addition, since the operation at the phase difference of 180 degrees can be lengthened and the ratio of the operation time at the phase difference of 180 degrees as a whole can be increased, the input current in the interleaving method assuming the phase difference of 180 degrees as a whole Effects such as ripple reduction can be prevented from being impaired.

  Also, the phase difference between the A-phase switching signal and the B-phase switching signal, including variations in switching turn-on / turn-off time caused by differences in temperature, current, and individual characteristics of the IGBT 7 and IGBT 8 used in each switching unit. Therefore, as in the conventional method, the method of the present application is more effective than the phase difference between two switching signals that are defined in advance in consideration of the maximum variation of the turn-on / turn-off time of the switching element. The phase difference can be designed to be small, and the effects such as the ripple reduction of the input current in the interleave method based on the phase difference of 180 degrees can be prevented from being impaired.

DESCRIPTION OF SYMBOLS 1 Power supply device 2 Input terminal 3 Input terminal 4 Rectifier 5 Inductor 6 Inductor 7 IGBT (A phase switching element)
8 IGBT (B-phase switching element)
9 A phase voltage detector (first voltage detector)
10 B-phase voltage detector (second voltage detector)
DESCRIPTION OF SYMBOLS 11 Diode 12 Diode 13 Smoothing capacitor 14 Positive voltage output terminal 15 Negative voltage output terminal 16 Switching control part 17 Clock switching part 18 Clock generation part 19 Delay signal generation part 20 Clock signal generation part (clock signal generation means)
21 A-phase switching unit (first switching unit)
21a input terminal 21b output terminal 21c common terminal 21d signal terminal 22 B-phase switching unit (second switching unit)
22a Input end 22b Output end 22c Common end 22d Signal end 30 Phase switching section (phase switching means)
31 90-degree phase delay unit 32 signal change detection unit 33 storage unit 34 time difference calculation unit 35 phase switching determination unit 36 timer unit 37 period transition counter unit 40 input voltage detection unit

Claims (2)

A rectifier for rectifying the AC power inputted, a first switching unit and second switching unit connected in parallel to the voltage rectified by the rectifier is input from the first switching unit and the second switching unit A smoothing capacitor that smoothes the output voltage ;
A switching control unit that generates a first switching signal for driving the first switching unit and a second switching signal for driving the second switching unit with a predetermined phase difference;
A first voltage detection unit that detects a voltage switched by the first switching unit and outputs a first voltage detection signal;
A power supply device of an interleave type comprising a second voltage detection unit that detects a voltage switched by the second switching unit and outputs a second voltage detection signal ;
The power supply apparatus, wherein the switching control unit changes the phase difference based on rising and falling timings of the first voltage detection signal and the second voltage detection signal, respectively.
The switching control unit generates the first switching signal and the second switching signal by selecting either the first phase difference that is the phase difference or a second phase difference that is larger than the first phase difference;
A first time difference between the rising edge of the first voltage detection signal and the falling edge of the second voltage detection signal, and a second time difference between the falling edge of the first voltage detection signal and the rising edge of the second voltage detection signal. If any one of these is less than a predetermined time difference threshold, the second phase difference is selected,
2. The power supply device according to claim 1, wherein the first phase difference is selected when one of the first time difference and the second time difference becomes less than the time difference threshold.

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