JP6230015B2 - Optical phase modulation signal receiver - Google Patents

Description

  The present invention relates to an optical phase modulation signal receiving apparatus.

  In order to receive a phase modulation signal in optical communication, it is necessary to synchronize the phase with local light (Local light) having the same frequency as the received signal light. For this purpose, the phase error between the received signal light and the local light must be detected. In the phase modulation method, since a signal is transmitted as a phase, a COSTAS circuit, a decision-driven circuit, or the like is used to detect a phase error that does not depend on the signal.

  FIG. 2 shows a QPSK receiving optical PLL in which a COSTAS loop introduced in Non-Patent Document 1 is combined with a decision-driven circuit. In this optical phase modulation signal receiver for optical communication, the voltage-controlled oscillator (VCO) is replaced with a semiconductor laser light source, and the broken line part from this part to the low-pass filter (LPF) is an optical 90-degree hybrid circuit. It is configured by replacing it with a photodiode (PD). Other components include an adder, a subtracter, an exclusive OR, and an identification circuit.

  The above circuit configuration also serves as data demodulation. When the phase is locked, demodulated signals DATA1 and DATA2 can be obtained by identifying signals from the I-arm and Q-arm by the identification circuit. Therefore, since the signal after the identification circuit is binarized, the multiplication is equivalent as an exclusive OR (ExOR). On the other hand, an analog addition / subtraction circuit is required to detect the phase error.

  That is, the optical phase modulation signal receiving apparatus in FIG. 2 is used for a QPSK transmitting / receiving apparatus that transmits and receives by modulating two orthogonal carrier components having different 90 ° phases, and has a demodulation function using a homodyne phase-locked detection method. In order to realize the phase error adjustment function, synchronous detection signal preamplifiers (A1, A2) for outputting electrical signals (Q-arm, I-arm) for two orthogonal carriers, and the synchronous detection signal preamplifier The electrical signals (Q-arm, I-arm) from (A1, A2) are input via the filters (F1, F2) and an adder (Ad) for calculating the sum and a subtractor (Su) for calculating the difference. ), An exclusive OR circuit (L1) that calculates the exclusive OR (G) by inputting and multiplying the component values from the adder (Ad) and the subtracter (Su), and the synchronous detection signal pre-set The differential signals (Q-arm, I-arm) from the amplifiers (A1, A2) are input and A / D converted to calculate the difference between them and the data signal ( An exclusive circuit that outputs the exclusive OR (H) by inputting and multiplying the component signals (Q, I) from the decision circuit (M1, M2) that outputs ATA1, DATA2) and the decision circuit (M1, M2) OR circuit (L2)), exclusive OR (H) from the exclusive OR circuit (L1) and exclusive OR (G) from the exclusive OR circuit (L2) Multiplication processing is performed to calculate an exclusive OR, and sin ε proportional to the multiplication value is obtained. Based on this, phase error ε (phase error) is obtained and fed back to the semiconductor laser (LD) through a loop filter. An exclusive OR circuit (L3) is provided. Here, the decision circuits (M1, M2) are for demodulating the received signal, while the adder circuit (Ad), the subtracter circuit (Su) and the exclusive OR (L1, L2, L3) are the received signals. 2 is a circuit for detecting a phase error in

Seiji Norimatsu, Katsushi Iwashita, and Kazuto Noguchi, ”An 8Gb / s QPSK optical homodyne detection experiment using external-cavity laser diodes,” IEEE photonics tech. Lett., Vol. 4, No. 7, pp.765-767, July 1992.

  In the optical phase modulation signal receiver of FIG. 2, the signals G and H need to reach the exclusive OR circuit (L3) at the same timing from Q-arm and I-arm, and when these conditions are satisfied, The multiplication result of the signals G and H with respect to the phase error ε between the light and the local light is proportional to sin ε. However, the signal H passes through the decision circuit (M1, M2) and the exclusive OR circuit (L2), whereas the signal (G) is added to the adder (Ad) or subtracter (Su) and the exclusive OR circuit. Since (L1) has been passed and the elements in the path are different, a delay circuit for adjusting the timing to at least one of the paths is necessary. This is accompanied by an increase in expensive elements and difficulty in adjustment.

  The present invention provides an optical phase modulation signal receiving apparatus that is a simple circuit that does not increase the number of elements such as a delay circuit, and that can easily adjust and detect a phase error with high accuracy.

A first aspect of the present invention for solving the above-described problem is as follows (1).
(1). A QPSK transmitter / receiver that modulates two orthogonal carrier components with different 90 ° phases and transmits / receives them. The demodulator circuit using the homodyne phase-locked detection method (the entire circuit shown in Fig. 1) has a difference with respect to the two orthogonal carriers. Synchronous detection signal preamplifiers (AA1, AA2) for outputting dynamic signals (Q-arm, I-arm) and the differential signals (Q-arm, AA2, AA2) from the synchronous detection signal preamplifiers (AA1, AA2) I-arm) and a first arithmetic circuit (B) for calculating the sum and difference thereof, and the differential signals (Q-arm, I-arm) from the synchronous detection signal preamplifiers (AA1, AA2). ) And a second arithmetic circuit (C) for calculating the difference between them,
The first arithmetic circuit (B) includes a positive component Q of the differential signal Q-arm from the synchronous detection signal preamplifier (AA1) and a differential signal (Q2) from the synchronous detection signal preamplifier (AA2). -arm) having a first discrimination circuit (B1) for inputting a negative-polarity component (I (-)) and discriminating the magnitude of the sum of the components, and differential from the synchronous detection signal preamplifier (AA1) The positive component (Q) of the signal (Q-arm) and the positive component (I) of the differential signal (Q-arm) from the synchronous detection signal preamplifier (AA2) are input, and the magnitude of the component difference is identified. And a second discrimination circuit (B2) for judging whether or not each decision output signal (X, Y) from the first discrimination circuit (B1) and the second discrimination circuit (B2) is inputted, multiplied and exclusive. A first exclusive OR circuit (B3) for calculating a logical OR (XY),
The second arithmetic circuit (C) inputs the positive component (Q) and the negative component (Q (−)) of the differential signal Q-arm from the synchronous detection signal preamplifier (AA1), and the difference between the components ( Q) and a third identification circuit (C1) for outputting a data signal (DATA1) and a positive polarity component of the differential signal (I-arm) from the synchronous detection signal preamplifier (A2) ( I) and a negative electrode component (I (-)) are input, a component difference (I) is calculated, and a fourth identification circuit (C2) for outputting a data signal (DATA2) is provided. C1) and a second exclusive OR circuit (C3) for inputting each judgment output signal (Q, I) from the fourth discriminating circuit (C2) and multiplying them to calculate an exclusive OR (Z) And
The exclusive OR (XY) from the first exclusive OR circuit (B3) and the exclusive OR (Z) from the second exclusive OR circuit (C3) are inputted and multiplied to be exclusive. A third exclusive OR circuit (D) is provided to calculate the logical sum (XYZ), determine sin ε proportional to the multiplication value, determine the phase error ε based on this, and feed it back to (LD) through the loop filter. An optical phase modulation signal receiver characterized by the above.

In the second aspect of the present invention, in an optical phase modulation signal receiving apparatus that is used in a QPSK transmitting / receiving apparatus that performs transmission / reception by modulating two orthogonal carrier components having different 90 ° phases, and has a demodulation function based on a homodyne phase-locked detection method In order to correct the phase error of the signal light input to the optical 90 ° hybrid circuit, the apparatus
A differential output type first and second synchronous detection signal preamplifier coupled to an output of the optical 90 ° hybrid circuit, wherein the first synchronous detection signal preamplifier is a positive electrode of Q-arm. The first and second synchronous detection signal preamplifiers output the component Q and the negative component -Q, and the second synchronous detection signal preamplifier outputs the positive component I and the negative component -I of I-arm. When,
A differential input type first identification circuit connected to the first synchronous detection signal preamplifier;
A differential input type second identification circuit connected to the second synchronous detection signal preamplifier;
A differential input type third identification circuit having as inputs the positive component Q of the first synchronous detection signal preamplifier output and the negative component -I of the second synchronous detection signal preamplifier output;
A differential input type fourth discriminating circuit having the positive component Q of the first synchronous detection signal preamplifier output and the positive component I of the second synchronous detection signal preamplifier output as inputs;
A first exclusive OR circuit to which outputs of the first identification circuit and the second identification circuit are input;
A second exclusive OR circuit to which the outputs of the third and fourth identification circuits are input;
A third exclusive OR circuit to which the first and second exclusive OR circuit outputs are input, and
There is provided an optical phase modulation signal receiving apparatus, wherein the third exclusive OR output is detected as a phase error.

  According to the optical phase modulation signal receiving apparatus of the present invention, a third exclusive OR circuit is obtained by multiplying each of the signals Q, Q (−), I, and I (−) from I-arm or Q-arm by the circuit configuration. The elements on all the paths up to (D) are made one identification circuit and one exclusive OR circuit, and only the wiring is made the same length, so that the third exclusive OR circuit (D) is connected. Since the signal input timing is matched, the phase error in the third exclusive OR circuit (D) can be detected with high accuracy by adjusting the wiring length once.

  With the circuit configuration of the optical phase modulation signal receiving apparatus of the present invention, the number and types of elements through which signals in all paths pass are equal, and therefore, it is possible to receive a QPSK signal by making only the connection length accurate.

  In addition, by locking the phase of the local light to the main light source light, reception at the base station in optical communication becomes easy, and digital coherent technology only has to correct waveform distortion due to dispersion due to long-distance transmission, etc. Can be reduced. Therefore, the use of the optical phase modulation signal receiver according to the present invention leads to the realization of optical coherent communication.

1 shows a circuit of an embodiment of an optical phase modulation signal receiving apparatus of the present invention. It is a circuit diagram which shows the example of the conventional optical phase modulation signal receiver.

  An apparatus for carrying out the present invention will be described in detail with reference to FIG.

  FIG. 1 shows an optical phase modulation signal receiving apparatus according to an embodiment of the present invention. This device is used in a QPSK transmitter / receiver that modulates two orthogonal carrier components with different 90 ° phases and transmits / receives them, and detects the phase error in the received signal and the demodulation function using the homodyne phase-locked detection method. In order to realize the feedback function, an optical 90 ° hybrid circuit and first and second synchronous detection signal preamplifiers (AA 1, A) that output electrical signals (Q-arm, I-arm) for two orthogonal carriers are provided. AA2), a first arithmetic circuit (B) for inputting the signals (Q-arm, I-arm) from the synchronous detection signal preamplifiers (AA1, AA2) and calculating the sum and difference thereof, A second arithmetic circuit (C) for inputting the differential signals (Q-arm, I-arm) from the synchronous detection signal preamplifiers (AA1, AA2) and calculating a difference between them, and a third exclusive OR A circuit (D) is provided.

  Each of the synchronous detection signal preamplifiers (AA1, AA2) of the present invention includes a photodiode (PD) for photoelectrically converting the optical output from the optical 90 ° hybrid circuit, and the photodiode outputs Q-arm, I-arm, A differential output type amplifier (linear amplifier) is provided which is extracted as a differential output (+ Q, -Q and + I, -I).

  The first arithmetic circuit (B) includes a first identification circuit (B1), a second identification circuit (B2), and a first exclusive OR circuit (B3). The first discriminating circuit (B1) and the second discriminating circuit (B2) are differential input type discriminators from four signals (+ Q, -Q and + I, -I) from the synchronous detection signal preamplifiers (AA1, AA2). A circuit obtains a result of encoding (for example, quantizing to +1, −1) a signal proportional to 2I in the case of DATA1 in the case of DATA1 and Q2 in DATA2.

  The first discriminating circuit (B1) has a positive component Q of the differential output Q-arm from the synchronous detection signal preamplifier (AA1) and a differential output (Q-) from the synchronous detection signal preamplifier (AA2). The negative component (-I) of arm) is input and A / D converted to determine whether the component sum is large or small.

  The second identification circuit (B2) includes a positive component (Q) of the differential output (Q-arm) from the synchronous detection signal preamplifier (AA1) and a differential from the synchronous detection signal preamplifier (AA2). The positive component (I) of the output (Q-arm) is input and A / D converted to determine whether the component difference is large or small.

  The first exclusive OR circuit (B3) inputs the respective determination output signals (X, Y) from the first identification circuit (B1) and the second identification circuit (B2), performs multiplication processing, and performs exclusive OR. (XY) is calculated. The determination output signal (X) is obtained by encoding Q−I, and the determination output signal Y is obtained by encoding Q − (− I) = Q + I.

  The second arithmetic circuit (C) includes a third identification circuit (C1), a fourth identification circuit (C2), and a second exclusive OR circuit (C3).

  The third discriminating circuit (C1) inputs the positive component (Q) and the negative component (-Q) of the differential output Q-arm from the synchronous detection signal preamplifier (AA1), performs A / D conversion, and the component The difference (Q) is calculated and a data signal (DATA1) is output.

  The fourth discriminating circuit (C2) inputs the positive electrode component (I) and the negative electrode component (-I) of the differential output (I-arm) from the synchronous detection signal preamplifier (AA2) and performs A / D conversion. The component difference (I) is calculated and a data signal (DATA2) is output.

  The second exclusive OR circuit (C3) receives the respective decision output signals (Q, I) from the third discrimination circuit (C1) and the fourth discrimination circuit (C2), performs multiplication processing, and performs exclusive OR. (Z) is calculated.

  The third exclusive OR circuit (D) includes an exclusive OR (XY) from the first exclusive OR circuit (B3) and an exclusive OR (C3) from the second exclusive OR circuit (C3). Z) is input and multiplication processing is performed to calculate an exclusive OR (XYZ), sinε proportional to the multiplication value is obtained, and based on this, a phase error ε is obtained, and this is used as a loop filter. After being input to the light emitting diode (LD) and converted into an optical signal, the light is fed back to the optical 90 ° hybrid circuit as local light (local light).

  Thus, since either Q + I or Q−I is sinε or −sinε when the phase error is ε, the third exclusive OR circuit (D) The result of always quantizing + sinε by the exclusive OR (Z) of DATA1 and DATA2 from the circuit (B3) and the exclusive OR from the first exclusive OR circuit (B3), that is, the sign information of the phase error obtain.

  The above holds when the phase error is in the range of −π <ε <π. The signal sent to the loop filter is not proportional to the phase error ε, but is a result of identifying the phase error, that is, sign information of positive or negative. Therefore, the signal input to the loop filter is a sign signal of the error for each bit, and has a high speed of several GHz order and an amplitude of several hundred millivolts. By providing it, it can be used sufficiently as a phase control signal for semiconductor laser light.

  As described above, each of the identification circuits is a circuit that compares and determines the magnitude relationship between the input signals. For example, the identification circuit uses a differential input type limiting amplifier (amplitude limited high gain amplifier) or a comparator (comparative amplifier). The input analog signal is converted into a 0/1 digital signal to generate Q, I, X, and Y. Thus, each exclusive OR circuit generates a phase error that does not depend on signal data.

  The loop filter converts the phase error signal ε from the third exclusive OR circuit (D) into a signal that controls the optical frequency of the LD.

  With the above circuit configuration, the analog signal addition / subtraction circuit required in the above-described conventional circuit configuration is not necessary in the device of the present invention, and each path to the loop filter has one identification circuit and two exclusive ORs. Since it becomes a circuit, the signal input timing to the third exclusive OR circuit (D) matches by simply adjusting the path length equally, and the phase error in the third exclusive OR circuit (D) is accurate. It can be detected well.

  In FIG. 1, the negative outputs of the limiting amplifiers B1, B2, C1, and C2 are not necessarily connected to the first or second exclusive OR circuit B3 and C3, and the first exclusive OR circuit is not necessarily connected. It is not necessary to connect the positive output of B3 and the negative output of the second exclusive OR circuit C3 to the negative output of the third exclusive OR circuit D, but by connecting them, the S / N ratio of the signal Can be improved.

Next, a known logic for calculating the phase error will be introduced below.
<Modulation side>
PPG1 = data1
PPG2 = data2
A phase difference of π is given by 0 and 1 of data *, and a phase difference of π / 2 is given by data 1 and 2.

Now, let the input light be cos (wt + 0)
For Arm1, (1 / √2) cos (wt + θ ₁ ) by data1
For Arm2, (1 / √2) cos (wt + θ ₂ ) by data2
Π / 2 is given when combining these, so the output light is
(1 / √2) {cos (wt + θ ₁ ) + sin (wt + θ ₂ )}
= (1 / √2) {coswt * cosθ ₁ -sinwt * sinθ ₁ + sinwt * cosθ ₂ + coswt * sinθ ₂ }
(where θ1, θ2 = 0orπ)
= (1 / √2) {coswt * cosθ ₁ + sinwt * cosθ ₂ }
It becomes.

If the transmission data is 0, θ = 0, and 1 if θ = π
When (data1, data2) = (0, 0) (1 / √2) {+ coswt + sinwt} = sin (wt + π / 4) = cos (wt-π / 4)
When (data1, data2) = (0, 1) (1 / √2) {+ coswt-sinwt} = sin (wt + 3π / 4) = cos (wt + π / 4)
When (data1, data2) = (1, 0) (1 / √2) {-coswt + sinwt} = sin (wt-π / 4) = cos (wt-3π / 4)
When (data1, data2) = (1, 1) (1 / √2) {-coswt-sinwt} = sin (wt-3π / 4) = cos (wt + 3π / 4)

therefore
(data1, data2) = {(00) (0,1), (1,0), (1,1)} = {-π / 4, + π / 4, -3π / 4, + 3π / 4} = θ (data1, data2)
It is.

<Receiving side>
S = cos (wt + θ): Signal light
L = cos (wt + ε): Local light emission
S + L = cos (wt + θ) + cos (wt + ε) = 2cos (wt + (θ + ε) / 2) cos ((θ-ε) / 2)
SL = cos (wt + θ) -cos (wt + ε) =-2sin (wt + (θ + ε) / 2) sin ((θ-ε) / 2)
S + jL = cos (wt + θ) -sin (wt + ε) = 2cos (wt + (θ + ε + π / 2) / 2) cos ((θ-ε-π / 2) / 2)
S-jL = cos (wt + θ) + sin (wt + ε) = 2cos (wt + (θ + ε-π / 2) / 2) cos ((θ-ε + π / 2) / 2)
exp (jA) + j * exp (jB) = exp (jA) + exp {j (B + π / 2)}
A = wt + (θ + ε) / 2, B = (θ-ε) / 2
2cosAcosB = cos (A + B) + cos (AB), 2sinAsinB = cos (AB) -cos (A + B)
Furthermore, square detection by PD ((1 + cos2A) / 2 = cosAcosA, (1-cos2A) / 2 = sinAsinA)
S + L = 2cos (wt + (θ + ε) / 2) cos ((θ-ε) / 2): 1+ cos (θ-ε)
SL = -2sin (wt + (θ + ε) / 2) sin ((θ-ε) / 2): 1-cos (θ-ε)
S + jL = 2cos (wt + (θ + ε + π / 2) / 2) cos ((θ-ε-π / 2) / 2); 1 + sin (θ-ε)
S-jL = 2cos (wt + (θ + ε-π / 2) / 2) cos ((θ-ε + π / 2) / 2): 1-sin (θ-ε)
Because it ’s more differential.
I = 2cos (θ-ε)
Q = 2sin (θ-ε)
Therefore, I-arm represents cosθ or data1
Q-arm represents sinθ, that is, data2.

<Decision driven circuit>
The dd circuit decodes data and detects the phase error ε. Furthermore, homodyne detection can be realized stably by controlling local light emission through a loop filter. However, the data is not dependent on θ, which is data, but only on ε.
• The decision circuit digitizes analog signals into binary values. (Use [] in expressions)
(Actually a limited circuit or comparator)

<Sender>
(data1, data2) = {(0,0) (0,1), (1,0), (1,1)} = {-π / 4, + π / 4, -3π / 4, + 3π / 4} = θ (data1, data2)
<Receiving side>
I = 2cos (θ-ε)
Q = 2sin (θ-ε)
What happens to ERROR output?

Because always 4θ = π
ERROR = [sin (4ε)]
+/- is determined by the error ε.
In particular
When (0, 0), θ = -π / 4
I = 2cos (-π / 4-ε) = √2 (cosε-sinε)
Q = 2sin (-π / 4-ε) = √2 (-cosε-sinε)
I + Q = -2√2 (sinε)
IQ = + 2√2 (cosε)
Than

つまり、ERRORからはデータに依存せずにsinεに従った出力が得られる。また、εの絶対値が充分に小さいとき（|ε|≪１）、sinε≒εが成り立つ。

In other words, the output according to sinε is obtained from ERROR without depending on the data. When the absolute value of ε is sufficiently small (| ε | << 1), sinε≈ε holds.

  Since the optical phase modulation signal receiving apparatus of the present invention has the above-described excellent operational effects, there is a great deal of utilization and contribution in the optical communication industry and related industries.

AA1, AA2 Synchronous detection signal preamplifier B 1st operation circuit C 2nd operation circuit B1 1st discrimination circuit B2 2nd discrimination circuit B3 1st exclusive OR circuit C1 3rd discrimination circuit C2 4th discrimination circuit C3 2nd Exclusive OR circuit
D Third exclusive OR circuit

Claims (4)

An optical phase-modulated signal receiving device that is provided in a QPSK transmitting / receiving device that modulates two orthogonal carrier components with different 90 ° phases and performs transmission / reception, and that performs demodulation using a homodyne phase-locked detection method, the device includes an optical 90 ° hybrid circuit A synchronous detection signal preamplifier (AA1, AA2) for outputting signals (Q-arm, I-arm) for two orthogonal carriers from the hybrid circuit as differential outputs, and the synchronous detection signal preamplifier ( A first arithmetic circuit (B) for inputting the differential outputs (Q-arm, I-arm) from AA1, AA2) and calculating the sum and difference thereof, and the synchronous detection signal preamplifiers ( AA1 , AA2) And a second arithmetic circuit (C) that inputs the differential output (Q-arm, I-arm)
The first arithmetic circuit (B) includes a difference between the positive component ( Q ) of the differential output ( Q-arm ) from the synchronous detection signal preamplifier (AA1 ) and the synchronous detection signal preamplifier (AA2). A differential input type first discriminating circuit (B1) that receives the negative component (-I) of the dynamic output ( I- arm) and discriminates the magnitude of the sum of the components; The positive component (Q) of the differential output (Q-arm) from the AA1) and the positive component (I) of the differential output ( I -arm) from the synchronous detection signal preamplifier (AA2) are input. A differential input type second identification circuit (B2) for determining the magnitude of the component difference is provided, and each determination output signal (X,) from the first identification circuit (B1) and the second identification circuit (B2) is provided. Y) and a first exclusive OR circuit (B3) for calculating an exclusive OR (XY) by performing multiplication processing.
The second arithmetic circuit (C) inputs the positive component (Q) and the negative component (-Q) of the differential output ( Q-arm ) from the synchronous detection signal preamplifier (AA1), and the component difference ( Q) and a differential input type third identification circuit (C1) for outputting a data signal (DATA1) and a differential output (I-arm) from the synchronous detection signal preamplifier (AA2) A differential input type fourth discriminating circuit (C2) for inputting a positive electrode component (I) and a negative electrode component (-I) of the input and calculating a difference (I) between them and outputting a data signal (DATA2); A second exclusive OR that calculates the exclusive OR (Z) by inputting the decision output signals (Q, I) from the third discrimination circuit (C1) and the fourth discrimination circuit (C2) and multiplying them. Circuit (C3)
The exclusive OR (XY) from the first exclusive OR circuit (B3) and the exclusive OR (Z) from the second exclusive OR circuit (C3) are inputted and multiplied to be exclusive. A third exclusive OR circuit (D) for calculating a logical sum (XYZ) is provided;
The first identification circuit, the second identification circuit, the third identification circuit, and the fourth identification circuit are configured by one identification circuit, and the first exclusive OR circuit and the second exclusive OR circuit are one exclusive circuit. With a logical OR circuit,
An optical phase modulation signal receiving apparatus characterized in that local light emission is obtained by controlling a semiconductor laser with the output of the third exclusive OR circuit. An optical phase modulation signal receiving apparatus used in a QPSK transmission / reception apparatus that performs transmission / reception by modulating two orthogonal carrier components having different 90 ° phases and has a demodulation function based on a homodyne phase synchronous detection method. In order to correct the phase error of the signal light input to the circuit,
A differential output type first and second synchronous detection signal preamplifier coupled to an output of the optical 90 ° hybrid circuit, wherein the first synchronous detection signal preamplifier is a positive electrode of Q-arm. The first and second synchronous detection signal preamplifiers output the component Q and the negative component -Q, and the second synchronous detection signal preamplifier outputs the positive component I and the negative component -I of I-arm. When,
A differential input type first identification circuit connected to the first synchronous detection signal preamplifier;
A differential input type second identification circuit connected to the second synchronous detection signal preamplifier;
A differential input type third identification circuit having as inputs the positive component Q of the first synchronous detection signal preamplifier output and the negative component -I of the second synchronous detection signal preamplifier output;
A differential input type fourth discriminating circuit having the positive component Q of the first synchronous detection signal preamplifier output and the positive component I of the second synchronous detection signal preamplifier output as inputs;
A first exclusive OR circuit to which outputs of the first identification circuit and the second identification circuit are input;
A second exclusive OR circuit to which the outputs of the third and fourth identification circuits are input;
A third exclusive OR circuit to which the first and second exclusive OR circuit outputs are input, and
The first identification circuit, a second identification circuit, the third identification circuit and a fourth identification circuit constructed in one identification circuit, further wherein said first exclusive OR circuit and a second exclusive OR The sum circuit is composed of one exclusive OR circuit,
An optical phase modulation signal receiving apparatus, wherein the output of the third exclusive OR circuit is detected as a phase error.   3. The apparatus according to claim 2, wherein the detected signal indicating the phase error is input to the semiconductor laser device via a loop filter and input to the optical 90 ° hybrid circuit as local light. Optical phase modulation signal receiver.   4. The optical phase modulation signal receiving apparatus according to claim 2, wherein the first to fourth identification circuits are limiting amplifiers or comparators.

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